Guilherme Gallo [Wed, 20 Jul 2022 02:48:34 +0000 (23:48 -0300)]
ci/skqp: Build list_gpu_unit_tests and list_gms
These binaries are used to generate a list of tests that can be run in a
target device and are useful for testing new devices
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17835>
Guilherme Gallo [Wed, 20 Jul 2022 02:47:44 +0000 (23:47 -0300)]
ci/skqp: Fix Nima-Cpp fetching error
Nima-Cpp is not available anymore inside googlesource, revert to github
one
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17835>
Guilherme Gallo [Tue, 2 Aug 2022 20:14:06 +0000 (17:14 -0300)]
ci/skqp: Fix paths in skqp-runner
Default results directory was fixed via $PWD variable, but it is safer
to use the same as init-stage2.sh uses: $CI_PROJECT_DIR to indicate the
results folder.
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17835>
Guilherme Gallo [Wed, 20 Jul 2022 01:13:20 +0000 (22:13 -0300)]
ci/skqp: Show reports on crashes
Some skqp tests may crash the entire job run, assure that the reports
will be showed to the user after the test started to run.
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17835>
Guilherme Gallo [Wed, 20 Jul 2022 00:41:55 +0000 (21:41 -0300)]
ci/skqp: Add an option to run all tests
When the skqp is introduced to a new driver, the best practice is to
run all available tests from skqp and classifying the
failing/crashing/flaking ones.
The default behavior of skqp is to run the tests from the commit where
the skqp built, which may not be adequate for the target driver.
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17835>
Samuel Pitoiset [Thu, 21 Jul 2022 08:13:57 +0000 (10:13 +0200)]
radv: ignore out-of-order rasterization if stencil write mask is dynamic
This might break out-of-order rasterization on GFX8-GFX9 because it
relies on the stencil write mask which can be dynamic.
Found by inspection.
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17673>
Timothy Arceri [Thu, 4 Aug 2022 02:41:35 +0000 (12:41 +1000)]
Revert "nir: Preserve offsets in lower_io_to_scalar_early"
This reverts commit
96fa23bca5ac88e0cd2dd0c45fdef71b2afe888d.
The correct fix to the problem was
a1bc1523408a3, making this
change obsolete as the pass skips any vars marked with
always_active_io. There was no real advantage to allowing these
vars to be split because they can't be removed anyway. Also there
is no way to split varying arrays gracefully here due to the xfb
layout rules, and this change didn't handle arrays at all.
Removing this obsolete code also fixes an assert in the new CTS
test KHR-Single-GL45.enhanced_layouts.xfb_all_stages. The test
was legally adding xfb offsets to all vertex stages but since
we only mark the varyings in the final vertex stage with the
always_active_io flag the other stages were correctly lowering
to scalars but when an array with an offset hit this code it
asserted since it couldn't handle it.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Fixes:
a1bc1523408a3 ("spirv: mark variables decorated with XfbBuffer as always active")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6928
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17878>
Alyssa Rosenzweig [Sun, 7 Aug 2022 20:25:13 +0000 (16:25 -0400)]
agx: Only emit the used components of gl_FragCoord
In case a shader only use gl_FragCoord.xy, this avoids wasting
coefficient registers for gl_FragCoord.zw which should be a small
optimization. It's also less work for DCE but I'm less worried about
that.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
Alyssa Rosenzweig [Sun, 7 Aug 2022 18:18:00 +0000 (14:18 -0400)]
agx: Remove p_extract
It's now unused. We didn't have coalescing for it anyway, splits are the
preferred alternative.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
Alyssa Rosenzweig [Sun, 7 Aug 2022 18:16:43 +0000 (14:16 -0400)]
agx: Handle type-changing splits
If we want to break down a 64-bit value into its 32-bit halves, we want
to be able to use a split for this:
lo, hi = split long
Extend the RA to handle this case.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
Alyssa Rosenzweig [Tue, 2 Aug 2022 16:12:22 +0000 (12:12 -0400)]
agx: Stop using broken idiv lowering
It is, as the name suggests, broken. Instruction count goes from 50->53
on the shader in
dEQP-GLES2.functional.shaders.operator.binary_operator.div.highp_int_fragment.
I'm happy to eat that cost in exchange for correct results!
There are lots more low-hanging opportunities for optimizations to that
shader:
- fuse double icmpsel for the b2i32(cmp) sequences
- promoting big immediates to uniforms
- fusing integer multiply+add
But for now this is acceptable and anyway I'm doing this on "fix broken
NIR lowering" time and not Asahi time.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
Alyssa Rosenzweig [Tue, 2 Aug 2022 17:39:35 +0000 (13:39 -0400)]
agx: Implement nir_op_umul_high
This is crucial to the efficiency of the accurate idiv path.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
Alyssa Rosenzweig [Tue, 2 Aug 2022 17:38:57 +0000 (13:38 -0400)]
agx: Extract umul_high implementation
We can implement umul_high (for both 16-bit and 32-bit types)
efficiently by multiplying in the next larger type size and extracting
the upper word. We already have such an implementation (for instancing).
Extract it so we can use it for emit_alu too.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
Alyssa Rosenzweig [Tue, 2 Aug 2022 17:58:23 +0000 (13:58 -0400)]
agx: Assert that registers are naturally aligned
This seems to be an architectural constraint. Ensure that RA satisfies
it, because otherwise we're left with mysterious fails.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
Alyssa Rosenzweig [Tue, 2 Aug 2022 18:02:16 +0000 (14:02 -0400)]
agx: Align 64-bit register pairs
This seems to be necessary for correct operation.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
Alyssa Rosenzweig [Tue, 2 Aug 2022 16:07:59 +0000 (12:07 -0400)]
agx: Lower more ALU operations
Noticed while switching idiv lowerings. We could do better on some of these.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
Alyssa Rosenzweig [Sun, 7 Aug 2022 17:46:18 +0000 (13:46 -0400)]
agx: Implement noperspective interpolation
We need to get a matching coefficient register and change the encoding
of the iter instruction slightly, but otherwise this is normal.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
Alyssa Rosenzweig [Sun, 7 Aug 2022 15:56:22 +0000 (11:56 -0400)]
agx: Use split instead of extract for ldcf
For more uniform handling in the RA. This gets rid of the extra moves
with flat shading.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
Alyssa Rosenzweig [Sun, 7 Aug 2022 15:52:38 +0000 (11:52 -0400)]
agx: Rename varying load instructions
Unlike Mali (where I borrowed the old names from), these are not loads
in the memory sense. They are simply register loads and arithmetic.
Rename accordingly, using PowerVR names and public Apple names as a
guide.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
Alyssa Rosenzweig [Sun, 7 Aug 2022 15:45:21 +0000 (11:45 -0400)]
agx: Model perspective coefficient reg in the IR
For perspective-correct interpolation, the W coefficient register is
needed. Instead of hardcoding this to cf0 and special casing, model this
in the IR and let the general handling kick in.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
Alyssa Rosenzweig [Wed, 3 Aug 2022 00:59:21 +0000 (20:59 -0400)]
agx: Add AGX_MESA_DEBUG=noopt option
To disable the optimizer. Trying to root cause a Neverball bug, this
gives one less thing to worry.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
Alyssa Rosenzweig [Sun, 10 Jul 2022 21:36:20 +0000 (17:36 -0400)]
asahi,agx: Rewrite varying linking
Instead of using driver_location magic and hoping things work, make the
linkage between vertex and fragment shaders explicit. Thanks to the
coefficient register mechanism reverse-engineered and documented earlier
in this series, this does not require any shader keys to support
separable shaders. It just requires that we regenerate the coefficient
register binding tables at draw time, based on the varying layouts
decided by the compiler independently for the VS and FS. This is more
robust in the face of separate shaders.
This also gets us glProvokingVertex() support without shader keys.
After that, we don't need any of the remapping prepasses. For fragment
shaders, any old mapping will do, so we can assign coefficient registers
as we go (based on what the program actually uses, not nir_variable
information that might be stale by this point). We do want to cache
coefficient registers, particularly for fragcoord.w which is used for
perspective interpolation everywhere.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
Alyssa Rosenzweig [Tue, 2 Aug 2022 23:48:18 +0000 (19:48 -0400)]
asahi: Decode Interpolation packets
These have been known, just were missed.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
Alyssa Rosenzweig [Sun, 19 Jun 2022 22:10:09 +0000 (18:10 -0400)]
asahi: Fix varying XML
Lots of changes from reverse-engineering harder the interactions with
fp16 and noperspective and such, and comparing against the PowerVR
driver code in Mesa that's been released since this XML was
originally written.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
Alyssa Rosenzweig [Mon, 23 May 2022 17:32:56 +0000 (13:32 -0400)]
asahi: Encode known bits of Linkage in the XML
I'm pretty sure about these. There's too much hex anyway.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
Alyssa Rosenzweig [Mon, 23 May 2022 16:32:37 +0000 (12:32 -0400)]
asahi: Correct bind fragment pipeline size
A number of structures encode their size, but we were ignoring it just
for this fragment pipeline bind. Fix that.
This fix might also apply to bind vertex pipeline. Unsure.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
Alyssa Rosenzweig [Mon, 23 May 2022 16:27:39 +0000 (12:27 -0400)]
asahi: Split vertex/fragment pipeline binds
Although these are similar data structures, they are not identical and
trying to cover both in the same struct is causing problems with
aliasing. Split them out to get a more accurate representation.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
Alyssa Rosenzweig [Mon, 23 May 2022 14:29:58 +0000 (10:29 -0400)]
asahi: Use a single bind texture/sampler per pipeline
Matches what Metal does. This is simpler and in the future could be
better optimized.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
Alyssa Rosenzweig [Wed, 19 Jan 2022 02:54:22 +0000 (21:54 -0500)]
asahi: Fix using multiple textures/samplers
The counts for textures/samplers are specified in the bind
texture/sampler packets. What's in the bind pipeline appear to be...
hints? of some kind? It's a direct function of the numbers of textures
and samplers, but much more coarse. Unknown purpose.
This should be correct for up to 48 textures and at least 8 samplers.
For more than 48 textures, Metal switches to a "bindless" mode, where
the textures are instead bound with a bind uniform packet, ts* is no
longer read in the shader, and instead registers and immediates are used
to index the texture with a substantial preshader. Details TBD. We don't
need to worry about that for a long while, though.
Fixes a number of dEQPs.
dEQP-GLES2.functional.uniform_api.value.assigned.by_pointer.render.array_in_struct.sampler2D_samplerCube_both,Crash
dEQP-GLES2.functional.uniform_api.value.assigned.by_pointer.render.array_in_struct.sampler2D_samplerCube_fragment,Crash
dEQP-GLES2.functional.uniform_api.value.assigned.by_pointer.render.array_in_struct.sampler2D_samplerCube_vertex,Crash
dEQP-GLES2.functional.uniform_api.value.assigned.by_pointer.render.nested_structs_arrays.sampler2D_samplerCube_both,Crash
dEQP-GLES2.functional.uniform_api.value.assigned.by_pointer.render.nested_structs_arrays.sampler2D_samplerCube_fragment,Crash
dEQP-GLES2.functional.uniform_api.value.assigned.by_pointer.render.nested_structs_arrays.sampler2D_samplerCube_vertex,Crash
dEQP-GLES2.functional.uniform_api.value.assigned.by_value.render.array_in_struct.sampler2D_samplerCube_both,Crash
dEQP-GLES2.functional.uniform_api.value.assigned.by_value.render.array_in_struct.sampler2D_samplerCube_fragment,Crash
dEQP-GLES2.functional.uniform_api.value.assigned.by_value.render.array_in_struct.sampler2D_samplerCube_vertex,Crash
dEQP-GLES2.functional.uniform_api.value.assigned.by_value.render.nested_structs_arrays.sampler2D_samplerCube_both,Crash
dEQP-GLES2.functional.uniform_api.value.assigned.by_value.render.nested_structs_arrays.sampler2D_samplerCube_fragment,Crash
dEQP-GLES2.functional.uniform_api.value.assigned.by_value.render.nested_structs_arrays.sampler2D_samplerCube_vertex,Crash
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
Alyssa Rosenzweig [Mon, 23 May 2022 03:02:29 +0000 (23:02 -0400)]
asahi: Dump all textures&samplers
This confirms the actual size of the texture descriptor -- 24 bytes.
The last 8 bytes have so far only been zeroed. It also confirms we got
the sampler descriptor size right.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
Alyssa Rosenzweig [Mon, 23 May 2022 02:41:14 +0000 (22:41 -0400)]
asahi: Allow large uniform records
Now that we've fixed the binding XML, it's obvious how to bind lots of
uniforms in a single record. This is simpler and more efficient.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
Alyssa Rosenzweig [Mon, 23 May 2022 02:37:51 +0000 (22:37 -0400)]
asahi: Extend counts in BIND packets
We can bind at least 16 textures. Fix the sizes in the XML so this can
be decoded correctly.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
Alyssa Rosenzweig [Wed, 3 Aug 2022 01:18:22 +0000 (21:18 -0400)]
asahi: Plumb through lower_clip_fs
Key to rast->clip_plane_enable and lower. This fixes translucency of one
of the surfaces in the Neverball title screen.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
Alyssa Rosenzweig [Sun, 7 Aug 2022 15:17:01 +0000 (11:17 -0400)]
agx: Fix ld_var cf packing
Make it handle larger coefficient registers.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
Alyssa Rosenzweig [Wed, 3 Aug 2022 19:35:24 +0000 (15:35 -0400)]
agx: Fix packing of samplers in texture instrs
Typo in the handwritten packing code, oof!
Fixes incorrectly repeated shadows in Neverball (among many other bugs,
I assume). Huge thanks to Lina for the idea that this was the
bug -- fixing it was a breeze from there :-)
Fixes:
9f555388342 ("agx: Pack texture ops")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Suggested-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
Alyssa Rosenzweig [Tue, 21 Jun 2022 23:21:34 +0000 (19:21 -0400)]
docs/asahi: Document varying interpolation
Varying interpolation is quite involved in the hardware. Now that I
understand how it works, add some documentation. This documentation is
too long and uses too much fancy formatting to put inline with the XML,
so put in our external documentation space.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
Konstantin Seurer [Thu, 23 Jun 2022 16:57:19 +0000 (18:57 +0200)]
radv: Switch to the GLSL leaf implementation
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17028>
Konstantin Seurer [Fri, 5 Aug 2022 18:53:10 +0000 (20:53 +0200)]
radv: Add a GLSL leaf kernel implementation
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17028>
Konstantin Seurer [Tue, 14 Jun 2022 15:12:43 +0000 (17:12 +0200)]
radv: Switch to the GLSL internal implementation
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17028>
Konstantin Seurer [Tue, 14 Jun 2022 15:12:18 +0000 (17:12 +0200)]
radv: Add a GLSL internal kernel implementation
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17028>
Konstantin Seurer [Sun, 12 Jun 2022 20:13:13 +0000 (22:13 +0200)]
radv: Switch to the GLSL morton implementation
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17028>
Konstantin Seurer [Sun, 12 Jun 2022 20:11:39 +0000 (22:11 +0200)]
radv: Add a GLSL morton kernel implementation
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17028>
Konstantin Seurer [Sun, 12 Jun 2022 20:10:53 +0000 (22:10 +0200)]
radv: Add the basics for GLSL bvh kerrnels
Adds a meson build file for compiling GLSL compute shaders and a file with helpers for common acceleration structure build functionality.
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17028>
Konstantin Seurer [Sun, 12 Jun 2022 20:12:30 +0000 (22:12 +0200)]
radv: Add create_build_pipeline_spv helper
Just a copy of the non SPIR-V version that creates the shader module from SPIR-V.
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17028>
Konstantin Seurer [Sat, 6 Aug 2022 18:47:17 +0000 (20:47 +0200)]
radv: Remove unused push constant structs
Those are left over from !15648 and were never used in the final version.
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17028>
Konstantin Seurer [Sat, 6 Aug 2022 18:45:27 +0000 (20:45 +0200)]
radv: Remove accel_struct_build
Now that we always use LBVH this is not useful anymore.
In the future, when we have more options, we will use a different approach.
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17028>
Konstantin Seurer [Fri, 5 Aug 2022 18:47:43 +0000 (20:47 +0200)]
radv: Always emulate fmin/fmax
The native path is not faster and float atomics won't be supported by
ancient glslangValidator versions, so just get rid of it.
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17028>
Konstantin Seurer [Sat, 6 Aug 2022 18:29:05 +0000 (20:29 +0200)]
radv: Remove acceleration structure host builds
This code path is unmaintained and barely used.
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17028>
Konstantin Seurer [Fri, 17 Jun 2022 08:42:06 +0000 (10:42 +0200)]
radv: Move radv_acceleration_structure
Moves radv_acceleration_structure from radv_private to radv_acceleration_structure.
If we already have a acceleration structure header, we can also use it instead of radv_private.
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17028>
Konstantin Seurer [Sat, 6 Aug 2022 19:02:32 +0000 (21:02 +0200)]
radv: Move accel struct structs to bvh/bvh.h
Moves all the acceleration structure structs to bvh/bvh.h so that thay can be used in build kernels.
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17028>
David Heidelberg [Wed, 13 Jul 2022 14:48:58 +0000 (16:48 +0200)]
ci/lavapipe: implement traces
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17838>
David Heidelberg [Mon, 1 Aug 2022 16:07:52 +0000 (18:07 +0200)]
ci: prepare piglit-traces for WINE and DXVK
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17838>
Chia-I Wu [Thu, 4 Aug 2022 17:53:22 +0000 (10:53 -0700)]
vulkan: disallow VK_KHR_performance_query on android
It turns out the extension was later blocked by
android.graphics.cts.VulkanFeaturesTest#testVulkanBlockedExtensions.
Fixes:
77b67a747ef ("vulkan: Enable VK_KHR_performance_query on android")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6991
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Tested-by: Roman Stratiienko <r.stratiienko@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17891>
Emma Anholt [Wed, 3 Aug 2022 20:58:00 +0000 (13:58 -0700)]
ci: Upgrade deqp-runner to 0.15.0.
This includes the new timeout fixes so that tests that throw lots of debug
don't delay the timeout triggering, and the fraction vs shuffling behavior
change so that "--fraction 2" doesn't just skip every other test as it
appears in the caselist (every vertex shader variant, for example).
The fraction vs shuffling change does mean we see some different fails on
some drivers now.
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17876>
Emma Anholt [Wed, 3 Aug 2022 20:40:37 +0000 (13:40 -0700)]
ci: Add testing of the khr-single tests.
These got split out from gl4[3456]-master a while back, so we were missing
coverage in CI.
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17876>
Emma Anholt [Fri, 5 Aug 2022 00:09:43 +0000 (17:09 -0700)]
ci/swrast: Add some flakes I've noticed in the IRC channel.
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17876>
Iago Toral Quiroga [Thu, 4 Aug 2022 08:29:16 +0000 (10:29 +0200)]
nir/lower_alu: drop unnecessary iand on uadd_carry result
uadd_carry returns 1 or 0, so ANDing with 1 is unnecessary. Probably
this was implemented thinking that it was returning a boolean value.
shader-db results for V3D:
total instructions in shared programs:
12463571 ->
12462964 (<.01%)
instructions in affected programs: 28994 -> 28387 (-2.09%)
helped: 110
HURT: 1
total uniforms in shared programs: 3704591 -> 3704588 (<.01%)
uniforms in affected programs: 247 -> 244 (-1.21%)
helped: 3
HURT: 0
total max-temps in shared programs: 2148138 -> 2148117 (<.01%)
max-temps in affected programs: 729 -> 708 (-2.88%)
helped: 23
HURT: 2
total sfu-stalls in shared programs: 21230 -> 21232 (<.01%)
sfu-stalls in affected programs: 0 -> 2
helped: 0
HURT: 2
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17903>
Iago Toral Quiroga [Fri, 5 Aug 2022 11:51:01 +0000 (13:51 +0200)]
broadcom/compiler: simplify code emitted for centroid coordinates
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17909>
Timur Kristóf [Fri, 5 Aug 2022 23:21:47 +0000 (01:21 +0200)]
ac/nir/cull: Tweak phi for cull_small_primitive branch.
cull_small_primitive will now allow the caller to pass an
SSA def that it will use to determine if the primitive was
initially rejected.
This allows ACO to remove an s_branch instruction from every
NGG culling shader.
Fossil DB stats on Navi 21:
Totals from 60918 (45.16% of 134906) affected shaders:
CodeSize:
160086644 ->
159355824 (-0.46%); split: -0.46%, +0.00%
Instrs:
30477916 ->
30356092 (-0.40%); split: -0.40%, +0.00%
Latency:
139587915 ->
139611487 (+0.02%); split: -0.00%, +0.02%
InvThroughput:
21184261 ->
21184346 (+0.00%)
Copies: 2762930 -> 2702024 (-2.20%); split: -2.20%, +0.00%
Branches: 1236970 -> 1176052 (-4.92%)
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17919>
Tatsuyuki Ishi [Tue, 10 May 2022 05:03:03 +0000 (14:03 +0900)]
radv: Implement radv_flush_before_query_copy to workaround UE Vulkan bugs.
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5740
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14208>
David Heidelberg [Sat, 6 Aug 2022 09:07:02 +0000 (11:07 +0200)]
ci: Windows runner is experiencing DNS issues; disable Microsoft farm
Ref: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7008
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17925>
Dmitry Osipenko [Fri, 5 Aug 2022 13:30:22 +0000 (16:30 +0300)]
virgl: Fix unmapping of blob resources
OpenGL API calls like glClearBufferData() result in mapping/unmapping
of a given buffer by Mesa and unmapping of a host blob fails in
virglrenderer because VirGL driver uses command that is intended for
unmapping of a guest buffer. In particular this causes problem for the
"Total War: Warhammer" game that gets GL_OUT_OF_MEMORY error due to the
failed unmapping command. Fix this by setting the mapping usage flag in
accordance to the resource flags, allowing virgl_buffer_transfer_unmap()
to differentiate host buffer from guest.
Fixes:
3b54e5837a152364 ("virgl: support PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT")
Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17914>
Timur Kristóf [Wed, 4 May 2022 11:58:39 +0000 (13:58 +0200)]
aco: Remove branch instruction when exec is constant non-zero.
This mainly helps the "if (elect())" that is used in
NGG culling shaders, effectively removing a useless branch
from every culling shader.
Totals from 58346 (45.35% of 128653) affected shaders:
CodeSize:
153238668 ->
153005284 (-0.15%)
Instrs:
29066198 ->
29007852 (-0.20%)
Latency:
133626003 ->
133598182 (-0.02%); split: -0.02%, +0.00%
InvThroughput:
20208765 ->
20208689 (-0.00%)
Branches: 1190209 -> 1131863 (-4.90%)
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13383>
Timur Kristóf [Wed, 4 May 2022 08:32:24 +0000 (10:32 +0200)]
aco: Optimize branching sequence during SSA elimination.
Totals from 63245 (49.16% of 128653) affected shaders:
CodeSize:
166703680 ->
166436164 (-0.16%)
Instrs:
31618383 ->
31551504 (-0.21%)
Latency:
149404811 ->
149337729 (-0.04%); split: -0.05%, +0.00%
InvThroughput:
23996388 ->
23994734 (-0.01%); split: -0.01%, +0.00%
Copies: 2794107 -> 2727228 (-2.39%)
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13383>
Timur Kristóf [Wed, 3 Aug 2022 10:03:00 +0000 (12:03 +0200)]
ac/nir/cull: Make cull functions more consistent.
Now they all return whether the primitive was rejected.
No Fossil DB changes.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17870>
Timur Kristóf [Wed, 3 Aug 2022 09:53:29 +0000 (11:53 +0200)]
ac/nir/ngg: Move LDS store of accepted flag into the inner branch.
For primitives which are rejected based on only W and face, this
will reduce the number of executed branches.
Fossil DB stats on Navi 21:
Totals from 60918 (45.16% of 134906) affected shaders:
CodeSize:
160330564 ->
160086644 (-0.15%)
Instrs:
30477385 ->
30477916 (+0.00%); split: -0.00%, +0.00%
Latency:
139802763 ->
139587915 (-0.15%); split: -0.15%, +0.00%
InvThroughput:
21198444 ->
21184261 (-0.07%); split: -0.07%, +0.00%
SClause: 749811 -> 749810 (-0.00%)
Copies: 2701482 -> 2762930 (+2.27%); split: -0.00%, +2.28%
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17870>
Timur Kristóf [Wed, 3 Aug 2022 09:40:12 +0000 (11:40 +0200)]
ac/nir/cull: Change if condition for bounding box culling.
The previous code checked all_w_positive in the if condition.
Instead, always execute the bbox culling code and include
all_w_positive at the end.
We assume checking in the if is not beneficial because it's
very unlikely that there is no primitive in a wave whose W are
not all positive.
This allows moving other things to the condition
in the next commit.
Fossil DB stats on Navi 21:
Totals from 60918 (45.16% of 134906) affected shaders:
CodeSize:
160574204 ->
160330564 (-0.15%); split: -0.15%, +0.00%
Instrs:
30538297 ->
30477385 (-0.20%); split: -0.20%, +0.00%
Latency:
139810902 ->
139802763 (-0.01%); split: -0.01%, +0.00%
InvThroughput:
21198449 ->
21198444 (-0.00%); split: -0.00%, +0.00%
SClause: 749810 -> 749811 (+0.00%)
Copies: 2701474 -> 2701482 (+0.00%); split: -0.00%, +0.00%
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17870>
Timur Kristóf [Wed, 3 Aug 2022 09:36:34 +0000 (11:36 +0200)]
ac/nir/cull: Move the contents of cull_bbox into ac_nir_cull_triangle.
No Fossil DB changes.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17870>
Timur Kristóf [Wed, 3 Aug 2022 09:28:45 +0000 (11:28 +0200)]
ac/nir/cull: Move some code from cull_bbox into helper functions.
No Fossil DB changes.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17870>
Samuel Pitoiset [Thu, 11 Mar 2021 12:58:35 +0000 (13:58 +0100)]
radv: implement VK_EXT_attachment_feedback_loop_layout
This extension introduces a new layout which allows applications
to both render and sample from the same image inside the same draw
(aka. feedback loops).
Previously, the GENERAL layout was used and this introduced some
rendering artifacts because the hw can't read&write DCC/HTILE for
the same image, and we try to keep it compressed on GFX10+.
This helps fixing corruption with D3D9 and RPCS3 games which
are candidate for feedback loops.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4411
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17883>
Samuel Pitoiset [Mon, 28 Feb 2022 18:56:07 +0000 (19:56 +0100)]
vulkan: add support for VK_IMAGE_LAYOUT_ATTACHMENT_FEEDBACK_LOOP_OPTIMAL_EXT
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17883>
Mike Blumenkrantz [Thu, 4 Aug 2022 11:40:48 +0000 (07:40 -0400)]
vulkan: Update the XML and headers to 1.3.224
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17883>
Rob Clark [Thu, 4 Aug 2022 19:25:57 +0000 (12:25 -0700)]
freedreno: Drop fixed upper bound on # of tiles
Placate things that think 16k x 16k FBO is a good idea.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6997
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17888>
Rob Clark [Fri, 5 Aug 2022 15:40:38 +0000 (08:40 -0700)]
freedreno/gmem: Fix col0 calc
Fix typo in calculation of position of start of a row of tiles. This
could otherwise cause an out-of-bounds access in the next patch.
Fixes:
81d85be9a5c freedreno/gmem: Reverse order of alternative tile rows
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17888>
Rob Clark [Thu, 4 Aug 2022 16:25:07 +0000 (09:25 -0700)]
freedreno/drm: Fix potential bo cache vs export crash
Keep the list head valid (empty) after allocation from bo cache. Avoids
a potential later crash in lookup_bo in the following sequence:
1. alloc, bo cache hit
2. export
3. re-import
Cc: mesa-stable
Fixes:
f3cc0d27475 ("freedreno: import libdrm_freedreno + redesign submit")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6988
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17888>
Corentin Noël [Tue, 2 Aug 2022 10:53:07 +0000 (12:53 +0200)]
virgl/ci: Update virglrenderer
Update virglrenderer to the latest version on time.
Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17853>
David Heidelberg [Thu, 4 Aug 2022 13:57:51 +0000 (15:57 +0200)]
ci: separate wine setup into own script
It will be used by LAVA jobs too.
Reviewed-by: "Sergi Blanch Torne" <sergi.blanch.torne@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17887>
David Heidelberg [Thu, 4 Aug 2022 13:47:39 +0000 (15:47 +0200)]
ci: make shellcheck happy on dxvk script
Reviewed-by: "Sergi Blanch Torne" <sergi.blanch.torne@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17887>
David Heidelberg [Thu, 4 Aug 2022 13:45:30 +0000 (15:45 +0200)]
ci: move DXVK instalation outside of x86_test-vk
It will be used by LAVA jobs.
Reviewed-by: "Sergi Blanch Torne" <sergi.blanch.torne@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17887>
Yonggang Luo [Thu, 4 Aug 2022 17:24:05 +0000 (01:24 +0800)]
d3d12: Fixes compile error with mingw/gcc-x64 when static linkage to runtime library
Closes #6968
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Suggested-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Tested-by: Prodea Alexandru-Liviu <liviuprodea@yahoo.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17889>
David Heidelberg [Fri, 5 Aug 2022 12:14:24 +0000 (14:14 +0200)]
ci: Turn off the entire Lima farm (devices report out-of-space)
Reference: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7009
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17910>
Jason Ekstrand [Thu, 11 Feb 2021 19:13:03 +0000 (13:13 -0600)]
anv: Don't require 32-bit addresses for scratch on Gen12.5+
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17908>
Jason Ekstrand [Wed, 5 Aug 2020 22:03:55 +0000 (17:03 -0500)]
genxml: Add BVH data structures
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17908>
Jason Ekstrand [Wed, 17 Feb 2021 19:48:57 +0000 (13:48 -0600)]
intel/rt: Handle multiple exits in lower_shader_returns
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17908>
Jason Ekstrand [Wed, 17 Feb 2021 04:03:17 +0000 (22:03 -0600)]
intel/rt: Handle halts in any-hit shaders properly
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17908>
Jason Ekstrand [Mon, 7 Sep 2020 06:21:23 +0000 (01:21 -0500)]
intel/fs_reg_allocate: Improve compressed instruction self-interference
The old version worked fine for SIMD16 instructions but SIMD8
instructions where the destination spans two registers have the same
problem.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17908>
Lionel Landwerlin [Fri, 18 Feb 2022 12:57:26 +0000 (14:57 +0200)]
intel/nir: specify synchronous value for tracing op
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17908>
Lionel Landwerlin [Tue, 26 Oct 2021 08:42:37 +0000 (11:42 +0300)]
intel/compiler: document units of brw_ubo_range fields
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17908>
Lionel Landwerlin [Wed, 3 Nov 2021 10:42:29 +0000 (12:42 +0200)]
intel/fs: fixup simd selection with shader calls
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17908>
Lionel Landwerlin [Wed, 13 Oct 2021 13:05:59 +0000 (13:05 +0000)]
intel/fs: store num of resume shaders in prog_data
That way we can look at the SBT entries for debug purposes.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17908>
Filip Gawin [Fri, 5 Aug 2022 10:43:30 +0000 (12:43 +0200)]
r300: add khr r400 failures
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17895>
Filip Gawin [Wed, 3 Aug 2022 21:29:13 +0000 (23:29 +0200)]
r300: add list of deqp gles2 r400 failures
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17895>
Iago Toral Quiroga [Wed, 3 Aug 2022 10:46:10 +0000 (12:46 +0200)]
broadcom/compiler: use nir_opt_idiv_const
total instructions in shared programs:
12463625 ->
12463571 (<.01%)
instructions in affected programs: 1758 -> 1704 (-3.07%)
helped: 12
HURT: 0
total uniforms in shared programs: 3704589 -> 3704591 (<.01%)
uniforms in affected programs: 17 -> 19 (11.76%)
helped: 0
HURT: 1
total max-temps in shared programs: 2148088 -> 2148138 (<.01%)
max-temps in affected programs: 170 -> 220 (29.41%)
helped: 0
HURT: 10
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17871>
Iago Toral Quiroga [Wed, 3 Aug 2022 08:44:45 +0000 (10:44 +0200)]
broadcom/compiler: don't use imprecise_32bit_lowering for idiv lowering
This is known to produce bogus results for certain combinations of
operands, so don't use it. See this issue for details:
https://gitlab.freedesktop.org/mesa/mesa/-/issues/6555
With this change, the idiv lowering will produce mul_high instructions,
so we need to instruct the compiler to lower those with the ALU lowering
right after the idiv lowering by adding the lower_mul_high option (we
only need to add this to V3D, since V3DV already had it set). This will
cause injection of uadd_carry instructions, for which we have backend
implementations that produce better code for us than the NIR lowering.
total instructions in shared programs:
12457692 ->
12463625 (0.05%)
instructions in affected programs: 23115 -> 29048 (25.67%)
helped: 0
HURT: 111
total threads in shared programs: 416372 -> 416368 (<.01%)
threads in affected programs: 8 -> 4 (-50.00%)
helped: 0
HURT: 2
total uniforms in shared programs: 3704067 -> 3704589 (0.01%)
uniforms in affected programs: 5804 -> 6326 (8.99%)
helped: 2
HURT: 109
total max-temps in shared programs: 2147845 -> 2148088 (0.01%)
max-temps in affected programs: 2456 -> 2699 (9.89%)
helped: 6
HURT: 91
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17871>
Marek Olšák [Fri, 5 Aug 2022 08:36:57 +0000 (04:36 -0400)]
ac/llvm: handle external textures in ac_nir_lower_resinfo
Fixes:
4f622d62d0dd8 - ac/nir: add ac_nir_lower_resinfo
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6993
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17902>
Marek Olšák [Fri, 5 Aug 2022 01:58:22 +0000 (21:58 -0400)]
radeonsi: fix a regression due to reordering PIPE_SHADER_*
Fixes:
27f46465c7a408d3 - gallium/tgsi: reorder pipe shader type defines.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17902>
Marek Olšák [Fri, 5 Aug 2022 00:53:24 +0000 (20:53 -0400)]
radeonsi/ci: update failing tests on navi21
These pass now.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17902>
Marek Olšák [Thu, 4 Aug 2022 06:09:23 +0000 (02:09 -0400)]
radeonsi: don't assume that TC_ACTION_ENA invalidates L1 cache on gfx9
Just got into a midnight discussion with a hw guy.
TC_ACTION_ENA apparently doesn't invalidate L1, so don't clear
the INV_VCACHE flag.
Fixes:
4056e953fe43bd667 - radeonsi: move emit_cache_flush functions into si_gfx_cs.c
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17902>
Sagar Ghuge [Tue, 24 Aug 2021 19:23:57 +0000 (12:23 -0700)]
iris: Handle new untyped dataport cache flush PIPE_CONTROL field
Also while switching to GPGPU pipeline, make sure to flush the untyped
dataport cache. HDC pipeline flush bit must be set if we are flushing
untyped dataport L1 data cache.
v2: Add utrace support (Lionel)
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16905>
Sagar Ghuge [Wed, 11 Aug 2021 23:53:42 +0000 (16:53 -0700)]
anv: Handle bits to flush data-port's Untyped L1 data cache
v2: Drop ANV_PIPE_UNTYPED_DATAPORT_CACHE_FLUSH_BIT from invalidate bits (Lionel)
Add utrace support
Expand on comment about PIPE_CONTROL::UntypedDataPortCache
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16905>