Jan Hubicka [Sat, 26 Sep 2020 06:13:52 +0000 (08:13 +0200)]
Disable modref for ipa-pta-13.c
* gcc.dg/ipa/ipa-pta-13.c: Disable modref.
Jan Hubicka [Sat, 26 Sep 2020 06:12:44 +0000 (08:12 +0200)]
Track arguments pointing to local or readonly memory in ipa-fnsummary
this patch implement tracking wehther argument points to readonly memory. This
is is useful for ipa-modref as well as for inline heuristics. It is desirable
to inline functions that dereference pointers to local variables in order
to support SRA. We always did the oposite heuristics (guessing that the
dereferences will be optimized out with 50% probability) but here we could
increase the probability for cases where we can track that argument is indeed
a local memory (or readonly which is also good)
* ipa-fnsummary.c (dump_ipa_call_summary): Dump
points_to_local_or_readonly_memory flag.
(analyze_function_body): Compute points_to_local_or_readonly_memory
flag.
(remap_edge_change_prob): Rename to ...
(remap_edge_params): ... this one; update
points_to_local_or_readonly_memory.
(remap_edge_summaries): Update.
(read_ipa_call_summary): Stream the new flag.
(write_ipa_call_summary): Likewise.
* ipa-predicate.h (struct inline_param_summary): Add
points_to_local_or_readonly_memory.
(inline_param_summary::equal_to): Update.
(inline_param_summary::useless_p): Update.
Jan Hubicka [Sat, 26 Sep 2020 06:09:53 +0000 (08:09 +0200)]
Add support for iterative dataflow to ipa-modref-tree.h
Track if insert and merge operations changed anything in the summary.
gcc/ChangeLog:
2020-09-26 Jan Hubicka <hubicka@ucw.cz>
* ipa-modref-tree.h (modref_ref_node::insert_access): Track if something
changed.
(modref_base_node::insert_ref): Likewise (and add a new optional
argument)
(modref_tree::insert): Likewise.
(modref_tree::merge): Rewrite
David Malcolm [Fri, 25 Sep 2020 18:31:46 +0000 (14:31 -0400)]
analyzer: add test for placement new
gcc/testsuite/ChangeLog:
PR analyzer/94355
* g++.dg/analyzer/placement-new.C: New test.
David Malcolm [Fri, 25 Sep 2020 21:15:42 +0000 (17:15 -0400)]
analyzer: fix ICEs treeifying offset_region [PR96646, PR96841]
gcc/analyzer/ChangeLog:
PR analyzer/96646
PR analyzer/96841
* region-model.cc (region_model::get_representative_path_var):
When handling offset_region, wrap the MEM_REF's first argument in
an ADDR_EXPR of pointer type, rather than simply using the tree
for the parent region. Require the MEM_REF's second argument to
be an integer constant.
gcc/testsuite/ChangeLog:
PR analyzer/96646
PR analyzer/96841
* gcc.dg/analyzer/pr96646.c: New test.
* gcc.dg/analyzer/pr96841.c: New test.
GCC Administrator [Sat, 26 Sep 2020 00:16:25 +0000 (00:16 +0000)]
Daily bump.
Jan Hubicka [Fri, 25 Sep 2020 22:05:53 +0000 (00:05 +0200)]
Disable ipa-modref with live patching
2020-09-26 Jan Hubicka <hubicka@ucw.cz>
* doc/invoke.texi: Add -fno-ipa-modref to flags disabled by
-flive-patching.
* opts.c (control_options_for_live_patching): Disable ipa-modref.
Jan Hubicka [Fri, 25 Sep 2020 22:01:57 +0000 (00:01 +0200)]
Fix gimple_clobber handling in ipa-modref
2020-09-25 Jan Hubicka <hubicka@ucw.cz>
* ipa-modref.c (analyze_stmt): Fix return value for gimple_clobber.
Nathan Sidwell [Fri, 25 Sep 2020 18:58:26 +0000 (11:58 -0700)]
c++: Adjust pushdecl/duplicate_decls API
The decl pushing APIs and duplicate_decls take an 'is_friend' parm,
when what they actually mean is 'hide this from name lookup'. That
conflation has gotten more anachronistic as time moved on. We now
have anticipated builtins, and I plan to have injected extern decls
soon. So this patch is mainly a renaming excercise. is_friend ->
hiding. duplicate_decls gets an additional 'was_hidden' parm. As
I've already said, hiddenness is a property of the symbol table, not
the decl. Builtins are now pushed requesting hiding, and pushdecl
asserts that we don't attempt to push a thing that should be hidden
without asking for it to be hidden.
This is the final piece of groundwork to get rid of a bunch of 'this
is hidden' markers on decls and move the hiding management entirely
into name lookup.
gcc/cp/
* cp-tree.h (duplicate_decls): Replace 'is_friend' with 'hiding'
and add 'was_hidden'.
* name-lookup.h (pushdecl_namespace_level): Replace 'is_friend'
with 'hiding'.
(pushdecl): Likewise.
(pushdecl_top_level): Drop is_friend parm.
* decl.c (check_no_redeclaration_friend_default_args): Rename parm
olddelc_hidden_p.
(duplicate_decls): Replace 'is_friend' with 'hiding'
and 'was_hidden'. Do minimal adjustments in body.
(cxx_builtin_function): Pass 'hiding' to pushdecl.
* friend.c (do_friend): Pass 'hiding' to pushdecl.
* name-lookup.c (supplement_binding_1): Drop defaulted arg to
duplicate_decls.
(update_binding): Replace 'is_friend' with 'hiding'. Drop
defaulted arg to duplicate_decls.
(do_pushdecl): Replace 'is_friend' with 'hiding'. Assert no
surprise hidhing. Adjust duplicate_decls calls to inform of old
decl's hiddennes.
(pushdecl): Replace 'is_friend' with 'hiding'.
(set_identifier_type_value_with_scope): Adjust update_binding
call.
(do_pushdecl_with_scope): Replace 'is_friend' with 'hiding'.
(pushdecl_outermost_localscope): Drop default arg to
do_pushdecl_with_scope.
(pushdecl_namespace_level): Replace 'is_friend' with 'hiding'.
(pushdecl_top_level): Drop is_friend parm.
* pt.c (register_specialization): Comment duplicate_decls call
args.
(push_template_decl): Commont pushdecl_namespace_level.
(tsubst_friend_function, tsubst_friend_class): Likewise.
Nathan Sidwell [Fri, 25 Sep 2020 17:24:09 +0000 (10:24 -0700)]
c++: Replace tag_scope with TAG_how
I always found tag_scope confusing, as it is not a scope, but a
direction of how to lookup or insert an elaborated type tag. This
replaces it with a enum class TAG_how. I also add a new value,
HIDDEN_FRIEND, to distinguish the two cases of innermost-non-class
insertion that we currently conflate. Also renamed
'lookup_type_scope' to 'lookup_elaborated_type', because again, we're
not providing a scope to lookup in.
gcc/cp/
* name-lookup.h (enum tag_scope): Replace with ...
(enum class TAG_how): ... this. Add HIDDEN_FRIEND value.
(lookup_type_scope): Replace with ...
(lookup_elaborated_type): ... this.
(pushtag): Use TAG_how, not tag_scope.
* cp-tree.h (xref_tag): Parameter is TAG_how, not tag_scope.
* decl.c (lookup_and_check_tag): Likewise. Adjust.
(xref_tag_1, xref_tag): Likewise. adjust.
(start_enum): Adjust lookup_and_check_tag call.
* name-lookup.c (lookup_type_scope_1): Rename to ...
(lookup_elaborated_type_1) ... here. Use TAG_how, not tag_scope.
(lookup_type_scope): Rename to ...
(lookup_elaborated_type): ... here. Use TAG_how, not tag_scope.
(do_pushtag): Use TAG_how, not tag_scope. Adjust.
(pushtag): Likewise.
* parser.c (cp_parser_elaborated_type_specifier): Adjust.
(cp_parser_class_head): Likewise.
gcc/objcp/
* objcp-decl.c (objcp_start_struct): Use TAG_how not tag_scope.
(objcp_xref_tag): Likewise.
Kyrylo Tkachov [Fri, 25 Sep 2020 16:32:43 +0000 (17:32 +0100)]
AArch64: Add Linux cpuinfo string for rng feature
The Linux kernel has defined the cpuinfo string for the +rng feature, so
this patch adds that to GCC so that -march=native can pick it up.
Bootstrapped and tested on aarch64-none-linux-gnu.
gcc/
* config/aarch64/aarch64-option-extensions.def (rng): Add
cpuinfo string.
Alex Coplan [Fri, 25 Sep 2020 16:16:34 +0000 (17:16 +0100)]
arm: Add missing Neoverse V1 feature
This adds a missing feature (FP16) to the Neoverse V1 description in
AArch32 GCC.
gcc/ChangeLog:
* config/arm/arm-cpus.in (neoverse-v1): Add FP16.
Martin Liska [Fri, 25 Sep 2020 14:21:34 +0000 (16:21 +0200)]
gcov: fix streaming of HIST_TYPE_IOR histogram type.
gcc/ChangeLog:
PR gcov-profile/64636
* value-prof.c (stream_out_histogram_value): Allow negative
values for HIST_TYPE_IOR.
Nathan Sidwell [Fri, 25 Sep 2020 13:53:06 +0000 (06:53 -0700)]
c++: DECL_BUILTIN_P for builtins
We currently detect builtin decls via DECL_ARTIFICIAL &&
!DECL_HIDDEN_FUNCTION_P, which, besides being clunky, is a problem as
hiddenness is a property of the symbol table -- not the decl being
hidden. This adds DECL_BUILTIN_P, which just looks at the
SOURCE_LOCATION -- we have a magic one for builtins.
One of the consequential changes is to make function-scope omp udrs
have function context (needed because otherwise duplicate-decls thinks
the types don't match at the point we check). This is also morally
better, because that's what they are -- nested functions, stop lying.
(That's actually my plan for all DECL_LOCAL_DECL_P decls, as they are
distinct decls to the namespace-scope decl they alias.)
gcc/cp/
* cp-tree.h (DECL_BUILTIN_P): New.
* decl.c (duplicate_decls): Use it. Do not treat omp-udr as a
builtin.
* name-lookup.c (anticipated_builtin): Use it.
(set_decl_context_in_fn): Function-scope OMP UDRs have function context.
(do_nonmember_using_decl): Use DECL_BUILTIN_P.
* parser.c (cp_parser_omp_declare_reduction): Function-scope OMP
UDRs have function context. Assert we never find a valid duplicate.
* pt.c (tsubst_expr): Function-scope OMP UDRs have function context.
libcc1/
* libcp1plugin.cc (supplement_binding): Use DECL_BULTIN_P.
Tom de Vries [Fri, 25 Sep 2020 13:23:49 +0000 (15:23 +0200)]
[nvptx] Fix Wimplicit-fallthrough in nvptx.c with -save-temps
When compiling nvptx.c using -save-temps, I ran into Wimplicit-fallthrough
warnings.
The fallthrough locations have been marked with a fallthrough comment, but
that doesn't work with -save-temps, something that has been filed as
PR78497.
Work around this by using gcc_fallthrough () in addition to the comment.
Tested by building target nvptx, copying nvptx.c compile line and adding
-save-temps.
gcc/ChangeLog:
2020-09-25 Tom de Vries <tdevries@suse.de>
* config/nvptx/nvptx.c (nvptx_assemble_integer, nvptx_print_operand):
Use gcc_fallthrough ().
Richard Biener [Fri, 25 Sep 2020 09:13:13 +0000 (11:13 +0200)]
middle-end/96814 - fix VECTOR_BOOLEAN_TYPE_P CTOR RTL expansion
The RTL expansion code for CTORs doesn't handle VECTOR_BOOLEAN_TYPE_P
with bit-precision elements correctly as the testcase shows before
the PR97085 fix. The following makes it do the correct thing
(not 100% sure for CTOR of sub-vectors due to the lack of a testcase).
The alternative would be to assert such CTORs do not happen (and also
add IL verification for this).
The GIMPLE FE needs a way to declare the VECTOR_BOOLEAN_TYPE_P vectors
(thus the C FE needs that).
2020-09-25 Richard Biener <rguenther@suse.de>
PR middle-end/96814
* expr.c (store_constructor): Handle VECTOR_BOOLEAN_TYPE_P
CTORs correctly.
* gcc.target/i386/pr96814.c: New testcase.
Richard Biener [Fri, 25 Sep 2020 11:59:15 +0000 (13:59 +0200)]
middle-end/97207 - implement move assign for auto_vec<>
This implements the missing move assignment to make std::swap work
on auto_vec<>
2020-09-25 Richard Biener <rguenther@suse.de>
PR middle-end/97207
* vec.h (auto_vec<T>::operator=(auto_vec<T>&&)): Implement.
Jonathan Wakely [Fri, 25 Sep 2020 11:50:17 +0000 (12:50 +0100)]
libstdc++: Remove redundant -std=gnu++1z flags from makefile
Now that G++ defaults to gnu++17 we don't need special rules for
compiling the C++17 allocation and deallocation functions.
libstdc++-v3/ChangeLog:
* libsupc++/Makefile.am: Remove redundant -std=gnu++1z flags.
* libsupc++/Makefile.in: Regenerate.
Richard Sandiford [Fri, 25 Sep 2020 11:45:25 +0000 (12:45 +0100)]
arm: Fix fp16 move patterns for base MVE
This patch fixes ICEs in gcc.dg/torture/float16-basic.c for
-march=armv8.1-m.main+mve -mfloat-abi=hard. The problem was
that an fp16 argument was (rightly) being passed in FPRs,
but the fp16 move patterns only handled GPRs. LRA then cycled
trying to look for a way of handling the FPR.
It looks like there are three related problems here:
(1) We're using the wrong fp16 move pattern for base MVE.
*mov<mode>_vfp_<mode>16 (the pattern we use for +mve.fp)
works for base MVE too.
(2) The fp16 MVE load and store patterns are separate from the
main move patterns. The loads and stores should instead be
alternatives of the main move patterns, so that LRA knows
what to do with pseudo registers that become stack slots.
(3) The range restrictions for the loads and stores were wrong
for fp16: we were enforcing a multiple of 4 in [-255*4, 255*4]
instead of a multiple of 2 in [-255*2, 255*2].
(2) came from a patch to prevent writeback being used for MVE.
That patch also added a Uj constraint to enforce the correct
memory types for MVE. I think the simplest fix is therefore to merge
the loads and stores back into the main pattern and extend the Uj
constraint so that it acts like Um for non-MVE.
The testcase for that patch was mve-vldstr16-no-writeback.c, whose
main function is:
void
fn1 (__fp16 *pSrc)
{
__fp16 high;
__fp16 *pDst = 0;
unsigned i;
for (i = 0;; i++)
if (pSrc[i])
pDst[i] = high;
}
Fixing (2) causes the store part to fail, not because we're using
writeback, but because we decide to use GPRs to store high (which is
uninitialised, and so gets replaced with zero). This patch therefore
adds some scan-assembler-nots instead. (I wondered about changing the
testcase to initialise high, but that seemed like a bad idea for
a regression test.)
For (3): MVE seems to be the only thing to use arm_coproc_mem_operand_wb
(and its various interfaces) for 16-bit scalars: the Neon patterns only
use it for 32-bit scalars.
I've added new tests to try the various FPR alternatives of the
move patterns. The range of offsets that GCC uses for FPR loads
and stores is the intersection of the range allowed for GPRs and
FPRs, so the tests include GPR<->memory tests as well.
The fp32 and fp64 tests already pass, they're just there for
completeness.
gcc/
* config/arm/arm-protos.h (arm_mve_mode_and_operands_type_check):
Delete.
* config/arm/arm.c (arm_coproc_mem_operand_wb): Use a scale factor
of 2 rather than 4 for 16-bit modes.
(arm_mve_mode_and_operands_type_check): Delete.
* config/arm/constraints.md (Uj): Allow writeback for Neon,
but continue to disallow it for MVE.
* config/arm/arm.md (*arm32_mov<HFBF:mode>): Add !TARGET_HAVE_MVE.
* config/arm/vfp.md (*mov_load_vfp_hf16, *mov_store_vfp_hf16): Fold
back into...
(*mov<mode>_vfp_<mode>16): ...here but use Uj for the FPR memory
constraints. Use for base MVE too.
gcc/testsuite/
* gcc.target/arm/mve/intrinsics/mve-vldstr16-no-writeback.c: Allow
the store to use GPRs instead of FPRs. Add scan-assembler-nots
for writeback.
* gcc.target/arm/armv8_1m-fp16-move-1.c: New test.
* gcc.target/arm/armv8_1m-fp32-move-1.c: Likewise.
* gcc.target/arm/armv8_1m-fp64-move-1.c: Likewise.
Richard Biener [Fri, 25 Sep 2020 11:08:48 +0000 (13:08 +0200)]
tree-optimization/97199 - fix virtual operand update in if-conversion
This fixes a corner case with virtual operand update in if-conversion
by re-organizing the code to remove edges only after the last point
we need virtual PHI operands to be available.
2020-09-25 Richard Biener <rguenther@suse.de>
PR tree-optimization/97199
* tree-if-conv.c (combine_blocks): Remove edges only
after looking at virtual PHI args.
Christophe Lyon [Fri, 25 Sep 2020 10:40:18 +0000 (10:40 +0000)]
testsuite: [aarch64] Fix aarch64/advsimd-intrinsics/v{trn,uzp,zip}_half.c
Since r11-3402 (g:
65c9878641cbe0ed898aa7047b7b994e9d4a5bb1), the
vtrn_half, vuzp_half and vzip_half started failing with
vtrn_half.c:76:17: error: redeclaration of 'vector_float64x2' with no linkage
vtrn_half.c:77:17: error: redeclaration of 'vector2_float64x2' with no linkage
vtrn_half.c:80:17: error: redeclaration of 'vector_res_float64x2' with no linkage
This is because r11-3402 now always declares float64x2 variables for
aarch64, leading to a duplicate declaration in these testcases.
The fix is simply to remove these now useless declarations.
These tests are skipped on arm*, so there is no impact on that target.
2020-09-25 Christophe Lyon <christophe.lyon@linaro.org>
gcc/testsuite/
PR target/71233
* gcc.target/aarch64/advsimd-intrinsics/vtrn_half.c: Remove
declarations of vector, vector2, vector_res for float64x2 type.
* gcc.target/aarch64/advsimd-intrinsics/vuzp_half.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vzip_half.c: Likewise.
Richard Biener [Fri, 25 Sep 2020 09:43:43 +0000 (11:43 +0200)]
testsuite/97204 - fix gcc.target/i386/sse2-mmx-pinsrw.c
This fixes the testcase writing to adjacent stack vars, exposed
my IPA modref.
2020-09-25 Richard Biener <rguenther@suse.de>
PR testsuite/97204
* gcc.target/i386/sse2-mmx-pinsrw.c: Fix.
Jakub Jelinek [Fri, 25 Sep 2020 08:43:37 +0000 (10:43 +0200)]
openmp: Add support for non-rect simd and improve collapsed simd support
The following change adds support for non-rectangular simd loops.
While working on that, I've noticed we actually don't vectorize collapsed
simd loops at all, because the code that I thought would be vectorizable
actually is not vectorized. While in theory for the constant lower/upper
bounds and constant step of all but the outermost loop we could in theory
vectorize by computing the seprate iterators using vectorized division
and modulo for each of them from the single iterator that increments
by 1 from 0 to total iteration count in the loop nest, I think that would
be fairly expensive and the chances of the loop body being vectorizable
would be low e.g. because of array indices unlikely to be linear and would
need scatters/gathers.
This patch changes the generated code to vectorize only the innermost
loop which has higher chance of being vectorized. Below is the list of
tests and function names in which the patch resulted in vectorizing something
that hasn't been vectorized before (ok, the first line is a new test).
I've also found that the vectorizer will not vectorize loops with non-constant
steps, I plan to do something about those incrementally on the omp-expand.c
side (basically, compute number of iterations before the loop and use a 0 to
number_of_iterations step 1 IV as the main one).
I have problem with the composite simd vectorization though.
The point is that each thread (or task etc.) is given only a range of
consecutive iterations, so somewhere earlier it computes total number of iterations
and splits the work between the workers and then the intent is to try to vectorize it.
So, each thread is then given a begin ... end-1 range that it would handle.
This means that from the single begin value I need to compute the individual iteration
vars I should start at and then goto into the loop nest to begin iterating there
(and actually compute how many iterations the innermost loop should do each time
so that it stops before end).
Very roughly the IL I emit is something like:
int t[100][100][100];
void
foo (int a, int b, int c, int d, int e, int f, int g, int h, int u, int v, int w, int x)
{
int i, j, k;
int cnt;
if (x)
{
i = u; j = v; k = w; goto doit;
}
for (i = a; i < b; i += c)
for (j = d; j < e; j += f)
{
k = g;
doit:
for (; k < h; k++)
t[i][j][k] += i + j + k;
}
}
Unfortunately, some pass then turns the innermost loop to have more than 2 basic blocks
and it isn't vectorized because of that.
Also, I have disabled (for now) SIMTization of collapsed simd loops, because for SIMT
it would be using a single thread anyway and I didn't want to bother with checking
SIMT on all places I've been changing. If SIMT support is added for some or all
collapsed loops, that omp-low.c change needs to be reverted.
Here is that list of what hasn't been vectorized before and is now:
gcc/testsuite/gcc.dg/vect/vect-simd-17.c doit
gcc/testsuite/gfortran.dg/gomp/openmp-simd-6.f90 bar
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-10.c f28_taskloop_simd_normal._omp_fn.0
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-10.c _Z24f28_taskloop_simd_normalv._omp_fn.0
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-11.c f25_t_simd_normal._omp_fn.0
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-11.c f26_t_simd_normal._omp_fn.0
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-11.c f27_t_simd_normal._omp_fn.0
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-11.c f28_tpf_simd_guided32._omp_fn.1
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-11.c f28_tpf_simd_runtime._omp_fn.1
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-11.c _Z17f25_t_simd_normaliiiiiii._omp_fn.0
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-11.c _Z17f26_t_simd_normaliiiixxi._omp_fn.0
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-11.c _Z17f27_t_simd_normalv._omp_fn.0
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-11.c _Z20f28_tpf_simd_runtimev._omp_fn.1
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-11.c _Z21f28_tpf_simd_guided32v._omp_fn.1
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-2.c f7_simd_normal
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-2.c f7_simd_normal
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-2.c f8_f_simd_guided32
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-2.c f8_f_simd_guided32
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-2.c f8_f_simd_runtime
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-2.c f8_f_simd_runtime
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-2.c f8_pf_simd_guided32._omp_fn.0
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-2.c f8_pf_simd_runtime._omp_fn.0
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-2.c _Z18f8_pf_simd_runtimev._omp_fn.0
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-2.c _Z19f8_pf_simd_guided32v._omp_fn.0
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-4.c f8_taskloop_simd_normal._omp_fn.0
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-4.c _Z23f8_taskloop_simd_normalv._omp_fn.0
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-5.c f7_t_simd_normal._omp_fn.0
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-5.c f8_tpf_simd_guided32._omp_fn.1
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-5.c f8_tpf_simd_runtime._omp_fn.1
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-5.c _Z16f7_t_simd_normalv._omp_fn.0
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-5.c _Z19f8_tpf_simd_runtimev._omp_fn.1
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-5.c _Z20f8_tpf_simd_guided32v._omp_fn.1
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-8.c f25_simd_normal
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-8.c f25_simd_normal
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-8.c f26_simd_normal
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-8.c f26_simd_normal
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-8.c f27_simd_normal
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-8.c f27_simd_normal
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-8.c f28_f_simd_guided32
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-8.c f28_f_simd_guided32
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-8.c f28_f_simd_runtime
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-8.c f28_f_simd_runtime
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-8.c f28_pf_simd_guided32._omp_fn.0
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/for-8.c f28_pf_simd_runtime._omp_fn.0
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-8.c _Z19f28_pf_simd_runtimev._omp_fn.0
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/for-8.c _Z20f28_pf_simd_guided32v._omp_fn.0
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/master-combined-1.c main._omp_fn.9
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/master-combined-1.c main._omp_fn.9
libgomp/testsuite/libgomp.c++/../libgomp.c-c++-common/simd-1.c f2
libgomp/testsuite/libgomp.c/../libgomp.c-c++-common/simd-1.c f2
libgomp/testsuite/libgomp.c/pr70680-2.c f1._omp_fn.0
libgomp/testsuite/libgomp.c/pr70680-2.c f2._omp_fn.0
libgomp/testsuite/libgomp.c/pr70680-2.c f3._omp_fn.0
libgomp/testsuite/libgomp.c/pr70680-2.c f4._omp_fn.0
libgomp/testsuite/libgomp.c/simd-8.c foo
libgomp/testsuite/libgomp.c/simd-9.c bar
libgomp/testsuite/libgomp.c/simd-9.c foo
2020-09-25 Jakub Jelinek <jakub@redhat.com>
gcc/
* omp-low.c (scan_omp_1_stmt): Don't call scan_omp_simd for
collapse > 1 loops as simt doesn't support collapsed loops yet.
* omp-expand.c (expand_omp_for_init_counts, expand_omp_for_init_vars):
Small tweaks to function comment.
(expand_omp_simd): Rewritten collapse > 1 support to only attempt
to vectorize the innermost loop and emit set of outer loops around it.
For non-composite simd with collapse > 1 without broken loop don't
even try to compute number of iterations first. Add support for
non-rectangular simd loops.
(expand_omp_for): Don't sorry_at on non-rectangular simd loops.
gcc/testsuite/
* gcc.dg/vect/vect-simd-17.c: New test.
libgomp/
* testsuite/libgomp.c/loop-25.c: New test.
Martin Liska [Thu, 24 Sep 2020 14:29:49 +0000 (16:29 +0200)]
Add cgraph_edge::debug function.
gcc/ChangeLog:
* cgraph.c (cgraph_edge::debug): New.
* cgraph.h (cgraph_edge::debug): New.
Martin Liska [Thu, 24 Sep 2020 14:37:41 +0000 (16:37 +0200)]
Fix spacing in cgraph_node::dump.
gcc/ChangeLog:
* cgraph.c (cgraph_node::dump): Always print space at the end
of a message. Remove one extra space.
Tom de Vries [Fri, 25 Sep 2020 06:42:10 +0000 (08:42 +0200)]
[testsuite] Add missing require-effective-target alloca
Add missing require-effect-target alloca directives.
Tested on nvptx.
gcc/testsuite/ChangeLog:
2020-09-25 Tom de Vries <tdevries@suse.de>
* gcc.dg/analyzer/pr93355-localealias.c: Require effective target
alloca.
Tom de Vries [Thu, 24 Sep 2020 08:49:02 +0000 (10:49 +0200)]
[testsuite] Add effective target ident_directive
On nvptx we run into:
...
FAIL: c-c++-common/ident-1b.c -Wc++-compat scan-assembler GCC:
FAIL: c-c++-common/ident-2b.c -Wc++-compat scan-assembler GCC:
...
Using a scan-assembler directive adds -fno-indent to the compile options.
The test c-c++-common/ident-1b.c adds dg-options "-fident", and intends to
check that the -fident overrides the -fno-indent, by means of the
scan-assembler. But for nvptx, there's no .ident directive, both with -fident
and -fno-ident.
Fix this by adding an effective target ident_directive, and requiring
it in both test-cases.
Tested on nvptx and x86_64.
gcc/testsuite/ChangeLog:
2020-09-24 Tom de Vries <tdevries@suse.de>
* lib/target-supports.exp (check_effective_target_ident_directive): New proc.
* c-c++-common/ident-1b.c: Require effective target ident_directive.
* c-c++-common/ident-2b.c: Same.
GCC Administrator [Fri, 25 Sep 2020 00:16:27 +0000 (00:16 +0000)]
Daily bump.
Mark Wielaard [Wed, 23 Sep 2020 14:10:41 +0000 (16:10 +0200)]
libiberty: Add get_DW_UT_name and update include/dwarf2.{def,h}
This adds a get_DW_UT_name function to dwarfnames using dwarf2.def
for use in binutils readelf to show the unit types in a DWARF5 header.
Also remove DW_CIE_VERSION which was already removed in binutils/gdb
and is not used in gcc.
include/ChangeLog:
* dwarf2.def: Add DWARF5 Unit type header encoding macros
DW_UT_FIRST, DW_UT and DW_UT_END.
* dwarf2.h (enum dwarf_unit_type): Removed and define using
DW_UT_FIRST, DW_UT and DW_UT_END macros.
(DW_CIE_VERSION): Removed.
(get_DW_UT_name): New function declaration.
libiberty/ChangeLog:
* dwarfnames.c (get_DW_UT_name): Define using DW_UT_FIRST, DW_UT
and DW_UT_END.
Nathan Sidwell [Thu, 24 Sep 2020 19:50:29 +0000 (12:50 -0700)]
c++: Cleanup some decl pushing apis
In cleaning up local decl handling, here's an initial patch that takes
advantage of C++'s default args for the is_friend parm of pushdecl,
duplicate_decls and push_template_decl_real and the scope & tpl_header
parms of xref_tag. Then many of the calls simply not mention these.
I also rename push_template_decl_real to push_template_decl, deleting
the original forwarding function. This'll make my later patches
changing their types less intrusive. There are 2 functional changes:
1) push_template_decl requires is_friend to be correct, it doesn't go
checking for a friend function (an assert is added).
2) debug_overload prints out Hidden and Using markers for the overload set.
gcc/cp/
* cp-tree.h (duplicate_decls): Default is_friend to false.
(xref_tag): Default tag_scope & tpl_header_p to ts_current & false.
(push_template_decl_real): Default is_friend to false. Rename to
...
(push_template_decl): ... here. Delete original decl.
* name-lookup.h (pushdecl_namespace_level): Default is_friend to
false.
(pushtag): Default tag_scope to ts_current.
* coroutines.cc (morph_fn_to_coro): Drop default args to xref_tag.
* decl.c (start_decl): Drop default args to duplicate_decls.
(start_enum): Drop default arg to pushtag & xref_tag.
(start_preparsed_function): Pass DECL_FRIEND_P to
push_template_decl.
(grokmethod): Likewise.
* friend.c (do_friend): Rename push_template_decl_real calls.
* lambda.c (begin_lamnbda_type): Drop default args to xref_tag.
(vla_capture_type): Likewise.
* name-lookup.c (maybe_process_template_type_declaration): Rename
push_template_decl_real call.
(pushdecl_top_level_and_finish): Drop default arg to
pushdecl_namespace_level.
* pt.c (push_template_decl_real): Assert no surprising friend
functions. Rename to ...
(push_template_decl): ... here. Delete original function.
(lookup_template_class_1): Drop default args from pushtag.
(instantiate_class_template_1): Likewise.
* ptree.c (debug_overload): Print hidden and using markers.
* rtti.c (init_rtti_processing): Drop refault args from xref_tag.
(build_dynamic_cast_1, tinfo_base_init): Likewise.
* semantics.c (begin_class_definition): Drop default args to
pushtag.
gcc/objcp/
* objcp-decl.c (objcp_start_struct): Drop default args to
xref_tag.
(objcp_xref_tag): Likewise.
libcc1/
* libcp1plugin.cc (supplement_binding): Drop default args to
duplicate_decls.
(safe_pushtag): Drop scope parm. Drop default args to pushtag.
(safe_pushdecl_maybe_friend): Rename to ...
(safe_pushdecl): ... here. Drop is_friend parm. Drop default args
to pushdecl.
(plugin_build_decl): Adjust safe_pushdecl & safe_pushtag calls.
(plugin_build_constant): Adjust safe_pushdecl call.
Nathan Sidwell [Thu, 24 Sep 2020 19:13:28 +0000 (12:13 -0700)]
c++: add testcase [PR97177]
Pr97177 is the local-var duplicate of pr97171. So just adding the testcase.
gcc/testsuite/
* g++.dg/template/local-var1.C: New.
Nathan Sidwell [Thu, 24 Sep 2020 18:34:10 +0000 (11:34 -0700)]
c++: restrict test to c++>=11 [pr97171]
I'd missed an important restriction on use of noexcept. Fixed thusly
gcc/testsuite/
* g++.dg/template/local-fn4.C: Add target c++11
Clément Chigot [Wed, 23 Sep 2020 14:08:21 +0000 (16:08 +0200)]
runtime: remove __go_ptrace on AIX
AIX ptrace syscalls doesn't have the same semantic than the glibc one.
The syscall package is already handling it correctly so disable the new
__go_ptrace C function for AIX.
Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/256777
Antony Polukhin [Thu, 24 Sep 2020 17:51:37 +0000 (18:51 +0100)]
libstdc++: assert that type traits are not misused with incomplete types [PR 71579]
libstdc++-v3/ChangeLog:
PR libstdc++/71579
* include/std/type_traits (invoke_result, is_invocable)
(is_invocable_r, is_nothrow_invocable, is_nothrow_invocable_r):
Add static_asserts to make sure that the arguments of the type
traits are not misused with incomplete types.
* testsuite/20_util/invoke_result/incomplete_args_neg.cc: New test.
* testsuite/20_util/is_invocable/incomplete_args_neg.cc: New test.
* testsuite/20_util/is_invocable/incomplete_neg.cc: New test.
* testsuite/20_util/is_nothrow_invocable/incomplete_args_neg.cc:
New test.
* testsuite/20_util/is_nothrow_invocable/incomplete_neg.cc: Check
for error on incomplete type usage in trait.
Patrick Palka [Thu, 24 Sep 2020 16:58:39 +0000 (12:58 -0400)]
libstdc++: Specialize ranges::__detail::__box for semiregular types
The class template semiregular-box<T> defined in [range.semi.wrap] is
used by a number of views to accomodate non-semiregular subobjects
while ensuring that the overall view remains semiregular. It provides
a stand-in default constructor, copy assignment operator and move
assignment operator whenever the underlying type lacks them. The
wrapper derives from std::optional<T> to support default construction
when T is not default constructible.
It would be nice for this wrapper to essentially be a no-op when the
underlying type is already semiregular, but this is currently not the
case due to its use of std::optional<T>, which incurs space overhead
compared to storing just T.
To that end, this patch specializes the semiregular wrapper for
semiregular T. Compared to the primary template, this specialization
uses less space, and it allows [[no_unique_address]] to optimize away
wrapped data members whose underlying type is empty and semiregular
(e.g. a non-capturing lambda). This patch also applies
[[no_unique_address]] to the five data members that use the wrapper.
libstdc++-v3/ChangeLog:
* include/std/ranges (__detail::__boxable): Split out the
associated constraints of __box into here.
(__detail::__box): Use the __boxable concept. Define a leaner
partial specialization for semiregular types.
(single_view::_M_value): Give it [[no_unique_address]].
(filter_view::_M_pred): Likewise.
(transform_view::_M_fun): Likewise.
(take_while_view::_M_pred): Likewise.
(drop_while_view::_M_pred):: Likewise.
* testsuite/std/ranges/adaptors/detail/semiregular_box.cc: New
test.
Jonathan Wakely [Thu, 24 Sep 2020 16:33:16 +0000 (17:33 +0100)]
libstdc++: Fix misnamed configure option in manual
libstdc++-v3/ChangeLog:
* doc/xml/manual/configure.xml: Correct name of option.
* doc/html/*: Regenerate.
Alex Coplan [Thu, 24 Sep 2020 16:22:44 +0000 (17:22 +0100)]
arm: Add support for Neoverse N2 CPU
This adds support for Arm's Neoverse N2 CPU to the AArch32 backend.
Neoverse N2 builds AArch32 at EL0 and therefore needs support in AArch32
GCC.
gcc/ChangeLog:
* config/arm/arm-cpus.in (neoverse-n2): New.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm-tune.md: Regenerate.
* doc/invoke.texi: Document support for Neoverse N2.
Alex Coplan [Thu, 24 Sep 2020 16:21:47 +0000 (17:21 +0100)]
aarch64: Add support for Neoverse N2 CPU
This patch adds support for Arm's Neoverse N2 CPU to the AArch64
backend.
gcc/ChangeLog:
* config/aarch64/aarch64-cores.def: Add Neoverse N2.
* config/aarch64/aarch64-tune.md: Regenerate.
* doc/invoke.texi: Document AArch64 support for Neoverse N2.
Richard Biener [Thu, 6 Aug 2020 12:50:56 +0000 (14:50 +0200)]
add move CTOR to auto_vec, use auto_vec for get_loop_exit_edges
This adds a move CTOR to auto_vec<T, 0> and makes use of a
auto_vec<edge> return value for get_loop_exit_edges denoting
that lifetime management of the vector is handed to the caller.
The move CTOR prompted the hash_table change because it appearantly
makes the copy CTOR implicitely deleted (good) and hash-table
expansion of the odr_enum_map which is
hash_map <nofree_string_hash, odr_enum> where odr_enum has an
auto_vec<odr_enum_val, 0> member triggers this. Not sure if
there's a latent bug there before this (I think we're not
invoking DTORs, but we're invoking copy-CTORs).
2020-08-06 Richard Biener <rguenther@suse.de>
* vec.h (auto_vec<T, 0>::auto_vec (auto_vec &&)): New move CTOR.
(auto_vec<T, 0>::operator=(auto_vec &&)): Delete.
* hash-table.h (hash_table::expand): Use std::move when expanding.
* cfgloop.h (get_loop_exit_edges): Return auto_vec<edge>.
* cfgloop.c (get_loop_exit_edges): Adjust.
* cfgloopmanip.c (fix_loop_placement): Likewise.
* ipa-fnsummary.c (analyze_function_body): Likewise.
* ira-build.c (create_loop_tree_nodes): Likewise.
(create_loop_tree_node_allocnos): Likewise.
(loop_with_complex_edge_p): Likewise.
* ira-color.c (ira_loop_edge_freq): Likewise.
* loop-unroll.c (analyze_insns_in_loop): Likewise.
* predict.c (predict_loops): Likewise.
* tree-predcom.c (last_always_executed_block): Likewise.
* tree-ssa-loop-ch.c (ch_base::copy_headers): Likewise.
* tree-ssa-loop-im.c (store_motion_loop): Likewise.
* tree-ssa-loop-ivcanon.c (loop_edge_to_cancel): Likewise.
(canonicalize_loop_induction_variables): Likewise.
* tree-ssa-loop-manip.c (get_loops_exits): Likewise.
* tree-ssa-loop-niter.c (find_loop_niter): Likewise.
(finite_loop_p): Likewise.
(find_loop_niter_by_eval): Likewise.
(estimate_numbers_of_iterations): Likewise.
* tree-ssa-loop-prefetch.c (emit_mfence_after_loop): Likewise.
(may_use_storent_in_loop_p): Likewise.
Nathan Sidwell [Thu, 24 Sep 2020 13:17:00 +0000 (06:17 -0700)]
c++: local-decls are never member fns [PR97186]
This fixes an ICE in noexcept instantiation. It was presuming
functions always have template_info, but that changed with my
DECL_LOCAL_DECL_P changes. Fortunately DECL_LOCAL_DECL_P fns are
never member fns, so we don't need to go fishing out a this pointer.
Also I realized I'd misnamed local10.C, so renaming it local-fn3.C,
and while there adding the effective-target lto that David E pointed
out was missing.
PR c++/97186
gcc/cp/
* pt.c (maybe_instantiate_noexcept): Local externs are never
member fns.
gcc/testsuite/
* g++.dg/template/local10.C: Rename ...
* g++.dg/template/local-fn3.C: .. here. Require lto.
* g++.dg/template/local-fn4.C: New.
Jan Hubicka [Thu, 24 Sep 2020 13:10:04 +0000 (15:10 +0200)]
Add modref testcase
* gcc.dg/tree-ssa/modref-1.c: New test.
Jan Hubicka [Thu, 24 Sep 2020 13:09:17 +0000 (15:09 +0200)]
Add access through parameter derference tracking to modref
re-add tracking of accesses which was unfinished in David's patch.
At the moment I only implemented tracking of the fact that access is based on
derefernece of the parameter (so we track THIS pointers).
Patch does not implement IPA propagation since it needs bit more work which
I will post shortly: ipa-fnsummary needs to track when parameter points to
local memory, summaries needs to be merged when function is inlined (because
jump functions are) and propagation needs to be turned into iterative dataflow
on SCC components.
Patch also adds documentation of -fipa-modref and params that was left uncommited
in my branch :(.
Even without this change it does lead to nice increase of disambiguations
for cc1plus build.
Alias oracle query stats:
refs_may_alias_p:
62758323 disambiguations,
72935683 queries
ref_maybe_used_by_call_p: 139511 disambiguations,
63654045 queries
call_may_clobber_ref_p: 23502 disambiguations, 29242 queries
nonoverlapping_component_refs_p: 0 disambiguations, 37654 queries
nonoverlapping_refs_since_match_p: 19417 disambiguations, 55555 must overlaps, 75721 queries
aliasing_component_refs_p: 54665 disambiguations, 752449 queries
TBAA oracle:
21917926 disambiguations
53054678 queries
15763411 are in alias set 0
10162238 queries asked about the same object
124 queries asked about the same alias set
0 access volatile
3681593 are dependent in the DAG
1529386 are aritificially in conflict with void *
Modref stats:
modref use: 8311 disambiguations, 32527 queries
modref clobber: 742126 disambiguations, 1036986 queries
1987054 tbaa queries (1.916182 per modref query)
125479 base compares (0.121004 per modref query)
PTA query stats:
pt_solution_includes: 968314 disambiguations,
13609584 queries
pt_solutions_intersect: 1019136 disambiguations,
13147139 queries
So compared to
https://gcc.gnu.org/pipermail/gcc-patches/2020-September/554605.html
we get 41% more use disambiguations (with similar number of queries) and 8% more
clobber disambiguations.
For tramp3d:
Alias oracle query stats:
refs_may_alias_p: 2052256 disambiguations, 2312703 queries
ref_maybe_used_by_call_p: 7122 disambiguations, 2089118 queries
call_may_clobber_ref_p: 234 disambiguations, 234 queries
nonoverlapping_component_refs_p: 0 disambiguations, 4299 queries
nonoverlapping_refs_since_match_p: 329 disambiguations, 10200 must overlaps, 10616 queries
aliasing_component_refs_p: 857 disambiguations, 34555 queries
TBAA oracle: 885546 disambiguations 1677080 queries
132105 are in alias set 0
469030 queries asked about the same object
0 queries asked about the same alias set
0 access volatile
190084 are dependent in the DAG
315 are aritificially in conflict with void *
Modref stats:
modref use: 426 disambiguations, 1881 queries
modref clobber: 10042 disambiguations, 16202 queries
19405 tbaa queries (1.197692 per modref query)
2775 base compares (0.171275 per modref query)
PTA query stats:
pt_solution_includes: 313908 disambiguations, 526183 queries
pt_solutions_intersect: 130510 disambiguations, 416084 queries
Here uses decrease by 4 disambiguations and clobber improve by 3.5%. I think
the difference is caused by fact that gcc has much more alias set 0 accesses
originating from gimple and tree unions as I mentioned in original mail.
After pushing out the IPA propagation I will re-add code to track offsets and
sizes that further improve disambiguation. On tramp3d it enables a lot of DSE
for structure fields not acessed by uninlined function.
gcc/
* doc/invoke.texi: Document -fipa-modref, ipa-modref-max-bases,
ipa-modref-max-refs, ipa-modref-max-accesses, ipa-modref-max-tests.
* ipa-modref-tree.c (test_insert_search_collapse): Update.
(test_merge): Update.
(gt_ggc_mx): New function.
* ipa-modref-tree.h (struct modref_access_node): New structure.
(struct modref_ref_node): Add every_access and accesses array.
(modref_ref_node::modref_ref_node): Update ctor.
(modref_ref_node::search): New member function.
(modref_ref_node::collapse): New member function.
(modref_ref_node::insert_access): New member function.
(modref_base_node::insert_ref): Do not collapse base if ref is 0.
(modref_base_node::collapse): Copllapse also refs.
(modref_tree): Add accesses.
(modref_tree::modref_tree): Initialize max_accesses.
(modref_tree::insert): Add access parameter.
(modref_tree::cleanup): New member function.
(modref_tree::merge): Add parm_map; merge accesses.
(modref_tree::copy_from): New member function.
(modref_tree::create_ggc): Add max_accesses.
* ipa-modref.c (dump_access): New function.
(dump_records): Dump accesses.
(dump_lto_records): Dump accesses.
(get_access): New function.
(record_access): Record access.
(record_access_lto): Record access.
(analyze_call): Compute parm_map.
(analyze_function): Update construction of modref records.
(modref_summaries::duplicate): Likewise; use copy_from.
(write_modref_records): Stream accesses.
(read_modref_records): Sream accesses.
(pass_ipa_modref::execute): Update call of merge.
* params.opt (-param=modref-max-accesses): New.
* tree-ssa-alias.c (alias_stats): Add modref_baseptr_tests.
(dump_alias_stats): Update.
(base_may_alias_with_dereference_p): New function.
(modref_may_conflict): Check accesses.
(ref_maybe_used_by_call_p_1): Update call to modref_may_conflict.
(call_may_clobber_ref_p_1): Update call to modref_may_conflict.
Tom de Vries [Thu, 24 Sep 2020 12:07:42 +0000 (14:07 +0200)]
[testsuite, nvptx] Fix gcc.dg/tls/thr-cse-1.c
With nvptx, we run into:
...
FAIL: gcc.dg/tls/thr-cse-1.c scan-assembler-not \
emutls_get_address.*emutls_get_address.*
...
because the nvptx assembly looks like:
...
call (%value_in), __emutls_get_address, (%out_arg1);
...
// BEGIN GLOBAL FUNCTION DECL: __emutls_get_address
.extern .func (.param.u64 %value_out) __emutls_get_address (.param.u64 %in_ar0);
...
Fix this by checking the slim final dump instead, where we have just:
...
12: r35:DI=call [`__emutls_get_address'] argc:0
...
gcc/testsuite/ChangeLog:
2020-09-24 Tom de Vries <tdevries@suse.de>
* gcc.dg/tls/thr-cse-1.c: Scan final dump instead of assembly for
nvptx.
Tom de Vries [Thu, 24 Sep 2020 11:30:11 +0000 (13:30 +0200)]
[testsuite] Scan final instead of asm in independent-cloneids-1.c
When running test-case gcc.dg/independent-cloneids-1.c for nvptx, we get:
...
FAIL: scan-assembler-times (?n)^_*bar[.$_]constprop[.$_]0: 1
FAIL: scan-assembler-times (?n)^_*bar[.$_]constprop[.$_]1: 1
FAIL: scan-assembler-times (?n)^_*bar[.$_]constprop[.$_]2: 1
FAIL: scan-assembler-times (?n)^_*foo[.$_]constprop[.$_]0: 1
FAIL: scan-assembler-times (?n)^_*foo[.$_]constprop[.$_]1: 1
FAIL: scan-assembler-times (?n)^_*foo[.$_]constprop[.$_]2: 1
...
The test expects to find something like:
...
bar.constprop.0:
...
but instead on nvptx we have:
...
.func (.param.u32 %value_out) bar$constprop$0
...
Fix this by rewriting the scans to use the final dump instead.
Tested on x86_64.
gcc/testsuite/ChangeLog:
2020-09-24 Tom de Vries <tdevries@suse.de>
* gcc.dg/independent-cloneids-1.c: Use scan-rtl-dump instead of
scan-assembler.
Richard Biener [Thu, 24 Sep 2020 11:27:49 +0000 (13:27 +0200)]
target/97192 - new testcase for fixed PR
This adds another testcase for the PR97085 fix.
2020-09-24 Richard Biener <rguenther@suse.de>
PR tree-optimization/97085
* gcc.dg/pr97192.c: New testcase.
Paul Thomas [Thu, 24 Sep 2020 10:52:30 +0000 (11:52 +0100)]
This patch fixes PR96495 - frees result components outside loop.
2020-24-09 Paul Thomas <pault@gcc.gnu.org>
gcc/fortran
PR fortran/96495
* trans-expr.c (gfc_conv_procedure_call): Take the deallocation
of allocatable result components of a scalar result outside the
scalarization loop. Find and use the stored result.
gcc/testsuite/
PR fortran/96495
* gfortran.dg/alloc_comp_result_2.f90 : New test.
Tom de Vries [Thu, 24 Sep 2020 10:22:13 +0000 (12:22 +0200)]
[testsuite, nvptx] Fix string matching in gcc.dg/pr87314-1.c
with nvptx we run into:
...
FAIL: gcc.dg/pr87314-1.c scan-assembler hellooo
...
The required string is part of the assembly, just in a different format than
expected:
...
.const .align 1 .u8 $LC0[12] =
{ 104, 101, 108, 108, 111, 111, 111, 111, 98, 121, 101, 0 };
...
Fix this by adding an nvptx-specific scan-assembler directive.
Tested on nvptx and x86_64.
gcc/testsuite/ChangeLog:
2020-09-24 Tom de Vries <tdevries@suse.de>
* gcc.dg/pr87314-1.c: Add nvptx-specific scan-assembler directive.
Richard Sandiford [Thu, 24 Sep 2020 09:06:11 +0000 (10:06 +0100)]
arm: Add a couple of extra stack-protector tests
These tests were inspired by corresponding aarch64 ones.
They already pass.
gcc/testsuite/
* gcc.target/arm/stack-protector-5.c: New test.
* gcc.target/arm/stack-protector-6.c: Likewise.
Richard Sandiford [Thu, 24 Sep 2020 09:06:11 +0000 (10:06 +0100)]
arm: Fix canary address calculation for non-PIC
For non-PIC, the stack protector patterns did:
rtx mem = XEXP (force_const_mem (SImode, operands[1]), 0);
emit_move_insn (operands[2], mem);
Here, operands[1] is the address of the canary (&__stack_chk_guard)
and operands[2] is the register that we want to move that address into.
However, the code above instead sets operands[2] to the address of a
constant pool entry that contains &__stack_chk_guard, rather than to
&__stack_chk_guard itself. The sequence therefore does one less
pointer indirection than it should.
The net effect was to use &__stack_chk_guard for stack-smash detection,
instead of using __stack_chk_guard itself.
gcc/
* config/arm/arm.md (*stack_protect_combined_set_insn): For non-PIC,
load the address of the canary rather than the address of the
constant pool entry that points to it.
(*stack_protect_combined_test_insn): Likewise.
gcc/testsuite/
* gcc.target/arm/stack-protector-3.c: New test.
* gcc.target/arm/stack-protector-4.c: Likewise.
Richard Biener [Thu, 24 Sep 2020 08:14:33 +0000 (10:14 +0200)]
tree-optimization/97085 - fold some trivial bool vector ?:
The following aovids the ICE in the testcase by doing some additional
simplification of VEC_COND_EXPRs for VECTOR_BOOLEAN_TYPE_P which
we don't really expect, esp. when they are not classical vectors,
thus AVX512 or SVE masks.
2020-09-24 Richard Biener <rguenther@suse.de>
PR tree-optimization/97085
* match.pd (mask ? { false,..} : { true, ..} -> ~mask): New.
* gcc.dg/vect/pr97085.c: New testcase.
Tom de Vries [Thu, 24 Sep 2020 08:03:10 +0000 (10:03 +0200)]
[testsuite] Require non_strict_align in pr94600-{1,3}.c
With the nvptx target, we run into:
...
FAIL: gcc.dg/pr94600-1.c scan-rtl-dump-times final "\\(mem/v" 6
FAIL: gcc.dg/pr94600-1.c scan-rtl-dump-times final "\\(set \\(mem/v" 6
FAIL: gcc.dg/pr94600-3.c scan-rtl-dump-times final "\\(mem/v" 1
FAIL: gcc.dg/pr94600-3.c scan-rtl-dump-times final "\\(set \\(mem/v" 1
...
The scans attempt to check for volatile stores, but on nvptx we have memcpy
instead.
This is due to nvptx being a STRICT_ALIGNMENT target, which has the effect
that the TYPE_MODE for the store target is set to BKLmode in
compute_record_mode.
Fix the FAILs by requiring effective target non_strict_align.
Tested on nvptx.
gcc/testsuite/ChangeLog:
2020-09-24 Tom de Vries <tdevries@suse.de>
* gcc.dg/pr94600-1.c: Require effective target non_strict_align for
scan-rtl-dump-times.
* gcc.dg/pr94600-3.c: Same.
Jan Hubicka [Thu, 24 Sep 2020 06:28:09 +0000 (08:28 +0200)]
Fix memory allocations in ipa-modref.
Pair ggc_delete with ggc_alloc_no_dtor. I copy same scheme as used by Martin
in ipa-fnsummary, that is creating a static member function create_ggc hidding
the ugly bits and using it in ipa-modref.c.
I also noticed that modref-tree leaks memory on destruction/collapse method and
fixed that.
Bootstrapped/regtested x86_64-linux.
gcc/ChangeLog:
2020-09-24 Jan Hubicka <hubicka@ucw.cz>
* ipa-modref-tree.h (modref_base::collapse): Release memory.
(modref_tree::create_ggc): New member function.
(modref_tree::colapse): Release memory.
(modref_tree::~modref_tree): New destructor.
* ipa-modref.c (modref_summaries::create_ggc): New function.
(analyze_function): Use create_ggc.
(modref_summaries::duplicate): Likewise.
(read_modref_records): Likewise.
(modref_read): Likewise.
Tom de Vries [Thu, 24 Sep 2020 06:02:29 +0000 (08:02 +0200)]
[testsuite] Check target alias in builtin-has-attribute-3.c
When running test-case c-c++-common/builtin-has-attribute-3.c on nvptx, I get:
...
FAIL: c-c++-common/builtin-has-attribute-3.c -Wc++-compat \
(test for excess errors)
Excess errors:
src/gcc/testsuite/c-c++-common/builtin-has-attribute-3.c:33:33: error: \
alias definitions not supported in this configuration
...
Fix this by adding -DSKIP_ALIAS to the compilation options for effective
target ! alias.
Tested on nvptx.
gcc/testsuite/ChangeLog:
* c-c++-common/builtin-has-attribute-3.c: Compile with -DSKIP_ALIAS
for effective target ! alias.
Kewen Lin [Thu, 24 Sep 2020 05:40:47 +0000 (00:40 -0500)]
test: Adjust case p9-vec-length-full-6.c [PR97075]
The commit r11-3230 brings a nice improvement to use full
vectors instead of partial vectors when available. This
patch is to fix the test failures on p9-vec-length-full-6.c,
where 64bit/32bit pairs are able to use full vector instead.
Bootstrapped/regtested on powerpc64le-linux-gnu P9.
gcc/testsuite/ChangeLog:
PR tree-optimization/97075
* gcc.target/powerpc/p9-vec-length-full-6.c: Adjust.
Alan Modra [Thu, 24 Sep 2020 05:28:53 +0000 (14:58 +0930)]
Re: [RS6000] Power10 libffi fixes
Adding a nop broke ffi_closure_LINUX64!
* src/powerpc/linux64_closure.S (ffi_closure_LINUX64): Correct
location of .Lret.
Alan Modra [Thu, 18 Jun 2015 10:49:55 +0000 (20:19 +0930)]
[RS6000] rs6000_rtx_costs for PLUS/MINUS constant
These functions do behave a little differently for SImode, so the
mode should be passed.
* config/rs6000/rs6000.c (rs6000_rtx_costs): Pass mode to
reg_or_add_cint_operand and reg_or_sub_cint_operand.
Alan Modra [Wed, 1 Apr 2020 03:04:47 +0000 (13:34 +1030)]
[RS6000] Count rldimi constant insns
rldimi is generated by rs6000_emit_set_long_const when the high and
low 32 bits of a 64-bit constant are equal.
PR target/93012
* config/rs6000/rs6000.c (num_insns_constant_gpr): Count rldimi
constants correctly.
Alan Modra [Fri, 18 Sep 2020 13:51:05 +0000 (23:21 +0930)]
[RS6000] Power10 libffi fixes
Power10 pc-relative code doesn't use or preserve r2 as a TOC pointer.
That means calling between pc-relative and TOC using code can't be
done without intervening linker stubs, and a call from TOC code to
pc-relative code must have a nop after the bl in order to restore r2.
Now the PowerPC libffi assembly code doesn't use r2 except for the
implicit use when making calls back to C, ffi_closure_helper_LINUX64
and ffi_prep_args64. So changing the assembly to interoperate with
pc-relative code without stubs is easily done.
* src/powerpc/linux64.S (ffi_call_LINUX64): Don't emit global
entry when __PCREL__. Call using @notoc. Add nops.
* src/powerpc/linux64_closure.S (ffi_closure_LINUX64): Likewise.
(ffi_go_closure_linux64): Likewise.
Alan Modra [Wed, 23 Sep 2020 10:45:39 +0000 (20:15 +0930)]
[RS6000] Built-in __PCREL__ define
Useful in assembly to know details of power10 function calls.
* config/rs6000/rs6000-c.c (rs6000_target_modify_macros):
Conditionally define __PCREL__.
Alan Modra [Fri, 18 Sep 2020 13:33:11 +0000 (23:03 +0930)]
[RS6000] PR97107, libgo fails to build for power10
Calls from split-stack code to non-split-stack code need to expand
mapped stack memory via __morestack. Even tail calls.
__morestack is quite a surprising function on powerpc in that it calls
back to its caller, and a tail call will continue running in the
context of extra mapped stack.
PR target/97107
* config/rs6000/rs6000-internal.h (struct rs6000_stack): Improve
calls_p comment.
* config/rs6000/rs6000-logue.c (rs6000_stack_info): Likewise.
(rs6000_expand_split_stack_prologue): Emit the prologue for
functions that make a sibling call.
David Malcolm [Thu, 19 Dec 2019 21:15:09 +0000 (16:15 -0500)]
analyzer: add testcases for PR 93355 (intl/localealias.c leak)
PR analyzer/93355 reports a missing diagnostic about a FILE leak in
intl/localealias.c. This appears to be due to a issue in the
feasibility-checking code, though there is also a state explosion.
This patch adds test cases that I've been using when investigating this,
two of them currently requiring -fno-analyzer-feasibility, and one
currently requiring -Wno-analyzer-too-complex.
gcc/testsuite/ChangeLog:
PR analyzer/93355
* gcc.dg/analyzer/pr93355-localealias-feasibility.c: New test.
* gcc.dg/analyzer/pr93355-localealias-simplified.c: New test.
* gcc.dg/analyzer/pr93355-localealias.c: New test.
David Malcolm [Wed, 23 Sep 2020 10:55:51 +0000 (06:55 -0400)]
analyzer: add -fno-analyzer-feasibility
This patch provides a new option "-fno-analyzer-feasibility" as a way
to disable feasibility-checking of the constraints along the control
flow paths for -fanalyzer diagnostics. I'm adding this in the hope of
making it easier to debug issues involving the feasibility-checking
logic.
The patch adds a new rejected_constraint object which is captured if
exploded_path::feasible_p fails, and adds logic that uses this to emit
an additional custom_event within the checker_path for the diagnostic,
showing where in the control flow path the diagnostic would have been
rejected, and giving details of why.
gcc/analyzer/ChangeLog:
* analyzer.h (struct rejected_constraint): New decl.
* analyzer.opt (fanalyzer-feasibility): New option.
* diagnostic-manager.cc (path_builder::path_builder): Add
"problem" param and use it to initialize new field.
(path_builder::get_feasibility_problem): New accessor.
(path_builder::m_feasibility_problem): New field.
(dedupe_winners::add): Remove inversion of logic in "if" clause,
swapping if/else suites. In the !feasible_p suite, inspect
flag_analyzer_feasibility and add code to handle when this
is off, accepting the infeasible path, but recording the
feasibility_problem.
(diagnostic_manager::emit_saved_diagnostic): Pass the
feasibility_problem to the path_builder.
(diagnostic_manager::add_events_for_eedge): If we have
a feasibility_problem at this edge, use it to add a custom event.
* engine.cc (exploded_path::feasible_p): Pass a
rejected_constraint ** to model.maybe_update_for_edge and transfer
ownership of any created instance to any feasibility_problem.
(feasibility_problem::dump_to_pp): New.
* exploded-graph.h (feasibility_problem::feasibility_problem):
Drop "model" param; add rejected_constraint * param.
(feasibility_problem::~feasibility_problem): New.
(feasibility_problem::dump_to_pp): New decl.
(feasibility_problem::m_model): Drop field.
(feasibility_problem::m_rc): New field.
* program-point.cc (function_point::get_location): Handle
PK_BEFORE_SUPERNODE and PK_AFTER_SUPERNODE.
* program-state.cc (program_state::on_edge): Pass NULL to new
param of region_model::maybe_update_for_edge.
* region-model.cc (region_model::add_constraint): New overload
adding a rejected_constraint ** param.
(region_model::maybe_update_for_edge): Add rejected_constraint **
param and pass it to the various apply_constraints_for_ calls.
(region_model::apply_constraints_for_gcond): Add
rejected_constraint ** param and pass it to add_constraint calls.
(region_model::apply_constraints_for_gswitch): Likewise.
(region_model::apply_constraints_for_exception): Likewise.
(rejected_constraint::dump_to_pp): New.
* region-model.h (region_model::maybe_update_for_edge):
Add rejected_constraint ** param.
(region_model::add_constraint): New overload adding a
rejected_constraint ** param.
(region_model::apply_constraints_for_gcond): Add
rejected_constraint ** param.
(region_model::apply_constraints_for_gswitch): Likewise.
(region_model::apply_constraints_for_exception): Likewise.
(struct rejected_constraint): New.
gcc/ChangeLog:
* doc/analyzer.texi (Analyzer Paths): Add note about
-fno-analyzer-feasibility.
* doc/invoke.texi (Static Analyzer Options): Add
-fno-analyzer-feasibility.
gcc/testsuite/ChangeLog:
* gcc.dg/analyzer/feasibility-2.c: New test.
Ian Lance Taylor [Wed, 23 Sep 2020 03:30:08 +0000 (20:30 -0700)]
libgo: update to Go1.15.2 release
Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/256618
GCC Administrator [Thu, 24 Sep 2020 00:16:31 +0000 (00:16 +0000)]
Daily bump.
Paul A. Clarke [Wed, 23 Sep 2020 16:59:26 +0000 (11:59 -0500)]
rs6000: Add 'd' for doubleword variant of vector insert
When the "Vector Insert" section was added to the documentation,
the doubleword ('d') variant was omitted. Add it.
2020-09-23 Paul A. Clarke <pc@us.ibm.com>
gcc/
* doc/extend.texi: Add 'd' for doubleword variant of
vector insert instruction.
Martin Sebor [Wed, 23 Sep 2020 21:19:13 +0000 (15:19 -0600)]
Build a zero element array type that reliably renders as T[0] in diagnostcs.
gcc/ChangeLog:
* gimple-array-bounds.cc (build_zero_elt_array_type): New function.
(array_bounds_checker::check_mem_ref): Call it.
Martin Sebor [Wed, 23 Sep 2020 21:04:32 +0000 (15:04 -0600)]
Handle DECLs and EXPRESSIONs consistently (PR middle-end/97175).
gcc/ChangeLog:
PR middle-end/97175
* builtins.c (maybe_warn_for_bound): Handle both DECLs and EXPRESSIONs
in pad->dst.ref, same is pad->src.ref.
gcc/testsuite/ChangeLog:
PR middle-end/97175
* gcc.dg/Wstringop-overflow-44.c: New test.
Jan Hubicka [Wed, 23 Sep 2020 21:06:05 +0000 (23:06 +0200)]
Cleanup modref interfaces.
* ipa-fnsummary.c (refs_local_or_readonly_memory_p): New function.
(points_to_local_or_readonly_memory_p): New function.
* ipa-fnsummary.h (refs_local_or_readonly_memory_p): Declare.
(points_to_local_or_readonly_memory_p): Declare.
* ipa-modref.c (record_access_p): Use refs_local_or_readonly_memory_p.
* ipa-pure-const.c (check_op): Likewise.
* gcc.dg/tree-ssa/local-pure-const.c: Update template.
Martin Sebor [Wed, 23 Sep 2020 21:02:01 +0000 (15:02 -0600)]
Avoid assuming input corresponds to valid source code (PR c/97131).
gcc/c-family/ChangeLog:
PR c/97131
* c-warn.c (warn_parm_ptrarray_mismatch): Handle more invalid input.
gcc/testsuite/ChangeLog:
PR c/97131
* gcc.dg/Warray-parameter-6.c: New test.
Tom de Vries [Wed, 23 Sep 2020 15:35:23 +0000 (17:35 +0200)]
[nvptx] Split up function ref plus const
With test-case gcc.c-torture/compile/pr92231.c, we run into:
...
nvptx-as: ptxas terminated with signal 11 [Segmentation fault], core dumped^M
compiler exited with status 1
FAIL: gcc.c-torture/compile/pr92231.c -O0 (test for excess errors)
...
due to using a function reference plus constant as operand:
...
mov.u64 %r24,bar+4096';
...
Fix this by splitting such an insn into:
...
mov.u64 %r24,bar';
add.u64 %r24,%r24,4096';
...
Tested on nvptx.
gcc/ChangeLog:
* config/nvptx/nvptx.md: Don't allow operand containing sum of
function ref and const.
Richard Sandiford [Wed, 23 Sep 2020 18:25:04 +0000 (19:25 +0100)]
aarch64: Prevent canary address being spilled to stack
This patch fixes the equivalent of arm bug PR85434/CVE-2018-12886
for aarch64: under high register pressure, the -fstack-protector
code might spill the address of the canary onto the stack and
reload it at the test site, giving an attacker the opportunity
to change the expected canary value.
This would happen in two cases:
- when generating PIC for -mstack-protector-guard=global
(tested by stack-protector-6.c). This is a direct analogue
of PR85434, which was also about PIC for the global case.
- when using -mstack-protector-guard=sysreg.
The two problems were really separate bugs and caused by separate code,
but it was more convenient to fix them together.
The post-patch code still spills _GLOBAL_OFFSET_TABLE_ for
stack-protector-6.c, which is a more general problem. However,
it no longer spills the canary address itself.
The patch also fixes an ICE when using -mstack-protector-guard=sysreg
with ILP32: even if the register read is SImode, the address
calculation itself should still be DImode.
gcc/
* config/aarch64/aarch64-protos.h (aarch64_salt_type): New enum.
(aarch64_stack_protect_canary_mem): Declare.
* config/aarch64/aarch64.md (UNSPEC_SALT_ADDR): New unspec.
(stack_protect_set): Forward to stack_protect_combined_set.
(stack_protect_combined_set): New pattern. Use
aarch64_stack_protect_canary_mem.
(reg_stack_protect_address_<mode>): Add a salt operand.
(stack_protect_test): Forward to stack_protect_combined_test.
(stack_protect_combined_test): New pattern. Use
aarch64_stack_protect_canary_mem.
* config/aarch64/aarch64.c (strip_salt): New function.
(strip_offset_and_salt): Likewise.
(tls_symbolic_operand_type): Use strip_offset_and_salt.
(aarch64_stack_protect_canary_mem): New function.
(aarch64_cannot_force_const_mem): Use strip_offset_and_salt.
(aarch64_classify_address): Likewise.
(aarch64_symbolic_address_p): Likewise.
(aarch64_print_operand): Likewise.
(aarch64_output_addr_const_extra): New function.
(aarch64_tls_symbol_p): Use strip_salt.
(aarch64_classify_symbol): Likewise.
(aarch64_legitimate_pic_operand_p): Use strip_offset_and_salt.
(aarch64_legitimate_constant_p): Likewise.
(aarch64_mov_operand_p): Use strip_salt.
(TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA): Override.
gcc/testsuite/
* gcc.target/aarch64/stack-protector-5.c: New test.
* gcc.target/aarch64/stack-protector-6.c: Likewise.
* gcc.target/aarch64/stack-protector-7.c: Likewise.
Richard Sandiford [Wed, 23 Sep 2020 18:21:56 +0000 (19:21 +0100)]
aarch64: Add a couple of extra stack-protector tests
These tests were inspired by corresponding arm ones. They already pass.
gcc/testsuite/
* gcc.target/aarch64/stack-protector-3.c: New test.
* gcc.target/aarch64/stack-protector-4.c: Likewise.
David Malcolm [Wed, 23 Sep 2020 15:18:43 +0000 (11:18 -0400)]
analyzer: fix member call on null seen with ubsan [PR97178]
gcc/analyzer/ChangeLog:
PR analyzer/97178
* engine.cc (impl_run_checkers): Update for change to ext_state
ctor.
* program-state.cc (selftest::test_sm_state_map): Pass an engine
instance to ext_state ctor.
(selftest::test_program_state_1): Likewise.
(selftest::test_program_state_2): Likewise.
(selftest::test_program_state_merging): Likewise.
(selftest::test_program_state_merging_2): Likewise.
* program-state.h (extrinsic_state::extrinsic_state): Remove NULL
default value for "eng" param.
Kyrylo Tkachov [Wed, 23 Sep 2020 16:37:58 +0000 (17:37 +0100)]
AArch64: Implement missing p128<->f64 reinterpret intrinsics
This patch implements the missing reinterprets to and from poly128_t and
float64x2_t.
I've plugged in the appropriate testing in the advsimd-intrinsics.exp
too.
Bootstrapped and tested on aarch64-none-linux-gnu.
Tested advsimd-intrinsics.exp on arm-none-eabi too to make sure arm
testing isn't affected.
gcc/
PR target/71233
* config/aarch64/arm_neon.h (vreinterpretq_f64_p128,
vreinterpretq_p128_f64): Define.
gcc/testsuite/
PR target/71233
* gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h
(clean_results): Add float64x2_t cleanup.
(DECL_VARIABLE_128BITS_VARIANTS): Add float64x2_t variable.
* gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p128.c: Add
testing of vreinterpretq_f64_p128, vreinterpretq_p128_f64.
Nathan Sidwell [Wed, 23 Sep 2020 15:13:25 +0000 (08:13 -0700)]
c++: Remove some gratuitous typedefing
This is C++, we don't need 'typedef struct foo foo;'. Oh, and bool
bitfields are a thing.
gcc/cp/
* name-lookup.h (typedef cxx_binding): Delete tdef.
(typedef cp_binding_level): Likewise.
(struct cxx_binding): Flags are bools.
Alex Coplan [Wed, 23 Sep 2020 14:21:00 +0000 (15:21 +0100)]
arm: Add support for Neoverse V1 CPU
This adds support for Arm's Neoverse V1 CPU to the AArch32 backend.
---
gcc/ChangeLog:
* config/arm/arm-cpus.in (neoverse-v1): New.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm-tune.md: Regenerate.
* doc/invoke.texi: Document support for Neoverse V1.
Alex Coplan [Wed, 23 Sep 2020 14:20:19 +0000 (15:20 +0100)]
aarch64: Add support for Neoverse V1 CPU
This adds support for Arm's Neoverse V1 CPU to the AArch64 backend.
---
gcc/ChangeLog:
* config/aarch64/aarch64-cores.def: Add Neoverse V1.
* config/aarch64/aarch64-tune.md: Regenerate.
* doc/invoke.texi: Document support for Neoverse V1.
Nathan Sidwell [Wed, 23 Sep 2020 14:01:10 +0000 (07:01 -0700)]
c++: dependent local extern decl ICE [PR97171]
I'd missed the piece of substutution for the uses of a local extern
decl. Just grab the local specialization. We need to do this
regardless of dependentness because we always cloned the local extern.
PR c++/97171
gcc/cp/
* pt.c (tsubst_copy) [FUNCTION_DECL,VAR_DECL]: Retrieve local
specialization for DECL_LOCAL_P decls.
gcc/testsuite/
* g++.dg/template/local10.C: New.
Marek Polacek [Sun, 20 Sep 2020 20:11:00 +0000 (16:11 -0400)]
c: Fix -Wduplicated-branches ICE [PR97125]
We crash here because since r11-3302 the C FE uses codes like SWITCH_STMT
in the else branches in the attached test, and inchash::add_expr in
do_warn_duplicated_branches doesn't handle these front-end codes. In
the C++ FE this works because by the time we get to do_warn_duplicated_branches
we've already cp_genericize'd the SWITCH_STMT tree into a SWITCH_EXPR.
The fix is to call do_warn_duplicated_branches_r only after loops and other
structured control constructs have been lowered.
gcc/c-family/ChangeLog:
PR c/97125
* c-gimplify.c (c_genericize): Only call do_warn_duplicated_branches_r
after loops and other structured control constructs have been lowered.
gcc/testsuite/ChangeLog:
PR c/97125
* c-c++-common/Wduplicated-branches-15.c: New test.
Richard Biener [Wed, 23 Sep 2020 13:03:31 +0000 (15:03 +0200)]
middle-end/96453 - relax gimple_expand_vec_cond_expr
This relaxes the condition under which we also try NE_EXPR
for a fake generated compare in addition to LT_EXPR given
the fact the verification ICEd when it failed but obviously
was only implemented for constants. Thus the patch removes
the verification and the restriction to constant operands.
2020-09-23 Richard Biener <rguenther@suse.de>
PR middle-end/96453
* gimple-isel.cc (gimple_expand_vec_cond_expr): Remove
LT_EXPR -> NE_EXPR verification and also apply it for
non-constant masks.
* gcc.dg/pr96453.c: New testcase.
Jan Hubicka [Wed, 23 Sep 2020 13:12:18 +0000 (15:12 +0200)]
Minor modref optimization and statistics fix
this patch fixes bug in tracking memory stats and also I have noticed that while
the pass takes care to stop traking things when things are obviously out of hand
it still keeps summaries that have no useful info for loads or stores and also
many summaries are just copying const/pure attributes. This patch thus also
adds logic to detect if summary is useful and drop it early otherwise. This
reduces number of queries to the oracle and saves memory/lto streaming.
For cc1plus LTO build (configured with --disable-plugin
--enable-checking=release --with-build-config=lto) I now get:
Alias oracle query stats:
refs_may_alias_p:
62488734 disambiguations,
72660949 queries
ref_maybe_used_by_call_p: 128863 disambiguations,
63393551 queries
call_may_clobber_ref_p: 16013 disambiguations, 21776 queries
nonoverlapping_component_refs_p: 0 disambiguations, 37628 queries
nonoverlapping_refs_since_match_p: 19397 disambiguations, 55370 must overlaps, 75516 queries
aliasing_component_refs_p: 54741 disambiguations, 752198 queries
TBAA oracle:
21632692 disambiguations
52565147 queries
15656420 are in alias set 0
10108172 queries asked about the same object
124 queries asked about the same alias set
0 access volatile
3640460 are dependent in the DAG
1527279 are aritificially in conflict with void *
Modref stats:
modref use: 5712 disambiguations, 31221 queries
modref clobber: 684316 disambiguations, 1010000 queries
1779717 tbaa queries (1.762096 per modref query)
PTA query stats:
pt_solution_includes: 947334 disambiguations,
13601373 queries
pt_solutions_intersect: 1011662 disambiguations,
13139565 queries
The number of queries should change, but the number of disambiguations should
not. However comparing with stats here
https://gcc.gnu.org/pipermail/gcc-patches/2020-September/554309.html
I see about 50% drop in clobber disambiguations. There is however same drop in
other alias oracle stats. I suppose someting changed in meanwhile on mainline
because I was basing that on older tree. I tried to proofread changes between
mainline and branch and they seem all quite obvious.
This is consistent with what I get on tramp3d:
Alias oracle query stats:
refs_may_alias_p: 2051320 disambiguations, 2312132 queries
ref_maybe_used_by_call_p: 7058 disambiguations, 2088222 queries
call_may_clobber_ref_p: 232 disambiguations, 232 queries
nonoverlapping_component_refs_p: 0 disambiguations, 4339 queries
nonoverlapping_refs_since_match_p: 329 disambiguations, 10200 must overlaps, 10616 queries
aliasing_component_refs_p: 857 disambiguations, 34639 queries
TBAA oracle: 886768 disambiguations 1670635 queries
131572 are in alias set 0
461689 queries asked about the same object
0 queries asked about the same alias set
0 access volatile
190291 are dependent in the DAG
315 are aritificially in conflict with void *
Modref stats:
modref use: 430 disambiguations, 1885 queries
modref clobber: 9657 disambiguations, 16076 queries
19027 tbaa queries (1.183566 per modref query)
PTA query stats:
pt_solution_includes: 311756 disambiguations, 524179 queries
pt_solutions_intersect: 129689 disambiguations, 415878 queries
In both cases the number of disambiguations should be same (queries are not
comparable).
Bootstrapped/regtested x86_64-linux, comitted.
gcc/ChangeLog:
2020-09-23 Jan Hubicka <hubicka@ucw.cz>
* ipa-modref.c (modref_summary::lto_useful_p): New member function.
(modref_summary::useful_p): New member function.
(analyze_function): Drop useless summaries.
(modref_write): Skip useless summaries.
(pass_ipa_modref::execute): Drop useless summaries.
* ipa-modref.h (struct GTY): Declare useful_p and lto_useful_p.
* tree-ssa-alias.c (dump_alias_stats): Fix.
(modref_may_conflict): Fix stats.
Richard Biener [Wed, 23 Sep 2020 12:20:44 +0000 (14:20 +0200)]
middle-end/96466 - fix VEC_COND isel/expansion issue
We need to avoid forcing BLKmode for truth vectors, instead do as
other code and use VOIDmode so layout_type can pick a suitable and
consistent mode. RTL expansion of vect_cond_mask also needs to deal
with CONST_INT operands which means passing the mode explicitely.
2020-09-23 Richard Biener <rguenther@suse.de>
PR middle-end/96466
* internal-fn.c (expand_vect_cond_mask_optab_fn): Use
appropriate mode for force_reg.
* tree.c (build_truth_vector_type_for): Pass VOIDmode to
make_vector_type.
* gcc.dg/pr96466.c: New testcase.
Richard Sandiford [Wed, 23 Sep 2020 11:29:40 +0000 (12:29 +0100)]
vect: Fix epilogue loop handling of partial vectors
This patch fixes the fallout that Kewen reported on Power after
the recent change to avoid unnecessary use of partial vectors.
As Kewen said, the problem is that vect_analyze_loop_2 doesn't
know how many epilogue iterations there will be, and so it
cannot make a final decision about whether the number of
iterations forces an epilogue loop to use partial vectors.
This is similar to the current situation for peeling: we don't know
during initial analysis whether an epilogue loop will itself require
peeling. Instead we decide that during vect_do_peeling, where the
final number of epilogue loop iterations is known.
The patch takes a similar approach for the decision about whether
to use partial vectors. As the comments in the patch say, the
idea is that vect_analyze_loop_2 should make peeling and partial-
vector decisions based on the assumption that the loop_vinfo will
be used as the main loop, while vect_do_peeling should make them
in the knowledge that the loop_vinfo will be used as an epilogue loop.
This allows the same analysis to be used for both cases, which we
rely on for implementing VECT_COMPARE_COSTS; see the big comment
in vect_analyze_loop for details.
I hope the patch makes the (mostly preexisting) structure a bit
more obvious. It isn't what anyone would design from scratch,
but that's the nature of working with a mature vector framework.
Arranging things this way means that vect_verify_full_masking
and vect_verify_loop_lens now become part of the “can” rather
than “will” test for partial vectors.
Also, while splitting out the logic that handles epilogues with
constant iterations, I added a check to make sure that we don't
try to use partial vectors to vectorise a single-scalar loop.
This required some changes to the Power tests.
gcc/
* tree-vectorizer.h (determine_peel_for_niter): Delete in favor of...
(vect_determine_partial_vectors_and_peeling): ...this new function.
* tree-vect-loop-manip.c (vect_update_epilogue_niters): New function.
Reject using vector epilogue loops for single iterations. Install
the constant number of epilogue loop iterations in the associated
loop_vinfo. Rely on vect_determine_partial_vectors_and_peeling
to do the main part of the test.
(vect_do_peeling): Use vect_update_epilogue_niters to handle
epilogue loops with a known number of iterations. Skip recomputing
the number of iterations later in that case. Otherwise, use
vect_determine_partial_vectors_and_peeling to decide whether the
epilogue loop needs to use partial vectors or peeling.
* tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Set the
default can_use_partial_vectors_p to false if partial-vector-usage=0.
(determine_peel_for_niter): Remove in favor of...
(vect_determine_partial_vectors_and_peeling): ...this new function,
split out from...
(vect_analyze_loop_2): ...here. Reflect the vect_verify_full_masking
and vect_verify_loop_lens results in CAN_USE_PARTIAL_VECTORS_P
rather than USING_PARTIAL_VECTORS_P.
gcc/testsuite/
* gcc.target/powerpc/p9-vec-length-epil-1.c: Do not expect the
single-iteration epilogues of the 64-bit loops to be vectorized.
* gcc.target/powerpc/p9-vec-length-epil-7.c: Likewise.
* gcc.target/powerpc/p9-vec-length-epil-8.c: Likewise.
Kyrylo Tkachov [Wed, 23 Sep 2020 11:02:29 +0000 (12:02 +0100)]
AArch64: Implement missing vrndns_f32 intrinsic
This patch implements the missing vrndns_f32 intrinsic. This operates on a scalar float32_t value.
It can be mapped down to a __builtin_aarch64_frintnsf builtin.
This patch does that.
Bootstrapped and tested on aarch64-none-linux-gnu.
gcc/
PR target/71233
* config/aarch64/aarch64-simd-builtins.def (frintn): Use BUILTIN_VHSDF_HSDF
for modes. Remove explicit hf instantiation.
* config/aarch64/arm_neon.h (vrndns_f32): Define.
gcc/testsuite/
PR target/71233
* gcc.target/aarch64/simd/vrndns_f32_1.c: New test.
Richard Biener [Wed, 23 Sep 2020 08:42:48 +0000 (10:42 +0200)]
tree-optimization/97173 - extend assert in vectorizable_live_operation
The condition we're expecting to eventually run into isn't fully
captured by checking for CTORs, instead we can also run into the
CTOR element conversion.
2020-09-23 Richard Biener <rguenther@suse.de>
PR tree-optimization/97173
* tree-vect-loop.c (vectorizable_live_operation): Extend
assert to also conver element conversions.
* gcc.dg/vect/pr97173.c: New testcase.
Kyrylo Tkachov [Wed, 23 Sep 2020 10:07:50 +0000 (11:07 +0100)]
AArch64: Implement missing _p64 intrinsics for vector permutes
This patch implements some missing vector permute intrinsics operating on poly64x2_t types.
They are implemented identically to their uint64x2_t brethren.
Bootstrapped and tested on aarch64-none-linux-gnu.
gcc/
PR target/71233
* config/aarch64/arm_neon.h (vtrn1q_p64, vtrn2q_p64, vuzp1q_p64,
vuzp2q_p64, vzip1q_p64, vzip2q_p64): Define.
gcc/testsuite/
PR target/71233
* gcc.target/aarch64/simd/trn_zip_p64_1.c: New test.
Kyrylo Tkachov [Wed, 23 Sep 2020 09:32:42 +0000 (10:32 +0100)]
AArch64: Implement vldrq_p128 intrinsic
This patch implements the missing vldrq_p128 intrinsic that just loads from the appropriate pointer.
Bootstrapped and tested on aarch64-none-linux-gnu.
gcc/
PR target/71233
* config/aarch64/arm_neon.h (vldrq_p128): Define.
gcc/testsuite/
PR target/71233
* gcc.target/aarch64/simd/vldrq_p128_1.c: New test.
Kyrylo Tkachov [Wed, 23 Sep 2020 09:29:17 +0000 (10:29 +0100)]
AArch64: Implement vstrq_p128 intrinsic
This patch implements the missing vstrq_p128 intrinsic.
It just performs a store of the poly128_t argument to a memory location.
Bootstrapped and tested on aarch64-none-linux-gnu.
gcc/
PR target/71233
* config/aarch64/arm_neon.h (vstrq_p128): Define.
gcc/testsuite/
PR target/71233
* gcc.target/aarch64/simd/vstrq_p128_1.c: New test.
Tobias Burnus [Wed, 23 Sep 2020 09:07:40 +0000 (11:07 +0200)]
gcc/analyzer: Silence -Wpragma warns with GCC < 10
gcc/analyzer/ChangeLog:
* analyzer-logging.cc: Guard '#pragma ... ignored "-Wformat-diag"'
by '#if __GNUC__ >= 10'
* analyzer.h: Likewise.
* call-string.cc: Likewise.
Richard Biener [Wed, 23 Sep 2020 08:11:03 +0000 (10:11 +0200)]
tree-optimization/97151 - improve PTA for C++ operator delete
C++ operator delete, when DECL_IS_REPLACEABLE_OPERATOR_DELETE_P,
does not cause the deleted object to be escaped. It also has no
other interesting side-effects for PTA so skip it like we do
for BUILT_IN_FREE.
2020-09-23 Richard Biener <rguenther@suse.de>
PR tree-optimization/97151
* tree-ssa-structalias.c (find_func_aliases_for_call):
DECL_IS_REPLACEABLE_OPERATOR_DELETE_P has no effect on
arguments.
* g++.dg/cpp1y/new1.C: Adjust for two more handled transforms.
Richard Biener [Wed, 23 Sep 2020 08:07:37 +0000 (10:07 +0200)]
middle-end/97162 - fix ICE when building gamess
This appropriately guards the check for a hard register in
compare_base_decls which otherwise ICEs when passed a CONST_DECL.
2020-09-23 Richard Biener <rguenther@suse.de>
PR middle-end/97162
* alias.c (compare_base_decls): Use DECL_HARD_REGISTER
and guard with VAR_P.
Martin Liska [Mon, 21 Sep 2020 14:26:10 +0000 (16:26 +0200)]
gcov: fix streaming corruption
gcc/ChangeLog:
PR gcov-profile/97069
* profile.c (branch_prob): Line number must be at least 1.
gcc/testsuite/ChangeLog:
PR gcov-profile/97069
* g++.dg/gcov/pr97069.C: New test.
Tom de Vries [Tue, 22 Sep 2020 11:16:39 +0000 (13:16 +0200)]
[nvptx] Handle move from DF subreg to DF reg in nvptx_output_mov_insn
When compiling test-case gcc.dg/atomic/c11-atomic-exec-1.c, we run into
these ptxas errors:
...
line 100; error: Rounding modifier required for instruction 'cvt'
line 105; error: Rounding modifier required for instruction 'cvt'
...
The problem is that this move:
...
//(insn 13 11 14 2
// (set (reg:DF 28 [ _9 ])
// (subreg:DF (reg:TI 22 [ _1 ]) 0)) 9 {*movdf_insn}
// (nil))
cvt.f64.u64 %r28, %r22$0;
...
is emitted as cvt.f64.u64, while it should be a mov.b64 instead.
Fix this by handling this case in nvptx_output_mov_insn.
Tested on nvptx.
gcc/ChangeLog:
PR target/97158
* config/nvptx/nvptx.c (nvptx_output_mov_insn): Handle move from
DF subreg to DF reg.
Tom de Vries [Wed, 23 Sep 2020 07:16:17 +0000 (09:16 +0200)]
[testsuite] Add missing require-effective-target alloca
Add missing require-effect-target alloca directives.
Tested on nvptx.
gcc/testsuite/ChangeLog:
* gcc.dg/Warray-bounds-63.c: Add require-effective-target alloca.
* gcc.dg/Warray-bounds-66.c: Same.
* gcc.dg/atomic/stdatomic-vm.c: Same.
Clément Chigot [Fri, 3 May 2019 14:53:13 +0000 (16:53 +0200)]
syscall: fix TestForeground for AIX
Syscall function can't be used on AIX. Therefore, Ioctl in
TestForeground must call raw_ioctl.
Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/175080
Clément Chigot [Tue, 7 May 2019 11:57:40 +0000 (13:57 +0200)]
syscall: remove ptrace syscall on ppc64
ptrace is available only for 32 bits programs.
Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/252558
David Malcolm [Tue, 22 Sep 2020 21:42:27 +0000 (17:42 -0400)]
Add $(ZLIBINC) to CFLAGS-analyzer/engine.o
gcc/ChangeLog:
* Makefile.in: Add $(ZLIBINC) to CFLAGS-analyzer/engine.o.
David Malcolm [Tue, 22 Sep 2020 15:29:02 +0000 (11:29 -0400)]
analyzer: use switch in exploded_node::on_stmt
This patch replaces a sequence of dyn_cast to different gimple stmt
types in exploded_node::on_stmt with a switch on the gimple_code. This
makes clearer which kinds of stmt are currently treated as no-ops, as a
precursor to handling them properly.
No functional change intended.
gcc/analyzer/ChangeLog:
* engine.cc (exploded_node::on_stmt): Replace sequence of dyn_cast
with switch.
Clément Chigot [Tue, 26 May 2020 09:31:37 +0000 (11:31 +0200)]
runtime, net: fix build errors on AIX
Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/235158
Ian Lance Taylor [Wed, 23 Sep 2020 00:27:46 +0000 (17:27 -0700)]
libbacktrace: handle pc == low correctly
* dwarf.c (report_inlined_functions): Handle PC == -1 and PC ==
p->low.
(dwarf_lookup_pc): Likewise.