Simon Pilgrim [Wed, 15 Jun 2022 10:07:48 +0000 (11:07 +0100)]
[DAG] Fix SDLoc mismatch in (shl (srl x, c1), c2) -> and(shift(x,c3)) fold
Noticed by @craig.topper on D125836 which uses a tweaked copy of the same code.
Differential Revision: https://reviews.llvm.org/D127772
Stanislav Gatev [Wed, 18 May 2022 21:57:40 +0000 (21:57 +0000)]
[clang][dataflow] Add support for correlated branches to optional model
Add support for correlated branches to the std::optional dataflow model.
Differential Revision: https://reviews.llvm.org/D125931
Reviewed-by: ymandel, xazax.hun
Martin Boehme [Wed, 15 Jun 2022 06:07:23 +0000 (08:07 +0200)]
[clang] Reject non-declaration C++11 attributes on declarations
For backwards compatiblity, we emit only a warning instead of an error if the
attribute is one of the existing type attributes that we have historically
allowed to "slide" to the `DeclSpec` just as if it had been specified in GNU
syntax. (We will call these "legacy type attributes" below.)
The high-level changes that achieve this are:
- We introduce a new field `Declarator::DeclarationAttrs` (with appropriate
accessors) to store C++11 attributes occurring in the attribute-specifier-seq
at the beginning of a simple-declaration (and other similar declarations).
Previously, these attributes were placed on the `DeclSpec`, which made it
impossible to reconstruct later on whether the attributes had in fact been
placed on the decl-specifier-seq or ahead of the declaration.
- In the parser, we propgate declaration attributes and decl-specifier-seq
attributes separately until we can place them in
`Declarator::DeclarationAttrs` or `DeclSpec::Attrs`, respectively.
- In `ProcessDeclAttributes()`, in addition to processing declarator attributes,
we now also process the attributes from `Declarator::DeclarationAttrs` (except
if they are legacy type attributes).
- In `ConvertDeclSpecToType()`, in addition to processing `DeclSpec` attributes,
we also process any legacy type attributes that occur in
`Declarator::DeclarationAttrs` (and emit a warning).
- We make `ProcessDeclAttribute` emit an error if it sees any non-declaration
attributes in C++11 syntax, except in the following cases:
- If it is being called for attributes on a `DeclSpec` or `DeclaratorChunk`
- If the attribute is a legacy type attribute (in which case we only emit
a warning)
The standard justifies treating attributes at the beginning of a
simple-declaration and attributes after a declarator-id the same. Here are some
relevant parts of the standard:
- The attribute-specifier-seq at the beginning of a simple-declaration
"appertains to each of the entities declared by the declarators of the
init-declarator-list" (https://eel.is/c++draft/dcl.dcl#dcl.pre-3)
- "In the declaration for an entity, attributes appertaining to that entity can
appear at the start of the declaration and after the declarator-id for that
declaration." (https://eel.is/c++draft/dcl.dcl#dcl.pre-note-2)
- "The optional attribute-specifier-seq following a declarator-id appertains to
the entity that is declared."
(https://eel.is/c++draft/dcl.dcl#dcl.meaning.general-1)
The standard contains similar wording to that for a simple-declaration in other
similar types of declarations, for example:
- "The optional attribute-specifier-seq in a parameter-declaration appertains to
the parameter." (https://eel.is/c++draft/dcl.fct#3)
- "The optional attribute-specifier-seq in an exception-declaration appertains
to the parameter of the catch clause" (https://eel.is/c++draft/except.pre#1)
The new behavior is tested both on the newly added type attribute
`annotate_type`, for which we emit errors, and for the legacy type attribute
`address_space` (chosen somewhat randomly from the various legacy type
attributes), for which we emit warnings.
Depends On D111548
Reviewed By: aaron.ballman, rsmith
Differential Revision: https://reviews.llvm.org/D126061
Sven van Haastregt [Wed, 15 Jun 2022 09:54:46 +0000 (10:54 +0100)]
[OpenCL] Reword unknown extension pragma diagnostic
For newer OpenCL extensions that do not require a pragma, such as
`cl_khr_subgroup_shuffle`, a user could still accidentally attempt to
use a pragma. This would result in a warning
"unknown OpenCL extension 'cl_khr_subgroup_shuffle' - ignoring"
which could be mistakenly interpreted as "clang does not support this
extension at all" instead of "clang does not require any pragma for
this extension".
Differential Revision: https://reviews.llvm.org/D126660
Simon Pilgrim [Wed, 15 Jun 2022 09:40:13 +0000 (10:40 +0100)]
[X86] needCarryOrOverflowFlag/onlyZeroFlagUsed - merge identical switch cases. NFCI.
Makes it easier to grok and fixes various bugprone-branch-clone warnings.
David Sherwood [Thu, 9 Jun 2022 08:01:49 +0000 (09:01 +0100)]
[AArch64][SME] Add SME read/write intrinsics that map to the mova instruction
This patch adds implementations for the read/write SME ACLE intrinsics:
@llvm.aarch64.sme.read.horiz
@llvm.aarch64.sme.read.vert
@llvm.aarch64.sme.write.horiz
@llvm.aarch64.sme.write.vert
These all map to the SME mova instruction.
Differential Revision: https://reviews.llvm.org/D127414
Martin Boehme [Wed, 15 Jun 2022 08:59:07 +0000 (10:59 +0200)]
[Clang] Documentation-only: Add missing closing `>` in AttrDocs.td
Ilya Biryukov [Wed, 15 Jun 2022 08:55:55 +0000 (10:55 +0200)]
[libcxx] Fix allocator<void>::pointer in C++20 with removed members
When compiled with `-D_LIBCPP_ENABLE_CXX20_REMOVED_ALLOCATOR_MEMBERS`
uses of `allocator<void>::pointer` resulted in compiler errors after D104323.
If we instantiate the primary template, `allocator<void>::reference` produces
an error 'cannot form references to void'.
To workaround this, allow to bring back the `allocator<void>` specialization by defining the new `_LIBCPP_ENABLE_CXX20_REMOVED_ALLOCATOR_VOID_SPECIALIZATION` macro.
To make sure the code that uses `allocator<void>` and the removed members does not break,
both `_LIBCPP_ENABLE_CXX20_REMOVED_ALLOCATOR_MEMBERS` and `_LIBCPP_ENABLE_CXX20_REMOVED_ALLOCATOR_MEMBERS` have to be defined.
Reviewed By: ldionne, #libc, philnik
Differential Revision: https://reviews.llvm.org/D126210
Martin Boehme [Wed, 15 Jun 2022 08:38:10 +0000 (10:38 +0200)]
[Clang] Fix signed-unsigned comparison warning that breaks the ppc64 build.
David Sherwood [Tue, 14 Jun 2022 15:27:18 +0000 (16:27 +0100)]
[NFC][AArch64] Minor refactor of AArch64InstPrinter::printMatrixTileList
We can remove the MatrixZADRegisterTable table of tile registers and
just calculate the register index directly.
Differential Revision: https://reviews.llvm.org/D127757
Kadir Cetinkaya [Wed, 15 Jun 2022 08:04:48 +0000 (10:04 +0200)]
[clangd] Enable AKA type printing by default
This has been tested on a large set of c++ developers for a long while,
without any crashes or complaints.
Differential Revision: https://reviews.llvm.org/D127833
owenca [Wed, 15 Jun 2022 08:29:51 +0000 (01:29 -0700)]
[libcxx] Remove extraneous '---' lines in .clang-format files
Benjamin Kramer [Wed, 15 Jun 2022 08:27:19 +0000 (10:27 +0200)]
[mlir][Arith] Fix a use-after-free after rewriting ops to unsigned
Just short-circuit when a change was made, the erased value is invalid
after that. Found by asan.
This pass looks like it could use rewrite patterns instead which don't
have this issue, but let's fix the asan build first.
Kito Cheng [Thu, 9 Jun 2022 15:25:18 +0000 (23:25 +0800)]
[RISCV] Fixing undefined physical register issue when subreg liveness tracking enabled.
RISC-V expand register tuple spilling into series of register spilling after
register allocation phase by the pseudo instruction expansion, however part of
register tuple might be still undefined during spilling, machine verifier will
complain the spill instruction is using an undefined physical register.
Optimal solution should be doing liveness analysis and do not emit spill
and reload for those undefined parts, but accurate liveness info at that point
is not so easy to get.
So the suboptimal solution is still spill and reload those undefined parts, but
adding implicit-use of super register to spill function, then machine
verifier will only report report using undefined physical register if
the when whole super register is undefined, and this behavior are also
documented in MachineVerifier::checkLiveness[1].
Example for demo what happend:
```
v10m2 = xxx
# v12m2 not define yet
PseudoVSPILL2_M2 v10m2_v12m2
...
```
After expansion:
```
v10m2 = xxx
# v12m2 not define yet
# Expand PseudoVSPILL2_M2 v10m2_v12m2 to 2 vs2r
VS2R_V v10m2
VS2R_V v12m2 # Use undef reg!
```
What this patch did:
```
v10m2 = xxx
# v12m2 not define yet
# Expand PseudoVSPILL2_M2 v10m2_v12m2 to 2 vs2r
VS2R_V v10m2 implicit v10m2_v12m2
# Use undef reg (v12m2), but v10m2_v12m2 ins't totally undef, so
# that's OK.
VS2R_V v12m2 implicit v10m2_v12m2
```
[1] https://github.com/llvm-mirror/llvm/blob/master/lib/CodeGen/MachineVerifier.cpp#L2016-L2019
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D127642
Matthias Springer [Wed, 15 Jun 2022 08:15:09 +0000 (10:15 +0200)]
[mlir][bufferize] Better implementation of AnalysisState::isTensorYielded
If `create-deallocs=0`, mark all bufferization.alloc_tensor ops as escaping. (Unless they already have an `escape` attribute.) In the absence of analysis information, check SSA use-def chains to see if the value may be yielded.
Differential Revision: https://reviews.llvm.org/D127302
Siva Chandra Reddy [Wed, 15 Jun 2022 08:09:12 +0000 (08:09 +0000)]
[libc][Obvious] Removed few unused vars.
Matthias Springer [Wed, 15 Jun 2022 08:06:55 +0000 (10:06 +0200)]
[mlir][bufferize][NFC] Merge AlwaysCopyAnalysisState into AnalysisState
`AnalysisState` now has default implementations of all virtual functions.
Differential Revision: https://reviews.llvm.org/D127301
Heejin Ahn [Tue, 14 Jun 2022 23:41:17 +0000 (16:41 -0700)]
[InstCombine] Improve check for catchswitch BBs (NFC)
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D127810
Matthias Springer [Wed, 15 Jun 2022 07:58:56 +0000 (09:58 +0200)]
[mlir][bufferize][NFC] Make func BufferizableOpInterface impl compatible with One-Shot Bufferize
Bufferization of the func dialect must go through `OneShotModuleBufferize`. With this change, the analysis interface methods of the BufferizableOpInterface of func dialect ops can be used together with the normal `OneShotBufferize`. (In the absence of analysis information, they will return conservative results.)
Differential Revision: https://reviews.llvm.org/D127299
Peixin-Qiao [Wed, 15 Jun 2022 08:02:27 +0000 (16:02 +0800)]
[flang][OpenMP] Add one semantic check for data-sharing clauses
As OpenMP 5.0, for firstprivate, lastprivate, copyin, and copyprivate
clauses, if the list item is a polymorphic variable with the allocatable
attribute, the behavior is unspecified.
Reviewed By: kiranchandramohan
Differential Revision: https://reviews.llvm.org/D127601
Matthias Springer [Wed, 15 Jun 2022 07:09:07 +0000 (09:09 +0200)]
[mlir][linalg][bufferize] Remove always-aliasing-with-dest option
This flag was introduced for a use case in IREE, but it is no longer needed.
Differential Revision: https://reviews.llvm.org/D126965
Martin Boehme [Wed, 15 Jun 2022 06:08:10 +0000 (08:08 +0200)]
[Clang] Add the `annotate_type` attribute
This is an analog to the `annotate` attribute but for types. The intent is to allow adding arbitrary annotations to types for use in static analysis tools.
For details, see this RFC:
https://discourse.llvm.org/t/rfc-new-attribute-annotate-type-iteration-2/61378
Reviewed By: aaron.ballman
Differential Revision: https://reviews.llvm.org/D111548
Peixin-Qiao [Wed, 15 Jun 2022 07:39:13 +0000 (15:39 +0800)]
[flang] Change C889 from error into warning
This constraint is used in OMP2012 benchmark, and other compilers do not
enforce it. Change it into one warning. This addresses the issue
https://github.com/llvm/llvm-project/issues/56003.
Reviewed By: klausler, kiranchandramohan
Differential Revision: https://reviews.llvm.org/D127740
Nikita Popov [Wed, 15 Jun 2022 07:36:39 +0000 (09:36 +0200)]
[SimplifyLibCalls] Drop duplicate check (NFC)
The same condition already exists inside optimizeMemCmpConstantSize().
Austin Kerbow [Wed, 15 Jun 2022 07:23:30 +0000 (00:23 -0700)]
[AMDGPU] Fix buildbot failures after
48ebc1af29
Some buildbots (lto, windows) were failing due to some function reference
variables being improperly initialized.
Siva Chandra Reddy [Wed, 15 Jun 2022 07:11:57 +0000 (07:11 +0000)]
[libc] Add linux threads targets only if __support/OSUtil targets are available.
Petr Hosek [Wed, 15 Jun 2022 06:53:18 +0000 (06:53 +0000)]
[libFuzzer] Use the compiler to link the relocatable object
Rather than invoking the linker directly, let the compiler driver
handle it. This ensures that we use the correct linker in the case
of cross-compiling.
Differential Revision: https://reviews.llvm.org/D127828
Matthias Springer [Wed, 15 Jun 2022 07:00:44 +0000 (09:00 +0200)]
[mlir][SCF][bufferize] Implement `resolveConflicts` for SCF ops
scf::ForOp and scf::WhileOp must insert buffer copies not only for out-of-place bufferizations, but also to enforce additional invariants wrt. to buffer aliasing behavior. This is currently happening in the respective `bufferize` methods. With this change, the tensor copy insertion pass will also enforce these invariants by inserting copies. The `bufferize` methods can then be simplified and made independent of the `AnalysisState` data structure in a subsequent change.
Differential Revision: https://reviews.llvm.org/D126822
owenca [Wed, 15 Jun 2022 06:57:08 +0000 (23:57 -0700)]
[mlir] Add missing newline at end of .clang-format file
chenglin.bi [Wed, 15 Jun 2022 06:51:15 +0000 (14:51 +0800)]
[LSR] Add test for LoopStrenghtReduce for Ldp; NFC
#53877
Siva Chandra Reddy [Wed, 15 Jun 2022 06:32:06 +0000 (06:32 +0000)]
[libc][NFC] Add src.__support.OSUtil targets conditionally.
Before this change, they were unconditionally added, irrespective of the
availability of the architecture specific pieces.
Kadir Cetinkaya [Tue, 14 Jun 2022 15:08:37 +0000 (17:08 +0200)]
[clangd] Wire up compilation for style blocks
Differential Revision: https://reviews.llvm.org/D127749
Yeting Kuo [Sat, 11 Jun 2022 16:46:30 +0000 (00:46 +0800)]
[RISCV] Teach vsetvli insertion to not insert redundant vsetvli right after VLEFF/VLSEGFF.
VSETVLIInfos right after VLEFF/VLSEGFF are currently unknown since they modify
VL. Unknown VSETVLIInfos make next vector operations needed to be inserted
VSET(I)VLI. Actually the next vector operation of VLEFF/VLSEGFF may not need to
be inserted VSET(I)VLI if it uses same VTYPE and the resulted vl of
VLEFF/VLSEGFF.
Take the below C code as an example,
vint8m4_t vec_src1 = vle8ff_v_i8m4(str1, &new_vl, vl);
vbool2_t mask1 = vmseq_vx_i8m4_b2(vec_src1, 0, new_vl);
vsetvli insertion adds a redundant vsetvli for that,
Assembly result:
vsetvli a2,a2,e8,m4,ta,mu
vle8ff.v v28,(a0)
csrr a3,vl ; redundant
vsetvli zero,a3,e8,m4,ta,mu ; redundant
vmseq.vi v25,v28,0
After D126794, VLEFF/VLSEGFF has a define having value of VL. The patch consider
there is a ghost vsetvli right after VLEFF/VLSEGFF. The ghost VSET(I)LIs use the
vl output of the VLEFF/VLSEGFF as its AVL and same VTYPE of the VLEFF/VLSEGFF.
The ghost vsetvli must be redundant, and we could use it to get the VSETVLIInfo
right after VLEFF/VLSEGFF.
Reviewed By: reames
Differential Revision: https://reviews.llvm.org/D127576
Ping Deng [Wed, 15 Jun 2022 05:43:26 +0000 (05:43 +0000)]
[SelectionDAG] fold 'Op0 - (X * MulC)' to 'Op0 + (X << log2(-MulC))'
Reviewed By: craig.topper, spatel
Differential Revision: https://reviews.llvm.org/D127474
Siva Chandra Reddy [Wed, 15 Jun 2022 05:38:38 +0000 (05:38 +0000)]
[libc][NFC] Use uint32_t to represent futex words.
Futexes are 32 bits in size on all platforms, including 64-bit systems.
owenca [Mon, 13 Jun 2022 19:15:31 +0000 (12:15 -0700)]
[clang-format] Never analyze insert/remove braces in the same pass
Turn off RemoveBracesLLVM while analyzing InsertBraces and vice
versa to avoid potential interference of each other and better the
performance.
Differential Revision: https://reviews.llvm.org/D127685
LLVM GN Syncbot [Wed, 15 Jun 2022 05:24:12 +0000 (05:24 +0000)]
[gn build] Port
48ebc1af2948
Austin Kerbow [Fri, 3 Jun 2022 18:35:47 +0000 (11:35 -0700)]
[AMDGPU] Add more expressive sched_barrier controls
The sched_barrier builtin allow the scheduler's behavior to be shaped by users
when very specific codegen is needed in order to create highly optimized code.
This patch adds more granular control over the types of instructions that are
allowed to be reordered with respect to one or multiple sched_barriers. A mask
is used to specify groups of instructions that should be allowed to be scheduled
around a sched_barrier. The details about this mask may be used can be found in
llvm/include/llvm/IR/IntrinsicsAMDGPU.td.
Reviewed By: rampitec
Differential Revision: https://reviews.llvm.org/D127123
Austin Kerbow [Sun, 22 May 2022 21:54:50 +0000 (14:54 -0700)]
[AMDGPU] Add isMFMA helper function. NFC
Reviewed By: rampitec
Differential Revision: https://reviews.llvm.org/D127124
Fangrui Song [Wed, 15 Jun 2022 04:25:56 +0000 (21:25 -0700)]
[MC] Remove unused MCStreamer::SwitchSection
switchSection should be used instead.
Peter S. Housel [Tue, 14 Jun 2022 06:36:56 +0000 (23:36 -0700)]
[ORC-RT] Add integration tests for AArch64
This change adds test cases targeting the AArch64 Linux platform to
the ORC runtime integration test suite.
Reviewed By: lhames, sunho
Differential Revision: https://reviews.llvm.org/D127720
Ping Deng [Wed, 15 Jun 2022 03:28:44 +0000 (03:28 +0000)]
[RISCV][NFC] Add more tests for instruction selection of 'mul'
precommit tests for D127474
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D127475
Joe Loser [Wed, 15 Jun 2022 03:25:50 +0000 (21:25 -0600)]
[libc++][NFCI] span: replace enable_if with concepts
Several span constructors use `enable_if` which is verbose. Replace these with
concepts or requires expressions.
Venkata Ramanaiah Nalamothu [Wed, 15 Jun 2022 02:34:32 +0000 (08:04 +0530)]
[LLDB] CommandObjectThreadUntil::DoExecute() sets the wrong selected thread ID
For the 'thread until' command, the selected thread ID, to perform the operation on, could be of the current thread or the specified thread.
Reviewed By: jingham
Differential Revision: https://reviews.llvm.org/D48865
Lei Zhang [Wed, 15 Jun 2022 03:00:18 +0000 (23:00 -0400)]
[mlir][spirv] Handle corner cases for math.powf conversion
Per GLSL Pow extended instruction spec: "Result is undefined if
x < 0. Result is undefined if x = 0 and y <= 0." So we need to
handle negative `x` values specifically.
Reviewed By: ThomasRaoux
Differential Revision: https://reviews.llvm.org/D127816
wangpc [Wed, 15 Jun 2022 02:59:00 +0000 (10:59 +0800)]
[RISCV][NFC] Set default value for BaseInstr in RISCVVPseudo
Since almost all pseudos have the same form of BaseInstr, we
can just set it as default value to reduce some lines.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D127632
Ben Shi [Wed, 15 Jun 2022 01:09:37 +0000 (01:09 +0000)]
[Driver] Improve linking options for target AVR
1. Support user specified linker (-fuse-ld)
2. Support user specified linker script (-T)
Reviewed By: MaskRay, haowei
Differential Revision: https://reviews.llvm.org/D126192
Amir Ayupov [Wed, 15 Jun 2022 02:53:28 +0000 (19:53 -0700)]
[X86][NFC] Use mnemonic tables in validateInstruction 4/4
Group switch cases by opcode:
- VGATHERDPD
- VGATHERDPS
- VGATHERQPD
- VGATHERQPS
- VPGATHERDD
- VPGATHERDQ
- VPGATHERQD
- VPGATHERQQ
Distinguish masked vs non-masked forms by EVEX encoding.
Reviewed By: skan, craig.topper
Differential Revision: https://reviews.llvm.org/D127719
jacquesguan [Tue, 14 Jun 2022 07:37:47 +0000 (15:37 +0800)]
[mlir][Vector] Fold consecutive bitcast.
This patch supports to fold consecutive bitcast into one bitcast.
Differential Revision: https://reviews.llvm.org/D127723
lewuathe [Wed, 15 Jun 2022 02:27:55 +0000 (11:27 +0900)]
[mlir][affine] Make loop tiling default options explicit
Make default loop tiling options explicit from CLI options. We can also set default value for separate option which is declared implicitly.
Reviewed By: ayzhuang
Differential Revision: https://reviews.llvm.org/D127711
Craig Topper [Wed, 15 Jun 2022 00:57:35 +0000 (17:57 -0700)]
[RISCV] Replace uses of VLOpFrag in VLMax patterns with srcvalue.
These are on inner nodes and we're dropping the captured $vl anyway.
Joseph Huber [Wed, 15 Jun 2022 02:12:41 +0000 (22:12 -0400)]
[Libomptarget] Use binutils archive executable to address failing tests
Summary:
The static linking test ensures that we can statically link offloading
programs. To create the test we used `llvm-ar`. However, this may not
exist in the user's environment. This patch changes it to use the
binutils `ar` which should exist on every system running these tests
currently. In the future we should set up the dependencies properly.
Yaxun (Sam) Liu [Tue, 14 Jun 2022 16:40:37 +0000 (12:40 -0400)]
[HIP] fix long double size
For amdgpu target long double type is the same as double type.
The width and align of long double type was incorrectly
overridden when copying aux target properties, which
caused assertion in codegen when emitting global
variables with long double type.
This patch fix that by saving and restoring width
and align of long double type.
Reviewed by: Artem Belevich
Differential Revision: https://reviews.llvm.org/D127771
Fixes: SWDEV-335515
Zi Xuan Wu (Zeson) [Wed, 15 Jun 2022 01:36:26 +0000 (09:36 +0800)]
[CSKY] Fix the assert in eliminateFrameIndex when the offset is negative
After the frameindex is resolved, the offset can be negative. It would
be materialized as unsigned integer and can still calculated by add instruction.
Luo, Yuanke [Wed, 15 Jun 2022 01:22:20 +0000 (09:22 +0800)]
[X86][AMX] Fix klockwork issue.
Phoebe Wang [Wed, 15 Jun 2022 00:26:04 +0000 (08:26 +0800)]
Reland "[X86][RFC] Enable `_Float16` type support on X86 following the psABI"
Disabled 2 mlir tests due to the runtime doesn't support `_Float16`, see
the issue here https://github.com/llvm/llvm-project/issues/55992
Haowei Wu [Wed, 15 Jun 2022 00:53:46 +0000 (17:53 -0700)]
Revert "[Driver] Improve linking options for target AVR"
This reverts commit
3b6e166999bb83197c8b70468c2d371c58cf0c25 which
causes Clang Driver test failures on Fuchsia builders.
LLVM GN Syncbot [Wed, 15 Jun 2022 00:32:13 +0000 (00:32 +0000)]
[gn build] Port
435897b41d60
python3kgae [Wed, 11 May 2022 23:56:38 +0000 (16:56 -0700)]
[TableGen][DirectX] Add tableGen backend to generate DXIL operation for DirectX backend.
A new tableGen backend gen-dxil-enum is added to generate enum for DXIL operation and operation class.
A new file "DXILConstants.inc" will be generated when build DirectX target which include the enums.
More tableGen backends will be added to replace manually written table in DirectX backend.
The unused fields in dxil_inst will be used in future PR.
Reviewed By: bogner
Differential Revision: https://reviews.llvm.org/D125435
Lei Zhang [Tue, 14 Jun 2022 23:39:20 +0000 (19:39 -0400)]
[mlir][spirv] Fix math.ctlz for full zero bit cases
If the integer has all zero bits, GLSL FindUMsb would return -1.
So theoretically (31 - FindUMsb) should still give use the correct
result. However, Adreno GPUshave issues with this:
https://buildkite.com/iree/iree-test-android/builds/6482#
01815f05-3926-466f-822a-
1e20299e5461
This looks like a driver bug. So handle the corner case explicity
to workaround it.
Reviewed By: mravishankar
Differential Revision: https://reviews.llvm.org/D127747
Philip Reames [Tue, 14 Jun 2022 23:15:26 +0000 (16:15 -0700)]
[RISCV] Minor code/comment improvement in prepass of InsertVSETVLI [nfc]
Jonas Devlieghere [Tue, 14 Jun 2022 23:09:39 +0000 (16:09 -0700)]
[dsymutil] Fix std::unique_ptr to llvm::Expected conversion
Fixes error: could not convert from
'std::unique_ptr<llvm::dsymutil::Reproducer>' to
'llvm::Expected<std::unique_ptr<llvm::dsymutil::Reproducer>>'
Jonas Devlieghere [Tue, 14 Jun 2022 16:22:46 +0000 (09:22 -0700)]
[dsymutil] Automatically generate a reproducer when dsymutil crashes
Automatically generate a reproducer when dsymutil crashes. We already
support generating reproducers with the --gen-reproducer flag, which
emits a reproducer on exit. This patch adds support for doing the same
on a crash and makes it the default behavior.
rdar://
68357665
Differential revision: https://reviews.llvm.org/D127441
Wei Yi Tee [Tue, 14 Jun 2022 22:41:49 +0000 (00:41 +0200)]
[clang][dataflow] Rename `getPointeeLoc` to `getReferentLoc` for ReferenceValue.
We distinguish between the referent location for `ReferenceValue` and pointee location for `PointerValue`. The former must be non-empty but the latter may be empty in the case of a `nullptr`
Reviewed By: gribozavr2, sgatev
Differential Revision: https://reviews.llvm.org/D127745
Paul Robinson [Tue, 14 Jun 2022 22:26:35 +0000 (15:26 -0700)]
[PS5] Default to 'sce' debugger tuning
Mircea Trofin [Wed, 8 Jun 2022 21:58:21 +0000 (14:58 -0700)]
FunctionPropertiesAnalysis: handle callsite BBs that lose edges
There could be successors that were reached before but now are only
reachable from elsewhere in the CFG.
Suppose the following diamond CFG (lines are arrows pointing down):
A
/ \
B C
\ /
D
There's a call site in C that is inlined. Upon doing that, it turns out
it expands to:
call void @llvm.trap()
unreachable
D isn't reachable from C anymore, but we did discount it when we set up
FunctionPropertiesUpdater, so we need to re-include it here.
The patch also updates loop accounting to use LoopInfo rather than
traverse BBs.
Differential Revision: https://reviews.llvm.org/D127353
Venkata Ramanaiah Nalamothu [Mon, 6 Jun 2022 15:37:09 +0000 (21:07 +0530)]
[llvm] Add DW_CC_nocall to function debug metadata when either return values or arguments are removed
Adding the `DW_CC_nocall` calling convention to the function debug metadata is needed when either the return values or the arguments of a function are removed as this helps in informing debugger that it may not be safe to call this function or try to interpret the return value.
This translates to setting `DW_AT_calling_convention` with `DW_CC_nocall` for appropriate DWARF DIEs.
The DWARF5 spec (section 3.3.1.1 Calling Convention Information) says:
If the `DW_AT_calling_convention` attribute is not present, or its value is the constant `DW_CC_normal`, then the subroutine may be safely called by obeying the `standard` calling conventions of the target architecture. If the value of the calling convention attribute is the constant `DW_CC_nocall`, the subroutine does not obey standard calling conventions, and it may not be safe for the debugger to call this subroutine.
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D127134
Benjamin Kramer [Tue, 14 Jun 2022 21:57:57 +0000 (23:57 +0200)]
[mlir] Try to work around ambiguity in older clang versions
mlir/lib/Dialect/Arithmetic/IR/InferIntRangeInterfaceImpls.cpp:366:10: error: chosen constructor is explicit in copy-initialization
return {leftVal, rightVal};
^~~~~~~~~~~~~~~~~~~
Benjamin Kramer [Tue, 14 Jun 2022 21:55:50 +0000 (23:55 +0200)]
[bazel] Port
b0b00432093b
Benjamin Kramer [Tue, 14 Jun 2022 21:45:52 +0000 (23:45 +0200)]
[bazel] Port
75bfc6f29579
Saleem Abdulrasool [Fri, 10 Jun 2022 22:54:17 +0000 (22:54 +0000)]
RISCV: handle 64-bit PCREL data relocations
We would previously fail to handle 64-bit PC-relative relocations on
RISCV. This was exposed by trying to build with
`-fprofile-instr-generate`.
The original changes restricted the relocation handling to the text
segment as the paired relocations are undesirable in at least the debug
and .eh_frame sections. We now make this explicit to handle the general
case for the data relocations as well.
It would be preferable to use `R_RISCV_n_PCREL` when available to avoid
an extra relocation.
Differential Revision: https://reviews.llvm.org/D127549
Reviewed By: luismarques, MaskRay
Fixes: #55971
Mogball [Mon, 13 Jun 2022 21:54:52 +0000 (21:54 +0000)]
(Reland)[mlir] Add a generic data-flow analysis framework
Removes one element of the pointer union to make it work on 32-bit
systems.
This patch introduces a generic data-flow analysis framework to MLIR. The framework implements a fixed-point iteration algorithm and a dependency graph between lattice states and analysis. Lattice states and points are fully extensible to support highly-customizable analyses.
Reviewed By: phisiart, rriddle
Differential Revision: https://reviews.llvm.org/D126751
Krzysztof Drewniak [Thu, 14 Apr 2022 22:51:23 +0000 (22:51 +0000)]
[mlir][Arith] Pass to switch signed ops for equivalent unsigned ones
If all the arguments to and results of an operation are known to be
non-negative when interpreted as signed (which also implies that all
computations producing those values did not experience signed
overflow), we can replace that operation with an equivalent one that
operates on unsigned values.
Such a replacement, when it is possible, can provide useful hints to
backends, such as by allowing LLVM to replace remainder with bitwise
operations in more cases.
Depends on D124022
Depends on D124023
Reviewed By: Mogball
Differential Revision: https://reviews.llvm.org/D124024
Anders Waldenborg [Tue, 7 Jun 2022 10:21:42 +0000 (12:21 +0200)]
[clang] Add tests for statement expression in initializers
The commit
683e83c5
[Clang][C++2b] P2242R3: Non-literal variables [...] in constexpr
fixed a code generation bug when using (C-extension) statement
expressions inside initializer expressions.
Before that commit a nested static initializer inside the statement
expression would not be emitted, causing it to be zero initialized.
It is a bit surprising (at least to me) that a commit implementing a new
C++ feature would fix this code generation bug. Zooming in it is the
change done in ExprConstant.cpp that helps. That changes so that
"ESR_Failed" is returned in more cases, causing the expression to not be
deemed constant. This fixes the code generation as instead the compiler
has to resort to generating a dynamic initializer.
That commit also meant that some statement expressions (in particular
the ones using static variables) that previously were accepted now are
errors due to not being constant (matching GCC behavior).
Given how a seemingly unrelated change caused this behavior to change,
it is probably a good thing to add at least some rudimentary tests for
these kind expressions.
Differential Revision: https://reviews.llvm.org/D127201
Frederik Gossen [Tue, 14 Jun 2022 21:12:52 +0000 (17:12 -0400)]
Revert "[mlir] Add a generic data-flow analysis framework"
This reverts commit
9dea11728340e54e1fde76320b61a559148c8a3e.
The PointerUnion assumes 3 available bits, which is not the case on 32-bit
machines.
Katherine Rasmussen [Sat, 14 May 2022 04:50:36 +0000 (21:50 -0700)]
[flang] Add failed_images to list of intrinsics and add test
Add failed_images to the list of intrinsic functions. Add a
semantics test for failed_images.
Reviewed By: jeanPerier
Differential Revision: https://reviews.llvm.org/D126805
Okwan Kwon [Tue, 14 Jun 2022 21:06:54 +0000 (14:06 -0700)]
Revert "[mlir] add an option to print op stats in JSON"
There is a failure from the python pass manager.
This reverts commit
1a19abf38c3afb66b680cea69c8e61ea152e1514.
Philip Reames [Tue, 14 Jun 2022 21:01:29 +0000 (14:01 -0700)]
[RISCV] Split out transfer function explicitly in VSETVLI insertion dataflow [nfc]
In an effort to make this code easier to read and extend, this splits out helper functions for the transfer function of the data flow. Due to the other results computed during the phases, we can't completely abstract away everything, but we can abstract the actual state transitions.
The motivation here is the following upcoming changes:
* The fault first load patch - already approved, this will be rebased over - adds another case into the transferAfter path.
* An upcoming patch to fold the local prepass back into the main algorithm greatly complicates the transferBefore logic.
Differential Revision: https://reviews.llvm.org/D127761
Daniel Bertalan [Tue, 14 Jun 2022 20:35:09 +0000 (16:35 -0400)]
[lld-macho] Group undefined symbol diagnostics by symbol
ld64.lld used to print the "undefined symbol" line for each reference to
an undefined symbol previously:
ld64.lld: error: undefined symbol: _foo
>>> referenced by /path/to/bar.o:(symbol _baz+0x0)
ld64.lld: error: undefined symbol: _foo
>>> referenced by /path/to/bar.o:(symbol _quux+0x1)
Now they are deduplicated:
ld64.lld: error: undefined symbol: _foo
>>> referenced by /path/to/bar.o:(symbol _baz+0x0)
>>> referenced by /path/to/bar.o:(symbol _quux+0x1)
As with the other lld ports, only the first 3 references are printed.
Differential Revision: https://reviews.llvm.org/D127753
Florian Hahn [Tue, 14 Jun 2022 20:37:02 +0000 (21:37 +0100)]
[Matrix] Check if iterator is at beginning of BB in optimizeTranspose.
If an instruction at the beginning of a block is erased, this may
trigger crash due to dereferencing an invalid iterator.
Check if II is at the end before dereferencing it.
Reviewed By: thegameg
Differential Revision: https://reviews.llvm.org/D127736
Okwan Kwon [Mon, 13 Jun 2022 20:42:05 +0000 (13:42 -0700)]
[mlir] add an option to print op stats in JSON
Differential Revision: https://reviews.llvm.org/D127691
Joseph Huber [Tue, 14 Jun 2022 02:08:52 +0000 (22:08 -0400)]
[Clang] Simplify unifying target features
This patch simplifies how we unify target features. Now we simply
iterate the input in reverse and only insert the feature if it hasn't
been seen yet. The only reason we need to reverse this at the end is to
keep the features in order for the existing tests.
Reviewed By: tra
Differential Revision: https://reviews.llvm.org/D127707
Paul Robinson [Tue, 14 Jun 2022 19:46:50 +0000 (12:46 -0700)]
[PS5] Make library function availability match PS4
Shivam [Tue, 14 Jun 2022 19:15:07 +0000 (00:45 +0530)]
Update ASTImportError.h
isuckatcs [Thu, 26 May 2022 16:59:22 +0000 (18:59 +0200)]
[Clang][AST] Fixed BindingDecl AST-dump for tuple like structures
The AST of a BindingDecl in case of tuple like structures wasn't
properly printed. For these bidnings there is information stored
in BindingDecl::getHoldingVar(), and this information was't
printed in the AST-dump.
Differential Revision: https://reviews.llvm.org/D126131
Amir Ayupov [Tue, 14 Jun 2022 19:10:34 +0000 (12:10 -0700)]
[X86][NFC] Use mnemonic tables in validateInstruction 3/4
Group switch cases by opcode:
- V4FMADDPS
- V4FMADDSS
- V4FNMADDPS
- V4FNMADDSS
- VP4DPWSSDS
- VP4DPWSSD
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D127718
phyBrackets [Tue, 14 Jun 2022 19:09:24 +0000 (00:39 +0530)]
[clang][NFC][AST] rename the ImportError to ASTImportError
this patch is the continuation of my previous patch regarding the ImportError in ASTImportError.h
Reviewed By: martong
Differential Revision: https://reviews.llvm.org/D125340
Amir Ayupov [Tue, 14 Jun 2022 19:07:11 +0000 (12:07 -0700)]
[X86][NFC] Use mnemonic tables in validateInstruction 2/4
Group switch cases by opcode:
- VFCMULCPH
- VFCMULCSH
- VFMULCPH
- VFMULCSH
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D127717
Amir Ayupov [Tue, 14 Jun 2022 18:20:36 +0000 (11:20 -0700)]
[X86][NFC] Use mnemonic tables in validateInstruction 1/4
Group switch cases by opcode:
- VFCMADDCPH
- VFCMADDCSH
- VFMADDCPH
- VFMADDCSH
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D127716
Sanjay Patel [Tue, 14 Jun 2022 18:51:49 +0000 (14:51 -0400)]
[ValueTracking] recognize sub X, (X -nsw Y) as not overflowing
This extends a similar pattern from D125500.
If we know that operand 1 (RHS) of a subtract is itself a
non-overflowing subtract from operand 0 (LHS), then the
final/outer subtract is also non-overflowing:
https://alive2.llvm.org/ce/z/Bqan8v
InstCombine uses this analysis to trigger a narrowing
optimization, so that is what the first changed test shows.
The last test models the motivating case from issue #48013.
In that example, we determine 'nsw' on the first sub from
the srem, then we determine that the 2nd sub can be narrowed,
and that leads to eliminating both subtracts.
This works for unsigned sub too, but I left that out to keep
the patch minimal. If this looks ok, I will follow up with
that change. There are also several missing subtract narrowing
optimizations demonstrated in the tests above the diffs shown
here - those should be handled in InstCombine with another set
of patches.
Differential Revision: https://reviews.llvm.org/D127754
Groverkss [Tue, 14 Jun 2022 18:19:21 +0000 (23:49 +0530)]
[MLIR][Presburger] Fix spellings of attachment
Philip Reames [Tue, 14 Jun 2022 18:31:19 +0000 (11:31 -0700)]
[RISCV] Split out subfields in InsertVSETVLI's demanded fields analysis [nfc]
At the moment, this just gets the infrastructure in place. Following changes will start using this in non-trivial ways.
Krzysztof Drewniak [Fri, 22 Apr 2022 19:07:59 +0000 (19:07 +0000)]
[mlir][Arith] Implement InferIntRangeInterface for arithmetic ops
Depends on D124023
Reviewed By: Mogball, rriddle
Differential Revision: https://reviews.llvm.org/D124022
Katherine Rasmussen [Tue, 31 May 2022 20:15:54 +0000 (13:15 -0700)]
[flang] Add team_type to num_images intrinsic call
num_images had previously been added to the list of intrinsics
before the type team_type had been implemented. Now that team_type
is implemented, add the num_images call that has the team argument.
Update the semantics tests for num_images.
Reviewed By: craig.rasmussen
Differential Revision: https://reviews.llvm.org/D126734
Nikolas Klauser [Tue, 14 Jun 2022 18:09:03 +0000 (20:09 +0200)]
[libc++] Find a clang-format everybody is happy with
We decided that we want to use clang-format for libc++ but we haven't decided yet how the code should be formatted. We should probably discuss things on discord. This PR is mostly to show how the clang-format would look like and to commit to one once we decided on it. I'll remove the `<string>` diff when I commit this PR.
Reviewed By: ldionne
Spies: EricWF, dschuff, krytarowski, fedor.sergeev, aheejin, mstorsjo, phosek, abrachet, libcxx-commits, arichardson
Differential Revision: https://reviews.llvm.org/D124789
Alex Brachet [Tue, 14 Jun 2022 18:06:59 +0000 (18:06 +0000)]
[libc++] Use explicit module cache path in tests
For reference, this test creates about 1.5G in the cache
directory. By default this will go to ~/.cache/clang/
which can fill up quick. This changes the test to put the
cache path in lit temp directories. Size considerations
aside it makes sense for tests to be hermetic and not
touch global system state.
Differential revision: https://reviews.llvm.org/D127587
Groverkss [Tue, 14 Jun 2022 17:41:30 +0000 (23:11 +0530)]
[MLIR][Presburger] Add values to PresburgerSpace
This patch allows attaching user information, called "values" to each
identifier. The values are used to carry information along with variables and
are also used to determine if two variables are identical.
This patch is part of a series of patches to allow attaching user information
with variables in Presburger library.
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D127347
David Tenty [Fri, 3 Jun 2022 20:33:53 +0000 (16:33 -0400)]
[NFC][libcxx] Check def of __LONG_DOUBLE_IEEE128__
Follow on to https://reviews.llvm.org/D108352, also check for the
definition of __LONG_DOUBLE_128__ before using it (because AIX doesn't
enable it by default).
Reviewed By: xingxue
Differential Revision: https://reviews.llvm.org/D127002
Paul Robinson [Tue, 14 Jun 2022 17:22:22 +0000 (10:22 -0700)]
[PS5] Use __gxx_personality_v0 for TSan
Balazs Benics [Tue, 14 Jun 2022 17:28:44 +0000 (19:28 +0200)]
[analyzer][NFC] Replace getLastArg with hasArg when applicable
Depends on D126215.