Tom Rini [Tue, 16 Mar 2021 12:21:51 +0000 (08:21 -0400)]
Merge tag 'efi-2021-04-rc5' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2021-04-rc5
Bug fixes:
* fix memory type for memory reservation block
* illegal cast to pointer in initrddump
* fix compiler warnings
Documentation:
* move README.dfu to HTML documentation
Heinrich Schuchardt [Fri, 5 Mar 2021 11:58:37 +0000 (12:58 +0100)]
doc: move README.dfu to HTML documentation
Move README.dfu to doc/usage/dfu.rst and convert to reStructured text.
In the long run this page should be split into two. One for the overview
and one for the dfu command. UEFI capsule updates and dfutftp should be
integrated into the overview page.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Simon Glass [Sun, 7 Feb 2021 21:27:02 +0000 (14:27 -0700)]
efi: Fix compiler warnings
This occur when building on Raspberry Pi 400 (32-bit ARM). Fix them.
Examples:
cmd/efidebug.c: In function ‘do_efi_capsule_update’:
cmd/efidebug.c:75:49: warning: cast from pointer to integer of different
size [-Wpointer-to-int-cast]
ret = EFI_CALL(RT->update_capsule(&capsule, 1, (u64)NULL));
^
include/efi_loader.h:104:9: note: in definition of macro ‘EFI_CALL’
typeof(exp) _r = exp; \
^~~
cmd/efidebug.c:75:49: warning: cast from pointer to integer of different
size [-Wpointer-to-int-cast]
ret = EFI_CALL(RT->update_capsule(&capsule, 1, (u64)NULL));
^
include/efi_loader.h:104:19: note: in definition of macro ‘EFI_CALL’
typeof(exp) _r = exp; \
^~~
In file included from include/common.h:20,
from lib/efi_loader/efi_capsule.c:9:
lib/efi_loader/efi_capsule.c: In function ‘efi_update_capsule’:
include/efi_loader.h:83:8: warning: format ‘%lu’ expects argument of type
‘long unsigned int’, but argument 10 has type ‘size_t’
{aka ‘unsigned int’} [-Wformat=]
debug("%sEFI: Entry %s(" format ")\n", __efi_nesting_inc(), \
^~~~~~~~~~~~~~~~~~
include/linux/printk.h:37:21: note: in definition of macro ‘pr_fmt’
#define pr_fmt(fmt) fmt
^~~
include/log.h:229:2: note: in expansion of macro ‘log’
log(LOG_CATEGORY, LOGL_DEBUG, fmt, ##args); \
^~~
include/log.h:249:2: note: in expansion of macro ‘debug_cond’
debug_cond(_DEBUG, fmt, ##args)
^~~~~~~~~~
include/efi_loader.h:83:2: note: in expansion of macro ‘debug’
debug("%sEFI: Entry %s(" format ")\n", __efi_nesting_inc(), \
^~~~~
lib/efi_loader/efi_capsule.c:444:2: note: in expansion of macro ‘EFI_ENTRY’
EFI_ENTRY("%p, %lu, %llu\n", capsule_header_array, capsule_count,
^~~~~~~~~
lib/efi_loader/efi_capsule.c:444:19: note: format string is defined here
EFI_ENTRY("%p, %lu, %llu\n", capsule_header_array, capsule_count,
~~^
%u
Signed-off-by: Simon Glass <sjg@chromium.org>
Replace (uintptr_t)NULL by 0.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Ilias Apalodimas [Sat, 13 Mar 2021 21:47:32 +0000 (23:47 +0200)]
efi_selftest: Remove loadfile2 for initrd selftests
We are redefining how u-boot locates the initrd to load via the kernel
LoadFile2 protocol. This selftest is not relevant any more, so remove
it. A new one will be added later
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Simon Glass [Sun, 7 Feb 2021 21:27:01 +0000 (14:27 -0700)]
mkeficapsule: Correct printf() strings
Use %z when printing size_t values. This avoids errors on 32-bit
machines.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use a conversion to size_t for printing stat.st_size.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sun, 14 Mar 2021 09:12:01 +0000 (10:12 +0100)]
efi_selftest: illegal cast to pointer in initrddump
On 32bit systems u64 cannot directly be cast to void *.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Mark Kettenis [Sun, 14 Mar 2021 19:04:24 +0000 (20:04 +0100)]
efi_loader: fix memory type for memory reservation block
The (yet unreleased version of the) devicetree specification clearly
states that:
As with the /reserved-memory node, when booting via UEFI
entries in the Memory Reservation Block must also be listed
in the system memory map obtained via the GetMemoryMap() toi
protect against allocations by UEFI applications. The memory
reservation block entries should be listed with type
EfiReservedMemoryType.
This restores the behaviour that was changed by commit
4cbb2930bd8c
("efi_loader: consider no-map property of reserved memory").
Fixes:
4cbb2930bd8c ("efi_loader: consider no-map property of reserved memory")
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Wed, 3 Mar 2021 13:05:05 +0000 (14:05 +0100)]
efi_loader: disable GRUB_ARM32_WORKAROUND on ARCH_SUNXI
GRUB_ARM32_WORKAROUND can be disabled on ARCH_SUNXI as the Allwinner SoCs
only have a level 2 cache controlled via CP15 and not an architecturally
defined cache. Having the cache available speeds up booting Linux.
On ARCH_BCM283X it is already disabled via rpi_2_defconfig. But let's move
this setting to Kconfig.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tom Rini [Mon, 15 Mar 2021 16:06:41 +0000 (12:06 -0400)]
Prepare v2021.04-rc4
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 15 Mar 2021 14:50:47 +0000 (10:50 -0400)]
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 15 Mar 2021 12:43:29 +0000 (08:43 -0400)]
Merge tag 'ti-v2021.04-rc4' of https://source.denx.de/u-boot/custodians/u-boot-ti
- Fix boot for da850-evm and omap3_logic
- Optimize SPL size for am65x boards
Tom Rini [Mon, 15 Mar 2021 12:43:19 +0000 (08:43 -0400)]
Merge tag 'u-boot-stm32-
20210312' of https://source.denx.de/u-boot/custodians/u-boot-stm
- Add WATCHDOG_RESET() in MTD framework and STM32 QSPI driver
- stm32mp1_trusted_defconfig rely on SCMI support
- Remove the nand MTD configuration for NOR boot in stm32mp1 board
- STM32programmer update
- Bsec: manage clock when present in device tree
- stm32mp15: move bootdelay configuration in defconfig
- Update for stm32 dsi and dw_mipi_dsi
- STM32 MCU's cleanup
- Fix compilation issue depending on SYS_DCACHE_OFF and SYS_ICACHE_OFF flags
- Update stm32mp1 doc
Lokesh Vutla [Tue, 9 Mar 2021 18:02:45 +0000 (23:32 +0530)]
configs: am65x_evm_r5: Enable checks for spl and stack sizes
Enable relevant configs that checks for the size of image and stack:
BSS: 3KB
Initial MALLOC: ~22KB
Initial Stack: 8K
SPL Image size can be: ~215KB
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Tue, 9 Mar 2021 18:02:44 +0000 (23:32 +0530)]
include: configs: am65x_evm: Optimize size of SPL BSS
Current BSS allocation of SPL is as below:
$ size spl/u-boot-spl
text data bss dec hex filename
132369 7852 1496 141717 22995 spl/u-boot-spl
But 20KB is allocated currently for BSS. Reduce it to 3KB and save some
space for stack.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Adam Ford [Sat, 6 Mar 2021 02:48:50 +0000 (20:48 -0600)]
ARM: da850-evm: Fix boot issues from missing SPL_PAD_TO
In a previous attempt to unify config options and remove items
from the whitelist file, SPL items were moved into a section
enabled with CONFIG_SPL_BUILD. Unfortunately, SPL_PAD_TO
is referenced at the head Makefile and uses this define
to create padding of the output file. When it was moved
to CONFIG_SPL_BUILD, it caused boot errors with devices
that are not booting from NOR. Fix the boot issues by moving
SPL_PAD_TO out so it's always.
Fixes:
7bb33e4684aa ("ARM: da850-evm: Unify config options with Kconfig")
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Thu, 4 Mar 2021 16:31:58 +0000 (10:31 -0600)]
configs: omap3_logic: Enable CONFIG_SPL_ALLOC_BD
With bd_info dropped from the data section, the Logic PD OMAP3 boards
and AM3517 fail to boot. Enabling CONFIG_SPL_ALLOC_BD restores
them.
Fixes:
38d6b7ebdaee ("spl: Drop bd_info in the data section")
Signed-off-by: Adam Ford <aford173@gmail.com>
Marek Vasut [Sat, 6 Mar 2021 20:44:17 +0000 (21:44 +0100)]
doc: stm32mp1: Use u-boot.itb if CONFIG_SPL_LOAD_FIT=y
For systems where SPL loads fitImage, i.e. CONFIG_SPL_LOAD_FIT=y, use
u-boot.itb in the relevant documentation parts. Otherwise use u-boot.img.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Tom Rini [Fri, 12 Mar 2021 13:00:39 +0000 (08:00 -0500)]
Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- Some more updates/sync's to A38x DDR3 code (Marek & Pali)
- marvell/ddr/AXP: Some type fixes found in the LTO work (Marek)
- Espressobin: Enable more options (Pali)
- pci-aardvark: Implement workaround for the readback value of
VEND_ID (Paili)
Patrice Chotard [Wed, 24 Feb 2021 12:53:27 +0000 (13:53 +0100)]
arm: stm32mp: Fix compilation issue when SYS_DCACHE_OFF and/or SYS_DCACHE_SYS are enabled
Fix following compilation issue when SYS_DCACHE_OFF and/or SYS_DCACHE_SYS
are enabled :
arch/arm/mach-stm32mp/cpu.c: In function ‘early_enable_caches’:
arch/arm/mach-stm32mp/cpu.c:223:10: error: ‘volatile struct arch_global_data’ has no member named ‘tlb_size’
223 | gd->arch.tlb_size = PGTABLE_SIZE;
| ^
arch/arm/mach-stm32mp/cpu.c:224:10: error: ‘volatile struct arch_global_data’ has no member named ‘tlb_addr’
224 | gd->arch.tlb_addr = (unsigned long)&early_tlb;
| ^
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Wed, 24 Feb 2021 12:38:20 +0000 (13:38 +0100)]
board: st: Remove board_early_init_f and board_late_init callbacks for stm32 boards
Remove board_early_init_f() and board_late_init() callbacks for stm32
boards as the corresponding flags (CONFIG_BOARD_LATE_INIT and
CONFIG_BOARD_EARLY_INIT_R) are now disabled.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Wed, 24 Feb 2021 12:38:19 +0000 (13:38 +0100)]
configs: stm32: Remove BOARD_EARLY_INIT_F and BOARD_LATE_INIT for stm32 boards
These flags was defined and callbacks linked to these flags are empty
and only returning 0.
Remove BOARD_EARLY_INIT_F and BOARD_LATE_INIT flags for these stm32 boards.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Pali Rohár [Fri, 5 Mar 2021 14:52:42 +0000 (15:52 +0100)]
arm: mvebu: a38x: Remove dead code ARMADA_39X
Config option ARMADA_39X is never set so remove all dead code hidden under
ifdef CONFIG_ARMADA_39X blocks.
Also remove useless checks for CONFIG_ARMADA_38X define as this macro is
always defined for a38x code path.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Wed, 3 Mar 2021 13:37:59 +0000 (14:37 +0100)]
arm: a37xx: pci: Implement workaround for the readback value of VEND_ID
Marvell Armada 3720 Functional Errata, Guidelines, and Restrictions
document describes in erratum 4.1 PCIe value of vendor ID (Ref #: 243):
The readback value of VEND_ID (RD0070000h [15:0]) is 1B4Bh, while it
should read 11ABh.
The firmware can write the correct value, 11ABh, through VEND_ID
(RD0076044h [15:0]).
Implement this workaround in U-Boot PCIe controller driver aardvark for
both PCI vendor id and PCI subsystem vendor id.
This change affects PCI vendor id of PCIe root bridge emulated by Linux
kernel. With this change Linux kernel reports correct vendor id 11AB.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Wed, 3 Mar 2021 10:34:53 +0000 (11:34 +0100)]
arm: mvebu: Espressobin: Enable additional options
Enable support for NVMe disks which can be connected to mPCIe slot via M.2
reduction. Enable btrfs and squashfs filesystems which are used by more
Linux distributions. And enable fsuuid and setexpr commands which can be
useful in scripting.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Marek Behún [Sat, 6 Mar 2021 23:00:34 +0000 (00:00 +0100)]
ddr: marvell: axp: fix array types have different bounds warning
The arrays `pbs_dq_mapping`, `div_ratio1to1` and `div_ratio2to1` have
different bounds declared in header files where these variables are also
defined from the ones declared in source files.
This causes the compiler to complain (when building with LTO):
ddr3_sdram.c:24:12: warning: type of ‘pbs_dq_mapping’ does not match
original declaration
[-Wlto-type-mismatch]
ddr3_patterns_64bit.h:911:5: note: array types have different bounds
ddr3_patterns_64bit.h:911:5: note: ‘pbs_dq_mapping’ was previously
declared here
ddr3_dfs.c:45:11: warning: type of ‘div_ratio1to1’ does not match
original declaration [-Wlto-type-mismatch]
ddr3_axp_vars.h:167:4: note: array types have different bounds
ddr3_axp_vars.h:167:4: note: ‘div_ratio1to1’ was previously declared
here
ddr3_dfs.c:46:11: warning: type of ‘div_ratio2to1’ does not match
original declaration [-Wlto-type-mismatch]
ddr3_axp_vars.h:196:4: note: array types have different bounds
ddr3_axp_vars.h:196:4: note: ‘div_ratio2to1’ was previously declared
here
CI managed to trigger this as an error when compiling with LTO for AXP.
Fix this by using values from the header files, which seem to be the
correct ones.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Marek Behún [Thu, 4 Mar 2021 10:23:14 +0000 (11:23 +0100)]
ddr: marvell: axp: align signature of mv_xor_mem_init() with a38x
In arch/arm/mach-mvebu/dram.c we always include axp's xor.h for common
XOR definitions, regardless whether we compile for axp or a38x.
But the declaration of this function has a different signature in axp's
xor.h from the one used in a38x' implementation - one parameter is u64
instead of u32. This can result in wrong argument's being passed to that
function on a38x with no one the wiser.
I discovered this when building U-Boot for Turris Omnia with LTO. The
compiler complains about the different signatures being thrown into the
same linking process:
axp/xor.h:67:5: warning: type of ‘mv_xor_mem_init’ does not match
original declaration [-Wlto-type-mismatch]
67 | int mv_xor_mem_init(u32 chan, u32 start_ptr, u32 block_size,
| ^
a38x/xor.c:165:5: note: type mismatch in parameter 3
165 | int mv_xor_mem_init(u32 chan, u32 start_ptr, unsigned long long
| ^
a38x/xor.c:165:5: note: type ‘long long unsigned int’ should match
type ‘u32’
Fix this by changing the type of the block_size argument in the axp's
implementation and header file to the one used in a38x (and upstream
mv-ddr-marvell).
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Tue, 2 Mar 2021 10:17:41 +0000 (11:17 +0100)]
ddr: marvell: a38x: Sync code with Marvell mv-ddr-marvell repository
This syncs drivers/ddr/marvell/a38x/ with the master branch of repository
https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git up to the
commit
7c351731d196 ("Merge pull request #29 from pali/sync-a38x-uboot").
This patch was created by following steps:
1. Replace all a38x files in U-Boot tree by files from upstream github
Marvell mv-ddr-marvell repository.
2. Run following command to omit portions not relevant for a38x and ddr3:
files=drivers/ddr/marvell/a38x/*
sed 's/#if defined(CONFIG_ARMADA_38X) || defined(CONFIG_ARMADA_39X)/#ifdef TRUE/' -i $files
unifdef -m -UMV_DDR -UMV_DDR_ATF -UCONFIG_DDR4 -UCONFIG_APN806 \
-UCONFIG_MC_STATIC -UCONFIG_MC_STATIC_PRINT -UCONFIG_PHY_STATIC \
-UCONFIG_PHY_STATIC_PRINT -UCONFIG_CUSTOMER_BOARD_SUPPORT \
-UCONFIG_A3700 -UA3900 -UA80X0 -UA70X0 -DTRUE $files
3. Manually omit SPDX-License-Identifier changes from this patch as
upstream license in upstream github repository contains long license
texts and U-Boot is using just SPDX-License-Identifier.
After applying this patch, a38x ddr3 code in upstream Marvell github
repository and in U-Boot would be fully identical. So in future applying
above steps could be used to sync code again.
The only change in this patch is removal of dead code and some fixes with
include files.
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Sujeet Baranwal [Fri, 26 Feb 2021 10:56:59 +0000 (11:56 +0100)]
ddr: marvell: a38x: Add more space for additional info from SPD
commit
258be123226f8f5cd516b7813fe201fb7d7416e9 upstream.
At this moment, only page 0 of SPD is being read but to support
smbios, we need to read page 1 also which has more info. In order
to do that, we need to allocate more space.
Signed-off-by: Sujeet Baranwal <sujeet.baranwal@cavium.com>
Tested-by: sa_ip-sw-jenkins <sa_ip-sw-jenkins@marvell.com>
Reviewed-by: Sujeet Kumar Baranwal <Sujeet.Baranwal@cavium.com>
Reviewed-by: Nadav Haklai <nadavh@marvell.com>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Chris Packham <judge.packham@gmail.com>
Patrick Delaunay [Mon, 1 Mar 2021 12:17:56 +0000 (13:17 +0100)]
board: stm32mp1: use CONFIG_SYS_MMC_ENV_DEV when available
Check whether user has explicitly defined the mmc device to use
in mmc_get_env_dev() with CONFIG_SYS_MMC_ENV_DEV.
On STMicroelectronics boards the used mmc device for environment is
the instance of boot device provided by the ROM code; the mmc instance
is configured by alias in device tree. The used partition is defined in
device tree with u-boot,mmc-env-partition = "ssbl".
This patch allows to override this selection for the support of customer
boards without alias; for example when SDMMC1 is not used and ENV in
mmc0=SDMMC2, user can force the value: CONFIG_SYS_MMC_ENV_DEV = 0.
On STMicroelectronics boards, the current behavior is kept with
CONFIG_SYS_MMC_ENV_DEV = -1.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Yannick Fertre [Thu, 4 Mar 2021 12:14:36 +0000 (13:14 +0100)]
video: dw_mipi_dsi: update log of dphy_enable
The DSI phy can be turned on from the DSI digital interface in
the dphy_enable() function or from a dedicated DSI phy "wrapper"
in phy_ops->init() function. If the STM32MP1 case, the wrapper
is used then the dphy_enable() "warning" traces are not relevant.
This patch moves these "warning" traces to "debug" traces so
they are still available for DSI phy based on the digital
interface in debug logging mode, but not there in normal mode
for both cases.
Note: The related Linux kernel driver uses a "debug"
message too.
Signed-off-by: Yannick Fertre <yannick.fertre@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Yannick Fertre <yannick.fertre@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Yannick Fertre [Thu, 4 Mar 2021 12:14:35 +0000 (13:14 +0100)]
video: dw_mipi_dsi: missing device to log debug
Missing udevice to struct dw_mipi_dsi to log trace.
Signed-off-by: Yannick Fertre <yannick.fertre@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Yannick Fertre <yannick.fertre@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Thu, 4 Mar 2021 12:10:33 +0000 (13:10 +0100)]
video: stm32: remove all child of DSI bridge when its probe failed
Remove the child device of the STM32 DSI bridge when the driver probe
failed to stop futher probe request on panels used with STMicroelectronics
board (orisetech_otm8009a.c or raydium-rm68200.c driver).
This patch avoid the trace "cannot get reset GPIO" when
STM32MP157 device tree is used on stm32MP151 SOC without DSI support.
In this hw_version value is 0, as DSI bridge is absent and the panel
ofdata_to_platdata is called for each try of panel probe,
the gpio reset pin is requested but after dsi father probe failed).
For the next request, the PANEL ofdata_to_platdata failed as the gpio
is already used.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Mon, 1 Mar 2021 18:40:56 +0000 (19:40 +0100)]
configs: stm32mp15: move bootdelay configuration in defconfig
The STM32MP15 boards have no reason to configure bootdelay in stm32mp1.h
as it is already done with CONFIG_BOOTDELAY (default = 2) and in
include/env_default.h.
This patch allows configuration for customers which reuse stm32mp1.h
and reduce the size of the default environment.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Thu, 25 Feb 2021 12:43:07 +0000 (13:43 +0100)]
stm32mp: bsec: manage clock when present in device tree
Enable the clocks during bsec probe when they are present in device tree.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Thu, 25 Feb 2021 12:37:03 +0000 (13:37 +0100)]
stm32mp: stm32prog: replace alias by serial device sequence number
The command "stm32prog serial <dev>" can directly use the device sequence
number of serial uclass as this sequence number is egual to alias when it
exist; this assumption simplify the code and avoid access to gd->fdt_blob
and the device tree parsing.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Thu, 25 Feb 2021 12:37:02 +0000 (13:37 +0100)]
stm32mp: stm32prog: reactivate console and display serial error
When serial instance is not found in device tree, the console
should be enabled and the error should be indicated.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Thu, 25 Feb 2021 12:37:01 +0000 (13:37 +0100)]
stm32mp: stm32prog: Add CONFIG_CMD_STM32PROG_SERIAL and _USB
Add CONFIG_CMD_STM32PROG_SERIAL and CONFIG_CMD_STM32PROG_USB to
independently select the support of UART or USB communication for
STM32CubeProgrammer.
For serial boot over UART, user can deactivate CONFIG_CMD_STM32PROG_SERIAL
to use U-Boot console of binary loaded by UART (for board bring-up for
example).
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Thu, 25 Feb 2021 12:37:00 +0000 (13:37 +0100)]
stm32mp: stm32prog: Add Kconfig file for stm32prog command
Move CONFIG_CMD_STM32PROG in a specific Kconfig file for stm32prog command.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Thu, 25 Feb 2021 10:49:28 +0000 (11:49 +0100)]
board: st: remove the nand MTD configuration for NOR boot in stm32mp1 board
Since commit
d5d726d3cc47 ("configs: stm32mp1: only support SD card after
NOR in bootcmd_stm32mp"), the stm32mp1 boards only support SD card after
NOR boot device, so the MTD partitions for nand0 or spi-nand0 are useless
(no need of "UBI" partition in nand0 or spi-nand0).
This patch removes these nand MTD update for nor boot and simplify nand0
and spi-nand0 support (remove the mtd_boot variable).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Wed, 24 Feb 2021 10:19:46 +0000 (11:19 +0100)]
configs: stm32mp1_trusted_defconfig rely on SCMI support
Enable SCMI clock and reset domain support for stm32mp1 platform
and ARM SMC mailbox driver used as communication channel for
SCMI messages between non-secure world and secure SCMI server.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Wed, 24 Feb 2021 10:19:45 +0000 (11:19 +0100)]
scmi: cosmetic: reorder include files
Reorder include files in expected order.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Wed, 24 Feb 2021 10:19:44 +0000 (11:19 +0100)]
scmi: define LOG_CATEGORY
Define LOG_CATEGORY to allow filtering with log command.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Wed, 24 Feb 2021 10:19:43 +0000 (11:19 +0100)]
scmi: Include device_compat.h
Include the file needed for log function prototype, this patch solves the
compilation issue for undefined reference to `dev_err'.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Etienne Carriere [Wed, 24 Feb 2021 10:19:42 +0000 (11:19 +0100)]
clk: stm32mp1: gets root clocks from fdt
This change makes stm32mp1 clock driver to get the root clocks
reference from the device node in the FDT rather than fetching
straight these clocks by their name. Driver now stores the
clock reference and use it to know if a root clock is present,
get its rate or gets its related udevice reference.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Etienne Carriere [Wed, 24 Feb 2021 10:19:41 +0000 (11:19 +0100)]
ARM: dts: stm32mp1: explicit clock reference needed by RCC clock driver
Define in the RCC clock provider node which root clocks the driver
depends on. These are root oscillators, which may be present or
not, upon FDT content.
This update binding is introduced in Linux kernel device tree by patch
"ARM: dts: stm32: move clocks/resets to SCMI resources for stm32mp15"
This patch is a preliminary step for SCMI support of stm32mp15
boards with trusted boot chain, based on TF-A or OP-TEE.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrice Chotard [Wed, 20 Jan 2021 13:42:04 +0000 (14:42 +0100)]
mtd: spinand: Add WATCHDOG_RESET() in spinand_mtd_read/write()
In case of big area read/write on spi nand, watchdog timeout may occurs.
To fix that, add WATCHDOG_RESET() in spinand_mtd_read() and
spinand_mtd_write() to ensure that watchdog is reset.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Wed, 20 Jan 2021 13:42:03 +0000 (14:42 +0100)]
mtd: nand: Add WATCHDOG_RESET() in nanddev_mtd_erase()
In case of big area erased on nand, watchdog timeout may occurs.
To fix that, add WATCHDOG_RESET() in nanddev_mtd_erase() to ensure that
watchdog is reset.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Wed, 20 Jan 2021 13:42:02 +0000 (14:42 +0100)]
spi: stm32_qspi: Add WATCHDOG_RESET in _stm32_qspi_read_fifo()
In case of reading large area and memory-map mode is misconfigured
(memory-map size declared lower than the real size of the memory chip)
watchdog can be triggered.
Add WATCHDOG_RESET() in _stm32_qspi_read_fifo to fix it.
Issue reproduced with stm32mp157c-ev1 board and memory map size set to
1, with following command:
sf read 0xC0000000 0 0x4000000
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Wed, 20 Jan 2021 13:42:01 +0000 (14:42 +0100)]
mtd: spi-nor: Add WATCHDOG_RESET() in spi_nor_core callbacks
In case of big area write/erase on spi nor, watchdog timeout may occurs.
Issue reproduced on stm32mp157c-ev1 with following commands:
sf write 0xC0000000 0 0x3000000
or
sf erase 0 0x1000000
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tom Rini [Wed, 10 Mar 2021 13:56:52 +0000 (08:56 -0500)]
Merge https://source.denx.de/u-boot/custodians/u-boot-usb
Chunfeng Yun [Wed, 3 Mar 2021 08:07:05 +0000 (16:07 +0800)]
usb: mtu3: flush cache for next GPD
When flush cache of the current GPD and resume QMU, the controller
will try to access the next GPD after processing the current one,
if not flush the next GPD, the controller may get wrong GPD status.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Tom Rini [Tue, 9 Mar 2021 12:21:51 +0000 (07:21 -0500)]
Merge https://source.denx.de/u-boot/custodians/u-boot-x86
- Various minor fixes for x86
Simon Glass [Tue, 23 Feb 2021 10:35:42 +0000 (05:35 -0500)]
x86: Select advanced Intel code only if allowed
At present most of the Intel-specific code is built on all devices, even
those which don't have software support for the features provided there.
This means that any board can enable CONFIG_INTEL_ACPIGEN even if it does
not have the required features.
Add a new INTEL_SOC option to control this access. This must be selected
by SoCs that can support the required features.
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed a typo in arch/x86/Kconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Tue, 23 Feb 2021 10:35:41 +0000 (05:35 -0500)]
x86: Move INTEL_ACPIGEN to arch/x86
This option is better placed in the x86 code since it is not generic
enough to be in the core code. Move it.
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed a typo in arch/x86/Kconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Tue, 23 Feb 2021 10:35:40 +0000 (05:35 -0500)]
x86: Fix member check in intel_gnvs
When CONFIG_CHROMEOS is not enabled this currently does not build. Fix it.
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Heinrich Schuchardt [Sat, 20 Feb 2021 09:05:24 +0000 (10:05 +0100)]
x86: sizeof-array-div error in lpc_common_early_init
Building qemu-x86_64_defconfig with GCC 11.0 fails with:
arch/x86/cpu/intel_common/lpc.c:
In function ‘lpc_common_early_init’:
arch/x86/cpu/intel_common/lpc.c:56:40:
error: expression does not compute the number of elements in this array;
element type is ‘struct reg_info’, not ‘u32’ {aka ‘unsigned int’}
[-Werror=sizeof-array-div]
56 | sizeof(values) / sizeof(u32));
| ^
arch/x86/cpu/intel_common/lpc.c:56:40: note: add parentheses around the
second ‘sizeof’ to silence this warning
arch/x86/cpu/intel_common/lpc.c:50:11: note: array ‘values’ declared here
50 | } values[4], *ptr;
| ^~~~~~
Add parentheses to silence warning.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tom Rini [Mon, 8 Mar 2021 12:41:50 +0000 (07:41 -0500)]
Merge tag 'u-boot-amlogic-
20210308' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic
- button: adc: fix treshold typo
- configs: meson64: add fdtoverlay_addr_r
Tom Rini [Mon, 8 Mar 2021 12:11:26 +0000 (07:11 -0500)]
Merge branch 'v2021.04-rc4' of https://github.com/lftan/u-boot
- Add VAB support
Neil Armstrong [Wed, 10 Feb 2021 14:22:13 +0000 (15:22 +0100)]
configs: meson64: add fdtoverlay_addr_r
In order to support loading FTD Overlays when booting with the pxe
command (or extlinux.conf), supported with [1], add the missing
fdtoverlay_addr_r used to load the overlay before applying it to
the FDT loaded at fdt_addr_r.
[1] https://patchwork.ozlabs.org/project/uboot/patch/
20210120085453.2783678-1-narmstrong@baylibre.com/
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Tue, 23 Feb 2021 15:07:51 +0000 (16:07 +0100)]
button: adc: fix treshold typo
Fix the treshold typo in code by threshold.
Fixes:
c0165c85c3 ("button: add a simple Analog to Digital Converter device based button driver")
Suggested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
Dalon Westergreen [Mon, 1 Mar 2021 12:04:16 +0000 (20:04 +0800)]
Makefile: socfpga: Add target to generate hex output for combined spl and dtb
Add target to Makefile to generate "u-boot-spl-dtb.hex" for Intel
SOCFPGA SOC64 devices (Stratix 10 and Agilex). "u-boot-spl-dtb.hex"
is hex formatted spl with and offset of CONFIG_SPL_TEXT_BASE. It
combines the spl image and dtb. "u-boot-spl-dtb.hex" is needed to
generate the final configuration bitstream for Intel SOCFPGA SOC64
devices.
Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com>
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Siew Chin Lim [Mon, 1 Mar 2021 12:04:15 +0000 (20:04 +0800)]
configs: socfpga: Add defconfig for Agilex with VAB support
Booting Agilex with Vendor Authorized Boot.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Siew Chin Lim [Mon, 1 Mar 2021 12:04:14 +0000 (20:04 +0800)]
configs: socfpga: soc64: Move CONFIG_BOOTCOMMAND to defconfig
CONFIG_BOOTCOMMAND have been moved to Kconfig.boot. This patch
move the CONFIG_BOOTCOMMAND macro from socfpga_soc64_common.h to
*_defconfig file for both Stratix 10 and Agilex.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Siew Chin Lim [Mon, 1 Mar 2021 12:04:13 +0000 (20:04 +0800)]
arm: socfpga: dts: soc64: Update filename in binman node of FIT image with VAB support
FIT image of Vendor Authentication Coot (VAB) contains signed images.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Siew Chin Lim [Mon, 1 Mar 2021 12:04:12 +0000 (20:04 +0800)]
arm: socfpga: cmd: Support 'vab' command
Support 'vab' command to perform vendor authentication.
Command format: vab addr len
Authorize 'len' bytes starting at 'addr' via vendor public key
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Siew Chin Lim [Mon, 1 Mar 2021 12:04:11 +0000 (20:04 +0800)]
arm: socfpga: soc64: Support Vendor Authorized Boot (VAB)
Vendor Authorized Boot is a security feature for authenticating
the images such as U-Boot, ARM trusted Firmware, Linux kernel,
device tree blob and etc loaded from FIT. After those images are
loaded from FIT, the VAB certificate and signature block appended
at the end of each image are sent to Secure Device Manager (SDM)
for authentication. U-Boot will validate the SHA384 of the image
against the SHA384 hash stored in the VAB certificate before
sending the image to SDM for authentication.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Siew Chin Lim [Mon, 1 Mar 2021 12:04:10 +0000 (20:04 +0800)]
arm: socfpga: Move Stratix10 and Agilex to use TARGET_SOCFPGA_SOC64
Create common macro TARGET_SOCFPGA_SOC64 for Stratix10 and Agilex.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Tom Rini [Mon, 8 Mar 2021 00:43:00 +0000 (19:43 -0500)]
Merge tag 'efi-2021-04-rc3-3' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2021-04-rc3-3
New:
* Provide library functions for converting UTF-8 streams either to code
page 437 or Unicode code points.
Bug fixes:
* Fix the capsule update unit tests.
* Use the terminal size of the video console if it is the primary output.
Heinrich Schuchardt [Tue, 2 Mar 2021 07:07:19 +0000 (08:07 +0100)]
efi_loader: correct uboot_bin_env.its file format
Up to now the EFI capsule Python tests were always skipped. The reason is
that mkimage fails with:
uboot_bin_env.its:13.21-23.5: Warning (unit_address_vs_reg):
/images/u-boot-bin@100000: node has a unit name, but no reg property
uboot_bin_env.its:24.21-34.5: Warning (unit_address_vs_reg):
/images/u-boot-env@150000: node has a unit name, but no reg property
If a unit in a device-tree has an address, a reg property must be provided.
But adding a reg property is not the solution here.
Since 2017 unit addresses are disallowed for FIT,
cf. common/image-fit.c:1624.
So remove the unit addresses in uboot_bin_env.its.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sat, 27 Feb 2021 13:08:38 +0000 (14:08 +0100)]
lib/charset: UTF-8 stream conversion
Provide functions to convert an UTF-8 stream to code page 437 or UTF-32.
Add unit tests.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sat, 27 Feb 2021 13:08:37 +0000 (14:08 +0100)]
lib/charset: utf8_get() should return error
utf8_get() should return an error if hitting an illegal UTF-8 sequence and
not silently convert the input to a question mark.
Correct utf_8() and the its unit test.
console_read_unicode() now will ignore illegal UTF-8 sequences.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sat, 27 Feb 2021 13:08:36 +0000 (14:08 +0100)]
efi_loader: carve out utf_to_cp()
Carve out a function to translate a Unicode code point to an 8bit codepage.
Provide a unit test for the new function.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sat, 27 Feb 2021 13:08:35 +0000 (14:08 +0100)]
efi_loader: move codepage 437 table
Move the Unicode to codepage 437 table to charset.c
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sun, 28 Feb 2021 17:17:28 +0000 (18:17 +0100)]
efi_loader: console size of vidconsole
If stdout is 'vidconsole', we correctly set the console size.
If stdout is 'vidconsole,serial', the video console is ignored.
We should always evaluate the size of vidconsole if it is the primary
console.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tom Rini [Sat, 6 Mar 2021 12:25:04 +0000 (07:25 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- Convert qemu-ppce500 to driver model and enable additional driver
support
- bug fixes/updates in net-dsa driver, vid driver, move configs to kconfig
- Update Maintainers of some powerpc, layerscape platforms
Bin Meng [Thu, 25 Feb 2021 09:22:59 +0000 (17:22 +0800)]
doc: Add a reST document for qemu-ppce500
Add a reST document to describe how to build and run U-Boot for
the QEMU ppce500 machine.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Bin Meng [Thu, 25 Feb 2021 09:22:58 +0000 (17:22 +0800)]
ppc: qemu: Move board directory from board/freescale to board/emulation
board/emulation is the place for other QEMU targets like x86, arm,
riscv. Let's move the qemu-ppce500 board codes there.
List me as a co-maintainer for this board.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Bin Meng [Thu, 25 Feb 2021 09:22:57 +0000 (17:22 +0800)]
ppc: qemu: Drop fixed_sdram()
This function is not called anywhere. Only fsl_ddr_sdram_size() is
necessary [1] for QEMU. Drop it.
[1] arch/powerpc/cpu/mpc85xx/cpu.c::dram_init()
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Bin Meng [Thu, 25 Feb 2021 09:22:56 +0000 (17:22 +0800)]
ppc: qemu: Drop a custom env variable 'fdt_addr_r'
Now that we have switched to CONFIG_OF_CONTROL, and we can use the
env variable 'fdtcontroladdr' directly instead of creating one that
is duplicated.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Bin Meng [Thu, 25 Feb 2021 09:22:55 +0000 (17:22 +0800)]
ppc: qemu: Delete the temporary FDT virtual-physical mapping after U-Boot is relocated
After U-Boot is relocated to RAM already, the previous temporary FDT
virtual-physical mapping that was used in the pre-relocation phase
is no longer needed. Let's delete the mapping.
get_fdt_virt() might be used before and after relocation, update it
to return different virtual address of FDT.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Bin Meng [Thu, 25 Feb 2021 09:22:54 +0000 (17:22 +0800)]
ppc: qemu: Enable RTC support via I2C
The QEMU ppce500 target integrates a Freescale I2C controller and
has a Pericom pt7c4338 RTC connected to it. Enable corresponding
DM drivers so that 'date' command is actually useful.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Bin Meng [Thu, 25 Feb 2021 09:22:53 +0000 (17:22 +0800)]
ppc: qemu: Enable support for power off via GPIO
The QEMU ppce500 target provides the power off functionality via
the GPIO pin#0, and we can support this using the sysreset gpio
poweroff driver. Let's enable it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Bin Meng [Thu, 25 Feb 2021 09:22:52 +0000 (17:22 +0800)]
dm: sysreset: Add a Kconfig option for the 'reset' command
sysreset uclass driver provides an implementation of 'reset'
command using the sysreset_ APIs unconditionally. It also
supports the 'poweroff' command using the sysreset_ APIs,
but under a Kconfig option CONFIG_SYSRESET_CMD_POWEROFF.
Let's do the same for the 'reset' command, by introducing a
new Kconfig option CONFIG_SYSRESET_CMD_RESET, and set it to
on by default, to allow a board that don't have a sysreset
reset driver yet, but have a sysreset poweroff driver to
compile without any issue.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Bin Meng [Thu, 25 Feb 2021 09:22:51 +0000 (17:22 +0800)]
ppc: qemu: Enable GPIO support
QEMU ppce500 target integrates a GPIO controller that is compatible
with the QorIQ GPIO controller. Enable the DM GPIO driver for it
and the 'gpio' command.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Bin Meng [Thu, 25 Feb 2021 09:22:50 +0000 (17:22 +0800)]
gpio: mpc8xxx: Support controller register physical address beyond 32-bit
dev_read_addr_size_index() returns fdt_addr_t which might be a
64-bit physical address. This might be true for some 85xx SoCs
whose CCSBAR is mapped beyond 4 GiB.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Bin Meng [Thu, 25 Feb 2021 09:22:49 +0000 (17:22 +0800)]
ppc: mpc85xx: Add 'gpibe' register to 'struct ccsr_gpio'
Without this, the DM GPIO driver for MPC8xxx does not compile for
MPC85xx SoCs.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Bin Meng [Thu, 25 Feb 2021 09:22:48 +0000 (17:22 +0800)]
ppc: qemu: Enable VirtIO BLK support
Enable VirtIO BLK driver so that we can store a kernel image to
a disk image and boot from there.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Bin Meng [Thu, 25 Feb 2021 09:22:47 +0000 (17:22 +0800)]
virtio: Fix VirtIO BLK driver dependency
The VirtIO BLK driver depends on the blk uclass driver.
Add the dependency in the Kconfig.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Bin Meng [Thu, 25 Feb 2021 09:22:46 +0000 (17:22 +0800)]
ppc: qemu: Enable VirtIO NET support
By default the QEMU ppce500 machine connects a VirtIO NET to the
PCI controller, although it can be replaced to an e1000 NIC via
additional command line options.
Now that we have switched over to DM PCI, VirtIO support becomes
possible. This commit enables the support.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Bin Meng [Thu, 25 Feb 2021 09:22:45 +0000 (17:22 +0800)]
cmd: Fix virtio command dependency
The 'virtio' command calls blk_common_cmd() which is only available
when CONFIG_HAVE_BLOCK_DEVICE is on. Fix the Kconfig dependency.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Bin Meng [Thu, 25 Feb 2021 09:22:44 +0000 (17:22 +0800)]
ppc: qemu: Drop CONFIG_OF_BOARD_SETUP
ft_board_setup() is now empty. Drop it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Bin Meng [Thu, 25 Feb 2021 09:22:43 +0000 (17:22 +0800)]
ppc: qemu: Switch over to use DM ETH and PCI
At present the board supports non-DM version PCI and E1000 drivers.
Switch over to use DM ETH and PCI by:
- Rewrite the PCI address map functions using DM APIs
- Enable CONFIG_MISC_INIT_R to do the PCI initialization and
address map
- Drop unnecessary ad-hoc config macros
- Remove board_eth_init() in the board codes
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Bin Meng [Thu, 25 Feb 2021 09:22:42 +0000 (17:22 +0800)]
pci: mpc85xx: Support 64-bit bus and cpu address
At present the driver only supports 32-bit bus and cpu address.
The controller's outbound registers/fields for extended address
are not programmed. Let's program them to support 64-bit bus and
cpu address.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Bin Meng [Thu, 25 Feb 2021 09:22:41 +0000 (17:22 +0800)]
pci: mpc85xx: Support controller register physical address beyond 32-bit
devfdt_get_addr_index() returns fdt_addr_t which might be a 64-bit
physical address. Use map_physmem() to return the virtual address
that can be used by a 32-bit machine.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Bin Meng [Thu, 25 Feb 2021 09:22:40 +0000 (17:22 +0800)]
pci: mpc85xx: Wrap LAW programming with CONFIG_FSL_LAW
For the QEMU ppce500 machine, LAW registers are not implemented
hence CONFIG_FSL_LAW is not turned on and all LAW APIs are not
available. We should wrap all LAW registers programming in the
mpc85xx PCI driver with CONFIG_FSL_LAW.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Bin Meng [Thu, 25 Feb 2021 09:22:39 +0000 (17:22 +0800)]
ppc: qemu: Switch over to use DM serial
The QEMU ppce500 target integrates 2 NS16550 serial ports. Switch
over to use the DM version of the driver by:
- drop unnecessary ad-hoc config macros
- add get_serial_clock() in the board codes
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Bin Meng [Thu, 25 Feb 2021 09:22:38 +0000 (17:22 +0800)]
common: Move initr_addr_map() to a bit earlier
At present initr_addr_map() is put at a late stage in the
init_sequence_r[] calls. This won't work because lot of
device driver initialization (e.g.: serial port) happens
before it but is lack of the address translation support.
This moves the call to a bit earlier, right after the DM
initialization.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Bin Meng [Thu, 25 Feb 2021 09:22:37 +0000 (17:22 +0800)]
ppc: io.h: Use addrmap_ translation APIs only in post-relocation phase
In phys_to_virt() and virt_to_phys(), if CONFIG_ADDR_MAP is defined,
they use addrmap_ translation APIs to do the address translation.
However these APIs only work in post-relocation phase.
Update the code logic to fall back to use the default one when in
pre-relocation phase.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Bin Meng [Thu, 25 Feb 2021 09:22:36 +0000 (17:22 +0800)]
lib: kconfig: Mention CONFIG_ADDR_MAP limitation in the help
Mention that CONFIG_ADDR_MAP only works in the post-relocation phase.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Bin Meng [Thu, 25 Feb 2021 09:22:35 +0000 (17:22 +0800)]
test: cmd: Add a basic test for 'addrmap' command
This adds a basic test for the newly introduced 'addrmap' command.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[Rebase]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>