st/pbo: use correct type for images and textures

Not all hardware can treat float, uint and sint samplers and images the
same way, so we need to respect the format-types here.

This has the added benefit of making sure sint and uint data doesn't
get copied through a float, which might mess with signaling nan
encodings.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11164>

zink: use a macro for spir-v versions

Instead of repeating constants over and over, let's use a macro for the
SPIR-V version definition instead.

Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11044>

zink: only enable vote if we can support it

We can only support subgroup vote if we have support for SPIR-V 1.3 or
later.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11044>

zink: calculate spir-v version based on vk version

This moves the previous check up to the screen-creation, making it
possible to enable features based on the SPIR-V version.

The reason we want to be able to do this, is so we can force specific
SPIR-V versions, in order to work around bugs in tools.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11044>

zink: allow to specify any spir-v version to nir_to_spirv

This will hopefully helps making it easier to override the SPIR-V
version we emit, in case some drivers or tools have issues with too
recent SPIR-V versions.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11044>

zink: rename spirv_15 bool to spirv_1_4_interfaces

To make it a bit easier to follow what's going on here, rename the
"spirv_15" boolean to "spirv_1_4_interfaces", and add a comment about
what it's all about.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11044>

zink: limit images we mark as cube-compatible

The Vulkan spec says the following:

> If imageType is VK_IMAGE_TYPE_2D and flags contains
> VK_IMAGE_CREATE_CUBE_COMPATIBLE_BIT, extent.width and extent.height
> must be equal and arrayLayers must be greater than or equal to 6

This makes a lot of sense, as these are also requirements for being able
to create cubemaps from them in the first place.

Let's thread a bit more careful, and only set this bit in these cases.
This matters in the new case of setting this flag on 2D array textures.
In the other cases, this should already be the case.

I haven't seen this trigger any issues, I just realized this while
reading the Vulkan-spec.

Fixes: 1887ff2ebb7 ("zink: mark 2d-arrays as cube-compatible")
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11081>

v3dv: fix incorrect render area setup

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4875
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11158>

v3dv: implement VK_KHR_descriptor_update_template

Relevant tests:
dEQP-VK.binding_model.*.with_template.*

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11213>

v3dv: refactor descriptor updates

Make helper functions for all descriptor types and have them handle
all of the descriptor update so we can reuse them later to implement
template updates.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11213>

aco/scheduler: Move cursor handling state to dedicated interfaces

This clarifies the semantics of the index variables compared to the previous
version, which used the same variables in a slightly different way depending
on whether they were used for downwards moves or upwards ones.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10885>

aco/scheduler: Clean up register demand tracking

Refactoring total_demand and total_demand_clause to cover non-overlapping
instruction intervals makes the code easier to follow and allows the register
demand to be updated more efficiently in some cases.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10885>

intel/disasm: remove useless space after "("

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11070>

intel/disasm: decode/describe more send messages

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11070>

winsys/amdgpu: use int16 for buffer_indices_hashlist

int16 allows to correctly store the indices of 32k buffers; this
seems sufficient and is twice smaller than regular int.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11010>

winsys/amdgpu: reduce amdgpu_cs size

buffer_indices_hashlist is only used by the current
amdgpu_cs_context (= amdgpu_cs.csc).

So store a single 16k int array instead of 2, and switch
the owner when flushing the cs.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11010>

amdgpu/winsys: remove amdgpu_cs_has_chaining

Store this property in admgpu_cs instead of using a function.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11010>

winsys/amdgpu: don't read bo->u.slab.entry after pb_slab_free

Otherwise the pb_slabs might be freed by another thread in between.

Valgrind example:

==676841== Invalid read of size 1
==676841==    at 0x6B0A8B3: get_slab_wasted_size (amdgpu_bo.c:659)
==676841==    by 0x6B0AD7D: amdgpu_bo_slab_destroy (amdgpu_bo.c:684)
==676841==    by 0x6ACF94F: pb_destroy (pb_buffer.h:259)
==676841==    by 0x6ACF94F: pb_reference_with_winsys (pb_buffer.h:282)
==676841==    by 0x6ACF94F: radeon_bo_reference (radeon_winsys.h:754)
==676841==    by 0x6ACF94F: si_replace_buffer_storage (si_buffer.c:274)
==676841==    by 0x6957036: tc_call_replace_buffer_storage (u_threaded_context.c:1554)
                            [...]
==676841==    by 0x4ECCDEE: clone (clone.S:95)
==676841==  Address 0x27879945 is 5 bytes inside a block of size 208 free'd
==676841==    at 0x48399AB: free (vg_replace_malloc.c:538)
==676841==    by 0x6B0E8BD: amdgpu_bo_slab_free (amdgpu_bo.c:863)
==676841==    by 0x6B89D4A: pb_slabs_reclaim_locked (pb_slab.c:84)
==676841==    by 0x6B89D4A: pb_slab_alloc (pb_slab.c:130)
==676841==    by 0x6B0EE7F: amdgpu_bo_create (amdgpu_bo.c:1429)

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4736
Fixes: 965c6445ad4 ("winsys/amdgpu,radeonsi: add HUD counters for how much memory is wasted by slabs")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11010>

radeonsi: dirty msaa_config on rs->multisample_enable change

si_emit_msaa_config uses si_get_num_coverage_samples, and
si_get_num_coverage_samples depends on old_rs->multisample_enable.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4613
Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11182>

v3dv: expose VK_KHR_storage_buffer_storage_class

This extension is basically only wrapping SPV_KHR_storage_buffer_storage_class
which is entirely implemented in the SPIR-V frontend.

Relevant CTS tests:
dEQP-VK.glsl.opaque_type_indexing.ssbo_storage_buffer_decoration.*
dEQP-VK.spirv_assembly.*

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11184>

v3dv: document VK_KHR_relaxed_block_layout as implemented

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11184>

d3d12: Add mechanism for D3D12 Adapter Selection

This add a simple mechanism to select which GPU adapter the d3d12
driver should be using. A new environment variable is introduced.

MESA_D3D12_DEFAULT_ADAPTER_NAME

This represent a substring to search for in the GPU descrition,
for example "NVIDIA" or "INTEL", or "NVIDIA GeForce RTX 3090",
etc...

GPU are searched in order and the first one to include the substring
becomes a match. If no match is found, we default to the first
enumerated GPU.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10710>

nv50: expose GL ES 3.1 for nva3+ hardware

This hardware supports all of the points of ES 3.1 with the minor
exception of non-red gather operations.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10569>

nv50: expose images/buffers/compute

This is not enough for desktop GL, since that requires support for
images/buffers in fragment shaders. However this is sufficient for ES
3.1's compute needs, where images/buffers need only be supported in
compute shaders.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10569>

st/mesa: allow hardware to claim ES 3.1 without hw indirect draws

Such a driver will be expected to handle indirect draws via emulation.
As such we don't want to expose the ext in desktop GL contexts. However
for ES 3.1 it's a required feature, so makes sense to allow fallbacks.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10569>

mesa/get: allow image/buffer/atomic variables to be fetched in es3.1

Right now these rely on the desktop extension enables being set. However
some drivers may not be able to support that full functionality. Allow
presence of ES 3.1 to be sufficient.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10569>

st/mesa: properly encode OES_geometry_shader requirement

Since the extension was added, we grew a cap to expose the number of
invocations. Use it to prevent geometry shaders from being spuriously
exposed.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10569>

mesa: relax ES 3.1 compute shader requirements

The desktop extensions require more than what's needed for ES 3.1.
Reduce this to allow implementations to expose ES 3.1 without supporting
desktop functionality.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10569>

st/mesa: avoid enabling image/buffer/compute extensions for weak hardware

The requirements for ES 3.1 are lower than the requirements for desktop
GL. The thread block size can be smaller, and images/buffers/atomics
need not be supported in the fragment stage. Allow a driver to expose
ES 3.1 without flipping on the desktop GL extensions.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10569>

nouveau: improve video limit reporting

This corrects max width/height/macroblocks reporting, in line with what
the nvidia driver docs suggest is supported.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10677>

vdpau: allow state tracker to report a lower number of macroblocks

NVIDIA hardware can process tall or wide videos, but not both at the
same time (for some gens). This limit is provided in units of
macroblocks.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10677>

nvc0: fix 3d images

The hardware has no support for 3d image loads/stores. So present the
image as a larger 2d image and fudge the coordinates. Note that a 2d
image (in the shader) may be backed by a slice of a 3d image, so we
always have to do the coordinate adjustments for 2d as well.

This is largely copied from the nv50 support, which has the same
restriction, with extra care taken to differentiate loads (which
specifies the X coordinate in bytes) and stores, which specifies it in
(formatted) pixels.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10820>

nv50: fix streamout queries

Prior to an earlier commit, xfb queries were not being marked as 64-bit.
The end result of this is that they would never appear to be "ready",
which in turn led to there always being a wait happening.

Once these got marked as 64-bit, we started checking the attached fence
for being signalled. However the screen fence does not seem to be enough
to wait for the streamout query data to actually be written out. So
instead we add a bit of extra "data" which emulates the 32-bit query way
of doing things (with the payload in front) which is emitted from the
same "unit" as the other streamout data. This seems to be sufficient.

Note that it does not seem to be required to actually emit the final
32-bit query from the streamout unit, but that seems logical and perhaps
there are edge cases where it is required.

While at it, also make the sequence management/initialization more
similar to the nvc0 driver.

Fixes dEQP-GLES3.functional.transform_feedback.*

Fixes: 58d47ca3244 ("nv50: add compute invocations counter")
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10867>

v3dv: Fix assert.

Fix defect reported by Coverity Scan.

Side effect in assertion (ASSERT_SIDE_EFFECT)
assignment_where_comparison_intended: Assignment deviceMask = 1U
has a side effect. This code will work differently in a non-debug
build.

Fixes: 234e1b7356e ("v3dv: implement VK_KHR_device_group")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11197>

venus: unify VkNativeBufferANDROID and AHardwareBuffer image create info

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11195>

venus: refactor gralloc buffer and drm modifier properties query

1. Code clean up
2. Fixed a misused allocator
3. Add error logs for external memory interop

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11195>

agx: Handle load_back_face_agx

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11199>

agx: Lower front face to back face

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11199>

agx: Pack SR immediate

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11199>

agx: List sr enum in Python

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11199>

agx: Generate enums from Python

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11199>

agx: Model get_sr

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11199>

asahi: Mark special fragment inputs as sysvals

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11199>

nir: Add nir_intrinsic_load_back_face_agx

On AGX, the special register for front facing is inverted from its meaning in
APIs. We need to lower load_front_face to inot(load_back_face). Doing this in
the backend is trivial, but then we would miss out on algebraic optimizations
for the inot.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11199>

freedreno/regs: split old/not used phy registers to separate DB

In order to simplify main DSI host database, split away phy register
definitions used on DSI v2 hosts to the separate database file.

Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11075>

freedreno: Don't return a flushed batch

Somehow fairly recently the traces CI job started hitting timeouts, not
all the time but enough to be inconvenient for CI.  I tracked it down to
getting into a situation where `ctx->batch->flush == true`, which causes
an infinite loop in the draw_vbo and clear paths (because
fd_batch_lock_submit() checks for flushed batch but fd_context_batch()
does not).  I'm not entirely sure how we get into that state, or what
triggered this (seems possibly triggered by !10937).  But it is easy
enough to recover.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11196>

freedreno: Fix typo

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11196>

i915: Implement __DRI2_FLUSH version 4

DRI3 needs version 4 of __DRI2_FLUSH.

Straight up port of i965 commit 313f2bc32b86 ("intel: Add
support for the new flush_with_flags extension.").

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9734>

i915: Implement __DRI_IMAGE_ATTRIB_OFFSET query

DRI3 needs __DRI_IMAGE_ATTRIB_OFFSET so implement it.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9734>

intel/isl: Fix isl_format_is_valid

The format enum space isn't necessarily contiguous so we can't assume
that if it's in the table it's valid.  We need to check something.

Fixes: ed6e586562f4 "intel: properly constify isl_format_layouts"
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11191>

nir: define NIR_ALU_MAX_INPUTS

Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11172>

util/ra: Use the conflicting neighbor to skip unavailable registers.

Now that we have an idea of how many regs the conflicting allocation uses,
we can just skip to the next one and save repeated tests to find the same
conflicting neighbor again.

shadowrun-returns shader-db time on skl -1.62821% +/- 1.58079% (n=679),
now there's no statistically significant change from the start of the series
(n=420)

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9437>

lima: Use ra_alloc_contig_reg_class().

This greatly simplifies our register allocation code and reduces the
number of registers RA has to walk over.

Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9437>

intel/vec4: Use ra_alloc_contig_reg_class() to reduce RA overhead.

We go from 1672 RA regs to the real 128 HW regs.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9437>

intel/fs: Use ra_alloc_contig_reg_class() to speed up RA.

By using the new class type, we don't need to make 1928 different
registers to represent each contigous reg size starting from the actual
128 HW register, or have a mapping between RA regs and HW base regs.  With
the number of regs reduced, and the fast q computation when using the new
classes, we no longer need to compute our own q.

This drops the FS RA initialization time on my CFL system from about 1ms to
50us.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9437>

v3d: Use the ra_alloc_contig_reg_class() function to speed up RA.

It means we don't need to do the n^2 loop over the regs to set up the pq
values, nor do we need the register conflicts lists.

Acked-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9437>

vc4: Use the ra_alloc_contig_reg_class() function to speed up RA.

It means we don't need to do the n^2 loop over the regs to set up the pq
values, nor do we need to allocate conflicts lists.

Acked-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9437>

ra: Add fast-path support for register classes of contiguous regs.

In the fully general case of register classes, to expose an allocation
class of unaligned 2-contiguous-regs allocations, for example, you'd have
your base individual regs (128 on intel), and another set of 127 regs that
each conflicted with the corresponding pair of the base regs.  Single-reg
nodes would allocate in the 128, and double-reg nodes would allocate in
the 127 and the user would remap from the 127 down to the base regs with
some irritating table.

If you need many different contiguous allocation sizes (16 is a pretty
common number across drivers), your number of regs explodes, wasting
memory and making the q computation expensive at startup.

If all the user has is contiguous-reg classes, we can easily compute the q
value up front (as found in the intel driver and nouveau, for example),
and we only have to change a couple of places in the conflict-checking
logic so the contiguous-reg classes can use the base registers.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9437>

ra: Use struct ra_class in the public API.

All these unsigned ints are awful to keep track of.  Use pointers so we
get some type checking.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9437>

ra: Document that class index is allocated in order, use that in r300.

etnaviv also relies on this being the case, just drop the remapping.

Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9437>

ra: Add a unit test.

This is mostly checking that we agree with a bit of the table from the
paper.  It proved quite useful as I was refactoring.

Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9437>

intel: properly constify isl_format_layouts

Putting a const char * in the struct means it's a pointer that has to be
resolved at rtld time, which means it can be in .data.rel.ro but not
.rodata like you'd hope. Fix this with the usual string table trick.

Cuts about 20k (-80k read-write +60k read-only) and ~280 relocations
from the gallium driver.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11168>

zink: explicitly advertise index buffer format support

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11132>

d3d12: explicitly advertise index buffer format support

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11132>

r600: explicitly advertise index buffer format support

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11132>

r300: explicitly advertise index buffer format support

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11132>

nouveau: explicitly advertise index buffer format support

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11132>

llvmpipe: Don't call util_init_math().

Nothing in llvmpipe uses util_fast_log2().

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11173>

u_math: Reduce fast-log2 table size from 65k entries back to 256.

This was bumped in 7e584a70c492 ("gallium: increase table size for fast
log/pow functions") presumably to fix conformance of tgsi_exec, but we
don't need that much accuracy in the only place it's used in the tree any
more: softpipe texture sampling.

softpipe glmark2 -b texture:texture-filter=linear FPS +0.335748% +/-
0.220111% (n=20)

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11173>

tgsi_exec: Garbage-collect the FAST_MATH path.

It's disabled due to non-conformance with no configuration knob to turn it
on, and if you care about swrast performance you're on llvmpipe anyway.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11173>

Revert "Revert "zink: call tc_driver_internal_flush_notify() on flush""

This reverts commit 9ff54d408ba872da44158869f363f73cddbb0f63.

this is fine now that tc unbinds are fixed

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11187>

aux/tc: fix ubo unbinding

unsetting a ubo requires an unbind

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11187>

aco: simplify Phi RegClass selection

Also adds moves validation rules to aco_validate.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11181>

radv,aco: scalarize all phis via nir_lower_phis_to_scalar()

This allows to remove some ACO code which did so previously.

Totals from 93 (0.06% of 149839) affected shaders (Navi2):
CodeSize: 582424 -> 582348 (-0.01%); split: -0.10%, +0.08%
Instrs: 107083 -> 107011 (-0.07%); split: -0.08%, +0.01%
Latency: 483338 -> 484881 (+0.32%); split: -0.09%, +0.40%
InvThroughput: 101129 -> 101532 (+0.40%); split: -0.03%, +0.42%
Copies: 9893 -> 9774 (-1.20%); split: -1.28%, +0.08%
Branches: 2862 -> 2858 (-0.14%)
PreSGPRs: 3342 -> 3339 (-0.09%)
PreVGPRs: 4567 -> 4565 (-0.04%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11181>

st/mesa: execute glFlush asynchronously if no image has been imported/exported

This improves viewperf performance and it shouldn't break synchronization
with external clients when it's indirectly implied by glFlush.

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10937>

zink: use VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL when possible

this is allowed for fb attachments, so we can use it to avoid needing to
change layouts for zs textures if we know that it isn't going to be written
to during a given subpass

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11130>

zink: track number of fb attachment binds on resources

this will be useful for applying layouts

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11130>

zink: emit fb attachment barriers inline during renderpass start

we don't need a separate function for this

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11130>

radv/winsys: allow to reserve a VMID

This will be used by SPM and also for configuring the trap handler.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11128>

turnip: implement VK_EXT_provoking_vertex

Passes: dEQP-VK.rasterization.provoking_vertex.*

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11112>

nir/unsigned_upper_bound: don't require dominance metadata

Instead, determine if it's a merge or loop exit phi.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9808>

aco: don't use nir_block_is_unreachable()

nir_cf_reinsert() can re-create the block, invalidating dominance
metadata.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9808>

zink: no-op read access buffer barriers if existing access exists for earlier stage

only the earliest stage should be applied for these barriers, so we can skip
ones where the existing access is earlier

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11131>

docs: add VK_EXT_extended_dynamic_state2 features.txt entry

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10366>

anv: toggle on VK_EXT_extended_dynamic_state2

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10366>

anv: support blending logic op dynamic state

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10366>

anv: centralize vk_to_intel_logic_op array

This avoids multiple copies as we will need this in multiple places.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10366>

anv: support primitive restart enable dynamic state

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10366>

anv: support depth bias enable dynamic state

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10366>

anv: support rasterizer discard dynamic state

Implemented by emitting 3DSTATE_STREAMOUT packet.

v2: logic fixes + merge and emit properly all contents (Lionel)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10366>

anv: introduce new dynamic states

These will be used for VK_EXT_extended_dynamic_state2.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10366>

radeon/vcn/enc: use surface swizzle mode instead of linear

It will be capable to have encoder tiling supported via modifier

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Thong Thai <thong.thai@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11165>

frontends/va: Derive image from interlaced buffers for h26[4/5]encode

Add h26[4/5]encode application to allowlist to make an exception when
deriving images from interlaced buffers

This test is part of libva-utils,
find test code @ https://github.com/intel/libva-utils/blob/master/encode/h264encode.c

Signed-off-by: SureshGuttula <suresh.guttula@amd.corp-partner.google.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11054>

broadcom/common: move v3d_tiling to common

We initially just copied on v3dv, just in case we needed to modify
it. One year later the code is exactly the same, so let's move it to
common.

This fix an additional issue, as we were not using NEON when building
v3d_tiling.c for v3dv.

v2:
   * Add "#include util/u_box.h" at v3d_tiling.h, so we can't avoid
     the need to include it on other places. (Juan and Iago)

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11121>

zink: Fix MacOS compiling issues

Add a moltenvk-dir build option to supply the MacOS Vulkan SDK MoltenVK location.
Force compiler, for zink only, into object-c mode when MoltenVK is used to allow for the MacOS ioSurface and CAMetalLayer types that the headers expose.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11129>

gallium/dri: Guard DRI driver global variables on MacOS if Zink is enabled.

Protect the DRI galliumdrm_driver_api and galliumdrm_driver_extensions variables from __APPLE__ builds, as DRI2 cannot be enabled.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11129>

zink: Correct compiler issue with have_moltenvk member having been moved.

have_moltenvk was moved to a different location but code being protected in platform specific guard, so was unnoticed.

Fixes: 598dc3dca41 ("zink: use cached memory for all resources when possible")

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11129>

v3dv: expose KHR_relaxed_block_layout

It seems our compiler already meets the requirements and we pass
all the relevant tests for this as far as I can see.

Relevant CTS tests:
dEQP-VK.ssbo.*relaxed*

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11159>

v3dv: increase number of supported SSBOs

Some CTS tests use more than what we expose and other drivers
also seem to be exposing many more than us (in the order of thousands).
I don't think we want to expose a very large number since we use this
limit to size some arrays in the driver, but bumping it a bit over the
minimum of 4 required by the spec might be reasonable.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11159>

android: aco: add aco_optimizer_postRA.cpp to Makefile.sources

Fixes the following building error:

external/mesa/src/amd/compiler/aco_interface.cpp:155: error: undefined reference to 'aco::optimize_postRA(aco::Program*)'

Fixes: 0e4747d3fb7 ("aco: Introduce a new, post-RA optimizer.")
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11177>