Emma Anholt [Fri, 4 Jun 2021 17:36:02 +0000 (10:36 -0700)]
ci/iris: Enable piglit testing on AML-Y.
We use AML-Y since it's pretty fast and we have a bunch of boards running.
In exchange, to keep the farm from getting too busy, we disable
deqp-gles3/31 jobs by default, since the other gens get us pretty good
coverage.
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11193>
Mike Blumenkrantz [Fri, 21 May 2021 10:50:01 +0000 (06:50 -0400)]
aux/cso: set flatshade_first onto vbuf when binding rasterizer
ensure this value is always updated
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10964>
Mike Blumenkrantz [Fri, 21 May 2021 10:29:54 +0000 (06:29 -0400)]
util/vbuf: add flatshade_first to vbuf context and api
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10964>
Mike Blumenkrantz [Fri, 21 May 2021 10:28:33 +0000 (06:28 -0400)]
util/primconvert: add function for setting flatshade_first
this is the value that needs to be set, not the actual rasterizer state
original function preserved to avoid driver changes
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10964>
Mike Blumenkrantz [Fri, 21 May 2021 09:26:51 +0000 (05:26 -0400)]
aux/cso: store flatshade_first state from rasterizer
this is necessary for handling index rewriting
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10964>
Jason Ekstrand [Fri, 11 Jun 2021 03:53:26 +0000 (22:53 -0500)]
i965: Use nir_lower_passthrough_edgeflags
Now that there's a common NIR pass, there's no point in us doing this in
the back-end anymore. In order to use this pass in i965, we do have to
make one tiny change. Gallium runs the pass after assigning input and
output locations and so needs the pass to respect those locations and
num_inputs. i965, however, runs it before any location assignment or
I/O lowering so we don't care. We do, however, need the pass to succeed
with num_inputs == 0 because we set that later.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11313>
Dave Airlie [Tue, 8 Jun 2021 02:58:18 +0000 (12:58 +1000)]
nir/edgeflags: update outputs written when lowering edge flags.
In theory you can rerun the info gather pass, but in practice that
doesn't always end well. Be consistent inside this pass and update the
info.
While we're here, change the inputs read to use VERT_BIT_EDGEFLAG.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11313>
Jason Ekstrand [Wed, 21 Feb 2018 18:08:31 +0000 (10:08 -0800)]
intel/isl: Use a 4D physical total extent for size calculations
With Yf and Ys tiling, everything is actually four dimensional because
we can have multiple depth or multisampled array slices in the same
tile. This commit just enhances the calculations so they can handle it.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11330>
Jason Ekstrand [Wed, 21 Feb 2018 17:37:01 +0000 (09:37 -0800)]
intel/isl: Make tile logical extents four dimensional
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11330>
Jason Ekstrand [Wed, 21 Feb 2018 10:53:14 +0000 (02:53 -0800)]
intel/isl: Make the offset helpers four dimensional
We need to do this in order to handle Yf and Ys tiling because they use
a four-dimensional tile instead of laying everything out in two
dimensions.
v2 (Jason Ekstrand):
- Update functions added since v1:
- isl_surf_get_image_range_B_tile
- blorp_can_hiz_clear_depth
- get_image_offset_el
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> (v1)
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11330>
Jason Ekstrand [Wed, 21 Feb 2018 10:23:52 +0000 (02:23 -0800)]
intel/blorp: Use isl_surf_get_image_offset_B_tile_el in ccs_ambiguate
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11330>
Jason Ekstrand [Wed, 21 Feb 2018 10:22:41 +0000 (02:22 -0800)]
intel/isl: Add a isl_surf_get_image_offset_B_tile_el helper
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11330>
Emma Anholt [Thu, 10 Jun 2021 20:48:45 +0000 (13:48 -0700)]
ci/fastboot: Consistently restart the run on intermittent conditions.
Not currently on my list of intermittent issues, but let's be
resilient hopefully.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11308>
Emma Anholt [Thu, 10 Jun 2021 20:42:35 +0000 (13:42 -0700)]
ci/fastboot: Add a serial timeout to catch fastboot prompt failure.
The a530s will occasionally fail to make it to the fastboot prompt,
with no other deltas between a working log and a log stalled waiting
for that line to show up.
So, add a serial timeout (like the rpi boards do for similar reasons),
and on timeout restart the run. We actually restart the whole serial
watching process, because the SerialBuffer finishes itself on timeout.
This should also help with the intermittent issue we've had where a
power cycle causes the python serial module to throw an exception.
Tested with the gitlab-disabled db820c that never makes it to the
fastboot prompt (I think it's one where we need a longer micro cable
to connect it!) and saw successful boot looping to retry.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11308>
Chia-I Wu [Tue, 8 Jun 2021 23:56:13 +0000 (16:56 -0700)]
venus: document the darkest corner of venus
The "Optional Requirements" section is fine. The
"VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT" section details how venus goes
out-of-spec and becomes illegal.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11277>
Mike Blumenkrantz [Wed, 9 Jun 2021 21:28:30 +0000 (17:28 -0400)]
zink: fix typo that's definitely not at all embarrassing or anything like that
and also adjust some formatting to pad out the diff and really make sure nobody
notices that anything was ever amiss here
Fixes:
787412b7eb8 ("zink: break out region overlap testing function into helper")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Joshua Ashton <joshua@froggi.es>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11279>
Mike Blumenkrantz [Thu, 10 Jun 2021 20:51:39 +0000 (16:51 -0400)]
lavapipe: use cso caching
really this only needs cso_cache api, but it's cumbersome to redo all
the hashing and state creation, so just use the whole context
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11071>
Mike Blumenkrantz [Fri, 4 Jun 2021 13:18:02 +0000 (09:18 -0400)]
aux/cso: split cso_destroy_context into unbind and a destroy functions
this makes the unbind function reusable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11071>
Mike Blumenkrantz [Thu, 27 May 2021 15:19:38 +0000 (11:19 -0400)]
aux/cso: add flag to disable vbuf
it may be known in advance that vbuf shouldn't be used, so allow users
to skip this in case caps would otherwise enable it
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11071>
Mike Blumenkrantz [Fri, 11 Jun 2021 15:01:46 +0000 (11:01 -0400)]
zink: clamp PIPE_CAP_MAX_VIEWPORTS to PIPE_MAX_VIEWPORTS
this is all we need
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11322>
Hoe Hao Cheng [Fri, 11 Jun 2021 04:36:00 +0000 (12:36 +0800)]
zink: do not fail when EXT_calibrated_timestamps is unavailable
Fixes:
039078fe ("zink: slight refactor of load_device_extensions()")
Acked-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11314>
Mike Blumenkrantz [Thu, 10 Jun 2021 19:52:18 +0000 (15:52 -0400)]
zink: use scissor region for discarding clears during blit
ensure that clears aren't being mistakenly discarded or applied due to
scissor region being ignored and full surface geometry being used
Fixes:
a8e047e8f4a ("zink: discard pending clears during blit/copy if we'll overwrite the data")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11307>
Daniel Stone [Thu, 10 Jun 2021 23:13:30 +0000 (00:13 +0100)]
ci/lava: Avoid tee as it ruins exit status
I was today years old when I learned this about classic composable UNIX
tools:
~/mesa/mesa lava-submitter-overlay * % bash
[daniels@strictly mesa]$ set -e
[daniels@strictly mesa]$ false | tee
[daniels@strictly mesa]$ echo $?
0
Use tail rather than tee, so it doesn't hide our exit status.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11309>
Daniel Stone [Thu, 10 Jun 2021 23:09:45 +0000 (00:09 +0100)]
ci/lava: Dump and artifact YAML again
Now it's safe to do so without leaking JWTs, dump the generated YAML to
make it easier to reproduce things.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11309>
Daniel Stone [Thu, 10 Jun 2021 22:59:56 +0000 (23:59 +0100)]
ci/lava: Disable stdout/stderr buffering
Frequency of writes is unlikely to be a performance bottleneck, and
given the number of steps in between execution and the user, less
buffering is gooder.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11309>
Daniel Stone [Thu, 10 Jun 2021 22:45:07 +0000 (23:45 +0100)]
ci/lava: Add explicit fatal-error handler
Truth is relative in 2021, and Python's duck-typing means truthiness
isn't what you think it is. Use an explicit fatal-error handler to make
sure we crash out hard on failure, rather than hoping sys.exit() behaves
like you think it does, because it doesn't.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11309>
Daniel Stone [Thu, 10 Jun 2021 22:13:46 +0000 (23:13 +0100)]
ci/lava: Remove unused arguments
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11309>
Daniel Stone [Thu, 10 Jun 2021 22:19:08 +0000 (23:19 +0100)]
ci/lava: Generate job name from lava-submit.sh
Just use the CI job name rather than open-coding the parameters.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11309>
Daniel Stone [Thu, 10 Jun 2021 18:23:16 +0000 (19:23 +0100)]
ci/panfrost: Remove useless variable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11309>
Daniel Stone [Thu, 10 Jun 2021 16:00:32 +0000 (17:00 +0100)]
ci/lava: Use per-job rootfs overlay for environment
Trying to get arbitrary strings suitably quoted for shell, embedded in a
YAML file, processed by Python templating, is like seven bad ideas all
embedded into one big can of bees.
Reuse the same script we use for bare-metal to generate the environment,
tar that up into a per-job overlay which is added to the
inter-pipeline-reusable rootfs built by the container jobs and the
intra-pipeline-reusable overlay built by the build jobs.
@anholt wrote a chunk of this - replacing the $ENV_VARS GitLab CI
variable with a Python loop across the POSIX job environment - in
!11192, but this still had YAML quoting nightmares, and was more
needless duplication between LAVA and bare-metal.
The diff is large and annoying, but is mostly a sed job to get
ENV_VARS="FOO=bar BAZ=quux" into FOO: bar\nBAZ: quux.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Co-authored-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11309>
Daniel Stone [Thu, 10 Jun 2021 15:35:03 +0000 (16:35 +0100)]
ci: Use JOB_ARTIFACTS_BASE for Piglit fails
It's not Piglit-specific per se, it's just another per-job artifact
upload which needs to be made visible through MinIO.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11309>
Daniel Stone [Thu, 10 Jun 2021 15:29:39 +0000 (16:29 +0100)]
ci: Add JOB_ARTIFACTS_BASE variable
Used for both LAVA (uploading results to MinIO because we don't yet have
non-ephemeral NFS storage) and Piglit (for the Tracie dashboard).
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11309>
Daniel Stone [Thu, 10 Jun 2021 15:24:48 +0000 (16:24 +0100)]
ci: Make PIPELINE_ARTIFACTS_BASE a common variable
$minio/artifacts/$project/$pipeline/ is common between all our CI.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11309>
Daniel Stone [Thu, 10 Jun 2021 13:53:57 +0000 (14:53 +0100)]
ci/lava: Clean up variable naming, document them
Our variable names haven't aged very well. Rename them to make them more
clear and straightforward, especially when we bring in a third rootfs
element to download.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11309>
Daniel Stone [Thu, 10 Jun 2021 12:11:02 +0000 (13:11 +0100)]
ci/lava: Wrap submission in a shell script
Just do what we're already doing but in a shell script, which will make
it less tedious to expand out later.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11309>
Daniel Stone [Thu, 10 Jun 2021 12:05:38 +0000 (13:05 +0100)]
ci/lava: Cosmetic reordering of job init
Split our init up into: base system setup (filesystem mounts, network),
pulling the build artifacts, environment common to us and bare-metal,
bespoke environment, and finally running the tests.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11309>
Daniel Stone [Thu, 10 Jun 2021 10:26:38 +0000 (11:26 +0100)]
ci/lava: Pass JWT separately from environment variables
As the JWT is sensitive, we don't want to record or leak it anywhere.
Doing this lets us run --dump-yaml in normal execution so we can
artifact the result, as well as bringing us into line with bare-metal.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11309>
Daniel Stone [Thu, 10 Jun 2021 10:10:10 +0000 (11:10 +0100)]
ci/lava: Move LAVA files to lava/
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11309>
Daniel Stone [Thu, 10 Jun 2021 09:51:50 +0000 (10:51 +0100)]
ci/bare-metal: Don't leak JWT into logs
The JWT is sensitive - as it can be used to access e.g. private traces -
so we don't want it anywhere in our logs.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11309>
Daniel Stone [Thu, 10 Jun 2021 09:50:44 +0000 (10:50 +0100)]
ci/bare-metal: Factor out environment to a separate script
This will let us reuse the same environment generation for both
bare-metal and LAVA.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11309>
Erico Nunes [Thu, 10 Jun 2021 19:20:28 +0000 (21:20 +0200)]
meson: kmsro: require dri3 for X11
The current implementation in kmsro relies on buffer sharing using
WINSYS_HANDLE_TYPE_FD, which in x11 is only used by default when dri3
is enabled.
Since the current implementation will not work without it, we can
prevent user error by checking that it is not disabled at configuration
time.
Closes #4861
Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11305>
Daniel Schürmann [Tue, 26 Jan 2021 18:05:23 +0000 (19:05 +0100)]
aco/ra: refactor register assignment for vector operands
No functional changes.
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8764>
Daniel Schürmann [Tue, 26 Jan 2021 17:49:58 +0000 (18:49 +0100)]
aco/ra: refactor affinity coalescing
Also adds v_interp_p2_f32 to the list of
affinity-related instructions.
Totals from 68 (0.05% of 149839) affected shaders (GFX10.3):
CodeSize: 792928 -> 792056 (-0.11%)
Instrs: 152843 -> 152625 (-0.14%)
Latency: 1235353 -> 1235278 (-0.01%)
InvThroughput: 224087 -> 224049 (-0.02%)
Copies: 9218 -> 9000 (-2.36%)
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8764>
Daniel Schürmann [Thu, 28 Jan 2021 15:52:28 +0000 (16:52 +0100)]
aco/ra: only create phi-affinities for killed operands
If a phi-operand is not killed, it must be copied anyway.
The additional affinity would only overwrite any potential
better affinity that was already created
Totals from 1067 (0.71% of 149839) affected shaders (GFX10.3):
VGPRs: 68072 -> 68064 (-0.01%)
CodeSize: 8252588 -> 8245220 (-0.09%); split: -0.12%, +0.03%
Instrs: 1596146 -> 1593941 (-0.14%); split: -0.16%, +0.02%
Latency:
18828176 ->
18823914 (-0.02%); split: -0.08%, +0.06%
InvThroughput: 3575063 -> 3574787 (-0.01%); split: -0.05%, +0.04%
VClause: 24345 -> 24325 (-0.08%); split: -0.16%, +0.07%
Copies: 88712 -> 87398 (-1.48%); split: -1.77%, +0.29%
Branches: 52067 -> 51364 (-1.35%); split: -1.38%, +0.03%
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8764>
Erik Faye-Lund [Wed, 9 Jun 2021 08:29:34 +0000 (10:29 +0200)]
zink: limit non-extension version feature to spirv 1.5
In order to use the Vulkan 1.2 core viewport and layer shader outputs,
we need to use SPIR-V 1.5. But we've recently added some preliminary
support to compute the SPIR-V version we're using, with the intention of
adding a SPIR-V version override to work around bugs in tools like
RenderDoc. We haven't implemented the latter yet.
But just to be safe, let's limit this to SPIR-V 1.5. This isn't going to
matter right now, but it might avoid a problem if we decide to finish up
the SPIR-V version overriding.
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11259>
Erik Faye-Lund [Thu, 3 Jun 2021 14:45:31 +0000 (16:45 +0200)]
zink: reject more illegal blits
Vulkan has some additional restrictions for vkCmdBlitImage that we
weren't testing for. Quting the Vulkan 1.2 spec, section 20.5 "Image
Copies with Scaling", "Valid Usage" subsection:
- If either of srcImage or dstImage was created with a signed integer
VkFormat, the other must also have been created with a signed integer
VkFormat
- If either of srcImage or dstImage was created with an unsigned integer
VkFormat, the other must also have been created with an unsigned
integer VkFormat.
So let's make sure we reject these illegal blits.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11217>
Erik Faye-Lund [Thu, 10 Jun 2021 06:25:18 +0000 (08:25 +0200)]
zink/ci: re-enable test
Since
f34ff037027 ("zink/ci: increase piglit and deqp-runner timeouts"),
we're no longer dangerously close to timing out this test, so it should
be safe to re-enable this.
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11288>
Erik Faye-Lund [Mon, 7 Jun 2021 14:06:15 +0000 (16:06 +0200)]
llvmpipe: do not always use pixel-rounded coordinates for points
LLVMpipe always used the bounding-box to rasterize-points, rather than
the actual rasterization-planes. This happened because the primitive was
expanded by one unit outside the bounding box. While this kinda work for
non-multisampled cases, it's not really quite *correct*.
Rasterization of non-legacy points in OpenGL is defined as the
intersection of a the pixel centers with a rectangle of size width and
height, centered around the point in viewport coordinates. This applies
both to multi-sampled and non-multisampled cases.
So let's fix the rasterizer to use the correct definition in both cases.
We leave the legacy case as-is, and just do the inverse adjustment
there so the end result should be the same.
This fixes the following dEQP test-cases:
- dEQP-GLES3.functional.rasterization.fbo.rbo_multisample_4.primitives.points
- dEQP-GLES3.functional.rasterization.fbo.rbo_multisample_max.primitives.points
...as well as this one for Lavapipe:
- dEQP-VK.rasterization.primitives_multisample_4_bit.no_stipple.points
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11183>
Erik Faye-Lund [Fri, 4 Jun 2021 11:42:25 +0000 (13:42 +0200)]
llvmpipe: fix multisample lines again
This does a little bit better than what we did in
2c0a078fdb4
("llvmpipe: fix multisample lines."), where parts of the diamond-exit
rule stuff was bypassed. But we should actually bypass *all* of the
diamond-exit rule stuff here instead.
The reason is that multisampled lines have a completely differently
specified set of rasterization rules, as per the OpenGL 4.6 core spec,
section 14.5.4 ("Line Multisample Rasterization").
So let's give multisampled lines their own geometry-generation codepath
instead.
This fixes the following dEQP tests:
- dEQP-GLES3.functional.rasterization.fbo.rbo_multisample_4.primitives.lines
- dEQP-GLES3.functional.rasterization.fbo.rbo_multisample_max.primitives.lines
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11183>
Erik Faye-Lund [Wed, 9 Jun 2021 08:55:44 +0000 (10:55 +0200)]
llvmpipe: consistently deal with post-rast state
There's no good reason why we peek into the rasterization state when
dealing with the point_quad_rasterization state, rather than set it
through lp_setup_set_point_state like other point-state.
Let's fix this up, and get rid of a needless NULL-check per primitive.
This makes the code a bit easier to read as well, and will help once
these conditions gets more complicated later on.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11183>
Erik Faye-Lund [Tue, 8 Jun 2021 11:20:59 +0000 (13:20 +0200)]
llvmpipe: fix edge-rule logic for lines
In
2737abb44ef, the handling of pixel-offsets and edge rules were
untangled, but one case was missed.
This fixes the following dEQP test-cases on VirGL + LLVMpipe
- dEQP-GLES2.functional.draw.random.10
- dEQP-GLES2.functional.draw.random.42
- dEQP-GLES3.functional.draw.random.105
- dEQP-GLES3.functional.draw.random.114
- dEQP-GLES3.functional.draw.random.135
- dEQP-GLES3.functional.draw.random.144
- dEQP-GLES3.functional.draw.random.155
- dEQP-GLES3.functional.draw.random.174
- dEQP-GLES3.functional.draw.random.206
- dEQP-GLES3.functional.draw.random.31
- dEQP-GLES3.functional.draw.random.43
- dEQP-GLES3.functional.draw.random.84
- dEQP-GLES31.functional.draw_indirect.random.20
...as well as these on Zink + Lavapipe:
- spec@nv_primitive_restart@primitive-restart-disable_vbo
- spec@nv_primitive_restart@primitive-restart-vbo_combined_vertex_and_index
- spec@nv_primitive_restart@primitive-restart-vbo_index_only
- spec@nv_primitive_restart@primitive-restart-vbo_separate_vertex_and_index
- spec@nv_primitive_restart@primitive-restart-vbo_vertex_only
Fixes:
2737abb44ef ("gallium: Replace gl_rasterization_rules with lower_left_origin and half_pixel_center.")
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11183>
Yiwei Zhang [Fri, 4 Jun 2021 05:56:38 +0000 (05:56 +0000)]
virgl: forward the host renderer hardware info
Some game engines rely on the real hardware info to adjust default
graphics quality and other attributes.
Prepend "virgl" to avoid app compat issues and to distinguish from
native platforms while giving engines/apps a chance to adjust graphics
defaults.
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11179>
Georg Lehmann [Thu, 10 Jun 2021 10:47:51 +0000 (12:47 +0200)]
ac: Enable 32bit predication on gfx9 with fw feature version 52.
Amdvlk does this as well and it passes the vulkan CTS on renoir.
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11297>
Georg Lehmann [Thu, 10 Jun 2021 12:14:24 +0000 (14:14 +0200)]
ac: Enable 32bit predication on gfx10.
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11297>
Georg Lehmann [Thu, 10 Jun 2021 10:46:22 +0000 (12:46 +0200)]
ac: Check me_fw_feature for 32bit predication on gfx10.3
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11297>
Samuel Pitoiset [Thu, 10 Jun 2021 16:20:19 +0000 (18:20 +0200)]
radv: fix aligning the image offset by using align64()
This doesn't fix anything known. Found by inspection.
Cc: 21.1 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11302>
Mike Blumenkrantz [Mon, 10 May 2021 11:37:09 +0000 (07:37 -0400)]
util/disk_cache: add nocopy variant of disk cache store function
this is a bit more convenient in some cases
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11304>
Yiwei Zhang [Thu, 10 Jun 2021 04:23:40 +0000 (04:23 +0000)]
egl/android: add aosp_nougat system/window.h back for back compat
Also layer ANativeWindow_* APIs on top of legacy APIs for api level less
than 26 in a new platform_android.h header.
v2: persist frozen system/window.h header
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Rob Clark <robdclark@chromium.org> (v1)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11286>
Rob Clark [Thu, 10 Jun 2021 19:33:32 +0000 (12:33 -0700)]
docs: Update freedreno features
Bring features.txt a bit more up to date.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11311>
Rob Clark [Thu, 10 Jun 2021 21:20:36 +0000 (14:20 -0700)]
freedreno: Add missing valid range tracking for SSBOs/images
Normally TC takes care of this for us. But we might as well not get it
wrong in cases where TC is disabled.
Reported-by: Alyssa Rosenzweig <alyssa@collabora.com>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11311>
Rob Clark [Thu, 10 Jun 2021 19:42:30 +0000 (12:42 -0700)]
freedreno/registers: add A5XX_RBBM_STATUS3 bit
Same bit as a6xx.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11311>
Emma Anholt [Tue, 8 Jun 2021 21:40:48 +0000 (14:40 -0700)]
ci/piglit: Skip WGL on all the Linux runs.
We don't build the tests, since we don't have WGL.
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11283>
Emma Anholt [Tue, 8 Jun 2021 21:35:42 +0000 (14:35 -0700)]
ci/freedreno: Enable running all of piglit_gl for a530's manual test.
Otherwise the xfails will end up stale after piglit uprevs that change the
test set.
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11283>
Emma Anholt [Tue, 8 Jun 2021 00:10:31 +0000 (17:10 -0700)]
ci: Update piglit and deqp/piglit-runner.
This brings in some major new features in the runner:
- piglit tests now include subtest reporting
- "-t" support for quick include-filtering of tests.
- piglit tests that crash after their result report are considered crashes.
- throws a nice error if you try to annotate the same failure twice
(e.g. lvp's dEQP-VK.glsl.builtin.precision.pow.highp.vec2,Fail)
Since the runner catches piglit test bugs where the same subtest is run
twice, we also uprev piglit to pull in the fixes for those.
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11283>
Tomeu Vizoso [Thu, 10 Jun 2021 11:43:56 +0000 (13:43 +0200)]
ci/lava: Don't overwrite PIGLIT_REPLAY_EXTRA_ARGS
Other Piglit jobs will want different values for this env var.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11293>
Daniel Stone [Thu, 10 Jun 2021 09:35:21 +0000 (10:35 +0100)]
ci/lava: Add --dump-yaml option to submitter
Also useful for local development and testing.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11293>
Daniel Stone [Thu, 10 Jun 2021 08:42:40 +0000 (09:42 +0100)]
ci/lava: Add validate-only mode to job submitter
Useful for development.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11293>
Tomeu Vizoso [Thu, 10 Jun 2021 08:45:54 +0000 (10:45 +0200)]
ci/lava: Improve error reporting in lava_job_submitter.py
I'm having trouble figuring out why this is breaking.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11293>
Emma Anholt [Fri, 4 Jun 2021 18:59:15 +0000 (11:59 -0700)]
ci/lava: Finish garbage-collecting the TEST_SUITE variable
We no longer name the template by the test suite being run.
Fixes:
93ec399b2850 ("ci: Use a single template for LAVA jobs")
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11293>
Paulo Zanoni [Thu, 10 Jun 2021 00:09:05 +0000 (17:09 -0700)]
iris: don't munmap NULL pointers
This is a regression, the previous commit had this check which was
removed in the patch mentioned below. What happens is that when we
have a buffer that's not mmapped and we try to bo_free it we get some
very funny backtraces. Easily reproducible with fullscreen
gputest.triangle.
Fixes:
f62724ccacff ("iris: Pick a single mmap mode (WB/WC) at BO allocation time")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4890
Tested-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11284>
Dave Airlie [Thu, 10 Jun 2021 20:11:13 +0000 (06:11 +1000)]
iris: drop unused function declaration
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11306>
Hoe Hao Cheng [Tue, 1 Jun 2021 08:58:52 +0000 (16:58 +0800)]
zink/codegen: clean the constructor of Extension up
the `functions` parameter is now unused, also rewrote some comments
since they are now outdated
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11036>
Hoe Hao Cheng [Sun, 30 May 2021 10:53:56 +0000 (18:53 +0800)]
zink/codegen: allow conditional enabling of instance extensions
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11036>
Hoe Hao Cheng [Thu, 27 May 2021 19:45:38 +0000 (03:45 +0800)]
zink: use the dispatch tables
- removed all usage of GET_PROC_ADDR
- find-and-replaced all instances of `screen->vk_` to `screen->vk.`
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11036>
Hoe Hao Cheng [Thu, 27 May 2021 19:59:02 +0000 (03:59 +0800)]
zink: slight refactor of load_device_extensions()
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11036>
Hoe Hao Cheng [Thu, 27 May 2021 19:04:42 +0000 (03:04 +0800)]
zink/codegen: add zink_verify_*_extensions()
those are meant to be used with the dispatch tables, by checking whether
the functions added by the enabled extensions are actually loaded
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11036>
Hoe Hao Cheng [Sun, 30 May 2021 10:02:56 +0000 (18:02 +0800)]
zink/codegen: split commands into three groups
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11036>
Hoe Hao Cheng [Wed, 26 May 2021 19:10:09 +0000 (03:10 +0800)]
zink: introduce vk_dispatch_table
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11036>
Connor Abbott [Thu, 4 Mar 2021 14:47:39 +0000 (15:47 +0100)]
ir3: Copy propagate immed/const to meta instructions
This is allowed with the new RA, and makes a huge difference in
preventing extra moves when preferential coloring doesn't work.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9842>
Connor Abbott [Thu, 4 Mar 2021 11:21:50 +0000 (12:21 +0100)]
ir3: Insert output collects in the main shader
We were inserting them in what was NIR's end block with the "end"
instruction, which meant that the moves they generated couldn't be
scheduled with the rest of the last block as part of post-RA scheduling.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9842>
Connor Abbott [Thu, 4 Mar 2021 11:18:44 +0000 (12:18 +0100)]
ir3: Add simple CSE pass
RA currently can't handle a live value that's part of a vector and
introduces extra copies. This was espeically a problem for bary.f, where
the bary coords were being split and repeatedly re-collected. But this
could be a problem in other situations as well.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9842>
Connor Abbott [Mon, 26 Apr 2021 21:37:04 +0000 (23:37 +0200)]
ir3/sched: Consider unused destinations when computing live effect
If an instruction's destination is unused, then we shouldn't penalize
it. For example, this helps us schedule atomic operations whose results
aren't read. This works around RA failures when CSE is enabled in some
robustness2 tests.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9842>
Connor Abbott [Fri, 23 Apr 2021 11:05:48 +0000 (13:05 +0200)]
ir3/sched: Make collects count against tex/sfu limits
In a scenario where there are a lot of texture fetches with constant
coordinates, this prevents the scheduler from scheduling all the setup
instructions after the first group of textures has been scheduled
because they are the only non-syncing thing and scheduling them didn't
decrease tex_delay. Collects with immed/const sources will turn into
moves of those sources, so we should treat them the same.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9842>
Connor Abbott [Thu, 11 Mar 2021 14:00:15 +0000 (15:00 +0100)]
ir3/sched: Don't schedule collect early
I don't think there was ever a good reason to do this, but when we start
folding constants/immediates into collect, this can become actively
harmful.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9842>
Connor Abbott [Wed, 3 Mar 2021 14:11:14 +0000 (15:11 +0100)]
ir3: Remove right and left copy prop restrictions
This is leftover from the old RA, and inhibits copy propagation
unnecessarily with the new RA.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9842>
Connor Abbott [Mon, 26 Apr 2021 21:05:53 +0000 (23:05 +0200)]
ir3/ra: Add a validation pass
This helps catch tricky-to-debug bugs in RA, or helps rule them out.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9842>
Connor Abbott [Fri, 19 Feb 2021 11:33:49 +0000 (12:33 +0100)]
ir3: Rewrite register allocation
Switch to the new SSA-based register allocator.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9842>
Connor Abbott [Mon, 22 Mar 2021 14:02:48 +0000 (15:02 +0100)]
ir3: Expose occupancy calculation functions
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9842>
Connor Abbott [Fri, 19 Feb 2021 11:14:14 +0000 (12:14 +0100)]
ir3: Add pass to lower arrays to SSA
This will be run right after nir->ir3. Even though we have SSA coming
out of NIR, we still need it for NIR registers, even though we keep the
original array around to insert false dependencies.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9842>
Connor Abbott [Fri, 19 Feb 2021 11:03:47 +0000 (12:03 +0100)]
ir3: Add dominance infrastructure
Mostly lifted from nir.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9842>
Connor Abbott [Fri, 14 May 2021 17:14:47 +0000 (19:14 +0200)]
ir3: Remove unused check_src_cond()
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9842>
Connor Abbott [Tue, 23 Mar 2021 17:13:26 +0000 (18:13 +0100)]
ir3/postsched: Don't use SSA source information
This was only used for calculating if a source is a tex or SFU
instruction, which is easily replacable. It's going away with the new
RA.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9842>
Connor Abbott [Mon, 17 May 2021 14:16:55 +0000 (16:16 +0200)]
ir3/delay: Delete pre-RA repeat handling
It looks likely that any implementation of (rptN) in ir3 will have to
actually create (rptN) instructions after RA, which means that this can
be dropped.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9842>
Connor Abbott [Fri, 19 Feb 2021 09:53:08 +0000 (10:53 +0100)]
ir3: Rewrite delay calculation
The old delay calculation relied on the SSA information staying around,
and wouldn't work once we start introducing phi nodes and making
"normal" values defined in multiple blocks not array regs anymore.
What's worse is that properly inserting phi nodes when splitting live
ranges would make that code even more complicated, and this was the last
place post-RA that actually needed that information.
The new version only compares the physical registers of sources and
destinations. It works by going backwards up to a maximum number of
cycles, so it might be slightly slower when the definition is closer but
should be faster when it is farther away.
To avoid complicating the new method, the old method is kept around, but
only for pre-RA scheduling and it can therefore be drastically
simplified as the array case can be dropped.
ir3_delay_calc() is split into a few variants to avoid an explosion of
boolean arguments in users, especially now that merged_regs now has to
be passed to it.
The new method is a little more complicated when it comes to handling
(rptN), because both the assigner and consumer may be (rptN). This adds
some unit tests for those cases, in addition to dropping the to-SSA code
in the test harness since it's no longer needed.
Finally, ir3_legalize has to be switched to using physical registers for
the branch condition. This was the one place where IR3_REG_SSA remained
after RA.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9842>
Connor Abbott [Mon, 17 May 2021 14:38:26 +0000 (16:38 +0200)]
ir3: Make branch conditions non-SSA
In particular, make sure they have a physreg assigned. This was the last
place after RA where SSA registers were created, which won't work with
the new post-RA delay calculation that relies on the physreg.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9842>
Connor Abbott [Thu, 25 Mar 2021 14:22:44 +0000 (15:22 +0100)]
ir3: Add reg_elems(), reg_elem_size(), and reg_size()
For working with registers in units of half-regs in the new RA.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9842>
Connor Abbott [Mon, 22 Feb 2021 14:00:55 +0000 (15:00 +0100)]
ir3/delay: Fix full->half and half->full delay
The current compiler never does this, but the new compiler will start to
in mergeregs mode. There is an extra penalty for this.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9842>
Connor Abbott [Fri, 19 Feb 2021 10:18:02 +0000 (11:18 +0100)]
ir3: Add ir3_register::array.base
There were two different approaches I saw in the post-RA code for
figuring out what regiser range a relative access touched:
1. Use reg->array.offset and reg->array.size. This is wrong in case
reg->array.offset was non-zero before RA, because array.size is
the size of the whole array and array.offset has the const offset
within the array baked in.
2. Lookup the array from the array ID and use the base + range there.
This is correct, but won't work with the new RA, where an array might
not always be assigned to the same register.
This replaces both methods with a new ir3_register::array.base field,
and switches all the users I could find to it.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9842>
Connor Abbott [Fri, 5 Mar 2021 21:09:41 +0000 (22:09 +0100)]
ir3: Improve register printing for SSA
Print the ssa name for array destinations, and handle printing undef SSA
sources.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9842>
Connor Abbott [Thu, 18 Feb 2021 16:57:49 +0000 (17:57 +0100)]
ir3: Prepare for instructions with multiple destinations
To simplify the pre-RA merge set code and express the result live-range
splitting in RA, we need to add support for parallel copy instructions,
and for the merge set code these parallel copies need to be in SSA form.
Parallel copies have multiple destinations by necessity, but there was
no way to express this in the existing IR. In particular there was no
support for marking a register as being a destination, and no support
for indicating which destination register out of several an SSA source
refers to. This replaces ir3_register::instr with ir3_register::def and
re-purposes ir3_register::instr. I haven't propagated this into common
helpers, like ssa(), because that would vastly increase the amount of
churn and the number of places that produce such instructions should be
limited -- only RA will create parallel copies and they will be
destroyed right after RA. In the future swz will have multiple
destinations too, but it will only be created after RA via parallel copy
lowering.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9842>