Simon Glass [Sun, 23 Aug 2015 00:31:43 +0000 (18:31 -0600)]
tpm: Enable 'tpmtest' command for Chrome OS boards with TPMs
This command provides a few useful tests so enable it for common boards.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard<christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:42 +0000 (18:31 -0600)]
dm: tpm: Add a 'tpmtest' command
These tests come from Chrome OS code. They are not particularly tidy but can
be useful for checking that the TPM is behaving correctly. Some knowledge of
TPM operation is required to use these.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard<christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:41 +0000 (18:31 -0600)]
tpm: Add functions to access flags and permissions
Add a few new functions which will be used by the test command in a future
patch.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard<christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:40 +0000 (18:31 -0600)]
tpm: Add a 'tpm info' command
Add a command to display basic information about a TPM such as the model and
open/close state. This can be useful for debugging.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard <christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:39 +0000 (18:31 -0600)]
dm: tpm: Convert LPC driver to driver model
Convert the tpm_tis_lpc driver to use driver model and update boards which
use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard<christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:38 +0000 (18:31 -0600)]
dm: tpm: Convert I2C driver to driver model
Convert the tpm_tis_i2c driver to use driver model and update boards which
use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard<christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:37 +0000 (18:31 -0600)]
exynos: x86: dts: Add tpm nodes to the device tree for Chrome OS devices
Add a TPM node to the various Chromebooks so that driver can be converted to
driver model.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard<christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:36 +0000 (18:31 -0600)]
tpm: Check that parse_byte_string() has data to parse
Rather then crashing when there is no data, print an error. The error is
printed by the caller to parse_byte_string().
Acked-by: Christophe Ricard <christophe-h.ricard@st.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:35 +0000 (18:31 -0600)]
dm: tpm: sandbox: Convert TPM driver to driver model
Convert the sandbox TPM driver to use driver model. Add it to the device
tree so that it can be found on start-up.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard <christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:34 +0000 (18:31 -0600)]
tpm: Report tpm errors on the command line
When a 'tpm' command fails, we set the return code but give no indication
of failure. This can be confusing.
Add an error message when any tpm command fails.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard<christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:33 +0000 (18:31 -0600)]
dm: i2c: Add a command to adjust the offset length
I2C chips can support a register offset, with registers accessible by
sending this offset as the first part of any read or write transaction.
Most I2C chips have a single byte offset, thus the offset length is 1.
This provides access for up 256 registers.
However other offset lengths are supported, including 0.
Add a command to provide access to the offset length from the command
line. This allows the offset length to be read or written.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard<christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:32 +0000 (18:31 -0600)]
dm: tpm: Convert the TPM command and library to driver model
Add driver model support to the TPM command and the TPM library. Both
support only a single TPM at present.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard<christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:31 +0000 (18:31 -0600)]
dm: tpm: Add a uclass for Trusted Platform Modules
Add a new uclass for TPMs which uses almost the same TIS (TPM Interface
Specification) as is currently implemented. Since init() is handled by the
normal driver model probe() method, we don't need to implement that. Also
rename the transfer method to xfer() which is a less clumbsy name.
Once all drivers and users are converted to driver model we can remove the
old code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard<christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:30 +0000 (18:31 -0600)]
tpm: tpm_tis_i2c: Tidy up delays
Use a _US suffix for microseconds and a _MS suffic for milliseconds. Move
all timeouts and delays into one place. Use mdelay() instead of udelay()
where appropriate.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard <christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:29 +0000 (18:31 -0600)]
tpm: tpm_tis_i2c: Use a consistent tpm_tis_i2c_ prefix
Use the same prefix on each function for consistency.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard <christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:28 +0000 (18:31 -0600)]
tpm: tpm_tis_i2c: Simplify init code
Move all the init and uninit code into one place.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard<christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:27 +0000 (18:31 -0600)]
tpm: tpm_tis_i2c: Move definitions into the header file
Some definitions are in the C file and some are in the header file. Move
everything into the header file for consistency and to reduce clutter.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:26 +0000 (18:31 -0600)]
tpm: tpm_tis_i2c: Merge struct tpm into tpm_chip
There are too many structures storing the same sort of information. Move the
fields from struct tpm into struct tpm_chip and remove the former struct.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:25 +0000 (18:31 -0600)]
tpm: tpm_tis_i2c: Merge struct tpm_dev into tpm_chip
There are too many structures storing the same sort of information. Move the
fields from struct tpm_dev into struct tpm_chip and remove the former
struct.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:24 +0000 (18:31 -0600)]
tpm: tpm_tis_i2c: Drop struct tpm_vendor_specific
This function is misnamed since it only applies to a single driver. Merge
its fields into its parent.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:23 +0000 (18:31 -0600)]
tpm: tpm_tis_i2c: Drop unnecessary methods
The function methods in struct tpm_vendor_specific just call local functions.
Change the code to use a direct call.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:22 +0000 (18:31 -0600)]
tpm: Move the I2C TPM code into one file
The current Infineon I2C TPM driver is written in two parts, intended to
support use with other I2C devices. However we don't have any users and the
Atmel I2C TPM device does not use this file.
We should simplify this and remove the unused abstration. As a first step,
move the code into one file.
Also the name tpm_private.h suggests that the header file is generic to all
TPMs but it is not. Rename it indicate that it relates only to this driver
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:21 +0000 (18:31 -0600)]
tpm: Convert drivers to use SPDX
Add an SPDX header to two drivers that don't have it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard <christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:20 +0000 (18:31 -0600)]
tpm: Convert board config TPM options to Kconfig
Convert all TPM options to Kconfig and tidy up.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard <christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:19 +0000 (18:31 -0600)]
tpm: Add Kconfig options for TPMs
Add new Kconfig options for TPMs in preparation for moving boards to use
Kconfig for TPM configuration.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard<christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:18 +0000 (18:31 -0600)]
tpm: Drop two unused options
The address of the I2C TPM is now defined in the device tree so there is no
need for the CONFIG options.
Remove them from the README and board config to avoid confusion.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard <christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:17 +0000 (18:31 -0600)]
tpm: Remove old pre-driver-model I2C code
This is not used anymore by any board so drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard <christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Misha Komarovskiy [Tue, 25 Aug 2015 08:53:26 +0000 (11:53 +0300)]
exynos: Rise ARM voltage to 1.1V for chained bootloaders
If board uses downstream Chrome OS U-Boot as first stage
bootloader and upstream version is chained second stage,
1.1V is minimum voltage borderline.
Signed-off-by: Misha Komarovskiy <zombah@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 23 Aug 2015 00:28:01 +0000 (18:28 -0600)]
buildman: Correct 'Series-cover-cc' detection logic
This requires 'Series-cover_cc' at present which is incorrect. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 21 Aug 2015 05:44:16 +0000 (22:44 -0700)]
drivers: kconfig: Sort driver menu in alphabetical order
Sort different types of drivers in alphabetical order.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 21 Aug 2015 05:44:15 +0000 (22:44 -0700)]
drivers: kconfig: Move PHYS_TO_BUS to "Device Drivers" menu
Right now PHYS_TO_BUS shows in the Kconfig main menu, move it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 21 Aug 2015 05:44:14 +0000 (22:44 -0700)]
drivers: kconfig: Move "Generic Driver Options" menu to the top
Make "Generic Driver Options" menu show on the top in the Kconfig.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Sun, 2 Aug 2015 23:15:48 +0000 (01:15 +0200)]
dm: core: Add Kconfig for simple bus driver
Add Kconfig entries for the simple-bus driver, both for U-Boot
and for SPL. The simple-bus is enabled by default in U-Boot and
disabled by default in SPL to preserve the original behavior.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Modified to fit on top of Masahiro's $(SPL) setup:
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 11 Aug 2015 14:33:29 +0000 (08:33 -0600)]
dm: Use dev_get_addr() where possible
This is a convenient way for a driver to get the hardware address of a
device, when regmap or syscon are not being used. Change existing callers
to use it as an example to others.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Masahiro Yamada [Mon, 10 Aug 2015 16:09:43 +0000 (01:09 +0900)]
dm: simplify uclass_foreach_dev() implementation
This can be simply written with list_for_each_entry(), maybe
this macro was not necessary in the first place.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Fri, 28 Aug 2015 13:33:15 +0000 (22:33 +0900)]
ARM: dts: uniphier: add ProXstream2 and PH1-LD6b SoC/board support
Initial version of DTSI for ProXstream2 and PH1-LD6b and DTS for
PH1-LD6b reference board.
Import from Linux with some adjustments:
- Use SPDX-License-Identifier
- Add clock-frequency to serial nodes
- Drop unusable nodes from -ref.dts
While I am here, sort Makefile entries alphabetically.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 28 Aug 2015 13:33:14 +0000 (22:33 +0900)]
ARM: dts: uniphier: add PH1-Pro5 SoC support
Initial version of UniPhier PH1-Pro5 device tree.
(Imported from Linux with adjustment for SPDX License Identifier)
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 28 Aug 2015 13:33:13 +0000 (22:33 +0900)]
ARM: dts: uniphier: sync with Linux
This commit imports device tree updates from Linux. It eventually
adds pinctrl-related nodes and properties.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 28 Aug 2015 11:13:19 +0000 (20:13 +0900)]
serial: uniphier: drop platform data support
This driver is enabled only for UniPhier SoCs and ARCH_UNIPHIER now
selects OF_CONTROL and SPL_OF_CONTROL.
This driver no longer needs to support platform data configuration.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Fri, 28 Aug 2015 11:13:18 +0000 (20:13 +0900)]
ARM: uniphier: enable SPL_OF_CONTROL
Device Tree really improves code maintainability and is now
available for SPL too.
This is the state-of-the-art implementation in U-boot.
The board files (platform data) are no longer needed.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Fri, 28 Aug 2015 11:13:17 +0000 (20:13 +0900)]
ARM: uniphier: select SPL_DM rather than default in defconfig
Now UniPhier SoCs highly depend on Driver Model for SPL, too.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 28 Aug 2015 06:38:17 +0000 (15:38 +0900)]
ARM: uniphier: remove unused macro
This macro is not referenced at all.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 28 Aug 2015 06:37:17 +0000 (15:37 +0900)]
ARM: uniphier: fix build error when CONFIG_DEBUG_LL is defined
The build error happens if CONFIG_DEBUG_LL and CONFIG_MACH_PH1_SLD3
are both enabled.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 27 Aug 2015 09:52:36 +0000 (18:52 +0900)]
mtd: denali_spl: do not allocate page_buffer in .bss section
Since commit
2580a2a7e719 ("mtd: nand: Increase max sizes of OOB and
Page size"), three boards (ph1_ld4, ph1_pro4, ph1_sld8) fail to build
with the following error message:
arm-linux-gnueabi-ld.bfd: SPL image plus BSS too big
They compile drivers/mtd/nand/denali_spl.c and it has a page_buffer
as static data:
static uint8_t page_buffer[NAND_MAX_PAGESIZE];
This buffer required 8KB in .bss section before that commit and now
it has been increased to 16KB. Given limited code/memory size for SPL,
it is not a good idea to allocate a page buffer statically. In the
first place, the load address 'dst' can be used as a page buffer.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tom Rini [Wed, 26 Aug 2015 19:18:30 +0000 (15:18 -0400)]
tools/atmelimage.c: Fix warning when debug is enabled
Otherwise we get:
tools/atmelimage.c:134:3: warning: format ‘%d’ expects argument of type ‘int’, but argument 2 has type ‘size_t’ [-Wformat=]
debug("atmelimage: interrupt vector #%d is 0x%08X\n", pos+1,
^
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Kishon Vijay Abraham I [Wed, 19 Aug 2015 10:46:28 +0000 (16:16 +0530)]
ARM: OMAP5/AM43xx: remove enabling USB clocks from enable_basic_clocks()
Now that we have separate function to enable USB clocks, remove
enabling USB clocks from enable_basic_clocks(). Now board_usb_init()
should take care to invoke enable_usb_clocks() for enabling
USB clocks.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Kishon Vijay Abraham I [Wed, 19 Aug 2015 10:46:27 +0000 (16:16 +0530)]
board: ti: invoke clock API to enable and disable clocks
invoke enable_usb_clocks during board_usb_init and disable_usb_clocks
during board_usb_exit to enable and disable clocks respectively.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Kishon Vijay Abraham I [Wed, 19 Aug 2015 10:46:26 +0000 (16:16 +0530)]
ARM: AM43xx: Add functions to enable and disable USB clocks
Added functions to enable and disable USB clocks which can be invoked
during USB init and USB exit respectively.
Cc: Roger Quadros <rogerq@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Nishanth Menon <nm@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Kishon Vijay Abraham I [Wed, 19 Aug 2015 10:46:25 +0000 (16:16 +0530)]
ARM: OMAP5: Add functions to enable and disable USB clocks
Added functions to enable and disable USB clocks which can be invoked
during USB init and USB exit respectively.
Cc: Roger Quadros <rogerq@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Nishanth Menon <nm@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Kishon Vijay Abraham I [Wed, 19 Aug 2015 08:43:20 +0000 (14:13 +0530)]
board: ti: OMAP5: added USB initializtion code
Implemented board_usb_init(), board_usb_cleanup() and
usb_gadget_handle_interrupts() in omap5 board file that
can be invoked by various gadget drivers.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Kishon Vijay Abraham I [Wed, 19 Aug 2015 08:43:19 +0000 (14:13 +0530)]
board: ti: beagle_x15: added USB initializtion code
Implemented board_usb_init(), board_usb_cleanup() and
usb_gadget_handle_interrupts() in beagle_x15 board file that
can be invoked by various gadget drivers.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Kishon Vijay Abraham I [Mon, 10 Aug 2015 11:22:58 +0000 (16:52 +0530)]
include: configs: am43xx_evm: add 'usb stop' in usbboot env
The usbboot environment variable has 'usb start' command but
doesn't have the corresponding 'usb stop' command. This breaks
usb peripheral mode if tried after 'run usbboot' fails to load
the images in usb host mode.
Fix it here by adding 'usb stop' command in usbboot env.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Kishon Vijay Abraham I [Mon, 10 Aug 2015 11:22:57 +0000 (16:52 +0530)]
board: ti: remove duplicate initialization of vbus_id_status
vbus_id_status is initialized in board_usb_init. So remove it
while creating dwc3_device objects.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Kishon Vijay Abraham I [Mon, 10 Aug 2015 11:22:56 +0000 (16:52 +0530)]
TI PHY: Add support to control 2nd USB PHY in DRA7xx/AM57xx
Added support to power on/power off the second USB PHY present in
DRA7xx and AM57xx.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Kishon Vijay Abraham I [Mon, 10 Aug 2015 11:22:55 +0000 (16:52 +0530)]
ARM: DRA7: Enable clocks for USB OTGSS2 and USB PHY2
Enabled clocks for the second dwc3 controller and second USB PHY present in
DRA7.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Kishon Vijay Abraham I [Mon, 10 Aug 2015 11:22:54 +0000 (16:52 +0530)]
usb: dwc3: dwc3-omap: Use the clear register inorder to clear the interrupts
Writing "0x00" to the USBOTGSS_IRQENABLE_SET_MISC and
USBOTGSS_IRQENABLE_SET_0 doesn't disable the interrupts. Used
USBOTGSS_IRQENABLE_CLR_MISC and USBOTGSS_IRQENABLE_CLR_0 instead.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Andreas Bießmann [Fri, 28 Aug 2015 08:29:55 +0000 (10:29 +0200)]
Makefile: fix SOURCE_DATE_EPOCH for *BSD host
The SOURCE_DATE_EPOCH mechanism for reproducible builds require some date(1)
with -d switch to print the relevant date and time strings of another point of
time.
In other words it requires some date(1) that behaves like the GNU date(1) [1].
The BSD date(1) [2] on the other hand has the same switch but with a different
meaning.
Respect this and check the date(1) abilities before usage, error on non
working version. Use the well known pre- and suffixes for the GNU variant of
a tool on *BSD hosts to search for a working date(1) version.
[1] http://man7.org/linux/man-pages/man1/date.1.html [2]
http://www.freebsd.org/cgi/man.cgi?query=date
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Andreas Bießmann [Tue, 25 Aug 2015 07:48:16 +0000 (09:48 +0200)]
picosam9g45: adopt CONFIG_SYS_PROMPT
Commit
181bd9dc61d2da88b78f1c1138a685dae39354d6 introduced Kconfig selection
for SYS_PROMPT. When applying the new picosam9g45 board this change slipped
through, adopt it.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Andreas Bießmann [Wed, 19 Aug 2015 08:32:20 +0000 (10:32 +0200)]
at91sam9260ek: add missing files to MAINTAINERS
This fixes the following genboardscfg.py warnings:
---8<---
WARNING: no status for 'at91sam9g20ek_2mmc'
WARNING: no maintainers for 'at91sam9g20ek_2mmc'
--->8---
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Andreas Bießmann [Wed, 19 Aug 2015 08:31:31 +0000 (10:31 +0200)]
at91sam9rlek: add missing files to MAINTAINERS
This fixes following genboardscfg.py warning:
---8<---
WARNING: no status for 'at91sam9rlek_mmc'
WARNING: no maintainers for 'at91sam9rlek_mmc'
--->8---
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Paul Kocialkowski [Thu, 27 Aug 2015 08:46:09 +0000 (10:46 +0200)]
omap-common: SYS_BOOT fallback logic correction and support for more devices
The SYS_BOOT-based fallback shouldn't only check for one of the conditions of
use and then let the switch/case handle each boot device without enforcing the
conditions for each type of boot device again.
For instance, this behaviour would trigger the fallback for UART when
BOOT_DEVICE_UART is defined, CONFIG_SPL_YMODEM_SUPPORT is enabled (which should
be a show-stopper) and e.g. BOOT_DEVICE_USB is enabled and not
CONFIG_SPL_USB_SUPPORT.
Separating the logic for USB and UART solves this.
In addition, this adds support for more peripheral devices (USBETH and CPGMAC)
to the fallback mechanism. Note that the USBETH boot device should always be
different from the USB boot device (each should match a different bootrom
handoff case).
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Acked-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Tested-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Marcel Ziswiler [Tue, 18 Aug 2015 11:06:37 +0000 (13:06 +0200)]
mtd/nand/ubi: assortment of alignment fixes
Various U-Boot adoptions/extensions to MTD/NAND/UBI did not take buffer
alignment into account which led to failures of the following form:
ERROR: v7_dcache_inval_range - start address is not aligned - 0x1f7f0108
ERROR: v7_dcache_inval_range - stop address is not aligned - 0x1f7f1108
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Scott Wood <scottwood@freescale.com>
[trini: Add __UBOOT__ hunk to lib/zlib/zutil.c due to malloc.h in common.h]
Signed-off-by: Tom Rini <trini@konsulko.com>
Stefan Roese [Tue, 18 Aug 2015 07:27:20 +0000 (09:27 +0200)]
arm: spear: Some changes / updates to the x600 config header
This patch brings the following changes to the x600 board support:
- Add USB EHCI support
- Add VFAT support for USB key file access
- Increase malloc size (for UBI / UBIFS usage)
- Enable Thumb mode to save some image space
- Remove unreferenced CONFIG_STACKSIZE
- Remove unreferenced CONFIG_SPL_NO_PRINTF
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Vipin Kumar <vk.vipin@gmail.com>
Stefan Roese [Tue, 18 Aug 2015 07:27:19 +0000 (09:27 +0200)]
arm: spear: Enable caches on SPEAr
The designware ethernet driver supports d-cache now. So there is nothing
stopping us now to enable the caches completely on SPEAr.
Tested on SPEAr600 x600 board.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Vipin Kumar <vk.vipin@gmail.com>
Stefan Roese [Tue, 18 Aug 2015 07:27:17 +0000 (09:27 +0200)]
arm: spear: Move to common SPL infrastructure
The SPL implementation for SPEAr600 is older than the common SPL
infrastructure. This patch now moves the SPEAr600 SPL over to the
common SPL code.
Tested on the only SPEAr board that currently uses SPL in mainline
U-Boot, the x600.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Vipin Kumar <vk.vipin@gmail.com>
Stefan Roese [Tue, 18 Aug 2015 07:27:16 +0000 (09:27 +0200)]
arm: spear: Fix booting - relocate vector table to 0 (low-vector)
Booting SPEAr600 eval board doesn't work with current mainline U-Boot. With
this patch the low-vector bit is left to '0'. Resulting in the common
relocation of the vectors to 0 (SDRAM) to work correctly.
Tested on the SPEAr600 EVB.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Vipin Kumar <vk.vipin@gmail.com>
Lokesh Vutla [Mon, 17 Aug 2015 14:28:34 +0000 (19:58 +0530)]
ARM: k2l: Fix device speeds
ARM supported speeds and init value of core_pll for SDP1200
are programmed wrong as part for the device speed cleanups.
Fixing it here.
Thanks to "Vitaly Andrianov <vitalya@ti.com>" for bisecting this issue
Fixes:
c37ed9f11b61 ("ARM: keystone2: Fix dev and arm speed detection")
Tested-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Mon, 17 Aug 2015 14:24:52 +0000 (19:54 +0530)]
ARM: keystone2: Update README
Update README to include uart boot mode support and makefile
changes.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Mon, 17 Aug 2015 14:24:51 +0000 (19:54 +0530)]
ARM: keystone2: Build MLO by default
MLO(NAND/MMC boot image), is used for all the ks2 platforms.
Enabling it in config.mk so that these images will be automatically
built upon calling make. u-boot-spi.gph is already the build target,
so not including here.
Reported-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Mon, 17 Aug 2015 14:24:50 +0000 (19:54 +0530)]
ARM: keystone2: Rename u-boot-nand.gph to MLO
NAND boot mode, ROM expects an image with a gp header in the
beginning and an 8bytes filled with zeros at the end. The same is
true for SD boot on K2G platforms but the file name should be MLO.
Renaming u-boot-nand.gph to MLO, so that same image can be used for
NAND and SD boots. And also not including all the u-boot only images
under CONFIG_SPL_BUILD.
Reported-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Nishanth Menon [Mon, 17 Aug 2015 14:24:49 +0000 (19:54 +0530)]
ARM: keystone2: move the custom build rules out to keystone specific makefile
Keystone has build rules introduced by commit
ef509b9063fb7 ("k2hk: add
support for k2hk SOC and EVM") and commit
0e7f2dbac6ead ("keystone: add
support for NAND gpheader image").
These are not reused by other platforms for the build, hence there is no
clear benefit is maintaining them in the generic makefile as a build
target. move these to the keystone specific make option
Original idea of using config.mk by Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Mon, 17 Aug 2015 14:24:48 +0000 (19:54 +0530)]
ARM: keystone2: configs: Move SP to end of u-boot section
Currently u-boot stack is defined at the beginning of MSMC RAM.
This is a problem for uart boot mode as ROM downloads directly to
starting of MSMC RAM.
Fixing it by moving stack to the end of u-boot section and shifting
SYS_TEXT_BASE to the start of MSMC RAM.
Updated division of MSMC RAM is shown below:
-----------------------------------------
| | | |
| U-Boot text |U-Boot | SPL text |
| download | Stack | Download + |
| | | SPL_BSS + |
| | | SPL_STACK |
-----------------------------------------
[1] [2] [3] [4]
[1] SYS_TEXT_BASE (Start of MSMC RAM)
[2] SPL_TEXT_BASE - GBL_DATA_SIZE
[3] SPL_TEXT_BASE
[4] END of SPL
[1] + [2] is at least 1M on all platforms, so no chance of overlap.
Reviewed-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Hans de Goede [Sat, 15 Aug 2015 18:05:01 +0000 (20:05 +0200)]
env_mmc: Properly prefix mmc errors with '!'
The set_default_env() function from env_common.c expects either
a fully formatted error msg, e.g.: "## Resetting to default environment\n"
or an error msg prefixed with an !, in which case it will format it.
Fix the init_mmc_for_env() error messages to be prefixed with a !
this changes the bootup-log on sunxi when no mmc card is found from:
MMC: SUNXI SD/MMC: 0
No MMC card foundIn: serial
Out: serial
To:
MMC: SUNXI SD/MMC: 0
*** Warning - No MMC card found, using default environment
In: serial
Out: serial
Which clearly is how things should look.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Simon Glass [Fri, 14 Aug 2015 19:26:43 +0000 (13:26 -0600)]
malloc_simple: Correct the alignment logic in memalign_simple()
This should use the align parameter, not bytes. Natural alignment is one
use case but should not be the only one supported by this function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Ulf Magnusson [Thu, 13 Aug 2015 17:55:40 +0000 (19:55 +0200)]
kconfiglib: update to the latest version
Corresponds to ba71a0e (Fix _parse_block() 'parent' documentation re.
ifs.) from upstream, just adding the SPDX tag.
Has performance improvements, code cleanup, Python 3 support, and various
small fixes, including the following:
- Unset user values when loading a zero-byte .config. (5e54e2c)
- Ignore indented .config assignments. (f8a7510)
- Do not require $srctree to be set for non-kernel projects. (d56e9c1)
- Report correct locations in the presence of continuation lines.
(0cebc87)
Signed-off-by: Ulf Magnusson <ulfalizer@gmail.com>
Nishanth Menon [Thu, 13 Aug 2015 14:51:00 +0000 (09:51 -0500)]
ARM: DRA74-evm: Use SMA_1 spare register to workaround DP83865 phy on SR2.0
DP83865 ethernet phy used on DRA74x-evm is quirky and the datasheet
provided IODELAY values for standard RGMII phys do not work.
Silicon Revision(SR) 2.0 provides an alternative bit configuration
that allows us to do a "gross adjustment" to launch the data off a
different internal clock edge. Manual IO Delay overrides are still
necessary to fine tune the clock-to-data delays. This is a necessary
workaround for the quirky ethernet Phy we have on the platform.
NOTE: SMA registers are spare "kitchen sink" registers that does
contain bits for other workaround as necessary as well. Hence the
control for the same is introduced in a generic SoC specific, board
generic location.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Nishanth Menon [Thu, 13 Aug 2015 14:50:59 +0000 (09:50 -0500)]
ARM: DRA74-evm: Add iodelay values for SR2.0
Silicon revision 2.0 has new signal routing hence has an updated set of
iodelay parameters to be used. Update the configuration for the same.
Padmux remains the same.
Based on data from VayuES2_EVM_Base_Config-
20150807.
NOTE: With respect to the RGMII values, the Manual IODelay values
are used for the fine adjusments needed to meet the tight RGMII
specification.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Nishanth Menon [Thu, 13 Aug 2015 14:50:58 +0000 (09:50 -0500)]
ARM: DRA7: Add detection of ES2.0
Add support for detection of ES2.0 version of DRA7 family of
processors. ES2.0 is an incremental revision with various fixes
including the following:
- reset logic fixes
- few assymetric aging logic fixes
- MMC clock rate fixes
- Ethernet speed fixes
- edma fixes for mcasp
[ravibabu@ti.com: posted internal for an older bootloader]
Signed-off-by: Ravi Babu <ravibabu@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Chris Packham [Thu, 13 Aug 2015 06:08:27 +0000 (18:08 +1200)]
Makefile: Use correct timezone for U_BOOT_TZ
When building with SOURCE_DATE_EPOCH the timezone is in UTC. When
building normally the timezone is taken from the build machine's locale
setting.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Paul Kocialkowski <contact@paulk.fr>
Tested-by: Andreas Bießmann <andreas.devel@googlemail.com>
Suriyan Ramasami [Tue, 18 Aug 2015 16:25:33 +0000 (09:25 -0700)]
lib/display_options: Fix print_freq
Build without CONFIG_SPL_SERIAL_SUPPORT does not print the cpu freq.
I have seen this in the odroid U3 board, where on boot one sees this:
CPU: Exynos4412 @ GHz
instead of:
CPU: Exynos4412 @ 1 GHz
I am assuming that this change was done to get rid of compiler
warnings related to unused variables when building with
CONFIG_SPL_SERIAL_SUPPORT not being defined in an SPL build.
Signed-off-by: Suriyan Ramasami <suriyan.r@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Kun-Hua Huang [Mon, 24 Aug 2015 06:52:36 +0000 (14:52 +0800)]
NDS32: Generic Board Support and Unsupport
Remove ag101 and ag102 support
Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>
Kun-Hua Huang [Mon, 24 Aug 2015 06:52:35 +0000 (14:52 +0800)]
NDS32: Generic Board Support and Unsupport
Add nds32 ag101p generic board support.
Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>
Jonathan Liu [Sat, 22 Aug 2015 10:27:17 +0000 (20:27 +1000)]
rpi: set fdt_addr_r to 0x00000100 to match default device_tree_address
Raspberry Pi by default loads the FDT to 0x00000100 so set fdt_addr_r to
match and move scriptaddr to 0x02000000 to avoid clobbering the FDT.
Signed-off-by: Jonathan Liu <net147@gmail.com>
Thierry Reding [Thu, 20 Aug 2015 09:45:43 +0000 (11:45 +0200)]
image: Fix loop condition to avoid warning
GCC 5.1 starts warning for comparisons such as !a > 0, assuming that the
negation was meant to apply to the whole expression rather than just the
left operand.
Indeed the comparison in the FIT loadable code is confusingly written,
though it does end up doing the right thing. Rewrite the condition to be
more explicit, that is, iterate over strings until they're exhausted.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Wed, 26 Aug 2015 21:48:05 +0000 (17:48 -0400)]
Merge git://git.denx.de/u-boot-x86
Bin Meng [Mon, 24 Aug 2015 08:14:04 +0000 (01:14 -0700)]
dm: pci: Document binding of pci device drivers
Document how pci devices are bound to device drivers.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 24 Aug 2015 08:14:03 +0000 (01:14 -0700)]
x86: crownbay: Support Topcliff integrated pci uart devices with driver model
In order to make a pci uart device node to be properly bound to its
driver, we need make sure its parent node has a compatible string
which matches a driver that scans all of its child device nodes in
the device tree.
Change all pci bridge nodes under root pci node to use "pci-bridge"
compatible driver, as well as corresponding <reg> properties to
indicate its devfn. At last, adding "u-boot,dm-pre-reloc" to each
of these nodes for driver model to initialize them before relocation.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 24 Aug 2015 08:14:02 +0000 (01:14 -0700)]
dm: core: Fix code reentrancy issue in device_probe_child()
The device might have already been probed during the call to
device_probe() on its parent device (e.g. PCI bridge devices).
In its parent device's probe routine, it might probe all of
its child devices via device_probe() thus the codes reenter
device_probe_child(). To support code reentrancy, test these
allocated memory against NULL to avoid memory leak, and return
to the caller if dev->flags has DM_FLAG_ACTIVATED set after
device_probe() returns, so that we don't mess up the device.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 24 Aug 2015 08:14:01 +0000 (01:14 -0700)]
dm: pci: Optimize pci_uclass_post_bind()
If there is no pci device listed in the device tree,
don't bother scanning the device tree.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 24 Aug 2015 08:00:09 +0000 (01:00 -0700)]
video: ct69000: Remove unused codes
Remove unused CONFIG_USE_CPCIDVI wrapped codes.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Bin Meng [Mon, 24 Aug 2015 08:00:08 +0000 (01:00 -0700)]
x86: crownbay: Enable on-board SMSC superio keyboard controller
So far we only enabled one legacy serial port on the SMSC LPC47m
superio chipset on Intel Crown Bay board. As the board also has
dual PS/2 ports routed out, enable the keyboard controller which
is i8042 compatible so that we can use PS/2 keyboard and mouse.
In order to make PS/2 keyboard work with the VGA console, remove
CONFIG_VGA_AS_SINGLE_DEVICE. To boot Linux kernel with PIC mode
using PIRQ routing table, adjust the mask in the device tree to
reserve irq12 which is used by PS/2 mouse.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 24 Aug 2015 08:00:07 +0000 (01:00 -0700)]
video: cfb_console: Allow VGA device to work without i8042 keyboard
So far if CONFIG_VGA_AS_SINGLE_DEVICE is not defined, the VGA device
will try to initialize a keyboard device (for x86, it is i8042). But
if i8042 controller initialization fails (eg: there is no keyboard
connected to the PS/2 port), drv_video_init() just simply returns.
This kills the opportunity of using a usb keyboard later with the vga
console, as the vga initialization part is actually ok, only keyboard
part fails. Change the code logic to allow this.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Bin Meng [Mon, 24 Aug 2015 08:00:06 +0000 (01:00 -0700)]
x86: i8042: Correctly initialize the controller
The existing i8042 keyboard controller driver has some issues.
First of all, it does not issue a self-test command (0xaa) to the
controller at the very beginning. Without this, the controller
does not respond to any command at all. Secondly, it initializes
the configuration byte register to turn on the keyboard's interrupt,
as U-Boot does not normally allow interrupts to be processed.
Finally, at the end of the initialization routine, it wrongly
sets the controller to disable all interfaces including both
keyboard and mouse.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 24 Aug 2015 08:00:05 +0000 (01:00 -0700)]
x86: i8042: Clean up the driver per coding convention
- Rename CamelCase variables to conform U-Boot coding convention
- Rename wait_until_kbd_output_full() to kbd_output_full()
- Change to use macros for i8042 command and control register bits
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 24 Aug 2015 08:00:04 +0000 (01:00 -0700)]
x86: i8042: Reorder static functions
Reorder those static function so that their declarations
can be removed.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 24 Aug 2015 08:00:03 +0000 (01:00 -0700)]
x86: i8042: Remove unused codes
Remove unused CONFIG_USE_CPCIDVI wrapped codes.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 22 Aug 2015 21:58:59 +0000 (15:58 -0600)]
x86: gpio: Tidy up gpio_ich6_get_base() and callers
This function can return an error. Correct the detection of this error so
that it works even with large 32-bit addresses.
The return value is set up for returning an I/O address but the function is
also used to return a memory-mapped address. Adjust the return code to make
this work.
Also add a bit more debugging.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 22 Aug 2015 21:58:58 +0000 (15:58 -0600)]
x86: gpio: Correct calls to _ich6_gpio_set_direction()
These calls seem to be incorrect. The function expects an I/O address but
the existing callers pass the value at an I/O address. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 22 Aug 2015 21:58:56 +0000 (15:58 -0600)]
x86: minnowmax: Correct pad-offset value for host_en1
This should be 0x250, not 0x258. Fix it.
Reported-by: Andrew Bradford <andrew.bradford@kodakalaris.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 22 Aug 2015 21:58:55 +0000 (15:58 -0600)]
dm: pci: Add a comment to help find pci_hose_read_config_byte, etc.
These functions are defined by macros so do not show up with grep. Add
a comment to help.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>