Dmitri Gribenko [Thu, 22 Sep 2022 15:09:58 +0000 (17:09 +0200)]
Fix -Wunused-local-typedef warning in some build configurations
Amara Emerson [Thu, 22 Sep 2022 14:41:27 +0000 (15:41 +0100)]
[GlobalISel] Enforce G_ASSERT_ALIGN to have a valid alignment > 0.
Nikita Popov [Wed, 14 Sep 2022 15:10:39 +0000 (17:10 +0200)]
[BasicAA] Move experimental.guard modelling to getModRefBehavior()
While we can't express this with attributes yet, we can model
these intrinsics as readonly + writing inaccessible memory (for
the control dependence) in FMRB. This way we don't need to
special-case them in getModRefInfo(), it falls out of the usual
logic.
Nikita Popov [Thu, 22 Sep 2022 14:35:07 +0000 (16:35 +0200)]
[InstCombine] Remove buggy zext of icmp eq with pow2 fold (PR57899)
For the case where the constant is a power of two rather than zero,
the fold is incorrect, because it fails to check that the bit set
in the LHS matches the bit in the RHS.
Rather than fixing this, remove the power of two handling entirely,
as a different fold will already canonicalize such comparisons to
use a zero constant.
Fixes https://github.com/llvm/llvm-project/issues/57899.
Peter Steinfeld [Wed, 21 Sep 2022 20:08:02 +0000 (13:08 -0700)]
[Flang] Finalize IO operations after calling EndIO
The process of passing arguments to IO calls can cause allocations that
get referenced during EndIO calls. Calling "Finalize" causes these
allocations to be deallocated. This means that references to them in
the code in EndIO will be invalid. The fix is to delay the call to
"finalize" until after the call to EndIO.
This particularly causes problems with the IO items are strings that are
produced by calls to functions.
Differential Revision: https://reviews.llvm.org/D134383
Simon Pilgrim [Thu, 22 Sep 2022 13:59:02 +0000 (14:59 +0100)]
[CostModel][X86] Add gep.ll CostKind test coverage
Simon Pilgrim [Thu, 22 Sep 2022 13:51:23 +0000 (14:51 +0100)]
[CostModel][X86] Regenerate gep.ll test checks
Nikita Popov [Thu, 22 Sep 2022 13:59:43 +0000 (15:59 +0200)]
[InstCombine] Add test for PR57899 (NFC)
Joe Loser [Tue, 20 Sep 2022 21:15:26 +0000 (15:15 -0600)]
[clang][docs] Fix supported element types for __builtin_reduce_(add|mul)
The docs mention that `__builtin_reduce_add` and `__builtin_reduce_mul` support
both integer and floating point element types, but only integer element types
are actually supported. See https://github.com/llvm/llvm-project/issues/57847,
and specifically,
https://github.com/llvm/llvm-project/blob/
00874c48ea4d291908517afaab50d1dcbfb016c3/clang/lib/Sema/SemaChecking.cpp#L2631 for the fact that floating point element types are not supported yet.
Fix the docs to only mention support for integer element types.
Matt Arsenault [Wed, 21 Sep 2022 14:42:03 +0000 (10:42 -0400)]
MachineVerifier: Verify REG_SEQUENCE
Somehow there was no verification of this, other than an ad-hoc
assertion in TwoAddressInstructions.
Nikita Popov [Thu, 22 Sep 2022 09:04:22 +0000 (11:04 +0200)]
[InstCombine] Use simplifyWithOpReplaced() for non-bool selects
Perform the simplifyWithOpReplaced() fold even for non-bool
selects. This subsumes a number of recently added folds for
zext/sext of the condition.
We still need to manually handle variations with both sext/zext
and not, because simplifyWithOpReplaced() only performs one
level of replacements.
Erich Keane [Fri, 19 Aug 2022 20:57:45 +0000 (13:57 -0700)]
Re-apply "Deferred Concept Instantiation Implementation"
This reverts commit
95d94a67755620c0a2871ac6f056ca8e9731d5e9.
This implements the deferred concepts instantiation, which should allow
the libstdc++ ranges to properly compile, and for the CRTP to work for
constrained functions.
Since the last attempt, this has fixed the issues from @wlei and
@mordante.
Differential Revision: https://reviews.llvm.org/D126907
Haojian Wu [Thu, 22 Sep 2022 09:50:17 +0000 (11:50 +0200)]
[AST] Better recovery on an expression refers to an invalid decl.
Prior to the patch, we didn't build a DeclRefExpr if the Decl being
referred to is invalid, because many clang downstream AST consumers
assume it, violating it will cause many diagnostic regressions.
With this patch, we build a DeclRefExpr enven for an invalid decl (when the
AcceptInvalidDecl is true), and wrap it with a dependent-type
RecoveryExpr (to prevent follow-up semantic analysis, and diagnostic
regressions).
This is a revised version of https://reviews.llvm.org/D76831
Reviewed By: sammccall
Differential Revision: https://reviews.llvm.org/D121599
Martin Storsjö [Thu, 22 Sep 2022 11:08:45 +0000 (11:08 +0000)]
[LLD] [ELF] Fix building with LLVM_LINK_LLVM_DYLIB since zstd was taken into use
This fixes a regression since
fa74144c64dff6b145b0b3fa9397f913ddaa87bf;
even if we're linking to the dylib (which handles all the dependencies
in LLVMSupport), we're now also directly referencing zstd from
lld/ELF, and thus need to explicitly express our dependency on it.
serge-sans-paille [Thu, 1 Sep 2022 13:15:29 +0000 (15:15 +0200)]
[clang] Rework IsTailPaddedMemberArray into isFlexibleArrayMemberExpr
This fixes a bunch of FIXME within IsTailPaddedMemberArray related code.
As a side effect, this now also triggers a warning when trying to access a
"struct hack" member with an index above address space index range.
Differential Revision: https://reviews.llvm.org/D133108
luxufan [Mon, 19 Sep 2022 03:29:16 +0000 (03:29 +0000)]
[MemorySSA] Reset location size if IsGuaranteedLoopInvariant after phi tranlation
We set the Location size to beforeOrAfter if the Location value is not
guaranteed loop invariant. But in some cases, we need to reset the
location size if the location size is precise after phi tranlation of
location value. This will improve MemorySSA analysis results.
Differential Revision: https://reviews.llvm.org/D134161
Johannes Reifferscheid [Thu, 22 Sep 2022 11:01:28 +0000 (13:01 +0200)]
[mlir] Fix a cast that should be a dyn_cast.
This fixes a crash for certain IR, see the new test case for an
example.
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D134424
Tim Northover [Tue, 20 Sep 2022 14:03:26 +0000 (15:03 +0100)]
AArch64: add support for newer Apple CPUs
They're roughly ARMv8.6. This works in the .td file, but in
AArch64TargetParser.def, marking them v8.6 brings in support for the SM4
cryptographic hash and we don't actually have that. So TargetParser side
they're marked as v8.5, with the extra features (BF16 and I8MM added manually).
Finally, A16 supports the HCX extension in addition to v8.6. This has no
TargetParser implications.
Simon Pilgrim [Thu, 22 Sep 2022 10:24:01 +0000 (11:24 +0100)]
[CostModel][X86] Add partial CostKinds handling for funnelshifts/rotates
This mainly just adds costs for the targets where we have actual funnelshift/rotate instructions (VBMI2/XOP etc.) - the cases where we expand still need addressing, although for many the default shift+or expansion, especially for uniform cases, isn't that bad.
This was achieved with the 'cost-tables vs llvm-mca' script D103695
Clement Courbet [Thu, 22 Sep 2022 09:27:44 +0000 (11:27 +0200)]
Re-land "[llvm-exegesis] Support analyzing results from a different target."
With Mips fixes.
This reverts commit
7daf60e3440b22b79084bb325d823aa3ad8df0f3.
Simon Pilgrim [Thu, 22 Sep 2022 09:19:16 +0000 (10:19 +0100)]
[CostModel][X86] Add CostKinds handling for smax/smin/umax/umin instructions
This was achieved with the 'cost-tables vs llvm-mca' script D103695
Clement Courbet [Thu, 22 Sep 2022 09:18:12 +0000 (11:18 +0200)]
Revert "[llvm-exegesis] Support analyzing results from a different target."
Breaks MIPS compile.
This reverts commit
cc61c822e05c51e494c50d1e72f963750116ef08.
Nikita Popov [Thu, 1 Sep 2022 14:51:00 +0000 (16:51 +0200)]
[AA] Model operand bundles more precisely
Based on D130896, we can model operand bundles more precisely. In
addition to the baseline ModRefBehavior, a reading/clobbering operand
bundle may also read/write all locations. For example, a memcpy with
deopt bundle can read any memory, but only write argument memory.
This means that getModRefInfo() for memcpy with a pointer that does
not alias the arguments results in Ref, rather than ModRef, without
the need to implement any special handling.
Differential Revision: https://reviews.llvm.org/D130980
Clement Courbet [Mon, 12 Sep 2022 08:13:14 +0000 (10:13 +0200)]
[llvm-exegesis] Support analyzing results from a different target.
We were using the native triple to parse the benchmarks. Use the triple
from the benchmarks file.
Right now this still only allows analyzing files produced by the current
target until D133605 is in.
This also makes the `Analysis` class much less ad-hoc.
Differential Revision: https://reviews.llvm.org/D133697
Haojian Wu [Thu, 22 Sep 2022 09:07:25 +0000 (11:07 +0200)]
[pseudo] NFC, Remove an extral blank line.
Nikita Popov [Wed, 21 Sep 2022 09:57:49 +0000 (11:57 +0200)]
[InstSimplify] Support vectors in simplifyWithOpReplaced()
We can handle vectors inside simplifyWithOpReplaced(), as long as
cross-lane operations are excluded. The equality can hold (or not
hold) for each vector lane independently, so we shouldn't use the
replacement value from other lanes.
I believe the only operations relevant here are shufflevector (where
all previous bugs were seen) and calls (which might use shuffle-like
intrinsics and would require more careful classification).
Differential Revision: https://reviews.llvm.org/D134348
serge-sans-paille [Tue, 20 Sep 2022 12:45:11 +0000 (14:45 +0200)]
[BOLT] Fix (part of) dylib compatibility
Non-LLVM components should not be listed as part of LLVM_LINK_COMPONENTS.
Differential Revision: https://reviews.llvm.org/D134278
serge-sans-paille [Thu, 22 Sep 2022 08:41:21 +0000 (10:41 +0200)]
Revert "[bolt] Fix (part of) dylib compatibility"
This reverts commit
34ad83d883cc4505412a7c3e1e3da74e5408aa82.
serge-sans-paille [Tue, 20 Sep 2022 12:45:11 +0000 (14:45 +0200)]
[bolt] Fix (part of) dylib compatibility
Non-LLVM component should not be listed as part of LLVM_LINK_COMPONENTS
Differential Revision: https://reviews.llvm.org/D134278
Ivan Radanov Ivanov [Thu, 22 Sep 2022 08:11:41 +0000 (10:11 +0200)]
[MLIR] Revert default NVIDIA GPU version
Due to integration tests failing revert mlir::SerializeToCubinPass defaults to old ones (changed in https://reviews.llvm.org/D134153)
Reviewed By: akuegel
Differential Revision: https://reviews.llvm.org/D134414
Ilia Diachkov [Tue, 20 Sep 2022 13:40:57 +0000 (16:40 +0300)]
[SPIRV] fix build with clang and use PoisonValue instead of UndefValue
The patch fixes the SPIRV backend build using clang. It also replaces
UndefValue with PoisonValue in SPIRVRegularizer.cpp.
Fixes: #57773
Differential Revision: https://reviews.llvm.org/D134071
Florian Hahn [Thu, 22 Sep 2022 07:49:56 +0000 (08:49 +0100)]
[llvm-reduce] Add test with debug nodes not being removed.
Add a test where llvm-reduce at the moment cannot drop unneeded debug
metadata nodes referenced by DICompileUnit and DISubpgoram.
LLVM GN Syncbot [Thu, 22 Sep 2022 07:29:04 +0000 (07:29 +0000)]
[gn build] Port
32a8260ccc8b
serge-sans-paille [Wed, 21 Sep 2022 14:08:45 +0000 (16:08 +0200)]
[clang] Fix interaction between asm labels and inline builtins
One must pick the same name as the one referenced in CodeGenFunction when
generating .inline version of an inline builtin, otherwise they are not
correctly replaced.
Differential Revision: https://reviews.llvm.org/D134362
Christudasan Devadasan [Thu, 22 Sep 2022 05:19:46 +0000 (10:49 +0530)]
-dot-machine-cfg for printing MachineFunction to a dot file
This pass allows a user to dump a MIR function to a dot file
and view it as a graph. It is targeted to provide a similar
functionality as -dot-cfg pass on LLVM-IR. As of now the pass
also support below flags:
-dot-mcfg-only [optional][won't print instructions in the
graph just block name]
-mcfg-dot-filename-prefix [optional][prefix to add to output dot file]
-mcfg-func-name [optional] [specify function name or it's
substring, handy if mir file contains multiple functions and
you need to see graph of just one]
More flags and details can be introduced as per the requirements
in future. This pass is inspired from -dot-cfg IR pass and APIs
are written in almost identical format.
Patch by Yashwant Singh <Yashwant.Singh@amd.com> (yassingh)
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D133709
Chenbing Zheng [Thu, 22 Sep 2022 07:08:38 +0000 (15:08 +0800)]
[InstCombine] Precommit tests for shl_trunc_icmp. nfc
Juan Manuel MARTINEZ CAAMAÑO [Wed, 21 Sep 2022 13:31:40 +0000 (13:31 +0000)]
[NFC] Remove unused set construction from DILocation::getMergedLocation
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D134357
LiaoChunyu [Thu, 22 Sep 2022 03:53:24 +0000 (11:53 +0800)]
[RelocationResolver] Add R_RISCV_SET{16,32}
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D134408
Craig Topper [Thu, 22 Sep 2022 04:54:03 +0000 (21:54 -0700)]
[RISCV] Replace RISCVISD::GREV/GORC/SHFL/UNSHFL with BREV8/ORC_B/ZIP/UNZIP.
With Zbp removed, we no longer need the generalized forms.
The computeKnownBitsForTargetNode code brev8/orc.b is still based
on the general form with the shift amount forced to 7.
Craig Topper [Thu, 22 Sep 2022 04:04:10 +0000 (21:04 -0700)]
[RISCV] Remove support for the unratified Zbp extension.
This extension does not appear to be on its way to ratification.
Still need some follow up to simplify the RISCVISD nodes.
Congzhe Cao [Thu, 22 Sep 2022 04:00:52 +0000 (00:00 -0400)]
[LoopInterchange][PR57148] Ensure the correct form of IR after transformation
This is a bugfix patch that resolves the following two bugs in loop interchange:
1. PR57148 which is an assertion error due to of loss of LCSSA form after interchange,
as referred to test1() in pr57148.ll.
2. Use before def for the outermost loop induction variables after interchange,
as referred to test2() in pr57148.ll.
The fix in this patch is that:
1. In cases where the LCSSA form is not maintained after interchange, we update the IR
to the LCSSA form again.
2. We split the phi nodes in the inner loop header into a separate basic block to avoid
the situation where use of the outer indvar appears before its def after interchange.
Previously we already did this for innermost loops, now we do it for non-innermost
loops (e.g., middle loops) as well.
Reviewed By: bmahjour, Meinersbur, #loopoptwg
Differential Revision: https://reviews.llvm.org/D132055
Fanchen Kong [Thu, 22 Sep 2022 04:05:44 +0000 (21:05 -0700)]
[WebAssembly] Improve codegen for loading scalars from memory to v128
Use load32_zero instead of load32_splat to load the low 32 bits from memory to
v128. Test cases are added to cover this change.
Reviewed By: tlively
Differential Revision: https://reviews.llvm.org/D134257
Congzhe Cao [Thu, 22 Sep 2022 03:35:10 +0000 (23:35 -0400)]
[LoopPassManager] Ensure to construct loop nests with the outermost loop
This patch is to resolve the bug reported and discussed in
https://reviews.llvm.org/D124926#3718761 and https://reviews.llvm.org/D124926#3719876.
The problem is that loop interchange is a loopnest pass under the new pass manager,
but the loop nest may not be constructed correctly by the loop pass manager after
running loop interchange and before running the next pass, which might cause problems
when it continues running the next pass.
The reason that the loop nest is constructed incorrectly is that the outermost
loop might have changed after interchange, and what was the original outermost
loop is not the current outermost loop anymore. Constructing the loop nest based
on the original outermost loop would generate an invalid loop nest.
The fix in this patch is that, in the loop pass manager before running each loopnest
pass, we re-cosntruct the loop nest based on the current outermost loop, if LPMUpdater
notifies the loop pass manager that the previous loop nest has been invalidated by passes
like loop interchange.
Reviewed By: aeubanks
Differential Revision: https://reviews.llvm.org/D132199
LiaoChunyu [Wed, 21 Sep 2022 13:46:11 +0000 (21:46 +0800)]
[RelocationResolver] Add R_RISCV_SET8
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D134164
Chuanqi Xu [Thu, 22 Sep 2022 02:59:39 +0000 (10:59 +0800)]
[C++] [Coroutines] Prefer aligned (de)allocation for coroutines -
implement the option2 of P2014R0
This implements the option2 of
https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2020/p2014r0.pdf.
This also fixes https://github.com/llvm/llvm-project/issues/56671.
Although wg21 didn't get consensus for the direction of the problem,
we're happy to have some implementation and user experience first. And
from issue56671, the option2 should be the pursued one.
Reviewed By: ychen
Differential Revision: https://reviews.llvm.org/D133341
Corentin Jabot [Tue, 13 Sep 2022 18:09:56 +0000 (20:09 +0200)]
Update Unicode to 15.0
Unicode 15.0 adds 4,489 characters, for a total of 149,186 characters.
These additions include 2 new scripts along with 20 new emoji characters,
and 4,193 CJK ideographs.
This changes modify most existing tables including
- XID_Start/XID_Continue in Clang
- The character name database (used by \N{} in Clang)
- The list of formattable/printable codepoints
- The case folding algorithm (which we had not updated since Unicode 9)
- The list of nonspacing/enclosing marks used by the column width
computation algorithm. The rest of the column width algorithm
is not updated.
Reviewed By: tahonermann
Differential Revision: https://reviews.llvm.org/D133807
Craig Topper [Thu, 22 Sep 2022 01:17:22 +0000 (18:17 -0700)]
[RISCV] Remove some unused Predicates from tablegen. NFC
Specifically predicates for extensions that are subsets of other
extensions. These predicates should never be used. Should always
check the superset extension or the superset ORed with the sub extendsion.
River Riddle [Wed, 21 Sep 2022 20:40:47 +0000 (13:40 -0700)]
[mlir] Flip PDL to use Both accessors
This allows for incrementally updating the old API usages without
needing to update everything at once. PDL will be left on Both
for a little bit and then flipped to prefixed when all APIs have been
updated.
Differential Revision: https://reviews.llvm.org/D134387
River Riddle [Wed, 21 Sep 2022 20:08:26 +0000 (13:08 -0700)]
[mlir] Flip Async/GPU/OpenACC/OpenMP to use Both accessors
This allows for incrementally updating the old API usages without
needing to update everything at once. These will be left on Both
for a little bit and then flipped to prefixed when all APIs have been
updated.
Differential Revision: https://reviews.llvm.org/D134386
Jan Korous [Tue, 13 Sep 2022 21:45:45 +0000 (14:45 -0700)]
[analyzer] Support implicit parameter 'self' in path note
showBRParamDiagnostics assumed stores happen only via function parameters while that
can also happen via implicit parameters like 'self' or 'this'.
The regression test caused a failed assert in the original cast to ParmVarDecl.
Differential Revision: https://reviews.llvm.org/D133815
Vitaly Buka [Sun, 18 Sep 2022 06:44:23 +0000 (23:44 -0700)]
[msan] Instrument vtest instrinsics
Instrumentation just ORs shadow of inputs.
I assume some result shadow bits can be reset if we go into specifics of particular checks,
but as-is it is still an improvement against existing default strict instruction handler, when
every set bit of input shadow is reported as an error.
Reviewed By: kda
Differential Revision: https://reviews.llvm.org/D134123
Craig Topper [Wed, 21 Sep 2022 23:44:02 +0000 (16:44 -0700)]
[RISCV] Add a couple more fp_to_sint_sat/uint_sat tests. NFC
Craig Topper [Wed, 21 Sep 2022 23:16:37 +0000 (16:16 -0700)]
[RISCV] Add tests for fixed vector fp_to_sint_sat/fp_to_sint_sat. NFC
Fangrui Song [Wed, 21 Sep 2022 23:13:25 +0000 (16:13 -0700)]
[test] Fix CodeGen/arm-crc32.c to not write an output to CWD
CWD may be read-only in some testing environments.
Katherine Rasmussen [Tue, 20 Sep 2022 18:48:57 +0000 (11:48 -0700)]
[flang] Write semantics test for atomic_xor
Write a semantics test for the atomic intrinsic subroutine,
atomic_xor.
Reviewed By: rouson
Differential Revision: https://reviews.llvm.org/D134298
Chris Bieneman [Wed, 21 Sep 2022 22:34:39 +0000 (17:34 -0500)]
[NFC] Make dxil namespace consistent
We have namespaces `DXIL` and `dxil`, which is just confusing. This
renames `DXIL` -> `dxil` making everything consistent.
While the LLVM coding standards don't have a clear direction here, I
chose lower case because by my current unscientific count there are
more places where we had the lowercase namespace than the uppercase.
Michael Wyman [Wed, 14 Sep 2022 21:42:30 +0000 (14:42 -0700)]
Remove the unused/undefined `_cmd` parameter in `objc_direct` methods.
When `objc_direct` methods were implemented, the implicit `_cmd` parameter was left as an argument to the method implementation function, but was unset by callers; if the method body referenced the `_cmd` variable, a selector load would be emitted inside the body. However, this leaves an unused argument in the ABI, and is unnecessary.
This change removes the empty/unset argument, and if `_cmd` is referenced inside an `objc_direct` method it will emit local storage for the implicit variable. From the ABI perspective, `objc_direct` methods will have the implicit `self` parameter, immediately followed by whatever explicit arguments are defined on the method, rather than having one unset/undefined register in the middle.
Differential Revision: https://reviews.llvm.org/D131424
Craig Topper [Wed, 21 Sep 2022 22:31:45 +0000 (15:31 -0700)]
[RISCV] Rename RISCVISD::SINT_TO_FP_VL/UINT_TO_FP_VL. NFC
Name them after the instructions VFCVT_RTZ_X(U)_F_VL to make it
clear that the ISD nodes don't have the poison semantics of
ISD::SINT_TO_FP/UINT_TO_FP.
I play to reuse this node for a FP_TO_SINT_SAT/FP_TO_UINT_SAT
patch and need the instruction semantics.
Vitaly Buka [Sun, 18 Sep 2022 03:17:09 +0000 (20:17 -0700)]
[msan] Handle x86_avx_cmp_pd_256 and x86_avx_cmp_ps_256
Removed FIXME which looks irrelevant. The error message happens only without -mattr=+avx.
E.g.
GOOD: opt llvm/test/Instrumentation/MemorySanitizer/avx-intrinsics-x86.ll -passes=msan -o - | llc -O3 -o /dev/null -mattr=+avx
BAD: opt llvm/test/Instrumentation/MemorySanitizer/avx-intrinsics-x86.ll -passes=msan -o - | llc -O3 -o /dev/null
So nothing to fix here.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D134119
Ivan Radanov Ivanov [Wed, 21 Sep 2022 22:10:10 +0000 (18:10 -0400)]
[MLIR] Set default NVIDIA GPU version
Ivan Radanov Ivanov [Wed, 21 Sep 2022 21:56:02 +0000 (17:56 -0400)]
[MLIR] Add a create function for mlir::SerializeToCubinPass
Differential Revision: https://reviews.llvm.org/D134153
Kazu Hirata [Wed, 21 Sep 2022 21:47:23 +0000 (14:47 -0700)]
[Analysis] Make members of InlineCost const (NFC)
Once we create an instance of InlineCost, we don't change its
contents.
Differential Revision: https://reviews.llvm.org/D134388
Philip Reames [Wed, 21 Sep 2022 21:33:04 +0000 (14:33 -0700)]
[TTI] Recognize fp constants in getOperandInfo
We were recognizing vectors of floats, but not scalars. That's a tad odd.
Vitaly Buka [Sun, 18 Sep 2022 03:17:09 +0000 (20:17 -0700)]
[test][msan] Precommit part of D134119
Fangrui Song [Wed, 21 Sep 2022 21:14:45 +0000 (14:14 -0700)]
[Hexagon] Fix -Wunused-variable in non-assertion builds after
f6e7ad56040ee8531be3375e04312d30700a58b2
Florian Mayer [Fri, 3 Jun 2022 21:33:08 +0000 (14:33 -0700)]
[libunwind] Handle G in personality string
Tested with the following program:
```
static volatile int* x = nullptr;
void throws() __attribute__((noinline)) {
if (getpid() == 0)
return;
throw "error";
}
void maybe_throws() __attribute__((noinline)) {
volatile int y = 1;
x = &y;
throws();
y = 2;
}
int main(int argc, char** argv) {
int y;
try {
maybe_throws();
} catch (const char* e) {
//printf("Caught\n");
}
y = *x;
printf("%d\n", y); // should be MTE failure.
return 0;
}
```
Built using `clang++ -c -O2 -target aarch64-linux -fexceptions -march=armv8-a+memtag -fsanitize=memtag-heap,memtag-stack`
Currently only Android implements runtime support for MTE stack tagging.
Without this change, we crash on `__cxa_get_globals` when trying to catch
the exception (because the stack frame __cxa_get_globals frame will fail due
to tags left behind on the stack). With this change, we crash on the `y = *x;`
as expected, because the stack frame has been untagged, but the pointer hasn't.
Reviewed By: #libunwind, compnerd, MaskRay
Differential Revision: https://reviews.llvm.org/D128998
Fangrui Song [Wed, 21 Sep 2022 21:11:15 +0000 (14:11 -0700)]
[Driver] Add --gcc-install-dir=
This option specifies a GCC installation directory such as
/usr/lib/gcc/x86_64-linux-gnu/12, /usr/lib/gcc/x86_64-gentoo-linux-musl/11.2.0 .
It is intended to replace --gcc-toolchain=, which specifies a directory where
`lib/gcc{,-cross}` can be found. When --gcc-toolchain= is specified, the
selected `lib/gcc/$triple/$version` installation uses complex logic and the
largest GCC version is picked. There is no way to specify another version in the
presence of multiple GCC versions.
D25661 added gcc-config detection for Gentoo: `ScanGentooConfigs`.
The implementation may be simplified by using --gcc-install-dir=.
Reviewed By: mgorny
Differential Revision: https://reviews.llvm.org/D133329
Fangrui Song [Wed, 21 Sep 2022 21:09:04 +0000 (14:09 -0700)]
[GlobalISel] Fix std::max after D134380
Jay Foad [Tue, 20 Sep 2022 09:43:40 +0000 (10:43 +0100)]
AMDGPU: Stop validating earlyclobber operands in assembler
This validation was introduced in D34003 for v_qsad/v_mqsad instructions
but it applies to all instructions with earlyclobber operands, which now
includes v_mad_i64/v_mad_u64.
In all these cases I do not think there is documentation saying that the
destination must not overlap the sources. Rather there are *some* cases
where the instruction may not function correctly if there is an overlap,
and we are using earlyclobber as a conservative way of preventing
codegen from generating those cases.
I think it is unhelpful for the assembler to enforce the earlyclobber
restriction because it prevents assembling cases where the programmer
knows that in fact the overlap is safe.
See also: https://github.com/llvm/llvm-project/issues/57610
Differential Revision: https://reviews.llvm.org/D134272
Amara Emerson [Wed, 21 Sep 2022 19:37:31 +0000 (20:37 +0100)]
[GlobalISel] Fix known bits for G_ASSERT_ALIGN.
I don't know what was going on originally with these tests. It seems reasonable
to have the immediate be the same byte alignment unit as the IR, in which case
we need to take the log2 in order to set the right number of low bits.
This fixes a miscompile in chromium.
Differential Revision: https://reviews.llvm.org/D134380
owenca [Wed, 21 Sep 2022 20:17:28 +0000 (13:17 -0700)]
[clang-format][NFC] Reformat the clang/unittests/Format directory
Also add a .clang-format file to clang/include/clang/Format and
clang/unittests/Format to keep the directories formatted.
Leonard Chan [Wed, 21 Sep 2022 20:13:31 +0000 (20:13 +0000)]
Revert "[llvm] Support forward-referenced globals with dso_local_equivalent"
This reverts commit
411020ad1c15a5f8cdbf674a2a8f845000f761e3.
One of the tests here fails on some upstream builders:
https://lab.llvm.org/buildbot#builders/16/builds/35314
Evgeny Shulgin [Mon, 19 Sep 2022 19:26:03 +0000 (19:26 +0000)]
[Clang] Support case and default labels at end of compound statement
Direct continuation of https://reviews.llvm.org/D133887
Reviewed By: #clang-language-wg, aaron.ballman
Differential Revision: https://reviews.llvm.org/D134207
Aaron Ballman [Wed, 21 Sep 2022 19:31:53 +0000 (15:31 -0400)]
Add tests & update the C99 DR statuses for dr315 and dr316
Leonard Chan [Mon, 19 Sep 2022 23:22:14 +0000 (23:22 +0000)]
[llvm] Support forward-referenced globals with dso_local_equivalent
See https://github.com/llvm/llvm-project/issues/57815.
dso_local_equivalent would fail with an assertion on forward-referenced
globals. This is an issue that only comes up in textual IR, which is why
we've never seen this assertion with clang.
Differential Revision: https://reviews.llvm.org/D134234
Xiang Li [Tue, 20 Sep 2022 23:40:55 +0000 (16:40 -0700)]
[HLSL] Allow SV_GroupIndex for lib profile.
Lib profile could include all kind of entry functions.
Reviewed By: beanz
Differential Revision: https://reviews.llvm.org/D134326
Sanjay Patel [Wed, 21 Sep 2022 18:36:27 +0000 (14:36 -0400)]
[InstCombine] try to fold mul by neg-power-of-2 to shl
`(A * -2**C) + B --> B - (A << C)`
https://alive2.llvm.org/ce/z/A6BWkf
This inverts what Negator was doing before:
D134310 /
0f32a5dea0e9
Analysis and codegen are generally better without multiply,
so we should favor this form even if we trade add for sub
(because those are generally equivalent cost operations).
owenca [Wed, 21 Sep 2022 00:00:05 +0000 (17:00 -0700)]
[clang-format][NFC] Reformat clang/lib/Format using
6257832bf94f
Fix braces and add .clang-format to keep the directory formatted.
Differential Revision: https://reviews.llvm.org/D134329
Aaron Ballman [Wed, 21 Sep 2022 18:51:17 +0000 (14:51 -0400)]
Changing some strange code into an assert; NFC
This code was added in
b65b1f322bd88513586a4539d2b5f18aeb698f3f, but it
was not noticed that the [[fallthrough]] behavior was very wrong. In C
mode, we would set the ParenExprType to CompoundLiteral and then
promptly overwrite that information by falling through.
After some investigation, I convinced myself that it is not possible to
hit this code path in C, only in C++. I've switched it to be an
assertion; I don't expect to hit it, but if we do hit it, that will at
least give us a code example we can use to reason about the intent of
the original code.
Fangrui Song [Wed, 21 Sep 2022 18:55:14 +0000 (11:55 -0700)]
[libclang] Fix -Wswitch after D129883
Fangrui Song [Wed, 21 Sep 2022 18:50:15 +0000 (11:50 -0700)]
[ARM] Check target feature support for __builtin_arm_crc*
`__builtin_arm_crc*` requires the target feature crc which is available on armv8
and above. Calling the fuctions for armv7 leads to a SelectionDAG crash.
```
% clang -c --target=armv7-unknown-linux-gnueabi -c a.c
fatal error: error in backend: Cannot select: intrinsic %llvm.arm.crc32b
PLEASE submit a bug report to ...
```
Add `TARGET_BUILTIN` and define required features for these builtins to
report an error in `CodeGenFunction::checkTargetFeatures`. The problem is quite widespread.
I will add `TARGET_BUILTIN` for more builtins later.
Fix https://github.com/llvm/llvm-project/issues/57802
Differential Revision: https://reviews.llvm.org/D134127
Scott Linder [Wed, 21 Sep 2022 18:48:42 +0000 (18:48 +0000)]
Revert "[NFC][AMDGPU] Refactor AMDGPUDisassembler"
This reverts commit
f5831514612cd9e014e4fc7455b75411531fe6e1.
Fangrui Song [Wed, 21 Sep 2022 18:43:12 +0000 (11:43 -0700)]
[ELF] --pack-dyn-relocs=android: scan relocation serially after D133003
https://reviews.llvm.org/D133003#3806508 can reproduce a non-determinism with
--threads=4. Making the config serial fixes non-determinism (by running the link
many times and compare output).
Siva Chandra Reddy [Wed, 21 Sep 2022 08:13:14 +0000 (08:13 +0000)]
[libc] Add implementations of POSIX getpid, getppid, getuid, geteuid functions.
Reviewed By: lntue
Differential Revision: https://reviews.llvm.org/D134338
Siva Chandra Reddy [Fri, 9 Sep 2022 19:02:28 +0000 (19:02 +0000)]
[libc] Add implementation of functions stat, fstat and lstat.
All supporting type and macro definitions have also been added.
Reviewed By: lntue
Differential Revision: https://reviews.llvm.org/D134262
Krzysztof Parzyszek [Tue, 20 Sep 2022 17:47:55 +0000 (10:47 -0700)]
[Hexagon] Revamp type legalization of ext/trunc/sat in HVX
Resizing operations (e.g. sign extension) in DAG can go from any width
to any other width, e.g. i8 -> i32. If the input and the result differ
by a factor larger than 2, the operation cannot be legal in HVX, since
the only two legal vector sizes in HVX are a single vector and a pair
of vectors.
To simplify the legalization, such operations are expanded into steps
that only double/halve the type size, so that each such step can be fully
legalized on its own. The complication is that DAG will automatically
fold these steps back into one, e.g. sext(sext) -> sext. To prevent that
new HexagonISD nodes are introduced: TL_EXTEND and TL_TRUNCATE. Once
legalized, these nodes are replaced with the original opcodes.
The type legalization is now common to aext/sext/zext/trunc and Hexagon-
specific ssat/usat nodes.
Florian Hahn [Wed, 21 Sep 2022 18:15:39 +0000 (19:15 +0100)]
[AArch64] Try to fold shuffle (tbl2, tbl2) to tbl4.
shuffle (tbl2, tbl2) can be folded into a single tbl4 if the mask for
the selected elements is constant.
Reviewed By: t.p.northover
Differential Revision: https://reviews.llvm.org/D133491
Sanjay Patel [Wed, 21 Sep 2022 17:45:43 +0000 (13:45 -0400)]
[InstCombine] try multi-use demanded bits fold for 'sub'
This is similar to D133788 /
73919a87e9a6, but for sub
the transform is valid only for low zeros in operand 1.
https://alive2.llvm.org/ce/z/EmRsXC
Sanjay Patel [Wed, 21 Sep 2022 17:24:05 +0000 (13:24 -0400)]
[InstCombine] add tests for multi-use sub demanded bits: NFC
Sanjay Patel [Wed, 21 Sep 2022 16:41:54 +0000 (12:41 -0400)]
[InstCombine] add tests for (X * -2**C) + Y; NFC
Fangrui Song [Wed, 21 Sep 2022 18:13:02 +0000 (11:13 -0700)]
[ELF] Parallelize --compress-debug-sections=zstd
See D117853: compressing debug sections is a bottleneck and therefore it
has a large value parallizing the step.
zstd provides multi-threading API and the output is deterministic even with
different numbers of threads (see https://github.com/facebook/zstd/issues/2238).
Therefore we can leverage it instead of using the pigz-style sharding approach.
Also, switch to the default compression level 3. The current level 5
is significantly slower without providing justifying size benefit.
```
'dash b.sh 1' ran
1.05 ± 0.01 times faster than 'dash b.sh 3'
1.18 ± 0.01 times faster than 'dash b.sh 4'
1.29 ± 0.02 times faster than 'dash b.sh 5'
level=1 size:
358946945
level=3 size:
309002145
level=4 size:
307693204
level=5 size:
297828315
```
Reviewed By: andrewng, peter.smith
Differential Revision: https://reviews.llvm.org/D133679
Michael Jones [Tue, 20 Sep 2022 23:58:05 +0000 (16:58 -0700)]
[libc] add fputs and puts
add fputs, puts, and the EOF macro that they use.
Reviewed By: sivachandra
Differential Revision: https://reviews.llvm.org/D134328
Lang Hames [Wed, 21 Sep 2022 18:08:50 +0000 (11:08 -0700)]
[ORC-RT] Fix case on test file suffix.
Testcases expect this file to have an uppercase .S suffix.
Joel E. Denny [Wed, 21 Sep 2022 18:08:10 +0000 (14:08 -0400)]
[lit] Work around another windows issue in new test from
28412d1800e3
Based on result shown at:
<https://lab.llvm.org/buildbot/#/builders/216/builds/10123>
Xiang Li [Wed, 21 Sep 2022 17:55:51 +0000 (10:55 -0700)]
[NFC] Fix build error ignored by MSVC.
John McIver [Wed, 21 Sep 2022 17:55:33 +0000 (10:55 -0700)]
[Utils] Refactor update_cc_test_checks.py to use shutil
The package `distutils` is deprecated and removal is planned for Python 3.12. All calls to `distutils.spawn.find_executable` are replaced with local version of `find_executable` which makes use of `shutils.which`.
Reviewed By: arichardson, MaskRay
Differential Revision: https://reviews.llvm.org/D134015
Guozhi Wei [Wed, 21 Sep 2022 17:51:07 +0000 (17:51 +0000)]
[RegisterCoalescer] Use LiveRangeEdit to handle rematerialization
This patch uses the API provided by LiveRangeEdit to handle rematerialization.
It will make future maintenance and improvement more easier.
No functional change.
Differential Revision: https://reviews.llvm.org/D133610
Arthur Eubanks [Wed, 21 Sep 2022 03:37:49 +0000 (20:37 -0700)]
[gn build] Don't set LLVM_UNREACHABLE_OPTIMIZE when llvm_enable_assertions
llvm_unreachable should properly error out if assertions are enabled.
Reviewed By: thakis
Differential Revision: https://reviews.llvm.org/D134332
Joel E. Denny [Wed, 21 Sep 2022 17:27:41 +0000 (13:27 -0400)]
[lit] Work around windows issue in new test from
28412d1800e3
Based on result shown at:
<https://lab.llvm.org/buildbot/#/builders/216/builds/10120>
LLVM GN Syncbot [Wed, 21 Sep 2022 17:07:56 +0000 (17:07 +0000)]
[gn build] Port
782ac2182c2b