Craig Topper [Wed, 25 Nov 2020 23:07:34 +0000 (15:07 -0800)]
[RISCV] Add an implementation of isFMAFasterThanFMulAndFAdd
Start with an assumption that FMA is faster than Fmul+FAdd. If thats not true
on some particular implementation we can add a tuning parameter in the future.
I've update the fmuladd test cases and added new test cases for fast math flag
based contraction.
Differential Revision: https://reviews.llvm.org/D91987
Craig Topper [Wed, 25 Nov 2020 22:54:26 +0000 (14:54 -0800)]
[SelectionDAGBuilder] Add SPF_NABS support to visitSelect
We currently don't match this which limits the effectiveness of D91120 until
InstCombine starts canonicalizing to llvm.abs. This should be easy to remove
if/when we remove the SPF_ABS handling.
Differential Revision: https://reviews.llvm.org/D92118
Tom Stellard [Wed, 25 Nov 2020 22:43:18 +0000 (14:43 -0800)]
github actions: Use llvmbot token for main branch sync
The default github actions token cannot push to restricted branches, so we need to use a token from the llvmbot user.
David Blaikie [Wed, 25 Nov 2020 21:34:15 +0000 (13:34 -0800)]
DebugInfo: remove unnecessary mtriple from test/DebugInfo/X86/abstract_origin.ll
The test already specifies a triple in the IR itself.
Based on post-commit feedback from Luís Marques.
Louis Dionne [Wed, 25 Nov 2020 21:14:28 +0000 (16:14 -0500)]
[libc++] NFC: Reindent non-lockfree-atomics feature
Eric Astor [Wed, 25 Nov 2020 20:37:00 +0000 (15:37 -0500)]
[ms] [llvm-ml] Implement the expression expansion operator
In text-item contexts, %expr expands to a string containing the results of evaluating `expr`.
Reviewed By: thakis
Differential Revision: https://reviews.llvm.org/D89736
Marius Brehler [Thu, 19 Nov 2020 22:21:00 +0000 (22:21 +0000)]
[mlir] Add build configuration for Quant unittest
Craig Topper [Wed, 25 Nov 2020 20:40:25 +0000 (12:40 -0800)]
[RISCV] Add test cases to check that we use (smax X, (neg X)) for abs with Zbb extension.
Craig Topper [Wed, 25 Nov 2020 20:10:40 +0000 (12:10 -0800)]
[RISCV] Make SMIN/SMAX/UMIN/UMAX legal with Zbb extension.
This is the logically correct thing to do. But it generates worse
code for i32 umin/umax on the rv64 due to type legalize requesting
zext even though the arguments are sext. Maybe we can teach type
legalizer to use sext for umin/umax for RISCV.
It's also producing possibly worse code on i64 on RV32 since we
still end up with selects that become branches. But this seems
like something we could improve in type legalization or DAG combine.
Hopefully this makes D92095 work for RISCV with Zbb.
Louis Dionne [Thu, 12 Nov 2020 20:14:33 +0000 (15:14 -0500)]
[libc++] Factor out common logic for calling aligned allocation
There were a couple of places where we needed to call the underlying
platform's aligned allocation/deallocation function. Instead of having
the same logic all over the place, extract the logic into a pair of
helper functions __libcpp_aligned_alloc and __libcpp_aligned_free.
The code in libcxxabi/src/fallback_malloc.cpp looks like it could be
simplified after this change -- I purposefully did not simplify it
further to keep this change as straightforward as possible, since it
is touching very important parts of the library.
Also, the changes in libcxx/src/new.cpp and libcxxabi/src/stdlib_new_delete.cpp
are basically the same -- I just kept both source files in sync.
The underlying reason for this refactoring is to make it easier to support
platforms that provide aligned allocation through C11's aligned_alloc
function instead of posix_memalign. After this change, we'll only have
to add support for that in a single place.
Differential Revision: https://reviews.llvm.org/D91379
Sam McCall [Wed, 25 Nov 2020 20:31:18 +0000 (21:31 +0100)]
[clangd] Track deprecation of 'member' semantic token type in LSP.
Frank Laub [Wed, 25 Nov 2020 20:22:01 +0000 (20:22 +0000)]
[MLIR][Affine] Add custom builders for AffineVectorLoadOp/AffineVectorStoreOp
Adding missing custom builders for AffineVectorLoadOp & AffineVectorStoreOp. In practice, it is difficult to correctly construct these ops without these builders (because the AffineMap is not included at construction time).
Differential Revision: https://reviews.llvm.org/D86380
Reid Kleckner [Tue, 24 Nov 2020 19:50:33 +0000 (11:50 -0800)]
[MS] Add more 128bit cmpxchg intrinsics for AArch64
The MSVC STL for requires this on ARM64.
Requested in https://llvm.org/pr47099
Depends on D92061
Differential Revision: https://reviews.llvm.org/D92062
Reid Kleckner [Tue, 24 Nov 2020 22:48:05 +0000 (14:48 -0800)]
[MS] Fix double evaluation of MSVC builtin arguments
This code got quite twisted because we consider some MSVC builtins to be
target agnostic, and some to be target specific. Target specific
intrinsics have a pattern of doing up-front argument evaluation, while
general intrinsics do not evaluate their arguments up front. As we tried
to share codepaths between the target-specific and target-agnostic
handling, we ended up doing double evaluation.
Instead, have each target handle MSVC intrinsics consistently before up
front argument evaluation. This requires passing less data around and is
more consistent with target independent intrinsic handling.
See D50979 for past examples of this bug. I noticed this while looking
into adding some more intrinsics.
Differential Revision: https://reviews.llvm.org/D92061
Simon Pilgrim [Wed, 25 Nov 2020 19:00:33 +0000 (19:00 +0000)]
[Hexagon] Add support for ISD::SMAX/SMIN/UMAX/UMIN instead of custom dag patterns
This should handle the basic integer min/max handling - the HVX ops are still TODO.
This is some necessary cleanup work for min/max ops to eventually help us move the add/sub sat patterns into DAGCombine - D91876.
Differential Revision: https://reviews.llvm.org/D92112
Craig Topper [Wed, 25 Nov 2020 18:42:08 +0000 (10:42 -0800)]
[RISCV] Add test cases showing that we don't recognize the select form of NABS in SelectionDAGBuilder so we end up with branches. NFC
There's a FIXME that it should produce (sub 0, (abs)).
Paul Robinson [Wed, 25 Nov 2020 18:39:09 +0000 (13:39 -0500)]
Remove static function unused after cf1c774.
Caused some -Werror bot failures.
Simon Pilgrim [Wed, 25 Nov 2020 18:39:56 +0000 (18:39 +0000)]
[CostModel][X86] Refresh ISD::ABS costs
Update costs now that D92095 and D92102 have tweaked the SSE2 implementation
The SSE42 BLENDVPD cost can actually be used on SSE41 as we don't attempt to generate PCMPGT anymore
Add scalar i16/i32/i64 costs as we can do this cheaply with CMOV
LLVM GN Syncbot [Wed, 25 Nov 2020 18:35:53 +0000 (18:35 +0000)]
[gn build] Port
73fdd998701
Nathan James [Wed, 25 Nov 2020 18:35:34 +0000 (18:35 +0000)]
[clangd] Implement clang-tidy options from config
Added some new ClangTidyOptionsProvider like classes designed for clangd work flow.
These providers are designed to source the options on the worker thread but in a thread safe manner.
This is done through making the options getter take a pointer to the filesystem used by the worker thread which natuarally is from a ThreadsafeFS.
Internal caching in the providers is also guarded.
The providers don't inherit from `ClangTidyOptionsProvider` instead they share a base class which is able to create a provider for the `ClangTidyContext` using a specific FileSystem.
This approach means one provider can be used for multiple contexts even though `ClangTidyContext` owns its provider.
Depends on D90531
Reviewed By: sammccall
Differential Revision: https://reviews.llvm.org/D91029
Simon Pilgrim [Wed, 25 Nov 2020 18:05:41 +0000 (18:05 +0000)]
[DAG] Legalize abs(x) -> umin(x,sub(0,x)) iff umin/sub are legal
If umin() is legal, this is likely to result in smaller codegen expansion for abs(x) than the xor(add,ashr) method.
Followup to D92095
Alive2: https://alive2.llvm.org/ce/z/8nuX6s https://alive2.llvm.org/ce/z/q2hB9w
Paul Robinson [Wed, 18 Nov 2020 21:27:14 +0000 (16:27 -0500)]
[FastISel] Flush local value map on ever instruction
Local values are constants or addresses that can't be folded into
the instruction that uses them. FastISel materializes these in a
"local value" area that always dominates the current insertion
point, to try to avoid materializing these values more than once
(per block).
https://reviews.llvm.org/D43093 added code to sink these local
value instructions to their first use, which has two beneficial
effects. One, it is likely to avoid some unnecessary spills and
reloads; two, it allows us to attach the debug location of the
user to the local value instruction. The latter effect can
improve the debugging experience for debuggers with a "set next
statement" feature, such as the Visual Studio debugger and PS4
debugger, because instructions to set up constants for a given
statement will be associated with the appropriate source line.
There are also some constants (primarily addresses) that could be
produced by no-op casts or GEP instructions; the main difference
from "local value" instructions is that these are values from
separate IR instructions, and therefore could have multiple users
across multiple basic blocks. D43093 avoided sinking these, even
though they were emitted to the same "local value" area as the
other instructions. The patch comment for D43093 states:
Local values may also be used by no-op casts, which adds the
register to the RegFixups table. Without reversing the RegFixups
map direction, we don't have enough information to sink these
instructions.
This patch undoes most of D43093, and instead flushes the local
value map after(*) every IR instruction, using that instruction's
debug location. This avoids sometimes incorrect locations used
previously, and emits instructions in a more natural order.
This does mean materialized values are not re-used across IR
instruction boundaries; however, only about 5% of those values
were reused in an experimental self-build of clang.
(*) Actually, just prior to the next instruction. It seems like
it would be cleaner the other way, but I was having trouble
getting that to work.
Differential Revision: https://reviews.llvm.org/D91734
Craig Topper [Wed, 25 Nov 2020 17:43:16 +0000 (09:43 -0800)]
[RISCV] Custom type legalize i32 fshl/fshr on RV64 with Zbt.
This adds custom opcodes for FSLW/FSRW so we can type legalize
fshl/fshr without needing to match a sign_extend_inreg.
I've used the operand order from fshl/fshr to make the isel
pattern similar to the non-W form. It was also hard to decide
another order since the register instruction has the shift amount
as the second operand, but the immediate instruction has it as
the third operand.
Differential Revision: https://reviews.llvm.org/D91479
Johannes Doerfert [Wed, 25 Nov 2020 17:49:30 +0000 (11:49 -0600)]
[OpenMP][Docs] Add more content, call coordinates, FAQ entries, links
Johannes Doerfert [Wed, 25 Nov 2020 15:59:50 +0000 (09:59 -0600)]
[Flang][Docs] Update call information and add two more calls
Call information have been updated and the OpenMP in LLVM as well as
Classic Flang call have been added.
AndreyChurbanov [Wed, 25 Nov 2020 17:40:23 +0000 (20:40 +0300)]
[OpenMP] libomp: fix non-X86, non-AARCH64 builds
Commit https://reviews.llvm.org/rG7b5254223acbf2ef9cd278070c5a84ab278d7e5f
broke the build for some architectures, because macro KMP_PREFIX_UNDERSCORE
was defined only for x86, x86_64 and aarch64. This patch defines it for other
architectures (as a no-op).
Differential Revision: https://reviews.llvm.org/D92027
Joachim Protze [Wed, 18 Nov 2020 11:49:19 +0000 (12:49 +0100)]
[OpenMP][OMPT] Introduce a guard to handle OMPT return address
This is an alternative approach to address inconsistencies pointed out in: D90078
This patch makes sure that the return address is reset, when leaving the scope.
In some cases, I had to move the macro out of an if-statement to have it in the
right scope, in some cases I added an additional block to restrict the scope.
This patch does not handle inconsistencies, which might occur if the return
address is still set when we call into the application.
Test case (repeated_calls.c) provided by @hbae
Differential Revision: https://reviews.llvm.org/D91692
Isabel Thärigen [Tue, 27 Oct 2020 13:05:28 +0000 (14:05 +0100)]
[OpenMP][OMPT] Implement verbose tool loading
OpenMP 5.1 introduces the new env variable
OMP_TOOL_VERBOSE_INIT=(disabled|stdout|stderr|<filename>) to enable verbose
loading and initialization of OMPT tools.
This env variable helps to understand the cause when loading of a tool fails
(e.g., undefined symbols or dependency not in LD_LIBRARY_PATH)
Output of OMP_TOOL_VERBOSE_INIT is added for OMP_DISPLAY_ENV
Tests for this patch are integrated into the different existing tool loading
tests, making these tests more verbose. An Archer specific verbose test is
integrated into an existing Archer test.
Patch prepared by: Isabel Thärigen
Differential Revision: https://reviews.llvm.org/D91464
Nico Weber [Wed, 25 Nov 2020 17:08:10 +0000 (12:08 -0500)]
[gn build] Download prebuilt mac-arm64 binary now that it exists
Sadly requires an ugly workaround for an ugly bug, but still nicer than
building locally.
Endre Fülöp [Fri, 16 Oct 2020 07:37:42 +0000 (09:37 +0200)]
[clang][test] Fix prefix operator++ signature in iterators
Prefix operator++ should return the iterator incremented by reference.
Differential Revision: https://reviews.llvm.org/D89528
Fangrui Song [Wed, 25 Nov 2020 17:00:55 +0000 (09:00 -0800)]
[ELF] Rename adjustRelaxExpr to adjustTlsExpr and delete the unused `data` parameter. NFC
Reviewed By: psmith
Differential Revision: https://reviews.llvm.org/D91995
Joe Ellis [Tue, 24 Nov 2020 10:08:04 +0000 (10:08 +0000)]
[SVE] Fix TypeSize warning in RuntimePointerChecking::insert
The TypeSize warning would occur because RuntimePointerChecking::insert
was not scalable vector aware. The fix is to use
ScalarEvolution::getSizeOfExpr to grab the size of types.
Differential Revision: https://reviews.llvm.org/D90171
Fangrui Song [Wed, 25 Nov 2020 16:43:26 +0000 (08:43 -0800)]
[ELF] Add TargetInfo::adjustGotPcExpr for `R_GOT_PC` relaxations. NFC
With this change, `TargetInfo::adjustRelaxExpr` is only related to TLS
relaxations and a subsequent clean-up can delete the `data` parameter.
Differential Revision: https://reviews.llvm.org/D92079
Roman Lebedev [Wed, 25 Nov 2020 16:38:51 +0000 (19:38 +0300)]
[AMDGPU] Actually fully update opt-pipeline.ll test to account for -loop-idiom vs -indvars switch
Andy Wingo [Wed, 25 Nov 2020 16:31:05 +0000 (08:31 -0800)]
[MC][WebAssembly] Only emit indirect function table import if needed
The indirect function table, synthesized by the linker, is needed if and
only if there are TABLE_INDEX relocs.
Differential Revision: https://reviews.llvm.org/D91637
Roman Lebedev [Wed, 25 Nov 2020 16:17:25 +0000 (19:17 +0300)]
[PassManager] Run Induction Variable Simplification pass *after* Recognize loop idioms pass, not before
Currently, `-indvars` runs first, and then immediately after `-loop-idiom` does.
I'm not really sure if `-loop-idiom` requires `-indvars` to run beforehand,
but i'm *very* sure that `-indvars` requires `-loop-idiom` to run afterwards,
as it can be seen in the phase-ordering test.
LoopIdiom runs on two types of loops: countable ones, and uncountable ones.
For uncountable ones, IndVars obviously didn't make any change to them,
since they are uncountable, so for them the order should be irrelevant.
For countable ones, well, they should have been countable before IndVars
for IndVars to make any change to them, and since SCEV is used on them,
it shouldn't matter if IndVars have already canonicalized them.
So i don't really see why we'd want the current ordering.
Should this cause issues, it will give us a reproducer test case
that shows flaws in this logic, and we then could adjust accordingly.
While this is quite likely beneficial in-the-wild already,
it's a required part for the full motivational pattern
behind `left-shift-until-bittest` loop idiom (D91038).
Reviewed By: dmgreen
Differential Revision: https://reviews.llvm.org/D91800
Andy Wingo [Wed, 25 Nov 2020 15:54:31 +0000 (07:54 -0800)]
[WebAssembly] Factor out WasmTableType in binary format
This commit factors out a WasmTableType definition from WasmTable, as is
the case for WasmGlobal and other data types. Also add support for
extracting the SymbolName for a table from the linking section's symbol
table.
Differential Revision: https://reviews.llvm.org/D91849
Sebastian Neubauer [Fri, 23 Oct 2020 09:20:20 +0000 (11:20 +0200)]
[AMDGPU] Emit stack frame size in metadata
Add .shader_functions to pal metadata, which contains the stack frame
size for all non-entry-point functions.
Differential Revision: https://reviews.llvm.org/D90036
Valentin Clement [Wed, 25 Nov 2020 15:28:02 +0000 (10:28 -0500)]
[flang][openacc] Semantic check for cache directive
Add semantic check for the cache directive. According to section 2.10 from the specification:
A var in a cache directive must be a single array element or a simple subarray.
Reviewed By: kiranchandramohan
Differential Revision: https://reviews.llvm.org/D90184
Simon Pilgrim [Wed, 25 Nov 2020 15:03:03 +0000 (15:03 +0000)]
[DAG] Legalize abs(x) -> smax(x,sub(0,x)) iff smax/sub are legal
If smax() is legal, this is likely to result in smaller codegen expansion for abs(x) than the xor(add,ashr) method.
This is also what PowerPC has been doing for its abs implementation, so it lets us get rid of a load of custom lowering code there (and which was never updated when they added smax lowering).
Alive2: https://alive2.llvm.org/ce/z/xRk3cD
Differential Revision: https://reviews.llvm.org/D92095
Simon Pilgrim [Wed, 25 Nov 2020 11:50:16 +0000 (11:50 +0000)]
[PowerPC] Regenerate vec_select.ll tests and add <1 x i128> test case
Guillaume Chatelet [Wed, 25 Nov 2020 14:23:31 +0000 (14:23 +0000)]
Fix case mismatch between definition and declaration
Arthur O'Dwyer [Tue, 24 Nov 2020 14:59:26 +0000 (09:59 -0500)]
[libc++] ADL-proof <variant> by adding _VSTD:: qualification on calls.
Differential Revision: https://reviews.llvm.org/D92036
Adam Czachorowski [Tue, 24 Nov 2020 19:47:37 +0000 (20:47 +0100)]
[clangd] PopulateSwitch: disable on dependent enums.
If the enum is a dependent type, we would crash somewhere in
getIntWidth(). -Wswitch diagnostic doesn't work on dependent enums
either.
Differential Revision: https://reviews.llvm.org/D92051
Cullen Rhodes [Wed, 18 Nov 2020 18:13:08 +0000 (18:13 +0000)]
[LAA] NFC: Rename [get]MaxSafeRegisterWidth -> [get]MaxSafeVectorWidthInBits
MaxSafeRegisterWidth is a misnomer since it actually returns the maximum
safe vector width. Register suggests it relates directly to a physical
register where it could be a vector spanning one or more physical
registers.
Reviewed By: sdesmalen
Differential Revision: https://reviews.llvm.org/D91727
Mark de Wever [Wed, 25 Nov 2020 12:46:08 +0000 (13:46 +0100)]
Revert "[libc++] P1645 constexpr for <numeric>"
This reverts commit
eb9b063539c34d0d4dd14e8516eeb77bb8b9e4bd.
The commit fails to build on build bots using LLVM 8.
Aaron Ballman [Wed, 25 Nov 2020 12:33:38 +0000 (07:33 -0500)]
Fix a typo in the documentation to unbreak the sphinx builder.
Georgii Rymar [Tue, 24 Nov 2020 11:54:48 +0000 (14:54 +0300)]
[llvm-readelf/obj] - Stop using `reportError` when dumping notes.
This starts using `reportUniqueWarnings` instead of `reportError`
in the code that is responsible for dumping notes.
Differential revision: https://reviews.llvm.org/D92021
Mark de Wever [Tue, 24 Nov 2020 13:55:55 +0000 (14:55 +0100)]
[libc++] P1645 constexpr for <numeric>
Implements P1645: constexpr for <numeric> algorithms
Reviewed By: ldionne, #libc
Differential Revision: https://reviews.llvm.org/D90569
Sam McCall [Wed, 25 Nov 2020 11:49:18 +0000 (12:49 +0100)]
[clangd] Use TimePoint<> instead of system_clock::time_point, it does matter after all.
Mark Murray [Mon, 16 Nov 2020 13:11:35 +0000 (13:11 +0000)]
[ARM][AArch64] Adding Neoverse N2 CPU support
Add support for the Neoverse N2 CPU to the ARM and AArch64 backends.
Differential Revision: https://reviews.llvm.org/D91695
Simon Pilgrim [Tue, 24 Nov 2020 17:36:58 +0000 (17:36 +0000)]
SemaExpr.cpp - use castAs<> instead of getAs<> as we dereference the pointer directly. NFCI.
castAs<> will assert the correct cast type instead of just returning null, which we then try to dereference immediately.
Simon Pilgrim [Tue, 24 Nov 2020 16:56:24 +0000 (16:56 +0000)]
TargetInfo.cpp - use castAs<> instead of getAs<> as we dereference the pointer directly. NFCI.
castAs<> will assert the correct cast type instead of just returning null, which we then try to dereference immediately.
Simon Pilgrim [Tue, 24 Nov 2020 16:55:26 +0000 (16:55 +0000)]
CGCall.cpp - use castAs<> instead of getAs<> as we dereference the pointer directly. NFCI.
castAs<> will assert the correct cast type instead of just returning null, which we then try to dereference immediately in the setUsedBits call.
Simon Pilgrim [Tue, 24 Nov 2020 16:51:55 +0000 (16:51 +0000)]
SemaExpr.cpp - use castAs<> instead of getAs<> as we dereference the pointer directly. NFCI.
castAs<> will assert the correct cast type instead of just returning null, which we then try to dereference immediately.
Simon Pilgrim [Tue, 24 Nov 2020 16:20:03 +0000 (16:20 +0000)]
DetectDeadLanes.cpp - remove unused headers. NFCI.
Kerry McLaughlin [Wed, 25 Nov 2020 10:54:31 +0000 (10:54 +0000)]
[SVE][CodeGen] Add a DAG combine to extend mscatter indices
This patch adds a target-specific DAG combine for mscatter to promote indices
with element types i8 or i16 before legalisation, plus various tests with illegal types.
Reviewed By: sdesmalen
Differential Revision: https://reviews.llvm.org/D90945
LLVM GN Syncbot [Wed, 25 Nov 2020 11:13:15 +0000 (11:13 +0000)]
[gn build] Port
d95db1693cb
Sam McCall [Wed, 23 Sep 2020 17:58:32 +0000 (19:58 +0200)]
[clangd] Extract common file-caching logic from ConfigProvider.
The plan is to use this to use this for .clang-format, .clang-tidy, and
compile_commands.json. (Currently the former two are reparsed every
time, and the latter is cached forever and changes are never seen).
Differential Revision: https://reviews.llvm.org/D88172
Florian Hahn [Wed, 25 Nov 2020 10:04:22 +0000 (10:04 +0000)]
[VPlan] Add VPReductionSC to VPUser::classof, unify VPValue IDs.
This is a follow-up to
00a66011366c7b037d6680e6015524a41b761c34 to make
isa<VPReductionRecipe> work and unifies the VPValue ID names, by making
sure they all consistently start with VPV*.
Haojian Wu [Wed, 25 Nov 2020 10:46:41 +0000 (11:46 +0100)]
[clangd] Fix a tsan failure.
Tracer must be set up before calling any clangd-specific functions.
Sven van Haastregt [Wed, 25 Nov 2020 10:20:30 +0000 (10:20 +0000)]
[OpenCL] Move kernel arg type tests into one file
Keep all kernel parameter type diagnostic tests in
invalid-kernel-parameters.cl .
Differential Revision: https://reviews.llvm.org/D92033
Francesco Petrogalli [Wed, 25 Nov 2020 09:37:00 +0000 (09:37 +0000)]
[clang][SVE] Activate macro `__ARM_FEATURE_SVE_VECTOR_OPERATORS`.
The macro is emitted when wargeting SVE code generation with the additional command line option `-msve-vector-bits=<N>`.
The behavior implied by the macro is described in sections "3.7.3.3. Behavior specific to SVE vectors" of the SVE ACLE (Version 00bet6) that can be found at https://developer.arm.com/documentation/100987/latest
Reviewed By: rengolin, rsandifo-arm
Differential Revision: https://reviews.llvm.org/D90956
Martin Storsjö [Wed, 25 Nov 2020 10:06:26 +0000 (12:06 +0200)]
[ORC] Cast to const void* to silence a GCC warning. NFC.
Martin Storsjö [Wed, 25 Nov 2020 10:05:53 +0000 (12:05 +0200)]
[ORC] Remove a superfluous semicolon, silencing GCC warnings. NFC.
Georgii Rymar [Tue, 24 Nov 2020 14:34:12 +0000 (17:34 +0300)]
[libObject,llvm-readelf] - Stop describing a section/segment in `notes_begin()`.
`notes_begin()` is used for iterating over notes. This API in some cases might print
section type and index. At the same time during iterating, the `Elf_Note_Iterator`
might omit it as it doesn't have this info.
Because of above we might have the redundant duplication of information in warnings:
(See D92021).
```
warning: '[[FILE]]': unable to read notes from the SHT_NOTE section with index 1: SHT_NOTE section [index 1] has invalid offset (0x40) or size (0xffff0000)
```
This change stops reporting section index/type in Object/ELF.h/notes_begin().
(FTR, this was introduced by me for llvm-readobj in D64470).
Instead we can describe sections/program headers on the caller side.
Differential revision: https://reviews.llvm.org/D92081
Haojian Wu [Wed, 25 Nov 2020 09:49:54 +0000 (10:49 +0100)]
[clangd] Add metrics for invalid name.
Differential Revision: https://reviews.llvm.org/D92082
Georgii Rymar [Mon, 9 Nov 2020 11:52:46 +0000 (14:52 +0300)]
[obj2yaml] - Dump section offsets in some cases.
Currently we never dump the `sh_offset` key.
Though it sometimes an important information.
To reduce the noise this patch implements the following logic:
1) The "Offset" key for the first section is always emitted.
2) If we can derive the offset for a next section naturally,
then the "Offset" key is omitted.
By "naturally" I mean that section[X] offset is expected to be:
```
offsetOf(section[X]) == alignTo(section[X - 1].sh_offset + section[X - 1].sh_size, section[X].sh_addralign)
```
So, when it has the expected value, we omit it from the output.
Differential revision: https://reviews.llvm.org/D91152
Evgeny Leviant [Wed, 25 Nov 2020 09:07:35 +0000 (12:07 +0300)]
[SchedModels] Return earlier removed checks
It is possible that some write resource is variant in model A
and sequence in model B. Such case will trigger assertion in
getAllPredicates function.
Nathan Ridge [Wed, 25 Nov 2020 08:11:54 +0000 (03:11 -0500)]
[clangd] Avoid type hierarchy crash on incomplete type
Fixes https://github.com/clangd/clangd/issues/597
Differential Revision: https://reviews.llvm.org/D92077
Georgii Rymar [Wed, 25 Nov 2020 08:37:40 +0000 (11:37 +0300)]
[llvm-readobj] - An attempt to fix BB after D92018.
AVR and PPC64 bots reports link errors:
(http://lab.llvm.org:8011/#/builders/112/builds/1522)
(http://lab.llvm.org:8011/#/builders/52/builds/1764)
/tmp/cclOvLx0.s: Assembler messages:
/tmp/cclOvLx0.s:9223: Error: symbol `_ZN4llvm12function_refIFvvEE11callback_fnIUlvE2_EEvl' is already defined
/tmp/cclOvLx0.s:9227: Error: symbol `.L._ZN4llvm12function_refIFvvEE11callback_fnIUlvE2_EEvl' is already defined
/tmp/cclOvLx0.s:10272: Error: symbol `_ZN4llvm12function_refIFvvEE11callback_fnIUlvE2_EEvl' is already defined
/tmp/cclOvLx0.s:10276: Error: symbol `.L._ZN4llvm12function_refIFvvEE11callback_fnIUlvE2_EEvl' is already defined
/tmp/cclOvLx0.s:10285: Error: symbol `_ZN4llvm12function_refIFvvEE11callback_fnIUlvE2_EEvl' is already defined
/tmp/cclOvLx0.s:10289: Error: symbol `.L._ZN4llvm12function_refIFvvEE11callback_fnIUlvE2_EEvl' is already defined
/tmp/ccFJYr6I.s: Assembler messages:
/tmp/ccFJYr6I.s:6284: Error: symbol `_ZN4llvm12function_refIFvvEE11callback_fnIUlvE2_EEvl' is already defined
/tmp/ccFJYr6I.s:7053: Error: symbol `_ZN4llvm12function_refIFvvEE11callback_fnIUlvE2_EEvl' is already defined
/tmp/ccFJYr6I.s:7093: Error: symbol `_ZN4llvm12function_refIFvvEE11callback_fnIUlvE2_EEvl' is already defined
I *guess* the reason might be the default lambda argument. I've removed it.
David Green [Wed, 25 Nov 2020 08:25:06 +0000 (08:25 +0000)]
[VPlan] Switch VPWidenRecipe to be a VPValue
Similar to other patches, this makes VPWidenRecipe a VPValue. Because of
the way it interacts with the reduction code it also slightly alters the
way that VPValues are registered, removing the up front NeedDef and
using getOrAddVPValue to create them on-demand if needed instead.
Differential Revision: https://reviews.llvm.org/D88447
David Green [Tue, 24 Nov 2020 10:08:59 +0000 (10:08 +0000)]
[VPlan] Turn VPReductionRecipe into a VPValue
This converts the VPReductionRecipe into a VPValue, like other
VPRecipe's in preparation for traversing def-use chains. It also makes
it a VPUser, now storing the used VPValues as operands.
It doesn't yet change how the VPReductionRecipes are created. It will
need to call replaceAllUsesWith from the original recipe they replace,
but that is not done yet as VPWidenRecipe need to be created first.
Differential Revision: https://reviews.llvm.org/D88382
Georgii Rymar [Tue, 24 Nov 2020 10:49:40 +0000 (13:49 +0300)]
[llvm-readelf/obj] - Deduplicate the logic that prints notes. NFCI.
We have a similar logic for LLVM/GNU styles that can be deduplicated.
This will allow to replace `reportError` calls with `reportUniqueWarning`
calls in a single place.
Differential revision: https://reviews.llvm.org/D92018
Roman Lebedev [Wed, 25 Nov 2020 07:51:54 +0000 (10:51 +0300)]
[NFC][ARM][PhaseOrdering] Add one more test for D91800: LoopIdiom should be before IndVars
Kai Luo [Wed, 25 Nov 2020 01:38:19 +0000 (01:38 +0000)]
[PowerPC] Probe the gap between stackptr and realigned stackptr
During reviewing https://reviews.llvm.org/D84419, @efriedma mentioned the gap between realigned stack pointer and origin stack pointer should be probed too whatever the alignment is. This patch fixes the issue for PPC64.
Reviewed By: jsji
Differential Revision: https://reviews.llvm.org/D88078
Kazu Hirata [Wed, 25 Nov 2020 06:52:29 +0000 (22:52 -0800)]
[CHR] Use pred_size (NFC)
Max Kazantsev [Wed, 25 Nov 2020 06:20:15 +0000 (13:20 +0700)]
Revert "[SCEV] Generalize no-self-wrap check in isLoopInvariantExitCondDuringFirstIterations"
This reverts commit
7dcc8899174f44b7447bc48a9f2ff27f5458f8b7.
This patch introduced a logical error that breaks whole logic of this analysis.
All checks we are making are supposed to be loop-independent, so that we could
safely remove the range check. The 'nw' fact is loop-dependent, so we can remove
the check basing on facts from this very check.
Motivating examples will follow-up.
QingShan Zhang [Wed, 25 Nov 2020 05:37:15 +0000 (05:37 +0000)]
[DAGCombine] Add hook to allow target specific test for sqrt input
PowerPC has instruction ftsqrt/xstsqrtdp etc to do the input test for software square root.
LLVM now tests it with smallest normalized value using abs + setcc. We should add hook to
target that has test instructions.
Reviewed By: Spatel, Chen Zheng, Qiu Chao Fang
Differential Revision: https://reviews.llvm.org/D80706
Arthur Eubanks [Thu, 19 Nov 2020 17:38:14 +0000 (09:38 -0800)]
[NewPM] Add pipeline EP callback after initial frontend cleanup
This matches the legacy PM's EP_ModuleOptimizerEarly. Some backends use
this extension point and adding the pass somewhere else like
PipelineStartEPCallback doesn't work.
Reviewed By: ychen
Differential Revision: https://reviews.llvm.org/D91804
Max Kazantsev [Wed, 25 Nov 2020 04:46:22 +0000 (11:46 +0700)]
[IndVars] Use more precise context when eliminating narrowing
When deciding to widen narrow use, we may need to prove some facts
about it. For proof, the context is used. Currently we take the instruction
being widened as the context.
However, we may be more precise here if we take as context the point that
dominates all users of instruction being widened.
Differential Revision: https://reviews.llvm.org/D90456
Reviewed By: skatkov
Kai Luo [Wed, 25 Nov 2020 03:28:48 +0000 (03:28 +0000)]
[DAG][PowerPC] Fix dropped `nsw` flag in `SimplifySetCC` by adding `doesNodeExist` helper
`SimplifySetCC` invokes `getNodeIfExists` without passing `Flags` argument and `getNodeIfExists` uses a default `SDNodeFlags` to intersect the original flags, as a consequence, flags like `nsw` is dropped. Added a new helper function `doesNodeExist` to check if a node exists without modifying its flags.
Reviewed By: #powerpc, nemanjai
Differential Revision: https://reviews.llvm.org/D89938
Zarko Todorovski [Wed, 25 Nov 2020 03:37:03 +0000 (22:37 -0500)]
[PPC][AIX] Add vector callee saved registers for AIX extended vector ABI
This patch is the initial patch for support of the AIX extended vector ABI. The extended ABI treats vector registers V20-V31 as non-volatile and we add them as callee saved registers in this patch.
Reviewed By: sfertile
Differential Revision: https://reviews.llvm.org/D88676
Nico Weber [Wed, 25 Nov 2020 03:34:10 +0000 (22:34 -0500)]
Try to fix tests after
e16c0a9a68971 with CLANG_DEFAULT_LINKER=lld
Tests that pass -mlinker-version=old version and that then don't
expect new flags to be passed need to explicitly request the system
linker now.
QingShan Zhang [Wed, 25 Nov 2020 03:00:24 +0000 (03:00 +0000)]
[NFC][Test] Format the test for IEEE Long double
Richard Smith [Wed, 25 Nov 2020 02:51:08 +0000 (18:51 -0800)]
Don't assume the clang binary name contains the string "clang".
Also ensure the -cc1 argument is actually part of the clang -cc1 command
line rather than some unrelated command line.
Philip Reames [Wed, 25 Nov 2020 02:45:37 +0000 (18:45 -0800)]
[SCEV] Use isa<> pattern for testing for CouldNotCompute [NFC]
Some older code - and code copied from older code - still directly tested against the singelton result of SE::getCouldNotCompute. Using the isa<SCEVCouldNotCompute> form is both shorter, and more readable.
Arthur Eubanks [Sat, 31 Oct 2020 19:38:03 +0000 (12:38 -0700)]
Make CallInst::updateProfWeight emit i32 weights instead of i64
Typically branch_weights are i32, not i64.
This fixes entry_counts_cold.ll under NPM.
Reviewed By: asbirlea
Differential Revision: https://reviews.llvm.org/D90539
David Blaikie [Wed, 25 Nov 2020 01:45:47 +0000 (17:45 -0800)]
DebugInfo: Remove llc_dwarf usage from tests already relying on a target triple in the IR
QingShan Zhang [Wed, 25 Nov 2020 01:38:57 +0000 (01:38 +0000)]
[PowerPC][FP128] Fix the incorrect calling convention for IEEE long double on Power8
For now, we are using the GPR to pass the arguments/return value for fp128 on Power8,
which is incorrect. It should be VSR. The reason why we do it this way is that,
we are setting the fp128 as illegal which make LLVM try to emulate it with i128 on
Power8. So, we need to correct it as legal.
Reviewed By: Nemanjai
Differential Revision: https://reviews.llvm.org/D91527
David Blaikie [Wed, 25 Nov 2020 01:32:34 +0000 (17:32 -0800)]
DebugInfo: Add some missing explicit target triples.
Based on D91043 by Luís Marques. Thanks Luís!
Differential Revision: https://reviews.llvm.org/D91043
Reid Kleckner [Wed, 25 Nov 2020 01:26:11 +0000 (17:26 -0800)]
Fix compilation issue reported by MSVC user on cfe-dev
MSVC seems to think this `friend class TrailingObjects;` declaration is
declaring a TrailingObjects class instead of naming the injected base
class. Remove `class` so it does the right thing.
smhc [Wed, 25 Nov 2020 01:18:38 +0000 (01:18 +0000)]
[clang-tidy] Support IgnoredRegexp configuration to selectively suppress identifier naming checks
The idea of suppressing naming checks for variables is to support code bases that allow short variables named e.g 'x' and 'i' without prefix/suffixes or casing styles. This was originally proposed as a 'ShortSizeThreshold' however has been made more generic with a regex to suppress identifier naming checks for those that match.
Reviewed By: njames93, aaron.ballman
Differential Revision: https://reviews.llvm.org/D90282
Aart Bik [Tue, 24 Nov 2020 23:36:10 +0000 (15:36 -0800)]
[mlir][sparse] add parallelization strategies to sparse compiler
This CL adds the ability to request different parallelization strategies
for the generate code. Every "parallel" loop is a candidate, and converted
to a parallel op if it is an actual for-loop (not a while) and the strategy
allows dense/sparse outer/inner parallelization.
This will connect directly with the work of @ezhulenev on parallel loops.
Still TBD: vectorization strategy
Reviewed By: penpornk
Differential Revision: https://reviews.llvm.org/D91978
Richard Smith [Wed, 25 Nov 2020 00:53:58 +0000 (16:53 -0800)]
Treat a placeholder type for class template argument deduction as
substitutable for the deduced template.
As agreed in https://github.com/itanium-cxx-abi/cxx-abi/issues/109.
Teresa Johnson [Tue, 24 Nov 2020 22:53:02 +0000 (14:53 -0800)]
[lld] Add --no-lto-whole-program-visibility
Enables overriding earlier --lto-whole-program-visibility.
Variant of D91583 while discussing alternate ways to identify and
handle the --export-dynamic case.
Differential Revision: https://reviews.llvm.org/D92060
Richard Smith [Tue, 24 Nov 2020 23:20:06 +0000 (15:20 -0800)]
Fix mangling of substitutions for template-prefixes.
Previously we only considered using a substitution for a template-name
after already having mangled its prefix, so we'd produce nonsense
manglings like NS3_S4_IiEE where we should simply produce NS4_IiEE.
This is not ABI-compatible with previous Clang versions, and the old
behavior is restored by -fclang-abi-compat=11.0 or earlier.
Luís Marques [Wed, 25 Nov 2020 00:03:34 +0000 (00:03 +0000)]
[Sanitizer][RISCV] Fix redefinition of REG_SP
The include header sys/ucontext.h already defines REG_SP as 2, causing
redefinition warnings during compilation. This patch fixes that issue.
(We also can't just use the numerical definition provided by the header,
as REG_SP is used in this file this refers to a struct field.)
Differential Revision: https://reviews.llvm.org/D90934
Philip Reames [Tue, 24 Nov 2020 23:49:16 +0000 (15:49 -0800)]
[LAA] Minor code style tweaks [NFC]
Hongtao Yu [Tue, 24 Nov 2020 20:35:12 +0000 (12:35 -0800)]
[SelectionDAG] Add PseudoProbeSDNode to LargestSDNode to fix 32-bt build break.