platform/kernel/u-boot.git
12 years agopmic: dialog: Avoid name conflicts
Fabio Estevam [Mon, 7 May 2012 10:25:58 +0000 (10:25 +0000)]
pmic: dialog: Avoid name conflicts

As mx53loco board has two variants: one with Dialog PMIC and another with FSL MC34708 PMIC,
we need to be able to build both drivers.

Change pmic_init() and PMIC_NUM_OF_REGS names to avoid build conflicts when both drivers are present.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
12 years agoimx: Add u-boot.imx as target for ARM9 i.MX SOCs
Timo Ketola [Wed, 18 Apr 2012 22:55:35 +0000 (22:55 +0000)]
imx: Add u-boot.imx as target for ARM9 i.MX SOCs

Signed-off-by: Timo Ketola <timo@exertus.fi>
Acked-by: Stefano Babic <sbabic@denx.de>
12 years agoi.MX2: Include asm/types.h in arch-mx25/imx-regs.h
Timo Ketola [Wed, 18 Apr 2012 22:55:34 +0000 (22:55 +0000)]
i.MX2: Include asm/types.h in arch-mx25/imx-regs.h

types.h must be included in imx-regs.h if one wants to include
imx-regs.h in a board configuration file. That for one's part is
necessary, if one wants to use addresses defined in imx-regs.h.

For example, fsl_esdhc.c needs CONFIG_SYS_FSL_ESDHC_ADDR defined and
a proper thing is to define it with IMX_MMC_SDHCx_BASE in board
configuration file. This patch fixes the build in that case.

Signed-off-by: Timo Ketola <timo@exertus.fi>
Acked-by: Stefano Babic <sbabic@denx.de>
12 years agoimx: usb: There is no such register
Timo Ketola [Wed, 18 Apr 2012 22:55:33 +0000 (22:55 +0000)]
imx: usb: There is no such register

The reference manual of i.MX25 (nor i.MX31) does not define such
register. This seems to access read only UH2_CAPLENGTH register (if
CONFIG_MXC_USB_PORT is zero).

Signed-off-by: Timo Ketola <timo@exertus.fi>
Acked-by: Stefano Babic <sbabic@denx.de>
12 years agoi.MX25: usb: Set PORTSCx register
Timo Ketola [Wed, 18 Apr 2012 22:55:32 +0000 (22:55 +0000)]
i.MX25: usb: Set PORTSCx register

The USB controller in i.MX25 has a PORTSCx registers which should be
set. In this regard it is similar to the controller in i.MX31. As this
file is compiled only with i.MX25 and -31, #ifdef check can be removed.

Signed-off-by: Timo Ketola <timo@exertus.fi>
Acked-by: Stefano Babic <sbabic@denx.de>
12 years agoimx: nand: Support flash based BBT
Timo Ketola [Wed, 18 Apr 2012 22:55:31 +0000 (22:55 +0000)]
imx: nand: Support flash based BBT

Signed-off-by: Timo Ketola <timo@exertus.fi>
Acked-by: Scott Wood <scottwood@freescale.com>
12 years agoi.MX25: This architecture has a GPIO4 too
Timo Ketola [Wed, 18 Apr 2012 22:55:29 +0000 (22:55 +0000)]
i.MX25: This architecture has a GPIO4 too

Signed-off-by: Timo Ketola <timo@exertus.fi>
Acked-by: Stefano Babic <sbabic@denx.de>
12 years agoi.MX25: esdhc: Add mxc_get_clock infrastructure
Timo Ketola [Wed, 18 Apr 2012 22:55:28 +0000 (22:55 +0000)]
i.MX25: esdhc: Add mxc_get_clock infrastructure

Defining CONFIG_FSL_ESDHC brings in a call to get_clocks, so let's
implement get_clocks function. This is how it seems to be implemented
elsewhere.

Signed-off-by: Timo Ketola <timo@exertus.fi>
Acked-by: Stefano Babic <sbabic@denx.de>
12 years agoi.MX6: mx6q_sabrelite: add SATA bindings
Eric Nelson [Tue, 1 May 2012 09:55:11 +0000 (09:55 +0000)]
i.MX6: mx6q_sabrelite: add SATA bindings

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: stefano Babic <sbabic@denx.de>
12 years agoi.MX6: add enable_sata_clock()
Eric Nelson [Tue, 27 Mar 2012 09:52:21 +0000 (09:52 +0000)]
i.MX6: add enable_sata_clock()

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Signed-off-by: Stefano Babic <sbabic@denx.de>
12 years agoi.MX6: Add ANATOP regulator init
Dirk Behme [Wed, 2 May 2012 02:12:17 +0000 (02:12 +0000)]
i.MX6: Add ANATOP regulator init

Init the core regulator voltage to 1.2V. This is required for the correct
functioning of the GPU and when the ARM LDO is set to 1.225V. This is a
workaround to fix some memory clock jitter.

Note: This should be but can't be done in the DCD. The bootloader
      prevents access to the ANATOP registers.

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
CC: Jason Chen <b02280@freescale.com>
CC: Jason Liu <r64343@freescale.com>
CC: Ranjani Vaidyanathan <ra5478@freescale.com>
CC: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <festevam@gmail.com>
12 years agomx28evk: add NAND support
Lauri Hintsala [Tue, 17 Apr 2012 00:35:46 +0000 (00:35 +0000)]
mx28evk: add NAND support

NAND support is not enabled by default because Eval Kit is not delivered
with NAND chip. To enable NAND support add CONFIG_CMD_NAND to board config.

Signed-off-by: Lauri Hintsala <lauri.hintsala@bluegiga.com>
Acked-by: Marek Vasut <marex@denx.de>
12 years agoUSB: ehci-mx6: Fix broken IO access
Wolfgang Grandegger [Wed, 2 May 2012 04:36:39 +0000 (04:36 +0000)]
USB: ehci-mx6: Fix broken IO access

To get USB working again on the i.MX6, this patch fixes a bug introduced
with commit 522b2a0 "Add proper IO accessors for mx6 usb registers.".
At that occasion, I also added the missing __iomem directive.

Cc: Marek Vasut <marex@denx.de>
CC: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Wolfgang Grandegger <wg@denx.de>
12 years agoM28: Scan only first 512 MB of DRAM to avoid memory wraparound
Marek Vasut [Thu, 3 May 2012 05:47:19 +0000 (05:47 +0000)]
M28: Scan only first 512 MB of DRAM to avoid memory wraparound

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
12 years agoRevert "i.MX28: Enable additional DRAM address bits"
Marek Vasut [Thu, 3 May 2012 05:47:18 +0000 (05:47 +0000)]
Revert "i.MX28: Enable additional DRAM address bits"

This reverts commit 69d26d09de1cb93e0a09ca71d9f0d41a66f0756a.

Apparently, this commit got mainline only because of out-of-tree
port and causes breakage on board that is mainline. Revert.

Reason:
* The OOT board has 512MB of DRAM, enabling this additional address
  line enabled it to work fine with 512MB of RAM.
* Every mainline port has max. 256MB of DRAM, therefore this revert
  has no impact on any mainline port
* Though this caused a problem with new M28 board with 256MB of DRAM
  where the chips are wired differently. The patch-to-be-reverted
  caused the DRAM to behave like this:

  [128MB chunk #1][128MB chunk #1 again][128MB chunk #2][128MB chunk #2 again]

Therefore to retain the current one-memory-init-rules-them-all situation,
revert this patch until another board emerges and will actually be pushed
mainline that needs different setup.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
12 years agoM28: Enable FDT support
Marek Vasut [Thu, 3 May 2012 05:47:21 +0000 (05:47 +0000)]
M28: Enable FDT support

This will eventually be needed with Linux 3.5, which will be the point when
MXS will be switched to FDT.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
12 years agomx53loco: Add support for 1GHz operation for DA9053-based boards
Fabio Estevam [Mon, 30 Apr 2012 08:12:04 +0000 (08:12 +0000)]
mx53loco: Add support for 1GHz operation for DA9053-based boards

There are two types of mx53loco boards: initial boards were built with a Dialog
DA9053 PMIC and more recent version is based on a Freescale MC34708 PMIC.

Add DA9053 PMIC support and adjust the required voltages and clocks for running
the CPU at 1GHz.

Tested on both versions of mx53loco boards.

In the case of a MC34708-based board the CPU operating voltage remains at 800MHz.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by : Stefano Babic <sbabic@denx.de>

12 years agomx53loco: Allow to print CPU information at a later stage
Fabio Estevam [Mon, 30 Apr 2012 08:12:03 +0000 (08:12 +0000)]
mx53loco: Allow to print CPU information at a later stage

Print CPU information within board_late_init().

This is in preparation for adding 1GHz support, which requires programming a PMIC
via I2C. As I2C is only available after relocation, print the CPU information
later at board_late_init(), so that the CPU frequency can be printed correctly.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
12 years agomx5: Add clock config interface
Fabio Estevam [Mon, 30 Apr 2012 08:12:02 +0000 (08:12 +0000)]
mx5: Add clock config interface

mx5: Add clock config interface

Add clock config interface support, so that we
can configure CPU or DDR clock in the later init

Signed-off-by: Jason Liu <jason.hui@linaro.org>
Signed-off-by: Eric Miao <eric.miao@linaro.org>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
12 years agoimx-common: Factor out get_ahb_clk()
Fabio Estevam [Sun, 29 Apr 2012 08:11:13 +0000 (08:11 +0000)]
imx-common: Factor out get_ahb_clk()

get_ahb_clk() is a common function between mx5 and mx6.

Place it into imx-common directory.

Cc: Dirk Behme <dirk.behme@googlemail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
12 years agoi.MX6Q: mx6qsabrelite: Add keypress support to alter boot flow
Eric Nelson [Wed, 25 Apr 2012 14:14:04 +0000 (14:14 +0000)]
i.MX6Q: mx6qsabrelite: Add keypress support to alter boot flow

Uses the 'magic_keys' idiom as described in doc/README.kbd:
http://lists.denx.de/pipermail/u-boot/2012-April/122502.html

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
12 years agomx31pdk: Allow booting a zImage kernel
Fabio Estevam [Mon, 23 Apr 2012 06:31:18 +0000 (06:31 +0000)]
mx31pdk: Allow booting a zImage kernel

Allow booting a zImage kernel.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
12 years agomx6qarm2: Allow booting a zImage kernel
Fabio Estevam [Mon, 23 Apr 2012 06:31:17 +0000 (06:31 +0000)]
mx6qarm2: Allow booting a zImage kernel

Allow booting a zImage kernel.

Cc: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
12 years agomx6qsabrelite: Allow booting a zImage kernel
Fabio Estevam [Mon, 23 Apr 2012 06:31:16 +0000 (06:31 +0000)]
mx6qsabrelite: Allow booting a zImage kernel

Allow booting a zImage kernel.

Cc: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
12 years agomx28evk: Allow booting a zImage kernel
Fabio Estevam [Mon, 23 Apr 2012 06:31:15 +0000 (06:31 +0000)]
mx28evk: Allow booting a zImage kernel

Allow booting a zImage kernel.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
12 years agom28evk: Allow to booting a dt kernel
Fabio Estevam [Mon, 23 Apr 2012 06:06:29 +0000 (06:06 +0000)]
m28evk: Allow to booting a dt kernel

Allow to booting a dt kernel.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
12 years agomx28evk: Allow to booting a dt kernel
Fabio Estevam [Mon, 23 Apr 2012 06:06:28 +0000 (06:06 +0000)]
mx28evk: Allow to booting a dt kernel

Allow to booting a dt kernel.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
12 years agomx6qsabrelite: No need to set the direction for GPIO3_23 again
Fabio Estevam [Wed, 11 Apr 2012 10:22:24 +0000 (10:22 +0000)]
mx6qsabrelite: No need to set the direction for GPIO3_23 again

There is a 'gpio_direction_output(87, 0);' call previously, so the GPIO direction is
already established.

Use gpio_set_value() for changing the GPIO output then.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
12 years agopmic: Add support for the Dialog DA9053 PMIC
Fabio Estevam [Tue, 20 Mar 2012 11:40:06 +0000 (11:40 +0000)]
pmic: Add support for the Dialog DA9053 PMIC

Add support for the Dialog DA9053 PMIC.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
12 years agoMX53: mx53loco: Add SATA support
Stefano Babic [Wed, 22 Feb 2012 00:24:41 +0000 (00:24 +0000)]
MX53: mx53loco: Add SATA support

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Jason Liu <jason.hui@linaro.org>
Acked-by: Jason Liu <jason.hui@linaro.org>
12 years agoMX53: Add support to ESG ima3 board
Stefano Babic [Wed, 22 Feb 2012 00:24:40 +0000 (00:24 +0000)]
MX53: Add support to ESG ima3 board

The ESG ima3-mx53 board is based on the Freescale
i.MX53 SOC. It boots from NOR (128 MB) and
supports Ethernet (FEC), SATA.

Signed-off-by: Stefano Babic <sbabic@denx.de>
12 years agoSATA: add driver for MX5 / MX6 SOCs
Stefano Babic [Wed, 22 Feb 2012 00:24:39 +0000 (00:24 +0000)]
SATA: add driver for MX5 / MX6 SOCs

This driver is part of Freescale's LTIB for
MX5 / MX6.

Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Terry Lv <r65388@freescale.com>
CC: Fabio Estevam <fabio.estevam@freescale.com>
CC: Dirk Behme <dirk.behme@de.bosch.com>
12 years agoMX53: add function to set SATA clock to internal
Stefano Babic [Wed, 22 Feb 2012 00:24:38 +0000 (00:24 +0000)]
MX53: add function to set SATA clock to internal

The MX53 SATA interface can use an internal clock (USB PHY1)
instead of an external clock. This is an undocumented feature, but used
on most Freescale's evaluation boards, such as MX53-loco.

As stated by Freescale's support:

Fuses (but not pins) may be used to configure SATA clocks.
Particularly the i.MX53 Fuse_Map contains the next information
about configuring SATA clocks :
SATA_ALT_REF_CLK[1:0] (offset 0x180C)

'00' - 100MHz (External)
'01' - 50MHz (External)
'10' - 120MHz, internal (USB PHY)
'11' - Reserved

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
12 years agoSATA: check for return value from sata functions
Stefano Babic [Wed, 22 Feb 2012 00:24:37 +0000 (00:24 +0000)]
SATA: check for return value from sata functions

sata functions are called even if previous functions failed
because return value is not checked.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Dirk Behme <dirk.behme@de.bosch.com>
CC: Fabio Estevam <fabio.estevam@freescale.com>
12 years agoMX5: Add definitions for SATA controller
Stefano Babic [Wed, 22 Feb 2012 00:24:36 +0000 (00:24 +0000)]
MX5: Add definitions for SATA controller

Add base address and MXC_SATA_CLK to return
the clock used for the SATA controller.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
CC: Dirk Behme <dirk.behme@de.bosch.com>
12 years agoNET: fec_mxc.c: Add a way to disable auto negotiation
Stefano Babic [Wed, 22 Feb 2012 00:24:35 +0000 (00:24 +0000)]
NET: fec_mxc.c: Add a way to disable auto negotiation

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
12 years agoDefine UART4 and UART5 base addresses
Stefano Babic [Wed, 22 Feb 2012 00:24:33 +0000 (00:24 +0000)]
Define UART4 and UART5 base addresses

Signed-off-by: Stefano Babic <sbabic@denx.de>
12 years agoEXYNOS: Change bits per pixel value proper for u-boot.
Donghwa Lee [Mon, 23 Apr 2012 15:37:05 +0000 (15:37 +0000)]
EXYNOS: Change bits per pixel value proper for u-boot.

vl_bpix of vidinfo_t was changed proper value for u-boot.
It is used to multiple of 2 by using NBITS() macro.

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
12 years agoEXYNOS: support TRATS board display function
Donghwa Lee [Thu, 5 Apr 2012 19:36:27 +0000 (19:36 +0000)]
EXYNOS: support TRATS board display function

This patch support TRATS board configuration and display function.

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
12 years agoLCD: support S6E8AX0 amoled driver based on EXYNOS MIPI DSI
Donghwa Lee [Fri, 6 Apr 2012 05:24:01 +0000 (14:24 +0900)]
LCD: support S6E8AX0 amoled driver based on EXYNOS MIPI DSI

This patch support S6E8AX0 amoled driver based on EXYNOS MIPI DSI interface.

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
12 years agoEXYNOS: support EXYNOS MIPI DSI interface driver.
Donghwa Lee [Thu, 5 Apr 2012 19:36:21 +0000 (19:36 +0000)]
EXYNOS: support EXYNOS MIPI DSI interface driver.

EXYNOS SoC platform has MIPI-DSI controller and MIPI-DSI
based LCD Panel could be used with it. This patch supports MIPI-DSI driver
based Samsung SoC chip.

LCD panel driver based MIPI-DSI should be registered to MIPI-DSI driver at
board file and LCD panel driver specific function registered to mipi_dsim_ddi
structure at lcd panel init function called system init.
In the MIPI-DSI driver, find lcd panel driver by using registered
lcd panel name, and then initialize lcd panel driver.

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
12 years agoEXYNOS: support EXYNOS framebuffer and FIMD display drivers.
Donghwa Lee [Thu, 5 Apr 2012 19:36:17 +0000 (19:36 +0000)]
EXYNOS: support EXYNOS framebuffer and FIMD display drivers.

This patch support EXYNOS FB and FIMD display drivers.

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
12 years agoLCD: add data structure for EXYNOS display driver
Donghwa Lee [Thu, 5 Apr 2012 19:36:15 +0000 (19:36 +0000)]
LCD: add data structure for EXYNOS display driver

Add vidinfo data structure for EXYNOS display driver

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
12 years agoEXYNOS: add LCD and MIPI DSI clock interface.
Donghwa Lee [Thu, 5 Apr 2012 19:36:12 +0000 (19:36 +0000)]
EXYNOS: add LCD and MIPI DSI clock interface.

To sets up lcd and mipi clock in EXYNOS display driver, added clock interface.

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
12 years agoEXYNOS: definitions of system resgister and power management registers.
Donghwa Lee [Thu, 5 Apr 2012 19:36:10 +0000 (19:36 +0000)]
EXYNOS: definitions of system resgister and power management registers.

This is definitions of system registers and power mananagement registers for EXYNOS SoC.

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
12 years agoSMDK5250: fix compiler warning
Minkyu Kang [Mon, 2 Apr 2012 07:51:33 +0000 (16:51 +0900)]
SMDK5250: fix compiler warning

this patch fixed following warning.
tzpc_init.c: In function 'tzpc_init':
tzpc_init.c:35: warning: assignment from incompatible pointer type

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Cc: Chander Kashyap <chander.kashyap@linaro.org>
12 years agomisc:pmic:samsung Convert TRATS target to use MAX8997 instead of MAX8998
Łukasz Majewski [Thu, 29 Mar 2012 01:29:18 +0000 (01:29 +0000)]
misc:pmic:samsung Convert TRATS target to use MAX8997 instead of MAX8998

TRATS target uses MAX8997 PMIC device instead of MAX8998.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
12 years agomisc:pmic:max8997 MAX8997 support for PMIC driver
Łukasz Majewski [Thu, 29 Mar 2012 01:29:17 +0000 (01:29 +0000)]
misc:pmic:max8997 MAX8997 support for PMIC driver

This commit adds support for MAX8997 PMIC driver.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Stefano Babic <sbabic@denx.de>
12 years agoTRATS: modify the trats's configuration
Jaehoon Chung [Tue, 27 Mar 2012 20:05:25 +0000 (20:05 +0000)]
TRATS: modify the trats's configuration

Trats is supported 1GiB memory size.
(Each bank size is 512MB.)
And INITRD is unnecessary. So removed them.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
12 years agoARM: Exynos4: ADC: Universal_C210: Enable LDO4 power line for ADC measurement
Łukasz Majewski [Mon, 26 Mar 2012 21:53:48 +0000 (21:53 +0000)]
ARM: Exynos4: ADC: Universal_C210: Enable LDO4 power line for ADC measurement

This patch enables LDO4 power line for preparing proper voltages to be
measured by ADC converter.
This measurement is used for determination of target board HW revision.

Test HW:
Universal_C210 (Exynos4210) rev. 0.0

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
12 years agoEXYNOS: Rename exynos5_tzpc structure to exynos_tzpc
Chander Kashyap [Wed, 14 Mar 2012 17:34:02 +0000 (17:34 +0000)]
EXYNOS: Rename exynos5_tzpc structure to exynos_tzpc

TZPC IP is common across Exynos based SoC'c. Renaming exynos5_tzpc
in arch/arm/include/asm/arch-exynos/tzpc.h to exynos_tzpc will allow generic
usase of tzpc.

Also modify board/samsung/smdk5250/tzpc_init.c to use exynos_tzpc.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
12 years agoarm: ea20: Change macro from BOARD_LATE_INIT to CONFIG_BOARD_LATE_INIT
Nobuhiro Iwamatsu [Tue, 17 Apr 2012 16:41:54 +0000 (16:41 +0000)]
arm: ea20: Change macro from BOARD_LATE_INIT to CONFIG_BOARD_LATE_INIT

With almost all the architecture and board BOARD_LATE_INIT does not use.
CONFIG_BOARD_LATE_INIT is used instead.
This changed CONFIG_BOARD_LATE_INIT from BOARD_LATE_INIT.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
CC: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
12 years agoarm: cam_enc_4xx: Change macro from BOARD_LATE_INIT to CONFIG_BOARD_LATE_INIT
Nobuhiro Iwamatsu [Tue, 17 Apr 2012 16:42:22 +0000 (16:42 +0000)]
arm: cam_enc_4xx: Change macro from BOARD_LATE_INIT to CONFIG_BOARD_LATE_INIT

With almost all the architecture and board BOARD_LATE_INIT does not use.
CONFIG_BOARD_LATE_INIT is used instead.
This changed CONFIG_BOARD_LATE_INIT from BOARD_LATE_INIT.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
CC: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
12 years agocm-t35: add I2C multi-bus support
Nikita Kiryanov [Mon, 2 Apr 2012 02:29:31 +0000 (02:29 +0000)]
cm-t35: add I2C multi-bus support

Enable I2C multi-bus support and config I2C muxes for I2C2 and I2C3.

Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
12 years agoinclude/configs: Remove CONFIG_SYS_64BIT_STRTOUL
Tom Rini [Fri, 13 Apr 2012 12:20:05 +0000 (12:20 +0000)]
include/configs: Remove CONFIG_SYS_64BIT_STRTOUL

This define does not control anything, remove it.

Signed-off-by: Tom Rini <trini@ti.com>
12 years agoinclude/configs: Remove CONFIG_SYS_64BIT_VSPRINTF
Tom Rini [Fri, 13 Apr 2012 12:20:04 +0000 (12:20 +0000)]
include/configs: Remove CONFIG_SYS_64BIT_VSPRINTF

This define does not control anything, remove it.

Signed-off-by: Tom Rini <trini@ti.com>
12 years agoomap3: Introduce weak misc_init_r
Tom Rini [Fri, 13 Apr 2012 12:20:03 +0000 (12:20 +0000)]
omap3: Introduce weak misc_init_r

Introduce a __weak misc_init_r function that just runs dieid_num_r().
Remove misc_init_r from cm_t35, mcx, omap3_logic and mt_ventoux as this was
all they did for misc_init_r.

Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Ilya Yanok <yanok@emcraft.com>
Cc: Peter Barada <peter.barada@logicpd.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
12 years agoomap730p2: Remove empty misc_init_r
Tom Rini [Fri, 13 Apr 2012 12:20:02 +0000 (12:20 +0000)]
omap730p2: Remove empty misc_init_r

We had a do-nothing misc_init_r, remove along with CONFIG_MISC_INIT_R

Signed-off-by: Tom Rini <trini@ti.com>
12 years agoomap5912osk: Remove empty misc_init_r
Tom Rini [Fri, 13 Apr 2012 12:20:01 +0000 (12:20 +0000)]
omap5912osk: Remove empty misc_init_r

We had a do-nothing misc_init_r, remove along with CONFIG_MISC_INIT_R

Signed-off-by: Tom Rini <trini@ti.com>
12 years agoomap4+: Remove CONFIG_ARCH_CPU_INIT
Tom Rini [Fri, 13 Apr 2012 12:20:00 +0000 (12:20 +0000)]
omap4+: Remove CONFIG_ARCH_CPU_INIT

OMAP4/5 had an empty arch_cpu_init() so drop that along with
CONFIG_ARCH_CPU_INIT

Signed-off-by: Tom Rini <trini@ti.com>
12 years agoomap4: Remove CONFIG_SYS_MMC_SET_DEV
Tom Rini [Fri, 13 Apr 2012 12:19:59 +0000 (12:19 +0000)]
omap4: Remove CONFIG_SYS_MMC_SET_DEV

This is only used on !CONFIG_GENERIC_MMC which is false here.

Signed-off-by: Tom Rini <trini@ti.com>
12 years agoOMAP3: pandora: drop console kernel argument
Grazvydas Ignotas [Thu, 22 Mar 2012 13:49:23 +0000 (13:49 +0000)]
OMAP3: pandora: drop console kernel argument

As ttyS0 is no longer valid for newer OMAP kernels, and pandora serial
cables are not widespread, simply drop console argument. This should
allow booting old and new kernels with default arguments, and those who
need serial can use a boot script on SD card.

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
12 years agoOMAP3: pandora: revise GPIO configuration
Grazvydas Ignotas [Thu, 22 Mar 2012 13:49:22 +0000 (13:49 +0000)]
OMAP3: pandora: revise GPIO configuration

Update pandora's GPIO setup code with these changes:
- convert to gpiolib
- set up dual voltage GPIOs to match supply of 1.8V by clearing VMODE1
- add GPIO_IO_PWRDNZ configuration for DM3730 variation of pandora
  (required to enable GPIO 126, 127, and 129 I/O cells in DM3730)
- add wifi reset pulse as recommended by wifi chip's manufacturer
- drop configuration of GPIOs that u-boot doesn't need

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
12 years agoOMAP3: pandora: pin mux updates for DM3730 board variant
Grazvydas Ignotas [Thu, 22 Mar 2012 13:49:21 +0000 (13:49 +0000)]
OMAP3: pandora: pin mux updates for DM3730 board variant

DM3730 needs some additional pin mux configuration for GPIOs
126-129 to work, add it.

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
12 years agoMakefile: Add a 'checkthumb' rule
Tom Rini [Fri, 16 Mar 2012 06:34:35 +0000 (06:34 +0000)]
Makefile: Add a 'checkthumb' rule

This rule confirms that if we're on ARM and we have enabled THUMB builds
that we have a new enough toolchain to produce a working binary.

Changes in v2:
- Switch to ALL-$(CONFIG_SYS_THUMB_BUILD) in arch/arm/config.mk (Mike F)
- Simplfy checkthumb test after doing the above

Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
12 years agotools, config.mk: Add gcc-version.sh, cc-version test from Linux
Tom Rini [Fri, 16 Mar 2012 05:27:47 +0000 (05:27 +0000)]
tools, config.mk: Add gcc-version.sh, cc-version test from Linux

Added from Linux - commit fde7d9049e55ab85a390be7f415d74c9f62dd0f9

Signed-off-by: Tom Rini <trini@ti.com>
12 years agoOMAP4: enable Thumb build
Aneesh V [Thu, 8 Mar 2012 07:20:22 +0000 (07:20 +0000)]
OMAP4: enable Thumb build

Signed-off-by: Aneesh V <aneesh@ti.com>
12 years agoomap4+: Avoid using __attribute__ ((__packed__))
Aneesh V [Thu, 8 Mar 2012 07:20:21 +0000 (07:20 +0000)]
omap4+: Avoid using __attribute__ ((__packed__))

Avoid using __attribute__ ((__packed__)) unless it's
absolutely necessary. "packed" will remove alignment
requirements for the respective objects and may cause
alignment issues unless alignment is also enforced
using a pragma.

Here, these packed attributes were causing alignment
faults in Thumb build.

Signed-off-by: Aneesh V <aneesh@ti.com>
12 years agoarmv7: Use -march=armv7-a and thereby enable Thumb-2
Aneesh V [Thu, 8 Mar 2012 07:20:20 +0000 (07:20 +0000)]
armv7: Use -march=armv7-a and thereby enable Thumb-2

Enable -march=armv7-a for armv7 platforms if the tool-chain
supports it. This in turn results in Thumb-2 code generated
for these platforms if CONFIG_SYS_THUMB_BUILD is enabled.

Signed-off-by: Aneesh V <aneesh@ti.com>
12 years agoARM: enable Thumb build
Aneesh V [Thu, 8 Mar 2012 07:20:19 +0000 (07:20 +0000)]
ARM: enable Thumb build

Enable Thumb build and ARM-Thumb interworking based on the new
config flag CONFIG_SYS_THUMB_BUILD

Signed-off-by: Aneesh V <aneesh@ti.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
12 years agoarmv7: add appropriate headers for assembly functions
Aneesh V [Thu, 8 Mar 2012 07:20:18 +0000 (07:20 +0000)]
armv7: add appropriate headers for assembly functions

Use ENTRY and ENDPROC with assembly functions to ensure
necessary assembler directives for all functions.

Signed-off-by: Aneesh V <aneesh@ti.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
12 years agoarm: adapt asm/linkage.h from Linux
Aneesh V [Thu, 8 Mar 2012 07:20:17 +0000 (07:20 +0000)]
arm: adapt asm/linkage.h from Linux

This will add ARM specific over-rides for the defines
from linux/linkage.h

Signed-off-by: Aneesh V <aneesh@ti.com>
Tested-by: Mike Frysinger <vapier@gentoo.org>
12 years agoOMAP5: reset: Use cold reset in case of 5430ES1.0
SRICHARAN R [Mon, 12 Mar 2012 02:25:52 +0000 (02:25 +0000)]
OMAP5: reset: Use cold reset in case of 5430ES1.0

Warm reset is not functional in case of omap5430ES1.0.
So override the weak reset_cpu function to use
cold reset instead.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
12 years agoOMAP3+: reset: Create a common reset layer.
SRICHARAN R [Mon, 12 Mar 2012 19:49:32 +0000 (19:49 +0000)]
OMAP3+: reset: Create a common reset layer.

The reset.S has the function to do a warm reset on OMAP
based socs. Moving this to a reset.c file so that this
acts a common layer to add any reset related functionality
for the future.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
12 years agommc: omap5evm: Add eMMC saveenv support
Balaji T K [Mon, 12 Mar 2012 02:25:50 +0000 (02:25 +0000)]
mmc: omap5evm: Add eMMC saveenv support

Save env to eMMC

Signed-off-by: Balaji T K <balajitk@ti.com>
12 years agoomap5: pbias ldo9 turn on
Balaji T K [Mon, 12 Mar 2012 02:25:49 +0000 (02:25 +0000)]
omap5: pbias ldo9 turn on

Add omap5 pbias configuration for mmc1/sd lines
and set voltage for sd data i/o lines

Signed-off-by: Balaji T K <balajitk@ti.com>
12 years agopower: twl6035: add palmas PMIC support
SRICHARAN R [Mon, 12 Mar 2012 02:25:48 +0000 (02:25 +0000)]
power: twl6035: add palmas PMIC support

palmas/TWL6035 is power IC for omap5 evm boards

Signed-off-by: Balaji T K <balajitk@ti.com>
12 years agoarm: omap5: correct boot device mode7 for eMMC
Balaji T K [Mon, 12 Mar 2012 02:25:47 +0000 (02:25 +0000)]
arm: omap5: correct boot device mode7 for eMMC

In OMAP5 Boot device mode of 6 and 7 should be mapped to mmc2/eMMC

Signed-off-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
12 years agoOMAP4/5: emif: Correct the emif power mgt shadow register bit fields.
SRICHARAN R [Mon, 12 Mar 2012 02:25:46 +0000 (02:25 +0000)]
OMAP4/5: emif: Correct the emif power mgt shadow register bit fields.

PD_TIM bit field which specifies the power down timing is defined
to occupy bits 8-11, where as it is actually from 12-15 bits.
So correcting this.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
12 years agoOMAP5: ddr: Change the ddr device name.
SRICHARAN R [Mon, 12 Mar 2012 02:25:45 +0000 (02:25 +0000)]
OMAP5: ddr: Change the ddr device name.

The ddr part name used in OMAP5 ES1.0 soc is a SAMSUNG part and
not a ELPIDA part. So change this.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
12 years agoOMAP5: defconfig: Align the defconfig for 5430 ES1.0
SRICHARAN R [Mon, 12 Mar 2012 02:25:44 +0000 (02:25 +0000)]
OMAP5: defconfig: Align the defconfig for 5430 ES1.0

Adding the nessecary changes for OMAP5430 ES1.0 silicon.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
12 years agoOMAP4/5: device: Add support to get the device type.
SRICHARAN R [Mon, 12 Mar 2012 02:25:43 +0000 (02:25 +0000)]
OMAP4/5: device: Add support to get the device type.

Add support to identify the device as GP/EMU/HS.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
12 years agoOMAP4/5: Make the sysctrl structure common
SRICHARAN R [Mon, 12 Mar 2012 02:25:42 +0000 (02:25 +0000)]
OMAP4/5: Make the sysctrl structure common

Make the sysctrl structure common, so that it can
be used in generic functions across socs.
Also change the base address of the system control module, to
include all the registers and not simply the io regs.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
12 years agoOMAP5: SRAM: Change the SRAM base address.
SRICHARAN R [Mon, 12 Mar 2012 02:25:41 +0000 (02:25 +0000)]
OMAP5: SRAM: Change the SRAM base address.

The full internal SRAM of size 128kb is public in the case of OMAP5 soc.
So change the base address accordingly.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
12 years agoOMAP4/5: Make the silicon revision variable common.
SRICHARAN R [Mon, 12 Mar 2012 02:25:40 +0000 (02:25 +0000)]
OMAP4/5: Make the silicon revision variable common.

The different silicon revision variable names was defined for OMAP4 and
OMAP5 socs. Making the variable common so that some code can be
made generic.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
12 years agoOMAP5: hwinit: Add the missing break statement
SRICHARAN R [Mon, 12 Mar 2012 02:25:39 +0000 (02:25 +0000)]
OMAP5: hwinit: Add the missing break statement

The break statement is missing in init_omap_revision function, resulting
in a wrong revision identification. So fixing this.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
12 years agoOMAP5: palmas: Configure nominal opp vdd values
SRICHARAN R [Mon, 12 Mar 2012 02:25:38 +0000 (02:25 +0000)]
OMAP5: palmas: Configure nominal opp vdd values

The nominal opp vdd values as recommended for
ES1.0 silicon is set for mpu, core, mm domains using palmas.

Also used the right sequence to enable the vcores as per
a previous patch from Nishant Menon, which can be dropped now.
http://lists.denx.de/pipermail/u-boot/2012-March/119151.html

Signed-off-by: R Sricharan <r.sricharan@ti.com>
12 years agoOMAP5: emif/ddr: Change emif settings as required for ES1.0 silicon.
SRICHARAN R [Mon, 12 Mar 2012 02:25:37 +0000 (02:25 +0000)]
OMAP5: emif/ddr: Change emif settings as required for ES1.0 silicon.

The OMAP5 silicon has new DDR PHY design, which includes a external PHY
as well. So configuring the ext PHY parameters here. Also the EMIF timimg
registers and a couple of DDR mode registers needs to be updated based on
the testing from the actual silicon.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
12 years agoOMAP5: io: Configure the io settings for omap5430 sevm board.
SRICHARAN R [Mon, 12 Mar 2012 02:25:36 +0000 (02:25 +0000)]
OMAP5: io: Configure the io settings for omap5430 sevm board.

The control module provides options to set various signal
integrity parameters like the output impedance, slew rate,
load capacitance for different pad groups. Configure these
as required for the omap5430 sevm board.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
12 years agoOMAP5: board: Add pinmux data for omap5_evm board.
SRICHARAN R [Mon, 12 Mar 2012 02:25:35 +0000 (02:25 +0000)]
OMAP5: board: Add pinmux data for omap5_evm board.

Adding the full pinmux data for OMAP5430 sevm board.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
12 years agoOMAP5: clocks: Change clock settings as required for ES1.0 silicon.
SRICHARAN R [Mon, 12 Mar 2012 02:25:34 +0000 (02:25 +0000)]
OMAP5: clocks: Change clock settings as required for ES1.0 silicon.

Aligning all the clock related settings like the dpll frequencies, their
respective clock outputs, etc to the ideal values recommended for
OMAP5430 ES1.0 silicon.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
12 years agoOMAP3: igep00x0: Reduce lines of code for IGEP-based boards.
Enric Balletbò i Serra [Mon, 5 Mar 2012 11:32:16 +0000 (11:32 +0000)]
OMAP3: igep00x0: Reduce lines of code for IGEP-based boards.

This is rework on config files of IGEP-based boards with the aim to remove
duplicated code to be more maintainable. Basically this patch creates a
common configuration file for both boards and only sets the specific option
in the board config file.

On board files the hardcored mach type was replaced in favour of using the
CONFIG_MACH_TYPE option.

More than 200 duplicated lines have been deleted.

Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
12 years agoOMAP4: scale voltage of core before MPU scales
Nishanth Menon [Thu, 1 Mar 2012 14:17:39 +0000 (14:17 +0000)]
OMAP4: scale voltage of core before MPU scales

OMAP4 requires that parent domains scale ahead of dependent domains.
This is due to the restrictions in timing closure. To ensure
a consistent behavior across all OMAP4 SoC, ensure that
vdd_core scale first, then vdd_mpu and finally vdd_iva.

As part of doing this refactor the logic to allow for future
addition of OMAP4470 without much ado. OMAP4470 uses different
SMPS addresses and cannot be introduced in the current code
without major rewrite.

Reported-by: Isabelle Gros <i-gros@ti.com>
Reported-by: Jerome Angeloni <j-angeloni@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
12 years agoOMAP4460: TPS Ensure SET1 is selected after voltage configuration
Nishanth Menon [Thu, 1 Mar 2012 14:17:38 +0000 (14:17 +0000)]
OMAP4460: TPS Ensure SET1 is selected after voltage configuration

TPS SET0/SET1 register is selected by a GPIO pin on OMAP4460 platforms.
Currently we control this pin with a mux configuration as part of
boot sequence.
Current configuration results in the following voltage waveform:
                           |---------------| (SET1 default 1.4V)
                           |               --------(programmed voltage)
                           | <- (This switch happens on mux7,pullup)
vdd_mpu(TPS)         -----/ (OPP boot voltage)
                                             --------- (programmed voltage)
vdd_core(TWL6030)    -----------------------/ (OPP boot voltage)
Problem 1)                |<----- Tx ------>|
   timing violation for a duration Tx close to few milliseconds.
Problem 2) voltage of MPU goes beyond spec for even the highest of MPU OPP.

By using GPIO as recommended as standard procedure by TI, the sequence
changes to:
                                  -------- (programmed voltage)
vdd_mpu(TPS)         ------------/ (Opp boot voltage)
                                   --------- (programmed voltage)
vdd_core(TWL6030)    -------------/ (OPP boot voltage)

NOTE: This does not attempt to address OMAP5 - Aneesh please confirm

Reported-by: Isabelle Gros <i-gros@ti.com>
Reported-by: Jerome Angeloni <j-angeloni@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
12 years agoOMAP3+: Introduce generic logic for OMAP voltage controller
Nishanth Menon [Thu, 1 Mar 2012 14:17:37 +0000 (14:17 +0000)]
OMAP3+: Introduce generic logic for OMAP voltage controller

OMAP Voltage controller is used to generically talk to
PMICs on OMAP3,4,5 over I2C_SR. Instead of replicating code
in multiple SoC code, introduce a common voltage controller
logic which can be re-used from elsewhere.

With this change, we replace setup_sri2c with omap_vc_init which
has the same functionality, and replace the voltage scale
replication in do_scale_vcore and do_scale_tps62361 with
omap_vc_bypass_send_value. omap_vc_bypass_send_value can also
now be used with any configuration of PMIC.

NOTE: Voltage controller controlling I2C_SR is a write-only data
path, so no register read operation can be implemented.

Reported-by: Isabelle Gros <i-gros@ti.com>
Reported-by: Jerome Angeloni <j-angeloni@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
12 years agoARM:OMAP+:MMC: Add parameters to MMC init
Jonathan Solnit [Fri, 24 Feb 2012 11:30:18 +0000 (11:30 +0000)]
ARM:OMAP+:MMC: Add parameters to MMC init

Add parameters to the OMAP MMC initialization function so the board can
mask host capabilities and set the maximum clock frequency.  While the
OMAP supports a certain set of MMC host capabilities, individual boards
may be more restricted and the OMAP may need to be configured to match
the board.  The PRG_SDMMC1_SPEEDCTRL bit in the OMAP3 is an example.

Signed-off-by: Jonathan Solnit <jsolnit@gmail.com>
12 years agokirkwood: add support for Cloud Engines Pogoplug E02
David Purdy [Tue, 27 Mar 2012 16:01:09 +0000 (16:01 +0000)]
kirkwood: add support for Cloud Engines Pogoplug E02

This patch adds support for Cloud Engines Pogoplug E02

Information regarding the CE Pogoplug E02 board can be found at:
http://archlinuxarm.org/platforms/armv5/pogoplug-v2-pinkgray

Signed-off-by: Dave Purdy <david.c.purdy@gmail.com>
Cc: prafulla@marvell.com
Cc: albert.u.boot@aribaud.net
12 years agokirkwood: add NAS62x0 board support
Luka Perkov [Tue, 17 Apr 2012 09:22:17 +0000 (09:22 +0000)]
kirkwood: add NAS62x0 board support

Add support for new boards RaidSonic ICY BOX NAS6210 and NAS6220.

NAS6210 has 1 SATA and 1 eSATA port while NAS6220 has 2 SATA ports.

More information about the boards can be found here:

http://www.raidsonic.de/en/products/nas-systems.php?we_objectID=7036
http://www.raidsonic.de/en/products/nas-systems.php?we_objectID=7515

Signed-off-by: Luka Perkov <uboot@lukaperkov.net>
Signed-off-by: Gerald Kerma <dreagle@doukki.net>
Signed-off-by: Simon Baatz <gmbnomis@gmail.com>
12 years agodevkit3250: add Timll DevKit3250 board initial support
Vladimir Zapolskiy [Thu, 19 Apr 2012 04:33:10 +0000 (04:33 +0000)]
devkit3250: add Timll DevKit3250 board initial support

This change adds a basic support for Embest/Timll DevKit3250 board,
NOR and UART are the only supported peripherals for a moment. The board
doesn't require low-level init, because the initial SDRAM and GPIO
configuration is performed during kickstart bootloader execution.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
12 years agoserial: add LPC32X0 high-speed UART devices support
Vladimir Zapolskiy [Thu, 19 Apr 2012 04:33:09 +0000 (04:33 +0000)]
serial: add LPC32X0 high-speed UART devices support

This change adds an implementation of high-speed UART found on NXP
LPC32X0 SoCs. Such UARTs are enumerated as UART1, UART2 and UART7.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Marek Vasut <marek.vasut@gmail.com>