Raphael Isemann [Thu, 26 Nov 2020 08:40:02 +0000 (09:40 +0100)]
Reland [lldb] Fix TestThreadStepOut.py after "Flush local value map on every instruction"
The original patch got reverted as a dependency of
cf1c774d6ace59c5adc9ab71b31e .
That patch got relanded so it's also necessary to reland this patch.
Original summary:
After
cf1c774d6ace59c5adc9ab71b31e762c1be695b1, Clang seems to generate code
that is more similar to icc/Clang, so we can use the same line numbers for
all compilers in this test.
Raphael Isemann [Thu, 21 Jan 2021 12:06:47 +0000 (13:06 +0100)]
[lldb] Make TestBSDArchives a no-debug-info-test
The DSYM variant of this test is failing since D94890. But as we explicitly
try to disable the DSYM generation in the makefile and build the archive on
our own, I don't see why we even need to run the DSYM version of the test.
This patch disables the generated derived versions of this test for the
different debug information containers (which includes the failing DSYM one).
Raphael Isemann [Thu, 21 Jan 2021 11:05:59 +0000 (12:05 +0100)]
[lldb][import-std-module] Do some basic file checks before trying to import a module
Currently when LLDB has enough data in the debug information to import the `std` module,
it will just try to import it. However when debugging libraries where the sources aren't
available anymore, importing the module will generate a confusing diagnostic that
the module couldn't be built.
For the fallback mode (where we retry failed expressions with the loaded module), this
will cause the second expression to fail with a module built error instead of the
actual parsing issue in the user expression.
This patch adds checks that ensures that we at least have any source files in the found
include paths before we try to import the module. This prevents the module from being
loaded in the situation described above which means we don't emit the bogus 'can't
import module' diagnostic and also don't waste any time retrying the expression in the
fallback mode.
For the unit tests I did some refactoring as they now require a VFS with the files in it
and not just the paths. The Python test just builds a binary with a fake C++ module,
then deletes the module before debugging.
Fixes rdar://
73264458
Reviewed By: JDevlieghere
Differential Revision: https://reviews.llvm.org/D95096
Adhemerval Zanella [Wed, 13 Jan 2021 17:27:42 +0000 (17:27 +0000)]
MC: AArch64: Add support for gotpage_lo15
It is not used bt LLVM itself, but it would be used on lld tests
to implement R_AARCH64_LD64_GOTPAGE_LO15 support.
Simon Pilgrim [Thu, 21 Jan 2021 11:01:02 +0000 (11:01 +0000)]
[DAG] CombineToPreIndexedLoadStore - use const APInt& for getAPIntValue(). NFCI.
Cleanup some code to use auto* properly from cast, and use const APInt& for getAPIntValue() to avoid an unnecessary copy.
Simon Pilgrim [Thu, 21 Jan 2021 10:43:07 +0000 (10:43 +0000)]
[X86] Avoid a std::string copy by replacing auto with const auto&. NFC.
Fixes msvc analyzer warning.
Luo, Yuanke [Thu, 21 Jan 2021 10:00:43 +0000 (18:00 +0800)]
Revert "[X86][AMX] Fix tile config register spill issue."
This reverts commit
20013d02f3352a88d0838eed349abc9a2b0e9cc0.
Haojian Wu [Thu, 21 Jan 2021 10:06:43 +0000 (11:06 +0100)]
[clangd] Fix a missing override keyword, NFC.
Florian Hahn [Thu, 21 Jan 2021 09:32:04 +0000 (09:32 +0000)]
[LoopUnswitch] Implement first version of partial unswitching.
This patch applies the idea from D93734 to LoopUnswitch.
It adds support for unswitching on conditions that are only
invariant along certain paths through a loop.
In particular, it targets conditions in the loop header that
depend on values loaded from memory. If either path from
the true or false successor through the loop does not modify
memory, perform partial loop unswitching.
That is, duplicate the instructions feeding the condition in the pre-header.
Then unswitch on the duplicated condition. The condition is now known
in the unswitched version for the 'invariant' path through the original loop.
On caveat of this approach is that one of the loops created can be partially
unswitched again. To avoid this behavior, `llvm.loop.unswitch.partial.disable`
metadata is added to the unswitched loops, to avoid subsequent partial
unswitching.
If that's the approach to go, I can move the code handling the metadata kind
into separate functions.
This increases the cases we unswitch quite a bit in SPEC2006/SPEC2000 &
MultiSource. It also allows us to eliminate a dead loop in SPEC2017's omnetpp
```
Tests: 236
Same hash: 170 (filtered out)
Remaining: 66
Metric: loop-unswitch.NumBranches
Program base patch diff
test-suite...000/255.vortex/255.vortex.test 2.00 23.00 1050.0%
test-suite...T2006/401.bzip2/401.bzip2.test 7.00 55.00 685.7%
test-suite :: External/Nurbs/nurbs.test 5.00 26.00 420.0%
test-suite...s-C/unix-smail/unix-smail.test 1.00 3.00 200.0%
test-suite.../Prolangs-C++/ocean/ocean.test 1.00 3.00 200.0%
test-suite...tions/lambda-0.1.3/lambda.test 1.00 3.00 200.0%
test-suite...yApps-C++/PENNANT/PENNANT.test 2.00 5.00 150.0%
test-suite...marks/Ptrdist/yacr2/yacr2.test 1.00 2.00 100.0%
test-suite...lications/viterbi/viterbi.test 1.00 2.00 100.0%
test-suite...plications/d/make_dparser.test 12.00 24.00 100.0%
test-suite...CFP2006/433.milc/433.milc.test 14.00 27.00 92.9%
test-suite.../Applications/lemon/lemon.test 7.00 12.00 71.4%
test-suite...ce/Applications/Burg/burg.test 6.00 10.00 66.7%
test-suite...T2006/473.astar/473.astar.test 16.00 26.00 62.5%
test-suite...marks/7zip/7zip-benchmark.test 78.00 121.00 55.1%
```
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D93764
Alexander Belyaev [Wed, 20 Jan 2021 20:26:54 +0000 (21:26 +0100)]
[mlir] Remove complex ops from Standard dialect.
`complex` dialect should be used instead.
https://llvm.discourse.group/t/rfc-split-the-complex-dialect-from-std/2496/2
Differential Revision: https://reviews.llvm.org/D95077
Fangrui Song [Thu, 21 Jan 2021 08:55:07 +0000 (00:55 -0800)]
MCDwarf: Delete uneeded parameter
And change signature
Georgii Rymar [Thu, 14 Jan 2021 13:20:35 +0000 (16:20 +0300)]
[llvm-nm][ELF] - Make -D display symbol versions.
This fixes https://bugs.llvm.org/show_bug.cgi?id=48670.
Since binutils 2.35, nm -D displays symbol versions by default.
This patch teaches llvm-nm to do the same.
Differential revision: https://reviews.llvm.org/D94907
Luo, Yuanke [Tue, 5 Jan 2021 13:41:51 +0000 (21:41 +0800)]
[X86][AMX] Fix tile config register spill issue.
Previous code build the model that tile config register is the user of
each AMX instruction. There is a problem for the tile config register
spill. When across function, the ldtilecfg instruction may be inserted
on each AMX instruction which use tile config register. This cause all
tile data register clobber.
To fix this issue, we remove the model of tile config register. We
analyze the regmask of call instruction and insert ldtilecfg if there is
any tile data register live across the call. Inserting the sttilecfg
before the call is unneccessary, because the tile config doesn't change
and we can just reload the config.
Besides we also need check tile config register interference. Since we
don't model the config register we should check interference from the
ldtilecfg to each tile data register def.
ldtilecfg
/ \
BB1 BB2
/ \
call BB3
/ \
%1=tileload %2=tilezero
We can start from the instruction of each tile def, and backward to
ldtilecfg. If there is any call instruction, and tile data register is
not preserved, we should insert ldtilecfg after the call instruction.
Differential Revision: https://reviews.llvm.org/D94155
Georgii Rymar [Mon, 18 Jan 2021 14:42:49 +0000 (17:42 +0300)]
[yaml2obj/obj2yaml] - Improve dumping/creating of ELF versioning sections.
This makes the following improvements.
For `SHT_GNU_versym`:
* yaml2obj: set `sh_link` to index of `.dynsym` section automatically.
For `SHT_GNU_verdef`:
* yaml2obj: set `sh_link` to index of `.dynstr` section automatically.
* yaml2obj: set `sh_info` field automatically.
* obj2yaml: don't dump the `Info` field when its value matches the number of version definitions.
For `SHT_GNU_verneed`:
* yaml2obj: set `sh_link` to index of `.dynstr` section automatically.
* yaml2obj: set `sh_info` field automatically.
* obj2yaml: don't dump the `Info` field when its value matches the number of version dependencies.
Also, simplifies few test cases.
Differential revision: https://reviews.llvm.org/D94956
madhur13490 [Wed, 13 Jan 2021 09:32:29 +0000 (09:32 +0000)]
[IndirectFunctions] Skip propagating attributes to address taken functions
In case of indirect calls or address taken functions,
skip propagating any attributes to them. We just
propagate features to such functions.
Reviewed By: rampitec
Differential Revision: https://reviews.llvm.org/D94585
Kazu Hirata [Thu, 21 Jan 2021 05:35:55 +0000 (21:35 -0800)]
[llvm] Use hasSingleElement (NFC)
Kazu Hirata [Thu, 21 Jan 2021 05:35:53 +0000 (21:35 -0800)]
[Transforms] Use llvm::append_range (NFC)
Kazu Hirata [Thu, 21 Jan 2021 05:35:51 +0000 (21:35 -0800)]
[llvm] Construct SmallVector with iterator ranges (NFC)
Max Kazantsev [Thu, 21 Jan 2021 04:15:16 +0000 (11:15 +0700)]
[X86] Add experimental option to separately tune alignment of innermost loops
We already have an experimental option to tune loop alignment. Its impact
is very wide (and there is a suspicion that it's not always profitable). We want
to have something more narrow to play with. This patch adds similar option that
overrides preferred alignment for innermost loops. This is for experimental
purposes, default values do not change the existing behavior.
Differential Revision: https://reviews.llvm.org/D94895
Reviewed By: pengfei
Hsiangkai Wang [Sat, 16 Jan 2021 13:40:41 +0000 (21:40 +0800)]
[RISCV] Implement vssseg intrinsics.
Define vlsseg intrinsics and pseudo instructions. Lower vlsseg
intrinsics to pseudo instructions in RISCVDAGToDAGISel.
Differential Revision: https://reviews.llvm.org/D94863
Hsiangkai Wang [Fri, 15 Jan 2021 11:29:51 +0000 (19:29 +0800)]
[RISCV] Implement vlsseg intrinsics.
Define vlsseg intrinsics and pseudo instructions. Lower vlsseg intrinsics
to pseudo instructions in RISCVDAGToDAGISel.
Differential Revision: https://reviews.llvm.org/D94763
Hsiangkai Wang [Thu, 14 Jan 2021 09:07:18 +0000 (17:07 +0800)]
[RISCV] Implement vsseg intrinsics.
Define vsseg intrinsics and pseudo instructions. Lower vsseg intrinsics
to pseudo instructions in RISCVDAGToDAGISel.
Differential Revision: https://reviews.llvm.org/D94688
Jonas Devlieghere [Thu, 21 Jan 2021 02:49:19 +0000 (18:49 -0800)]
[lldb] Upstream eCore_arm_arm64e enum value in ArchSpec
Upstream the eCore_arm_arm64e enum value in ArchSpec. All the other
arm64e triple changes already landed in LLVM.
Differential revision: https://reviews.llvm.org/D95110
Craig Topper [Thu, 21 Jan 2021 02:35:31 +0000 (18:35 -0800)]
[RISCV] Use update_llc_test_checks.py to regenerate check lines in vleff-rv32.ll and vleff-rv64.ll.
This should minimize change in a future patch.
Jonas Devlieghere [Thu, 21 Jan 2021 02:38:56 +0000 (18:38 -0800)]
[dsymutil] Compare object modification times using second precision
The modification time in the debug map is expressed using second
precision, while the modification time returned by the filesystem could
be more precise. Avoid spurious warnings about timestamp mismatches by
truncating the modification time reported by the system to seconds.
Jim Ingham [Thu, 21 Jan 2021 02:38:07 +0000 (18:38 -0800)]
Use CXX_SOURCES and point to the right source file.
Copy paste error, but the test still built on macOS. Weird.
It failed on debian linux with an error about -fno-limit-debug-info
not being a supported flag??? Not sure how this goof would cause
that error, but let's see if it did...
Jianzhou Zhao [Wed, 13 Jan 2021 01:37:16 +0000 (01:37 +0000)]
[MSan] Move origins for overlapped memory transfer
Reviewed-by: eugenis
Differential Revision: https://reviews.llvm.org/D94572
Jim Ingham [Thu, 21 Jan 2021 01:58:34 +0000 (17:58 -0800)]
Fix a bug with setting breakpoints on C++11 inline initialization statements.
If they occurred before the constructor that used them, we would refuse to
set the breakpoint because we thought they were crossing function boundaries.
Differential Revision: https://reviews.llvm.org/D94846
Jez Ng [Thu, 21 Jan 2021 01:41:24 +0000 (20:41 -0500)]
[lld-macho] Add dependency on ObjCARC to fix shared build
Shilei Tian [Thu, 21 Jan 2021 01:34:03 +0000 (20:34 -0500)]
[Clang][OpenMP] Use `clang_cc1` test for `declare_target_device_only_compilation.cpp`
Use `clang_cc1` test for `declare_target_device_only_compilation.cpp`
Reviewed By: echristo
Differential Revision: https://reviews.llvm.org/D95089
Guozhi Wei [Thu, 21 Jan 2021 01:15:47 +0000 (17:15 -0800)]
[DAGCombiner] Precommit test case for D95086
This is the test case for D95086 with worse result.
Differential Revision: https://reviews.llvm.org/D95103
River Riddle [Thu, 21 Jan 2021 00:47:00 +0000 (16:47 -0800)]
[mlir][OpFormatGen] Fix incorrect kind used for RegionsDirective
I attempted to write a test case for this, but the situations in which the kind is used for RegionDirective and ResultsDirective have zero overlap; meaning that there isn't a situation in which sharing the kind creates a conflict.
Differential Revision: https://reviews.llvm.org/D94988
mfehr [Thu, 21 Jan 2021 00:29:51 +0000 (00:29 +0000)]
[mlir] Make MLIRContext::getOrLoadDialect(StringRef, TypeID, ...) public
Having this function in a public scope is helpful to register dialects that are
defined at runtime, and thus that need a runtime-defined TypeID.
Also, a similar function in DialectRegistry, insert(TypeID, StringRef, ...), has
a public scope.
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D95091
River Riddle [Thu, 21 Jan 2021 00:17:26 +0000 (16:17 -0800)]
[mlir] Add a new builtin `unrealized_conversion_cast` operation
An `unrealized_conversion_cast` operation represents an unrealized conversion
from one set of types to another, that is used to enable the inter-mixing of
different type systems. This operation should not be attributed any special
representational or execution semantics, and is generally only intended to be
used to satisfy the temporary intermixing of type systems during the conversion
of one type system to another.
This operation was discussed in the following RFC(and ODM):
https://llvm.discourse.group/t/open-meeting-1-14-dialect-conversion-and-type-conversion-the-question-of-cast-operations/
Differential Revision: https://reviews.llvm.org/D94832
River Riddle [Thu, 21 Jan 2021 00:17:13 +0000 (16:17 -0800)]
[mlir] Add an interface for Cast-Like operations
A cast-like operation is one that converts from a set of input types to a set of output types. The arity of the inputs may be from 0-N, whereas the arity of the outputs may be anything from 1-N. Cast-like operations are removable in cases where they produce a "no-op", i.e when the input types and output types match 1-1.
Differential Revision: https://reviews.llvm.org/D94831
Varun Gandhi [Thu, 7 Jan 2021 16:50:31 +0000 (08:50 -0800)]
[NFC] Minor cleanup for ValueHandle code.
Based on feedback in https://reviews.llvm.org/D93433.
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D94238
Michael Jones [Wed, 20 Jan 2021 23:42:01 +0000 (23:42 +0000)]
[libc][NFC][obvious] fix the names of MPFR tests
I missed the MPFR tests in my previous commit. They have now been fixed
to not fail the prefix check in the test macro.
Michael Jones [Fri, 15 Jan 2021 21:54:23 +0000 (21:54 +0000)]
[libc][NFC] add "LlvmLibc" as a prefix to all test names
Summary:
Having a consistent prefix makes selecting all of the llvm libc tests
easier on any platform that is also using the gtest framework.
This also modifies the TEST and TEST_F macros to enforce this change
moving forward.
Reviewers: sivachandra
Subscribers:
Dávid Bolvanský [Wed, 20 Jan 2021 23:12:28 +0000 (00:12 +0100)]
[BuildLibcalls, Attrs] Support more variants of C++'s new, add attributes for C++'s delete
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D95095
Craig Topper [Wed, 20 Jan 2021 22:52:03 +0000 (14:52 -0800)]
[RISCV] Add another isel pattern for slliu.w.
Previously we only matched (and (shl X, C1), 0xffffffff << C1)
which matches the InstCombine canonicalization order. But its
possible to see (shl (and X, 0xffffffff), C1) if the pattern
is introduced in SelectionDAG. For example, through expansion of
a GEP.
Craig Topper [Wed, 20 Jan 2021 22:32:20 +0000 (14:32 -0800)]
[RISCV] Add addu.w and slliu.w test that uses getelementptr with zero extended indices.
This is closer to the kind of code that these intrinsics are
targeted at. Note we fail to match slliu.w here because our pattern
looks for (and (shl X, C1), 0xffffffff << C1) rather than
(shl (and X, 0xffffffff), C1). I'll fix this in a follow up
commit.
Diego Caballero [Wed, 20 Jan 2021 22:36:37 +0000 (00:36 +0200)]
Revert "[mlir][Affine] Add support for multi-store producer fusion"
This reverts commit
7dd198852b4db52ae22242dfeda4eccda83aa8b2.
ASAN issue.
Aart Bik [Wed, 20 Jan 2021 18:37:22 +0000 (10:37 -0800)]
[mlir][sparse] add asserts on reading in tensor data
Rationale:
Since I made the argument that metadata helps with extra
verification checks, I better actually do that ;-)
Reviewed By: penpornk
Differential Revision: https://reviews.llvm.org/D95072
Ryan Houdek [Wed, 20 Jan 2021 22:23:43 +0000 (22:23 +0000)]
D94954: Fixes Snapdragon Kryo CPU core detection
All of these families were claiming to be a73 based, which was causing
-mcpu/mtune=native to never use the newer features available to these
cores.
Goes through each and bumps the individual cores to their respective Big
counterparts. Since this code path doesn't support big.little detection,
there was already a precedent set with the Qualcomm line to choose the
big cores only.
Adds a comment on each line for the product's name that the part number
refers to. Confirmed on-device and through Linux header naming
convections.
Additionally newer SoCs mix CPU implementer parts from multiple
implementers. Both 0x41 (ARM) and 0x51 (Qualcomm) in the Snapdragon case
This was causing a desync in information where the scan at the start to
find the implementer would mismatch the part scan later on.
Now scan for both implementer and part at the start so these stay in
sync.
Differential Revision: https://reviews.llvm.org/D94954
Fangrui Song [Wed, 20 Jan 2021 22:22:33 +0000 (14:22 -0800)]
Makefile.rules: Avoid redundant .d generation (make restart) and inline archive rule to the only test
Take an example when `CXX_SOURCES` is main.cpp.
main.d is an included file. make will rebuild main.d, re-executes itself [1] to read
in the new main.d file, then rebuild main.o, finally link main.o into a.out.
main.cpp is parsed twice in this process.
This patch merges .d generation into .o generation [2], writes explicit rules
for .c/.m and deletes suffix rules for %.m and %.o. Since a target can be
satisfied by either of .c/.cpp/.m/.mm, we use multiple pattern rules. The
rule with the prerequisite (with VPATH considered) satisfied is used [3].
Since suffix rules are disabled, the implicit rule for archive member targets is
no long available [4]. Rewrite, simplify the archive rule and inline it into the
only test `test/API/functionalities/archives/Makefile`.
[1]: https://www.gnu.org/software/make/manual/html_node/Remaking-Makefiles.html
[2]: http://make.mad-scientist.net/papers/advanced-auto-dependency-generation/
[3]: https://www.gnu.org/software/make/manual/html_node/Pattern-Match.html
[4]: https://www.gnu.org/software/make/manual/html_node/Archive-Update.html
ObjC/ObjCXX tests only run on macOS. I don't have testing environment. Hope
someone can do it for me.
Reviewed By: JDevlieghere
Differential Revision: https://reviews.llvm.org/D94890
Nicolas Vasilache [Wed, 20 Jan 2021 22:19:59 +0000 (22:19 +0000)]
[mlir] NFC - Fix unused variable in non-debug mode
Tony Tye [Wed, 20 Jan 2021 03:38:55 +0000 (03:38 +0000)]
[NFC][AMDGPU] Document target ID syntax for code object V2 to V3
Differential Revision: https://reviews.llvm.org/D95018
Michael Liao [Wed, 20 Jan 2021 19:55:06 +0000 (14:55 -0500)]
[hip] Fix `<complex>` compilation on Windows with VS2019.
Differential Revision: https://reviews.llvm.org/D95075
Mircea Trofin [Wed, 20 Jan 2021 19:25:43 +0000 (11:25 -0800)]
Reland "[NPM][Inliner] Factor ImportedFunctionStats in the InlineAdvisor"
This reverts commit
d97f776be5f8cd3cd446fe73827cd355f6bab4e1.
The original problem was due to build failures in shared lib builds. D95079
moved ImportedFunctionsInliningStatistics under Analysis, unblocking
this.
Eugene Zhulenev [Wed, 20 Jan 2021 13:17:12 +0000 (05:17 -0800)]
[mlir:async] Fix data races in AsyncRuntime
Resumed coroutine potentially can deallocate the token/value/group and destroy the mutex before the std::unique_ptr destructor.
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D95037
LLVM GN Syncbot [Wed, 20 Jan 2021 21:18:20 +0000 (21:18 +0000)]
[gn build] Port
95ce32c7878d
Mircea Trofin [Wed, 20 Jan 2021 20:39:55 +0000 (12:39 -0800)]
[NFC] Move ImportedFunctionsInliningStatistics to Analysis
This is related to D94982. We want to call these APIs from the Analysis
component, so we can't leave them under Transforms.
Differential Revision: https://reviews.llvm.org/D95079
Peter Steinfeld [Wed, 20 Jan 2021 20:34:08 +0000 (12:34 -0800)]
[flang] Fix creation of deferred shape arrays by POINTER statement
It's possible to declare deferred shape array using the POINTER
statement, for example:
POINTER :: var(:)
When analyzing POINTER declarations, we were not capturing the array
specification information, if present. I fixed this by changing the
"Post" function for "parser::PointerDecl" to check to see if the
declaration contained a "DeferredShapeSpecList". In such cases, I
analyzed the shape and used to information to declare an "ObjectEntity"
that contains the shape information rather than an "UnknownEntity".
I also added a couple of small tests that fail to compile without these
changes.
Differential Revision: https://reviews.llvm.org/D95080
Shilei Tian [Wed, 20 Jan 2021 20:55:52 +0000 (15:55 -0500)]
[OpenMP][NVPTX] Added forward declaration to pave the way for building deviceRTLs with OpenMP
Once we switch to build deviceRTLs with OpenMP, primitives and CUDA
intrinsics cannot be used directly anymore because `__device__` is not recognized
by OpenMP compiler. To avoid involving all CUDA internal headers we had in `clang`,
we forward declared these functions. Eventually they will be transformed into
right LLVM instrinsics.
Reviewed By: JonChesterfield
Differential Revision: https://reviews.llvm.org/D95058
Amy Huang [Tue, 12 Jan 2021 00:37:29 +0000 (16:37 -0800)]
[CodeView] Emit function types in -gline-tables-only.
This change adds function types to further differentiate between
FUNC_IDs in -gline-tables-only.
Size increase of object files in clang are
Before: 917990 kb
After: 999312 kb
Bug: https://bugs.llvm.org/show_bug.cgi?id=48432
Differential Revision: https://reviews.llvm.org/D95001
peter klausler [Wed, 20 Jan 2021 01:14:41 +0000 (17:14 -0800)]
[flang] Infrastructure improvements in utility routines
* IsArrayElement() needs another option to control whether it
should ignore trailing component references.
* Add IsObjectPointer().
* Add const Scope& variants of IsFunction() and IsProcedure().
* Make TypeAndShape::Characterize() work with procedure bindings.
* Handle CHARACTER length in MeasureSizeInBytes().
* Fine-tune FindExternallyVisibleObject()'s handling of dummy arguments
to conform with Fortran 2018: only INTENT(IN) and dummy pointers
in pure functions signify; update two tests accordingly.
Also: resolve some stylistic inconsistencies and add a missing
"const" in the expression traversal template framework.
Differential Revision: https://reviews.llvm.org/D95011
Nicolas Vasilache [Wed, 20 Jan 2021 20:29:34 +0000 (20:29 +0000)]
[mlir][Linalg] NFC - Fully compose map and operands when creating AffineMin in tiling.
This may simplify the composition of patterns but is otherwise NFC.
Alexander Belyaev [Wed, 20 Jan 2021 20:11:49 +0000 (21:11 +0100)]
[mlir] Add ComplexDialect to SCF->GPU pass.
Nicolas Vasilache [Wed, 20 Jan 2021 19:54:02 +0000 (19:54 +0000)]
[mlir] Fix SubTensorInsertOp semantics
Like SubView, SubTensor/SubTensorInsertOp are allowed to have rank-reducing/expanding semantics. In the case of SubTensorInsertOp , the rank of offsets/sizes/strides should be the rank of the destination tensor.
Also, add a builder flavor for SubTensorOp to return a rank-reduced tensor.
Differential Revision: https://reviews.llvm.org/D95076
Nikita Popov [Wed, 20 Jan 2021 19:52:23 +0000 (20:52 +0100)]
[PredicateInfo] Handle logical and/or
Teach PredicateInfo to handle logical and/or the same way as
bitwise and/or. This allows handling logical and/or inside IPSCCP
and NewGVN.
Med Ismail Bennani [Wed, 20 Jan 2021 19:29:13 +0000 (20:29 +0100)]
[lldb/Commands] Align process launch --plugin with process attach (NFC)
Following `
7169d3a315f4cdc19c4ab6b8f20c6f91b46ba9b8`, this patch updates
the short option for the plugin command option to (`-p` to `-P`) to
align with the `process attach` command options.
The long option remains the same since there are already the same for both
commands.
Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
Nikita Popov [Mon, 11 Jan 2021 19:17:10 +0000 (20:17 +0100)]
[PredicateInfo][SCCP][NewGVN] Add tests for logical and/or (NFC)
Duplicate some existing and/or tests using logical form.
Reid Kleckner [Wed, 20 Jan 2021 19:46:05 +0000 (11:46 -0800)]
Reland "[PDB] Defer relocating .debug$S until commit time and parallelize it"
This reverts commit
5b7aef6eb4b2930971029b984cb2360f7682e5a5 and relands
6529d7c5a45b1b9588e512013b02f891d71bc134.
The ASan error was debugged and determined to be the fault of an invalid
object file input in our test suite, which was fixed by my last change.
LLD's project policy is that it assumes input objects are valid, so I
have added a comment about this assumption to the relocation bounds
check.
Nicolas Vasilache [Wed, 20 Jan 2021 19:24:49 +0000 (19:24 +0000)]
[mlir][Linalg] NFC - Expose getSmallestBoundingIndex as an utility function
Jon Chesterfield [Wed, 20 Jan 2021 19:50:50 +0000 (19:50 +0000)]
[libomptarget][devicertl][nfc] Simplify target_atomic abstraction
[libomptarget][devicertl][nfc] Simplify target_atomic abstraction
Atomic functions were implemented as a shim around cuda's atomics, with
amdgcn implementing those symbols as a shim around gcc style intrinsics.
This patch folds target_atomic.h into target_impl.h and folds amdgcn.
Further work is likely to be useful here, either changing to openmp's atomic
interface or instantiating the templates on the few used types in order to
move them into a cuda/c++ implementation file. This change is mostly to
group the remaining uses of the cuda api under nvptx' target_impl abstraction.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D95062
Pavel Labath [Wed, 20 Jan 2021 19:49:03 +0000 (20:49 +0100)]
Revert "[lldb] Re-enable TestPlatformProcessConnect on macos"
This reverts commit
079e664661770a78e30c0d27a12d50047f1b1ea8. It needs
more work.
Reid Kleckner [Wed, 20 Jan 2021 19:16:01 +0000 (11:16 -0800)]
[COFF] Fix relocation offsets in pdb-file-statics test input
The relocation offsets were incorrect. I fixed them with llvm-readobj
-codeview -codeview-subsection-bytes, which has a helpful printout of
the relocations that apply to a given symbol record with their offsets.
With this, I was able to update the relocation offsets in the yaml to
fix the line table and the S_DEFRANGE_REGISTER records.
There is still some remaining inconsistency in yaml2obj and obj2yaml
when round tripping MSVC objects, but that isn't a blocker for relanding
D94267.
Jon Chesterfield [Wed, 20 Jan 2021 19:45:05 +0000 (19:45 +0000)]
[libomptarget][devicertl][nfc] Remove some cuda intrinsics, simplify
[libomptarget][devicertl][nfc] Remove some cuda intrinsics, simplify
Replace __popc, __ffs with clang intrinsics. Move kmpc_impl_min to only file
that uses it and replace template with explictly typed.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D95060
Nikita Popov [Mon, 11 Jan 2021 21:18:12 +0000 (22:18 +0100)]
[PredicateInfo] Generalize processing of conditions
Branch/assume conditions in PredicateInfo are currently handled in
a rather ad-hoc manner, with some arbitrary limitations. For example,
an `and` of two `icmp`s will be handled, but an `and` of an `icmp`
and some other condition will not. That also includes the case where
more than two conditions and and'ed together.
This patch makes the handling more general by looking through and/ors
up to a limit and considering all kinds of conditions (though operands
will only be taken for cmps of course).
Differential Revision: https://reviews.llvm.org/D94447
Andrzej Warzynski [Wed, 20 Jan 2021 18:27:04 +0000 (18:27 +0000)]
[flang][driver] Refactor one unit-test case to use fixtures (nfc)
Move the unit test from InputOutputTest.cpp to FrontendActionTest.cpp
and re-implement it in terms of the FrontendActionTest fixture. This is
just a small code clean-up and a continuation of:
* https://reviews.llvm.org/D93544
Moving forward, we should try be implementing all unit-test cases for
Flang's frontend actions in terms of FrontendActionTest.
Reviewed By: sameeranjoshi
Differential Revision: https://reviews.llvm.org/D94922
Erich Keane [Wed, 20 Jan 2021 19:33:22 +0000 (11:33 -0800)]
[EXTINT][OMP] Fix _ExtInt type checking in device code
_ExtInt gets stuck in the device-type-checking for __int128 if it is
between 65 and 128 bits inclusive. Anything larger or smaller was
permitted despite this, so this is simply enabling 65-128 bit _ExtInts.
_ExtInt is supported on all our current ABIs, but we stil use the
hasExtIntType in the target info to differentiate here so that it can be
disabled.
Thomas Lively [Wed, 20 Jan 2021 19:28:06 +0000 (11:28 -0800)]
[WebAssembly] Prototype new f64x2 conversions
As proposed in https://github.com/WebAssembly/simd/pull/383.
Differential Revision: https://reviews.llvm.org/D95012
Nicolas Vasilache [Wed, 20 Jan 2021 19:02:08 +0000 (19:02 +0000)]
[mlir][Linalg] NFC - getAssumedNonShapedOperands now returns OperandRange
Also adds a isInput interface method.
dfukalov [Wed, 20 Jan 2021 12:48:02 +0000 (15:48 +0300)]
[NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets
... to reduce headers dependency.
Reviewed By: rampitec, arsenm
Differential Revision: https://reviews.llvm.org/D95036
Jez Ng [Tue, 12 Jan 2021 19:41:56 +0000 (14:41 -0500)]
[lld-macho] Run ObjCContractPass during LTO
Run the ObjCARCContractPass during LTO. The legacy LTO backend (under
LTO/ThinLTOCodeGenerator.cpp) already does this; this diff just adds that
behavior to the new LTO backend. Without that pass, the objc.clang.arc.use
intrinsic will get passed to the instruction selector, which doesn't know how to
handle it.
In order to test both the new and old pass managers, I've also added support for
the `--[no-]lto-legacy-pass-manager` flags.
P.S. Not sure if the ordering of the pass within the pipeline matters...
Reviewed By: fhahn
Differential Revision: https://reviews.llvm.org/D94547
Jez Ng [Tue, 12 Jan 2021 19:55:38 +0000 (14:55 -0500)]
[lld-macho][easy] Create group for LLD-specific CLI flags
Reviewed By: #lld-macho, compnerd
Differential Revision: https://reviews.llvm.org/D94545
Mircea Trofin [Wed, 20 Jan 2021 19:19:16 +0000 (11:19 -0800)]
Revert "[NPM][Inliner] Factor ImportedFunctionStats in the InlineAdvisor"
This reverts commit
e8aec763a57e211420dfceb2a8dc6b88574924f3.
peter klausler [Wed, 20 Jan 2021 01:09:55 +0000 (17:09 -0800)]
[flang] Fix ASSOCIATE statement name resolution
F18 Clause 19.4p9 says:
The associate names of an ASSOCIATE construct have the scope of the
block.
Clause 11.3.1p1 says the ASSOCIATE statement is not itself in the block:
R1102 associate-construct is: associate-stmt block end-associate-stmt
Associate statement associations are currently fully processed from left
to right, incorrectly interposing associating entities earlier in the
list on same-named entities in the host scope.
1 program p
2 logical :: a = .false.
3 real :: b = 9.73
4 associate (b => a, a => b)
5 print*, a, b
6 end associate
7 print*, a, b
8 end
Associating names 'a' and 'b' at line 4 in this code are now both
aliased to logical host entity 'a' at line 2. This happens because the
reference to 'b' in the second association incorrectly resolves 'b' to
the entity in line 4 (already associated to 'a' at line 2), rather than
the 'b' at line 3. With bridge code to process these associations,
f18 output is:
F F
F 9.73
It should be:
9.73 F
F 9.73
To fix this, names in right-hand side selector variables/expressions
must all be resolved before any left-hand side entities are resolved.
This is done by maintaining a stack of lists of associations, rather
than a stack of associations. Each ASSOCIATE statement's list of
assocations is then visited once for right-hand side processing, and
once for left-hand side processing.
Note that other construct associations do not have this problem.
SELECT RANK and SELECT TYPE each have a single assocation, not a list.
Constraint C1113 prohibits the right-hand side of a CHANGE TEAM
association from referencing any left-hand side entity.
Differential Revision: https://reviews.llvm.org/D95010
Mircea Trofin [Tue, 19 Jan 2021 18:05:25 +0000 (10:05 -0800)]
[NPM][Inliner] Factor ImportedFunctionStats in the InlineAdvisor
When using 2 InlinePass instances in the same CGSCC - one for other
mandatory inlinings, the other for the heuristic-driven ones - the order
in which the ImportedFunctionStats would be output-ed would depend on
the destruction order of the inline passes, which is not deterministic.
This patch moves the ImportedFunctionStats responsibility to the
InlineAdvisor to address this problem.
Differential Revision: https://reviews.llvm.org/D94982
Hans Wennborg [Wed, 20 Jan 2021 19:03:02 +0000 (20:03 +0100)]
Revert "[DAGCombiner] Enable SimplifyDemandedBits vector support for TRUNCATE"
It caused "Vector shift amounts must be in the same as their first arg"
asserts in Chromium builds. See the code review for repro instructions.
> Add DemandedElts support inside the TRUNCATE analysis.
>
> Differential Revision: https://reviews.llvm.org/D56387
This reverts commit
cad4275d697c601761e0819863f487def73c67f8.
George Burgess IV [Wed, 20 Jan 2021 18:56:21 +0000 (10:56 -0800)]
Revert "[clang] Change builtin object size when subobject is invalid"
This reverts commit
275f30df8ad6de75e1f29e4b33eaeb67686caf0d.
As noted on the code review (https://reviews.llvm.org/D92892), this
change causes us to reject valid code in a few cases. Reverting so we
have more time to figure out what the right fix{es are, is} here.
Reid Kleckner [Wed, 20 Jan 2021 19:00:58 +0000 (11:00 -0800)]
[COFF] Use range for on relocations, NFC
Dávid Bolvanský [Wed, 20 Jan 2021 18:45:13 +0000 (19:45 +0100)]
[BuildLibcalls] Mark some libcalls with inaccessiblememonly and inaccessiblemem_or_argmemonly
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D94850
Craig Topper [Wed, 20 Jan 2021 18:32:03 +0000 (10:32 -0800)]
[RISCV] Remove unnecessary APInt copy. NFC
getAPIntValue returns a const APInt& so keep it as a reference.
Simon Pilgrim [Wed, 20 Jan 2021 18:15:39 +0000 (18:15 +0000)]
[X86][AVX] Handle vperm2x128 shuffling of a subvector splat.
We already handle "vperm2x128 (ins ?, X, C1), (ins ?, X, C1), 0x31" for shuffling of the upper subvectors, but we weren't dealing with the case when we were splatting the upper subvector from a single source.
Fangrui Song [Wed, 20 Jan 2021 18:14:10 +0000 (10:14 -0800)]
[AArch64] Fix -Wunused-but-set-variable in GCC -DLLVM_ENABLE_ASSERTIONS=off build
Frederik Gossen [Wed, 20 Jan 2021 17:52:55 +0000 (18:52 +0100)]
[MLIR][Standard] Add log1p operation to std
Differential Revision: https://reviews.llvm.org/D95041
Albion Fung [Wed, 20 Jan 2021 17:55:03 +0000 (12:55 -0500)]
[PowerPC][Power10] Exploit splat instruction xxsplti32dx in Power10
Exploits the instruction xxsplti32dx.
It can be used to materialize any 64 bit scalar/vector splat by using two instances, one for the upper 32 bits and the other for the lower 32 bits. It should not materialize the cases which can be materialized by using the instruction xxspltidp.
Differential Revision: https://https://reviews.llvm.org/D90173
Med Ismail Bennani [Wed, 20 Jan 2021 17:33:00 +0000 (18:33 +0100)]
[lldb/Commands] Refactor ProcessLaunchCommandOptions to use TableGen (NFC)
This patch refactors the current implementation of
`ProcessLaunchCommandOptions` to be generated by TableGen.
The patch also renames the class to `CommandOptionsProcessLaunch` to
align better with the rest of the codebase style and moves it to
separate files.
Differential Review: https://reviews.llvm.org/D95059
Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
Tobias Gysi [Wed, 20 Jan 2021 17:35:51 +0000 (18:35 +0100)]
[mlir] fix the rocm runtime wrapper to account for cuda / rocm api differences
The patch adapts the rocm runtime wrapper due to subtle differences between the cuda and the rocm/hip runtime api.
Reviewed By: csigg
Differential Revision: https://reviews.llvm.org/D95027
Jacques Pienaar [Wed, 20 Jan 2021 17:45:22 +0000 (09:45 -0800)]
Avoid unused variable warning in opt mode
Craig Topper [Wed, 20 Jan 2021 17:19:57 +0000 (09:19 -0800)]
[RISCV] Add way to mark CompressPats that should only be used for compressing.
There can be muliple patterns that map to the same compressed
instruction. Reversing those leads to multiple ways to uncompress
an instruction, but its not easily controllable which one will
be chosen by the tablegen backend.
This patch adds a flag to mark patterns that should only be used
for compressing. This allows us to leave one canonical pattern
for uncompressing.
The obvious benefit of this is getting c.mv to uncompress to
the addi patern that is aliased to the mv pseudoinstruction. For
the add/and/or/xor/li patterns it just removes some unreachable
code from the generated code.
Reviewed By: frasercrmck
Differential Revision: https://reviews.llvm.org/D94894
Diego Caballero [Wed, 20 Jan 2021 01:24:57 +0000 (03:24 +0200)]
[mlir][Affine] Add support for multi-store producer fusion
This patch adds support for producer-consumer fusion scenarios with
multiple producer stores to the AffineLoopFusion pass. The patch
introduces some changes to the producer-consumer algorithm, including:
* For a given consumer loop, producer-consumer fusion iterates over its
producer candidates until a fixed point is reached.
* Producer candidates are gathered beforehand for each iteration of the
consumer loop and visited in reverse program order (not strictly guaranteed)
to maximize the number of loops fused per iteration.
In general, these changes were needed to simplify the multi-store producer
support and remove some of the workarounds that were introduced in the past
to support more fusion cases under the single-store producer limitation.
This patch also preserves the existing functionality of AffineLoopFusion with
one minor change in behavior. Producer-consumer fusion didn't fuse scenarios
with escaping memrefs and multiple outgoing edges (from a single store).
Multi-store producer scenarios will usually (always?) have multiple outgoing
edges so we couldn't fuse any with escaping memrefs, which would greatly limit
the applicability of this new feature. Therefore, the patch enables fusion for
these scenarios. Please, see modified tests for specific details.
Reviewed By: andydavis1, bondhugula
Differential Revision: https://reviews.llvm.org/D92876
Shilei Tian [Wed, 20 Jan 2021 17:01:51 +0000 (12:01 -0500)]
[OpenMP][NVPTX] Replaced CUDA builtin vars with LLVM intrinsics
Replaced CUDA builtin vars with LLVM intrinsics such that we don't need
definitions of those intrinsics.
Reviewed By: JonChesterfield
Differential Revision: https://reviews.llvm.org/D95013
Sameer Sahasrabuddhe [Wed, 20 Jan 2021 16:32:09 +0000 (22:02 +0530)]
[AMDGPU] pin lit test divergent-unswitch.ll to the old pass manager
The loop-unswitch transform should not be performed on a loop whose
condition is divergent. For this to happen correctly, divergence
analysis must be available. The existing divergence analysis has not
been ported to the new pass manager yet. As a result, loop unswitching
on the new pass manager is currently unsafe on targets that care about
divergence.
This test is temporarily disabled to unblock work on the new pass
manager. The issue is now tracked in bug 48819.
Reviewed By: foad
Differential Revision: https://reviews.llvm.org/D95051
Sanjay Patel [Wed, 20 Jan 2021 13:32:47 +0000 (08:32 -0500)]
[SLP] reduce reduction code for checking vectorizable ops; NFC
This is another step towards removing `OperationData` and
fixing FMF matching/propagation bugs when forming reductions.
Sanjay Patel [Wed, 20 Jan 2021 13:11:30 +0000 (08:11 -0500)]
[SLP] refactor more reduction functions; NFC
We were able to remove almost all of the state from
OperationData, so these don't make sense as members
of that class - just pass the RecurKind in as a param.
More streamlining is possible, but I'm trying to avoid
logic/typo bugs while fixing this. Eventually, we should
not need the `OperationData` class.
Sanjay Patel [Tue, 19 Jan 2021 19:13:59 +0000 (14:13 -0500)]
[SLP] move reduction createOp functions; NFC
We were able to remove almost all of the state from
OperationData, so these don't make sense as members
of that class - just pass the RecurKind in as a param.
Louis Dionne [Mon, 18 Jan 2021 20:08:55 +0000 (15:08 -0500)]
[docs] Fix overly specific link to uploading patches on Phabricator
The documentation for contributing to LLVM currently links to the section
explaining how to submit a Phabricator review using the web interface.
I believe it would be better to link to the general page for using
Phabricator instead, which explains how to sign up with Phabricator,
and also how to submit patches using either the web interface or the
command-line.
I think this is worth changing because what currently *appears* to be our
preferred way of submitting a patch (through the web interface) isn't
actually what we prefer. Indeed, patches submitted from the command-line
have more meta-data available (such as which repository the patch targets),
and also can't suffer from missing context.
Differential Revision: https://reviews.llvm.org/D94929
Joseph Tremoulet [Wed, 20 Jan 2021 16:01:09 +0000 (11:01 -0500)]
Loop peeling: check that latch is conditional branch
Loop peeling assumes that the loop's latch is a conditional branch. Add
a check to canPeel that explicitly checks for this, and testcases that
otherwise fail an assertion when trying to peel a loop whose back-edge
is a switch case or the non-unwind edge of an invoke.
Reviewed By: skatkov, fhahn
Differential Revision: https://reviews.llvm.org/D94995