dxil: Delete load_ubo_dxil intrinsic

Instead of splitting unaligned UBO loads while still using derefs,
and then lowering load_ubo to load_ubo_dxil in lower_loads_stores_to_dxil,
use lower_mem_access_bit_sizes and lower_ubo_vec4 to handle load size and
alignment restrictions while converting to load_ubo_vec4 instead, which
has the same semantics as load_ubo_dxil.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3842
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>

dxil: Don't generate load_ubo_dxil directly

Just use load_ubo and let it get lowered appropriately later on.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>

microsoft/compiler: Support load_ubo_vec4

Add support for 16-bit UBO loads, delete handling of byte-addressed
UBO loads (which I think was never used anyway) and add handling
for the component const index to optimize out unneeded extractResults.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>

spirv2dxil: Don't lower shared/temp to explicit I/O

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>

microsoft/compiler: Un-lower shared/scratch to derefs

Derefs have index-based access semantics, which means we don't need
custom intrinsics to encode an index instead of a byte offset.

Remove the "masked" store intrinsics and just emit the pair of atomics
directly. This massively reduces duplication between scratch, shared,
and constant, while also moving more things into nir so more optimizations
can be done.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>

microsoft/compiler: Use mem_constant instead of shader_temp for consts

We still use shader_temp as a temporary variable mode to differentiate
which variables have simple deref patterns vs ones that need to be
lowered to ssbo, but then we put it back to mem_constant when we're
done to restore sanity.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>

microsoft/compiler: Emit const accesses as load_deref

There's a few changes in here that are very inter-related.

First, we stop lowering load_deref on shader_temp to load_ptr_dxil,
and just leave it as load_deref. In order for that to work, we need
the derefs to be in a shape that's acceptable to DXIL, so the only
current producer of shader_temp loads (the CLC frontend) needs to
run some lowering passes on them first.

The DXIL backend is augmented to just write out deref indices while
walking a deref chain, which will get combined in the load op into
a GEP instruction. For non-mesh/raytracing shaders, these are required
to be single-level scalar arrays, but the complexity here is preparation
for when we don't need to do that anymore.

Additionally, the const lookups are changed from using a hash table
to just putting an index on the variable.

All of this together is enough to enable the authored-forever-ago test
which uses indirect array access into a const packed struct. The
load_ptr_dxil handling didn't deal with packed structs / unaligned
accesses, but now that we're in a logical address space with derefs
instead of physical, there's no alignment to deal with anymore and
the fact that it's packed goes out the window.

This removes one custom DXIL intrinsic.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>

microsoft/compiler: Add some more lowering passes for derefs

DXIL requires GEP chains to point to a global variable that's a flat
array of primitive types. If we're converting deref chains to GEP
chains, we're effectively in a logical address space, which means
we can do things like change sizes of variables, since we know
they won't alias with anything else. If they could alias, we'd be
lowering them to an explicit I/O op instead. That means we can
start disabling some of the low-bit-size lowering.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>

microsoft/compiler: Improvements to constant -> shader_temp pass used for CL

Now that we try harder for memcpys, we can use nir's complex usage helper.
We also can just mark the vars instead of using a hash map, since location
doesn't mean anything for constant vars.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>

microsoft/compiler: Support vec/struct const vals

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>

microsoft/clc: Fix progress reporting for some lowering

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>

microsoft/clc: Try harder to optimize memcpys before lowering them

For the case of memset, the SPIR-V translator produces a copy from
a byte array of 0s. If we wait to lower memcpys until after types
are sized, we can potentially turn those 0s into SSA zeros and remove
the entire constant array.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>

nir: Optimize unpacking 16 bit values that were originally packed

I was seeing u2u64 still in my final shader after pack/unpack were
lowered, which sounds to me like some other optimizations are missing
for detecting the post-lowering pack/unpack patterns, but let's at
least add some patterns for the simple cases.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>

nir: Fix constant expression for unpack_64_4x16

Cc: Mesa-stable
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>

nir_lower_mem_access_bit_sizes: Support unaligned stores via a pair of atomics

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8282
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>

nir_lower_mem_access_bit_sizes: Move options into a struct

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>

nir_lower_mem_access_bit_sizes: Add a bit_size input to the callback

We'd like to use this callback to adjust loads and stores from things
that are unsupported to things that are supported, but if the input
is already supported, we'd prefer not to change it. Rather than making
up a bit size that'd work and doing a bunch of pack/unpack bit math,
only return a different bit size if the input one doesn't work for us
(i.e. can't load enough memory or just an unsupported size entirely).

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>

nir_lower_ubo_vec4: Delete an invalid assert

This pass handles 16-component 8-bit loads, 8-component 16-bit loads,
and 2-component 64-bit loads. The number of components for the fallback
case doesn't need to be 4.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>

nir: Allow atomics as non-complex uses for var-splitting passes

The var splitting pass can rearrange the variables as long as their
position in memory doesn't matter. For block-arranged variables,
or things like memcpys or casts, the layout matters, but atomics
don't imply anything about the layout of the overall variable, so
don't treat them as "complex" for this use case.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>

nir_split_struct_vars: Support more modes and constant initializers

Idiomatic DXIL has constants contained within global variables rather
than a big blob of data. Doing this allows us to have 16-bit and 64-bit
data as well, where normally bitcasts would be disallowed on variable
GEP chains.

Unfortunately, DXIL validation requires SOA to be turned into AOS,
which means we need to split structs. We want to be able to run this
on nir_var_mem_constant variables which have constant initializers,
so add a bit of logic to handle that case, and relax the mode validation.
There's nothing special about the modes it was set up to handle.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>

vtn: Set is_null_constant

Note that pointers are not considered to be nir null constants, since
a null pointer value might not be 0s.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>

nir: Add is_null_constant to nir_constant

Indicates that the values contained within are 0s, regardless of
type. Enables some optimizations.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>

nir_opt_constant_folding: Fix nir_deref_path leak

Cc: Mesa-stable
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>

meson: Key whether to build batch decoder on expat

Instead of on Android. Which allows an end user to turn off expat
without breaking or disabling Intel support. I've additionally
refactored to separate expat and xmlconfig a bit more in the root
meson.build

This does make expat a hard dependency for building Intel tools, despite
the fact that only aubinator actually requires it. This simplifies the
build for the common case, and in the event that someone wants to build
the Intel tools and doesn't have libexpat, they can fall back to the
meson wrap for expat instead.

fixes: 75276deebcf76f8fafa68f4e4ecb29768d98c764
closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8791

Reviewed-by: Mark Janes <markjanes@swizzler.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23605>

dzn: Don't support VK R4G4B4A4_UNORM_PACK16 unless we have B4G4R4A4

Fixes: a4ce095bad9 ("dzn: Use A4B4G4R4 instead of B4G4R4A4 when available")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23602>

mapi: Delete execmem support code.

No longer used now that we don't dynamically generate dispatch stubs.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23451>

mapi: Drop the unused_functions table.

Since we don't support loading an older driver with newer loader any more,
we don't need to bother tracking entrypoints that Mesa no longer supports.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23451>

mesa: Drop the aliases from the remap table.

Mesa core doesn't need to have mapi sanity check that our aliases all map
to the same offset.  That's a build-time decision.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23451>

mapi: Clean up mapi_stub struct.

We no longer use the address field, and the name is always a size_t offset
in the string pool (never a dynamic strduped name).

Acked-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23451>

mesa: Drop the function parameter spec from the remap table.

Since we don't generate dynamic dispatch stubs any more, we don't need
this data.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23451>

mapi: Delete dynamic stub generation.

Since Mesa drivers are now version-locked to the loader, that means that
we never need to support a newer hardware driver than the loader, and thus
don't need to generate dynamic dispatch stubs.  This is great news, given
that we don't test those paths, and it involved delightful features like
arrays of hex for code to be pasted into executable memory.

More code removal will follow, this is the first cut of "don't generate,
and DCE generation code".

Fixes: #9158

Acked-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23451>

mapi: clang-format _glapi_add_dispatch().

The formatting was so broken I couldn't follow what was going on.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23451>

nir: Add interleave_agx instruction

While this is a generic bit twiddling ALU instruction, it's especially useful
for address calculations, since the architecture's tiled textures use Morton
coding within the tiles.

This will be used when lowering image_texel_address on AGX, as part of the image
atomics implementation. I don't know if there's any other neat uses I could
detect with opt_algebraic, this doesn't seem like an operation a shader would
open-code... Maybe useful for BVH building or something...

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23513>

agx: Use common nir_steal_tex_src

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23513>

nir/lower_tex: Use nir_steal_tex_src

The find-remove-use pattern is quite natural for texture lowering :)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23513>

nir/builder: Add steal_tex_src helper

I have this in the AGX compiler but I want to use it in more places.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23513>

aco: validate ir for prologs and after lower_to_hw_instr

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23507>

aco: don't validate p_constaddr_addlo/p_resumeaddr_addlo operands

These can have two literals so validation would fail.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23507>

aco: move cfg validation to its own function

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23507>

aco: make validation work without SSA temps

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23507>

radv: Add driconf to force wave64 for RT

...and enable it for Hellblade: Senua's Sacrifice.

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23585>

r600: fix cayman_convert_border_color() swizzle behavior

This change fixes a buffer overflow by implementing the
special swizzles. This behavior is already available with
evergreen_convert_border_color().

For instance, this issue is triggered on a cayman gpu with
"piglit/bin/texwrap bordercolor -auto -fbo" or "piglit/bin/max-samplers -auto -fbo":
==5610==ERROR: AddressSanitizer: heap-buffer-overflow on address 0x603000012d20 at pc 0x7fb798cb876f bp 0x7ffd78670460 sp 0x7ffd78670458
READ of size 4 at 0x603000012d20 thread T0
    #0 0x7fb798cb876e in cayman_convert_border_color ../src/gallium/drivers/r600/evergreen_state.c:2444
    #1 0x7fb798cb876e in evergreen_emit_sampler_states ../src/gallium/drivers/r600/evergreen_state.c:2539
    #2 0x7fb7989e6cb2 in r600_emit_atom ../src/gallium/drivers/r600/r600_pipe.h:655
    #3 0x7fb7989e6cb2 in r600_draw_vbo ../src/gallium/drivers/r600/r600_state_common.c:2333
    #4 0x7fb7985082c7 in u_vbuf_draw_vbo ../src/gallium/auxiliary/util/u_vbuf.c:1497
    #5 0x7fb796ef2eda in cso_draw_vbo ../src/gallium/auxiliary/cso_cache/cso_context.h:262
    #6 0x7fb796ef2eda in st_draw_gallium_multimode ../src/mesa/state_tracker/st_draw.c:170
    #7 0x7fb7970d9cfd in vbo_exec_vtx_flush ../src/mesa/vbo/vbo_exec_draw.c:341
    #8 0x7fb7970d32d7 in vbo_exec_FlushVertices_internal ../src/mesa/vbo/vbo_exec_api.c:693
    #9 0x7fb7970d32d7 in vbo_exec_FlushVertices ../src/mesa/vbo/vbo_exec_api.c:1193
    #10 0x7fb7975f237c in enable_texture ../src/mesa/main/enable.c:337

Fixes: 923d635357f6 ("r600: fix some border color swizzles on CAYMAN")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23435>

mesa/atifs: Rename the header guard.

Just a bit more cleanup as I grep around for "what TGSI is left in the GL
frontend?"

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>

mesa: Drop dead TGSI serialization prototypes.

Fixes: 7221cc765799 ("mesa/st: Remove now unused TGSI paths from disk cache.")

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>

mesa: Simplify st_get_nir_compiler_options().

Since b167203cfe07 ("mesa/st: Always generate NIR from GLSL, and use
nir_to_tgsi for TGSI drivers."), it's always set in the context.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>

mesa: Drop TGSI token handling

Nothing generates TGSI tokens in the frontend any more.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>

mesa: Always query our compute params against IR_NIR.

We only emit NIR IR, so no sense having this code for querying TGSI
instead.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>

svga: Stop asserting that compute params are queried against TGSI.

The GL frontend is about to start only querying against NIR, since it only
generates NIR.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>

mesa/drawtex: Cut out the TGSI semantic translation.

Now that we don't have to generate TGSI, we can drop an indirection.
Fixing up the types here prompted a little fixup of
st_nir_make_passthrough_shader()'s types.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>

gallium: Drop PIPE_SHADER_CAP_PREFERRED_IR.

Now everyone's saying NIR, and doing any NTT internally.  The only returns
of TGSI were in gallivm_get_shader_param() and
tgsi_exec_get_shader_param(), but the drivers were returning NIR instead
of calling down to them.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>

nine: Drop the nir_vs/nir_ps env vars.

Now that all drivers prefer NIR, there's no need for these.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>

svga: Switch to preferring NIR by default.

The flag has been here for a long time, it's time for SVGA to start
ingesting NIR like other drivers do.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>

nouveau: Delete the NV50_PROG_USE_TGSI env var.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>

r300: Drop RADEON_DEBUG=use_tgsi.

The NIR path is default, and well-trodden at this point.  By dropping
support for input as TGSI, we get rely on the NIR trig lowering.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>

r600: Drop docs for use_tgsi debug var.

Fixes: 337dc7d76604 ("r600: remove TGSI code path")
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>

virgl: Drop the VIRGL_DEBUG=use_tgsi debug var.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>

llvmpipe: Drop the LP_DEBUG=tgsi_ir debug option.

No need to support this, it's unused and untested.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>

softpipe: Drop the use_tgsi debug flag.

We lower to TGSI inside the driver just fine, no need to ask the frontend
for it.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>

mesa: Port the pbo.use_gs path to NIR and let it get used on NIR drivers.

Now that everyone but SVGA is requesting NIR, this path had been
effectively disabled.  I had done a partial port of the VS side in
9143c08125a3 ("st/nir: Fix the st->pbo.use_gs case.") for the sake of
nv50, but with it should be ready for all drivers.  Affects nv50, v3d,
d3d12, svga (I think).

Note that this GS code is slightly different from the TGSI: We put a 0 in
pos.z, rather than leaving the layer value there, because apparently v3d
didn't like those denorm Z values.

Also, it's nice to see that the NIR code is shorter than the TGSI code
was, we've made great progress on nir_builder.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>

mesa: Emit full output write in st_pbo_create_vs().

In most VS creation paths in the frontend, nir_lower_io_to_temporaries()
is called, which ensures that all outputs have a single write to them
(with a full writemask).  The builtins don't, however, and this VS was an
oddball that overwrote one channel of an output that it had already
written.  We can avoid surprises for backends (such as d3d12 and v3d) by
emitting a single write per output here.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>

v3d: Respect nir_intrinsic_store_output's write_mask.

Usually lower_io_to_temps sorts this out for us so you only get full
writes, but we should be able to handle it without that.  Avoids a
regression with the mesa/st PBO VS with layer output.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>

radv/ci: Test ray tracing on vkd3d-proton

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23283>

Revert "glx: Remove pointless GLX_INTEL_swap_event paranoia"

This reverts commit 19c57ea3bf6d77cf6f07f2a56e781f55b0e6013b.

This commit is causing a reproducible crash of GNOME shell on Xorg
server.  Revert it for now and we may investigate it further in the
future.

Fixes #8542.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23589>

nouveau: fix nouveau_heap_destroy() memory leak

Indeed, this function was not processing the linked
allocated list.

For instance, this issue is triggered with "piglit/bin/hiz-depth-read-fbo-d24-s0 -auto":
Indirect leak of 40 byte(s) in 1 object(s) allocated from:
    #0 0x7f6795638987 in calloc (/usr/lib64/libasan.so.6+0xb1987)
    #1 0x7f678bac13b9 in nouveau_heap_alloc ../src/gallium/drivers/nouveau/nouveau_heap.c:64
    #2 0x7f678bb6c7e4 in nv50_program_upload_code ../src/gallium/drivers/nouveau/nv50/nv50_program.c:490
    #3 0x7f678bb83b92 in nv50_vertprog_validate ../src/gallium/drivers/nouveau/nv50/nv50_shader_state.c:161
    #4 0x7f678bba3000 in nv50_state_validate ../src/gallium/drivers/nouveau/nv50/nv50_state_validate.c:552
    #5 0x7f678bba3c4d in nv50_state_validate_3d ../src/gallium/drivers/nouveau/nv50/nv50_state_validate.c:575
    #6 0x7f678b9e3e92 in nv50_blit_3d ../src/gallium/drivers/nouveau/nv50/nv50_surface.c:1444
    #7 0x7f678b9e3e92 in nv50_blit ../src/gallium/drivers/nouveau/nv50/nv50_surface.c:1832
    #8 0x7f678a0b378a in blit_to_staging ../src/mesa/state_tracker/st_cb_readpixels.c:337
    #9 0x7f678a0b7358 in st_ReadPixels ../src/mesa/state_tracker/st_cb_readpixels.c:516
    #10 0x7f6789f82005 in read_pixels ../src/mesa/main/readpix.c:1178
    #11 0x7f6789f82005 in _mesa_ReadnPixelsARB ../src/mesa/main/readpix.c:1195
    #12 0x7f6789f82ac0 in _mesa_ReadPixels ../src/mesa/main/readpix.c:1210
...
SUMMARY: AddressSanitizer: 80 byte(s) leaked in 2 allocation(s).

Fixes: 67635a0a713e ("nouveau: get rid of tabs")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23592>

anv: split ANV_PIPE_RENDER_TARGET_BUFFER_WRITES for finer grained flushing

split ANV_PIPE_RENDER_TARGET_BUFFER_WRITES into separate CS_STALL,
RT_FLUSH & TILE_FLUSH flags in order to have finer control over cache
coherency.

Tigerlake CS has it's own cache fetching directly from the memory controller,
so we need to do a tile flush to ensure the query data is visible.

This fixes test_resolve_non_issued_query_data in vkd3d on TGL.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Fixes: 3c4c18341aaf ("anv: narrow flushing of the render target to buffer writes")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23500>

anv: add query tracepoints

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23500>

aco: Fix assert in insert_exec_mask

This assert would trigger on unconditional demotes, because the demotes
don't remove the mask_type_global flag from the exec mask.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23594>

aco: Fix live_var_analysis assert

Fixes: 3d4f6a00b ('aco/spill: allow for disconnected CFG')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23586>

aco: Reset scratch_rsrc on blocks without predecessors

Fixes hangs with raytracing in Hellblade: Senua's Sacrifice.

Fixes: 3d4f6a00b ('aco/spill: allow for disconnected CFG')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23586>

aco: Mark exec write used when it writes other registers.

When an exec write isn't used but writes other registers
besides exec, and also reads exec (such as s_and_saveexec),
we would mistakenly delete the previous instruction that
writes the exec value that this instruction uses.

No Fossil DB changes on Rembrandt (GFX10.3).

Fixes: 0211e66f65522caa1f6855b937ae4fc18af0c937
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9036
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23576>

rusticl/event: ensure even status is updated in order

There was a race between the worker thread and flush, which could lead to
the last event flushed getting its status set to CL_SUCCESS before any
other event.

Just wait on all flushed events in order to solve this.

The current queue/event implementation isn't the best and we want to
rework it, so this is good enough for now.

Fixes: 47a80d7ff4f ("rusticl/event: proper eventing support")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23578>

rusticl/api: remove some repr(C)

The only part we strictly need repr(C) is in `CLObjectBase` and we already
didn't have it set for `Device` and it worked just fine.

We keep it on in `Platform` as this is a more hand rolled type and less
relevant.

With this we can make use of Rusts data layout which saves us some memory.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23573>

rusticl/icd: fix ReferenceCountedAPIPointer::from_ptr for NULL pointers

If a NULL pointer is passed in, we have to return one as well.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23573>

iris: Add GET_PARAM for protected context capability support

With MTL onwards, creating protected contexts too early
may block for a longer period. To prevent that, use the new
kernel GET_PARAM:I915_PARAM_PXP_STATUS interface to get the
status of PXP support immediately without blocking.

Using this same interface, we can also wait for platform
dependency readiness before attempting to create a protected
context. Use a longer timeout when user explicitly requests
for protected context as the kernel assures readiness will be
achieved.

Reference to kernel change: https://patchwork.freedesktop.org/patch/533241/?series=112647&rev=8

Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23382>

drm-uapi: bump headers (except AMD)

NOTE: skipped AMD header update due to build error.

From drm-next at the following commit:

commit 2e1492835e439fceba57a5b0f9b17da8e78ffa3d
Merge: 85d712f033d2 43049f17b526
Author: Dave Airlie <airlied@redhat.com>
Date:   Fri Jun 2 13:38:48 2023 +1000

Merge tag 'drm-misc-next-2023-06-01' of git://anongit.freedesktop.org/drm/drm-misc into drm-next

Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23382>

anv: remove BDW specific WA for CS stall enable

This note is in BDW specs but not anymore in gfx9+ specs.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23543>

radv/ci: use the low-priority runners for vangogh jobs

In order to prioritize the upcoming pre-merge jobs on VanGogh, we
limit all the post-merge jobs requiring VanGogh runners to the
low-priority pool of runners.

This will allow Marge to use any of the VanGogh runners we have (6),
while leaving 3 of them unused by post-merge jobs inside Mesa, or
DXVK-CI.

Suggested-by: Emma Anholt <emma@anholt.net>
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23548>

ci/b2c: select the DUT to run on by name

When we have many DUTs with the same tags (or subset of tags), it is
possible for the gitlab runner name not to match the DUT picked by
valve-infra's executor.

This is needlessly confusing, and prevents specifically tagging some
runners with a low-priority tag but still have these runners execute
high-priority jobs... because a low priority job may get started by
gitlab but the corresponding DUT is being used by a high-priority
task.

To fix this, simply tell the executor which DUT we want, not just the
list of tags we want.

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23548>

r600/sfn: Remove duplicate assignment

Fix defect reported by Coverity Scan.

Self assignment (NO_EFFECT)
self_assign: Assigning sh->info.fs.depth_layout to itself has no effect.

Fixes: bbd265b8e8b ("r600+sfn: Assign ps_conservative_z and switch to NIR defines")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23414>

mesa/st: discard whole resource when mapping drawpixels texture

The texture resource has just been allocated for the whole purpose
of holding the drawpixels data. Make the drivers life a bit easier
by telling it that we aren't interested in any previous content
when mapping the resource.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23546>

lp: align memory for long16 CL types

Fixes following OpenCL CTS test flakes:

basic kernel_memory_alignment_constant
basic kernel_memory_alignment_global
vectors vec_align_array
vectors vec_align_struct_arr

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23574>

etnaviv: query: optimize context flushes

Same as the transfer flushes, the flushes caused by waiting for
a query result don't need to realize context external visibility
of resource changes and can thus be a bit more lightweight.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23557>

etnaviv: query: correct max number of occlusion query samples

The real maximium for the occlusion query samples is much higher
than what the code currently claims to support as we always
allocate a full 4KB buffer to store the query results.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23557>

etnaviv: query: correct max number of perfmon samples

The real maximium for the perfmon samples is much higher than
what the code currently claims to support as we always allocate
a full 4KB buffer to store the query results.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23557>

etnaviv: query: remove incorrect comment

The allocated query buffer is always 4KB in size and can hold
a variable number of samples depending on the sample size.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23557>

etnaviv: query: reset sample count on begin_query

ARB_occlusion_query specifies that the query is reset on BeginQueryARB,
not when the fetching the result of the query. This behavior also makes
a lot of sense for the perfmon queries.

CC: mesa-stable
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23557>

etnaviv: query: move sample counter manipulation into query providers

Different query providers have different behavior on when they produce
samples: the perfmon provider provides a sample at the start and at the
end of the query, while the occlusion query provider only adds another
sample when the query is complete.

Move the sample count manipulation to the providers to be able to take
those differences into account. Removes a useless always-zero sample
for each OQ resume/suspend pair.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23557>

radv: Use RESET_FILTER_CAM for some mesh shading draws.

It's unclear why this is needed, but PAL uses RESET_FILTER_CAM
for some mesh shading draw packets:
- DISPATCH_MESH_INDIRECT_MULTI
- DISPATCH_TASKMESH_GFX

Let's do the same in radv.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23554>

radv: Always flush before writing acceleration structure properties

Equivalent of 284e604872 but for acceleration structure queries.
If an app inserts a barrier between AS builds and writing AS properties,
we must respect it or things will blow up.

Cc: mesa-stable
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23568>

ac/llvm: set +cumode for radeonsi

radeonsi switched over to CU wavefront execution mode, but didn't tell
LLVM. This can lead to shaders requiring too many VGPRs to be executed in
CU mode and so cause GPU resets.

Pass along +cumode to LLVM so it properly spills VGPRs.

Fixes: 9d7eab2ab17 ("radeonsi: don't enable WGP_MODE because of high cost of workgroup mem coherency")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23569>

ac: Replace the usage of pipe_compare_func with compare_func

PIPE_FUNC_ -> COMPARE_FUNC_
pipe_compare_func -> compare_func

Now include "pipe/p_state.h" is not needed and remove it in ac_nir.h

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23422>

ci: bring back the valve farm

Valve infra is back online, sorry for the noise!

This is a partial revert of commit 628d21c5219178b29caec6ea9c21bed59a0a58ff.

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23571>

nir/lower_shader_calls: Fix cursor if broken after nir_cf_extract() call

Fixes: e2dadda3 ("Revert "nir/lower_shader_calls: put inserted instructions into a dummy block")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8978
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22884>

freedreno: Partially decode CP_PROTECT_CNTL

Give bogus but meaningful names to the bitfields that we understand.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23467>

ci: valve and freedreno farm is down

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23567>

docs: rusticl envvars list supported drivers

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23544>

panfrost: Replace the usage of PIPE_BIND_* with PAN_BIND_*

PIPE_BIND_* belongs to gallium, do not use it in panvk

As pan_format.h also used ban panfrost gallium driver, so static_assert it equal

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23526>

aco/rt: Do not initialize the next shader addr

The uniform one is already set and the raygen shader isn't guarded
anymore.

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23545>

radv/rt: Clear NIR metadata after lowering the ABI

radv_nir_lower_rt_abi inserts instructions and control flow.

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23545>

radv/rt: Do not guard the raygen shader

The condition will always evaluate to true because it's set this way by
the prolog.

Quake II RTX:

Totals from 7 (10.00% of 70) affected shaders:
Instrs: 30070 -> 30056 (-0.05%); split: -0.07%, +0.03%
CodeSize: 163476 -> 163420 (-0.03%); split: -0.06%, +0.03%
Latency: 80335 -> 83887 (+4.42%)
InvThroughput: 16870 -> 17603 (+4.34%)
Copies: 3191 -> 3215 (+0.75%)
Branches: 1273 -> 1266 (-0.55%)
PreSGPRs: 356 -> 354 (-0.56%)

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23545>