radv: remove useless check in radv_create_shaders()

radv_can_dump_shader() already handles if module is NULL.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

radv: allow to dump the GS copy shader with RADV_DEBUG="shaders"

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

radv: move {load,store}_var intrinsics scanning in different functions

These are going to be crazy and we are probably going to add
more scan stuff in the future. Also use switch cases instead.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

android: change include "cutils/log.h" to "log/log.h" on Android API >=26

There is a compile warning from Android 8 (API version 26) from "include cutils/log.h"
warning: "Deprecated: don't include cutils/log.h, use either android/log.h or log/log.h"-W#warnings,
Change to include "log/log.h" on Android 8 or later major version to avoid this warning

Signed-off-by: jenny.q.cao <jenny.q.cao@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>

llvmpipe: Fix random number generation for unit tests

We were never producing negative numbers for signed types.
Also fix only producing half the valid range for uint32, and
properly clamp signed values.

Because this now also properly tests snorm with actually negative
values, need to increase eps for such conversions. I believe these
cannot actually be hit in ordinary operation (e.g. if a snorm texture
is sampled and output to snorm RT, it will still go through snorm->float
and float->snorm conversion), so don't bother to do anything to fix
the bad accuracy (might be quite complex).
Basically, the issue is for something like snorm16->snorm8 that in the
end this will just use a 8 bit arithmetic right shift.
But the math behind it says we should actually do a division by 32767 / 127, which
is ~258, not 256. So the result can be one bit off (values have too large
magnitude), and furthermore, the shift has incorrect rounding (always rounds
down). For positive numbers, these errors have different direction, but
for negative ones they have the same, hence for some values the error will
be 2 bit in the end.

Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=106232

radv: use compute path for multi-layer images.

I don't think the hw resolve path can't handle multi-layer images.

This fixes all the:
dEQP-VK.renderpass.multisample_resolve.layers_*
tests on my VI card.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: <mesa-stable@lists.freedesktop.org>

radv: resolve all layers in compute resolve path.

This path should iterate across all layers, I've some ideas
for doing this in a single pass, but this is simpler for now.

This passes the tests because we don't use the fragment path
unless we have DCC, and we don't have DCC on layered images.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: <mesa-stable@lists.freedesktop.org>

radv/resolve: do fmask decompress on all layers.

For a multi-layer subpass resolve we want to make sure we flush all
the layers.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: <mesa-stable@lists.freedesktop.org>

nvc0: fix setting of subpixel precision during conservative rasterization

Fixes: 07dac3e040 ("nvc0: add conservative rasterization support")
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

anv,nir: add generated files to .gitignore(s)

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

gallium: remove aux_vertex_buffer_slot code

The slot index is always 0, and is pretty unlikely to change in the future.

Reviewed-by: Brian Paul <brianp@vmware.com>

radv: add initial support for VK_PIPELINE_CREATE_DISABLE_OPTIMIZATION_BIT

When VK_PIPELINE_CREATE_DISABLE_OPTIMIZATION_BIT is set we skip NIR
linking optimisations and only run over the NIR optimisation loop
once similar to the GLSLOptimizeConservatively constant used by
some GL drivers.

We need to run over the opts at least once to avoid errors in LLVM
(e.g. dead vars it can't handle) and also to reduce the time spent
compiling the IR in LLVM.

With this change the Blacksmith Unity demos compilation times
go from 329760 ms -> 299881 ms when using Wine and DXVK.

V2: add bit to radv_pipeline_key

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106246

scons: Add PROGRAM_NIR_FILES.

Fix SCons build error.

  Linking build/linux-x86_64-debug/gallium/targets/libgl-xlib/libGL.so.1.5 ...
build/linux-x86_64-debug/mesa/libmesa.a(st_program.os): In function `st_translate_prog_to_nir':
src/mesa/state_tracker/st_program.c:392: undefined reference to `prog_to_nir'

Fixes: 5c33e8c7729e ("st/nir: use NIR for asm programs")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>

st/nir: use NIR for asm programs

Reviewed-by: Eric Anholt <eric@anholt.net>

st/nir: make st_nir_opts() available externally

The following patch will make use of this for asm style programs.

Reviewed-by: Eric Anholt <eric@anholt.net>

radeon/vce: add firmware support for ver 53 and up

All vce firmwares with major version greater than or equal to 53 are supported

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>

etnaviv: remove pipe_fence_handle::ctx

A fence can outlive the ctx it was created from (see glmark2).. etnaviv
doesn't actually need fence->ctx so lets remove it before someone makes
the mistake of assuming it is a valid pointer.

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>

swr/rast: Thread locked tiles improvement

- Change tilemgr TILE_ID encoding to use Morton-order (Z-order).
- Change locked tiles set to bitset.  Makes clear, set, get much faster.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: Add Builder::GetVectorType()

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: Prepend the console output with a newline

It can get jumbled with output from other threads.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: Add ConcatLists()

for concatenating lists

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: Add constant initializer for uint64_t

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: Use binner topology to assemble backend attributes

Previously was using the draw topology, which may change if GS or Tess
are active. Only affected attributes marked with constant interpolation,
which limited the impact.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: Change formatting

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

meson: Fix build for egl platform_x11 with dri3

platform_x11 with dri3 needs inc_loader.

In file included from ../src/egl/drivers/dri2/platform_x11_dri3.c:35:0:
../src/egl/drivers/dri2/egl_dri2.h:41:32: fatal error: loader_dri3_helper.h: No such file or directory
In file included from ../src/egl/drivers/dri2/platform_x11.c:46:0:
../src/egl/drivers/dri2/egl_dri2.h:41:32: fatal error: loader_dri3_helper.h: No such file or directory
In file included from ../src/egl/drivers/dri2/egl_dri2.c:61:0:
../src/egl/drivers/dri2/egl_dri2.h:41:32: fatal error: loader_dri3_helper.h: No such file or directory

Cc: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

radv: move ac_build_if_state on top of radv_nir_to_llvm.c

These helpers will be needed for future work.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

radv: minor cleanups in radv_fill_shader_variant()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

winsys/amdgpu: Destroy dev_hash table when the last winsys is removed.

Fixes memory leak on module unload.

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

ac/gpu_info: add has_read_registers_query

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ac/gpu_info: add has_2d_tiling

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ac/gpu_info: add has_sparse_vm_mappings

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ac/gpu_info: add has_unaligned_shader_loads

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: expose ARB_query_buffer_object on ancient kernels too

It doesn't use indirect dispatches.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ac/gpu_info: add has_indirect_compute_dispatch

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ac/gpu_info: add kernel_flushes_tc_l2_after_ib

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ac/gpu_info: add has_format_bc1_through_bc7

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ac/gpu_info: add has_eqaa_surface_allocator

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: clean up the reset status query implementation

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ac/gpu_info: add has_bo_metadata

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ac/gpu_info: add si_TA_CS_BC_BASE_ADDR_allowed

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ac/gpu_info: add htile_cmask_support_1d_tiling

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ac/gpu_info: add kernel_flushes_hdp_before_ib

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: add an environment variable that forces EQAA for MSAA allocations

This is for testing and experiments.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: set up EQAA image descriptors properly

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: add EQAA SC,DB,CB register programming

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: support creating EQAA color textures

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ac/surface: add EQAA support

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: use better sample locations for 8x EQAA

Verified with the piglit MSAA accuracy test.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: improve quality of 16 sample locations

This results in better 16x and 8x quality when using these locations.
Verified with the piglit MSAA accuracy test.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: use better sample locations for 4x MSAA

Discovered by luck. Verified with the piglit MSAA accuracy test.
It also shows that the worst case EQAA 16s4f results in very good 4x MSAA
in the worst case.

Nine might not like these positions, but they are prettier to the eye and
GL doesn't care.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: reorder sample locations as required by EQAA

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: simplify si_get_sample_position

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: simplify arrays of sample locations

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: set DB_EQAA the same as Vulkan

These never change, but they only affect EQAA, which isn't implemented.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: remove CM_ prefixes

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: don't update clear color registers if they don't change

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: remove r600_fmask_info

radeon_surf contains almost everything.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ac/surface: unify common legacy and gfx9 fmask fields

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ac/surface/gfx6: compute FMASK together with the color surface

instead of invoking FMASK computation separately.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ac/surface/gfx9: fix a typo in CMASK RB/pipe alignment

No change in behavior because it's always aligned.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ac: set correct LLVM processor names for Raven & Vega12

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ac: sort raster configs

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ac: remove 1 RB raster config for Iceland

Iceland always reports 2 RBs.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ac: move the Fiji kernel workaround for raster config out of the switch

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ac: enable both RBs on Kaveri

This can result in 2x increase in performance on non-harvested Kaveris.

v2: don't do it on radeon

Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: work around a GPU hang due to broken indirect indexing in LLVM

Fixes: 6d19120da85 "radeonsi/gfx9: workaround for INTERP with indirect indexing"
Cc: 18.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

intel/isl/storage: Don't lower most UNORM formats on gen11+

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Tested-by: Anuj Phogat <anuj.phogat@gmail.com>

intel/isl: Several UNORM formats support typed writes on gen11+

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Tested-by: Anuj Phogat <anuj.phogat@gmail.com>

mesa: revert GL_[SECONDARY_]COLOR_ARRAY_SIZE glGet type to TYPE_INT

Since size can be 3, 4 or GL_BGRA we need to keep these glGet types
as TYPE_INT, not TYPE_UBYTE.

Fixes: d07466fe18522 ("mesa: fix glGetInteger/Float/etc queries for
vertex arrays attribs")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106462
cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>

radv: disable DCC for shareable images on GFX9+

This seems to be broken at the moment for opengl interop.

Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

configure.ac: rework -latomic check

The configure.ac logic added in commit
2ef7f23820a67e958c2252bd81eb0458903ebf33 ("configure: check if
-latomic is needed for __atomic_*") makes the assumption that if a
64-bit atomic intrinsic test program fails to link without -latomic,
it is because we must use -latomic.

Unfortunately, this is not completely correct: libatomic only appeared
in gcc 4.8, and therefore gcc versions before that will not have
libatomic, and therefore don't provide atomic intrinsics for all
architectures. This issue was for example encountered on PowerPC with
a gcc 4.7 toolchain, where the build fails with:

powerpc-ctng_e500v2-linux-gnuspe/bin/ld: cannot find -latomic

This commit aims at fixing that, by not assuming -latomic is
available. The commit re-organizes the atomic intrinsics detection as
follows:

 (1) Test if a program using 64-bit atomic intrinsics links properly,
     without -latomic. If this is the case, we have atomic intrinsics,
     and we're good to go.

 (2) If (1) has failed, then test to link the same program, but this
     time with -latomic in LDFLAGS. If this is the case, then we have
     atomic intrinsics, provided we link with -latomic.

This has been tested in three situations:

 - On x86-64, where atomic instrinsics are all built-in, with no need
   for libatomic. In this case, config.log contains:

   GCC_ATOMIC_BUILTINS_SUPPORTED_FALSE='#'
   GCC_ATOMIC_BUILTINS_SUPPORTED_TRUE=''
   LIBATOMIC_LIBS=''

   This means: atomic intrinsics are available, and we don't need to
   link with libatomic.

 - On NIOS2, where atomic intrinsics are available, but some of them
   (64-bit ones) require using libatomic. In this case, config.log
   contains:

   GCC_ATOMIC_BUILTINS_SUPPORTED_FALSE='#'
   GCC_ATOMIC_BUILTINS_SUPPORTED_TRUE=''
   LIBATOMIC_LIBS='-latomic'

   This means: atomic intrinsics are available, and we need to link
   with libatomic.

 - On PowerPC with an old gcc 4.7 toolchain, where 32-bit atomic
   instrinsics are available, but not 64-bit atomic instrinsics, and
   there is no libatomic. In this case, config.log contains:

   GCC_ATOMIC_BUILTINS_SUPPORTED_FALSE=''
   GCC_ATOMIC_BUILTINS_SUPPORTED_TRUE='#'

   With means that atomic intrinsics are not usable.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>

mesa: fix glGetInteger/Float/etc queries for vertex arrays attribs

The vertex array Size and Stride attributes are now ubyte and short,
respectively.  The glGet code needed to be updated to handle those
types, but wasn't.

Fixes the new piglit test gl-1.5-get-array-attribs test.

v2: fix inadvertant whitespace change, change COLOR_ARRAY_SIZE to UBYTE,
misc fixes suggested by Justin

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106450
Fixes: d5f42f96e16 ("mesa: shrink size of gl_array_attributes (v2)")
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

winsys/radeon: Destroy fd_hash table when the last winsys is removed.

Fixes memory leak on module unload.
v2: Use util_hash_table helper function

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>

gallium/auxiliary: Add helper function to count the number of entries in hash table

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>

radv: move handling nosisched option in a better place

It's a per-application optimization, so it makes more sense
to do that in radv_handle_per_app_options().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: assorted typo fixes

Trivial.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

mesa/vbo/tnl: Move gl_vertex_array related stuff to tnl.

The only remaining users of gl_vertex_array are tnl based
drivers. So move everything related to that into tnl and
rename it accordingly.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>

mesa: Remove Array._DrawArrays.

Only tnl based drivers still use this array. So remove it
from core mesa and use Array._DrawVAO instead.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>

i965: Remove the now unused gl_vertex_array.

Was meant to be temporary in i965.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>

i965: Remove the gl_vertex_array indirection.

For now store binding and attrib in brw_vertex_element.
The i965 driver still provides lots of opportunity to make use
of the unique binding information in the VAO which is currently not
taken from the VAO.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>

i965: Implement all_varyings_in_vbos in terms of Array._DrawVAO.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>

st/mesa: Remove the now unused gl_vertex_array.

Was meant to be temporary in gallium.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>

st/mesa: Make feedback draw and rasterpos use _DrawVAO.

Instead of playing with Array._DrawArrays, make the feedback draw
path use Array._DrawVAO. Also st_RasterPos needs to use the VAO then.

v2: Use helper methods to get the offset values for array and binding.
    Update comments.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>

st/mesa: Use Array._DrawVAO in st_atom_array.c.

Finally make use of the binding information in the VAO when
setting up arrays for draw.

v2: Emit less relocations also for interleaved userspace arrays.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>

st/mesa: Make the input_to_index array available.

The input_to_index array is already available internally
when preparing vertex programs. Store the map in
struct st_vertex_program.
Also store the bitmask of mesa vertex processing inputs in
struct st_vp_variant.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>

st/mesa: Use _DrawVAO for edgeflag enabled check.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>

mesa: Compute effective buffer bindings in the vao.

Compute VAO buffer binding information past the position/generic0 mapping.
Scan for duplicate buffer bindings and collapse them into derived
effective buffer binding index and effective attribute mask variables.
Provide a set of helper functions to access the distilled
information in the VAO. All of them prefixed with _mesa_draw_...
to indicate that they are meant to query draw information.

v2: Also group user space arrays containing interleaved arrays.
    Add _Eff*Offset to be copied on attribute and binding copy.
    Update comments.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>

virgl: Add support for passing GL_ANY_SAMPLES_PASSED_CONSERVATIVE

This is needed for fixing CTS:
   dEQP-GLES3.functional.occlusion_query.conservative*

Reviewed-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>

r600: fix constant buffer bounds.

If you have an indirect access to a constant buffer on r600/eg
use a vertex fetch in the shader. However apps have expected
behaviour on those out of bounds accessess (even if illegal).

If the constants were being uploaded as part of a larger
upload buffer, we'd set the range of allowed access to a lot
larger than required so apps would get values back from
other parts of the upload buffer instead of the expected out
of bounds access.

This fixes rendering bugs in Trine and Witcher 1, thanks
to iive for nagging me effectively until I figured it out :-)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91808
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>

i965,anv: Set the CS stall bit on the ISP disable PIPE_CONTROL

From the bspec docs for "Indirect State Pointers Disable":

    "At the completion of the post-sync operation associated with this
    pipe control packet, the indirect state pointers in the hardware are
    considered invalid"

So the ISP disable is a post-sync type of operation which means that it
should be combined with a CS stall.  Without this, the simulator throws
an error.

Fixes: 766d801ca "anv: emit pixel scoreboard stall before ISP disable"
Fixes: f536097f6 "i965: require pixel scoreboard stall prior to ISP disable"
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

radv: handle arrays in the fmask descriptor.

This fixes the fmask descriptor generation to handle 2d ms arrays.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

gallium/tests: Fix assignment of EXTRA_DIST

Fixes: 6754c2e83d79 ("autotools: Include new meson files")

configure.ac: Check for grep with AC_PROG_GREP

Perhaps with a new version of autoconf, I began seeing:

| checking the name lister (/usr/bin/nm -B) interface... ./configure: line 6973: External.*some_variable: command not found
| BSD nm

This is because AC_PROG_NM expands to

...
if $GREP 'External.*some_variable' conftest.out > /dev/null; then
    lt_cv_nm_interface="MS dumpbin"
fi
...

I'm not sure if it's a bug in AC_PROG_NM that it doesn't call
AC_PROG_GREP, but it's easy enough for us to do it.

main: fail texture_storage() call if the size is not okay

Signed-off-by: Xiong, James <james.xiong@intel.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

main: return 0 length when the queried program object's not linked

Signed-off-by: Xiong, James <james.xiong@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

i965: Shut up unused variable warnings.

These are only used in assertions.

src/intel/Makefile.vulkan.am: add missing MKDIR_GEN

Out of tree builds can try to write into a directory that doesn't exist yet:

| Traceback (most recent call last):
|   File "../../../mesa-18.0.2/src/intel/vulkan/anv_icd.py", line 46, in <module>
|     with open(args.out, 'w') as f:
| IOError: [Errno 2] No such file or directory: 'vulkan/intel_icd.x86_64.json'
| Makefile:4882: recipe for target 'vulkan/intel_icd.x86_64.json' failed

Add missing MKDIR_GEN calls to solve this.

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

mesa: fix error handling in get_framebuffer_parameteriv

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

anv: emit pixel scoreboard stall before ISP disable

We want to make sure that all indirect state data has been loaded into
the EUs before disable the pointers.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Fixes: 78c125af3904c ("anv/gen10: Ignore push constant packets during context restore.")

i965: require pixel scoreboard stall prior to ISP disable

Invalidating the indirect state pointers might affect a previously
scheduled & still running 3DPRIMITIVE (causing page fault). So stall
on pixel scoreboard before that.

v2: Fix compile issue :(

v3: Stall on pixel scoreboard

v4: Drop the post sync operation (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Fixes: ca19ee33d7d39 ("i965/gen10: Ignore push constant packets during context restore.")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106243