Bas Nieuwenhuizen [Thu, 13 Aug 2020 21:29:15 +0000 (23:29 +0200)]
ac/surface: Fix depth import on GFX6-GFX8.
Lets just do depth interop imports by convention between radv and
radeonsi for now. The only thing using this should be Vulkan interop
anyway.
CC: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6617>
Jason Ekstrand [Fri, 18 Sep 2020 23:11:10 +0000 (18:11 -0500)]
intel/fs/swsb: SCHEDULING_FENCE only emits SYNC_NOP
It's not really unordered in the sense that it can still stall on
ordered things and we don't need a SYNC_NOP for that because it is a
SYNC_NOP. However, it also doesn't count when computing instruction
distances.
Fixes:
18e72ee2108 "intel/fs: Add FS_OPCODE_SCHEDULING_FENCE"
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6781>
Jason Ekstrand [Wed, 2 Sep 2020 21:51:51 +0000 (16:51 -0500)]
nir: Add a pass for lowering CL-style image ops to texture ops
In CL 1.2, images are required to be either read-only or write-only. We
can always translate the read-only image ops to texture ops. In CL 2.0
(and an extension), the ability is added to have read-write images but
sampling (with a sampler) is only allowed on read-only images. As long
as we only lower read-only images to texture ops, everything should stay
consistent.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6578>
Jason Ekstrand [Wed, 2 Sep 2020 21:11:38 +0000 (16:11 -0500)]
spirv: Plumb access qualifiers through from image types
In SPIR-V, the access qualifiers for an image are provided on the image
type. Assuming no one swaps the types around on us (I think that should
be illegal), this means we can reliably fetch the access qualifiers from
the type itself. The ops which don't really have an easy-to-fetch type
are the atomics because they use OpImageTexelPointer. However, those
are only allowed on read/write images and that's the default.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6578>
Jason Ekstrand [Thu, 3 Sep 2020 05:07:13 +0000 (00:07 -0500)]
spirv: Access qualifiers are not a bitfield
They're an actual enum. My bad.
Fixes:
de36b5b805be "nir/vtn: Add support for kernel images to SPIRV-to-NIR"
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6578>
Jason Ekstrand [Mon, 31 Aug 2020 21:43:40 +0000 (16:43 -0500)]
clover: Pull the stride from pipe_transfer for image maps
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6578>
Icecream95 [Sat, 5 Sep 2020 05:00:37 +0000 (17:00 +1200)]
pan/mdg: Use nir_shader_instructions_pass for fdot2 lowering
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6718>
Icecream95 [Sat, 5 Sep 2020 04:58:34 +0000 (16:58 +1200)]
pan/mdg: Use nir_shader_instructions_pass for nir_lod_errata
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6718>
Icecream95 [Mon, 14 Sep 2020 23:57:50 +0000 (11:57 +1200)]
pan/mdg: Return a bool from midgard_nir_lod_errata
To match other NIR passes.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6718>
Icecream95 [Thu, 10 Sep 2020 09:08:25 +0000 (21:08 +1200)]
panfrost: Set modifier_constant to true for exported resources
Not actually seen in the wild but could theoretically be a problem for
applications that explicitly import/export resources.
v2: Set it on exporting as well as importing (Daniel Stone)
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6717>
Erico Nunes [Wed, 9 Sep 2020 22:02:38 +0000 (00:02 +0200)]
lima: fix vertex shader uniform buffer size
In some cases when switching shader programs, mesa does not switch the
currently set pipe_constant_buffer, which keeps pointing to the one
previously set.
If the two shader programs have a different number of uniforms, the size
of the constant buffer may be different and this needs to be considered
while generating the next draw command.
This patch fixes the uniform buffer creation in the lima vertex shader
command to avoid an out of bounds memcpy due to a previously set
pipe_constant_buffer.
Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6701>
Erico Nunes [Sat, 29 Aug 2020 14:32:24 +0000 (16:32 +0200)]
lima: allocate new bo for stream draw
In stream draws, the resource bo might be in use in a previous draw.
Allocate a new one for the resource to avoid overwriting data in use.
Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6503>
Bas Nieuwenhuizen [Fri, 7 Aug 2020 01:05:37 +0000 (03:05 +0200)]
radeonsi: Move display dcc dirty tracking to framebuffer emission.
To improve performance.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6783>
Bas Nieuwenhuizen [Thu, 30 Jul 2020 15:14:38 +0000 (17:14 +0200)]
radeonsi: Put retile map in separate buffers.
The retile maps are a software mechanism and hence very suceptible
to change. As such I'd like to avoid making it part of the cross
driver ABI.
Ideally we'd just use the cached tile info + a shader to avoid these
buffers altogether.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6783>
Bas Nieuwenhuizen [Sun, 2 Aug 2020 23:05:07 +0000 (01:05 +0200)]
amd/common: Store non-displayable DCC pitch.
For DRM planes with modifiers.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6783>
Qiang Yu [Fri, 18 Sep 2020 12:03:46 +0000 (20:03 +0800)]
radeonsi: fix user fence GPU address
User fence should have 4 QWORD memory space, I updated its CPU address
but forgot to update GPU address.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3513
Fixes:
3d5bed0e883 "radeonsi: fix user fence space when MCBP is enabled"
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6776>
Jesse Natalie [Thu, 17 Sep 2020 22:07:53 +0000 (15:07 -0700)]
glsl_type: Add packed to structure type comparison for hash map
Fixes:
659f333b3a4ff "glsl: add packed for struct types"
Reviewed-by: Marek Ol\9aák <marek.olsak@amd.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6767>
Pierre-Loup A. Griffais [Fri, 18 Sep 2020 07:25:08 +0000 (00:25 -0700)]
radv: fix vertex buffer null descriptors
Fixes:
0f1ead7b536 "radv: handle NULL vertex bindings"
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6773>
Pierre-Loup A. Griffais [Fri, 18 Sep 2020 06:27:49 +0000 (23:27 -0700)]
radv: fix null descriptor for dynamic buffers
Fixes:
c1ef225d183 "radv: handle NULL descriptors"
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6772>
Pierre-Eric Pelloux-Prayer [Mon, 14 Sep 2020 19:08:29 +0000 (21:08 +0200)]
mesa: fix glUniform* when a struct contains a bindless sampler
Small example from #3271:
layout (bindless_sampler) uniform;
struct SamplerSparse {
sampler2D tex;
vec4 size;
[...]
};
uniform SamplerSparse foo;
'foo' will be marked as bindless but we should only take the assign-as-GLuint64 path for 'tex'.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3271
Fixes:
990c8d15ac3 ("mesa: fix setting uniform variables for bindless samplers/images")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6730>
Christian Gmeiner [Sat, 8 Aug 2020 15:44:15 +0000 (17:44 +0200)]
etnaviv: add disk cache
Adds a shader disk-cache for shader variants. Note that builds with
`-Dshader-cache=false` have no-op stubs with `disk_cache_create()` that
returns NULL.
This shader disk-cache gets used when using NIR only. Helps to save
about 1-2 minutes for a deqp run on gc2000.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6669>
Christian Gmeiner [Wed, 9 Sep 2020 19:16:36 +0000 (21:16 +0200)]
etnaviv: shuffle some variant fields
Just to group together the parts that will get serialized when we have
shader disk-cache.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6669>
Michel Zou [Tue, 15 Sep 2020 19:08:06 +0000 (21:08 +0200)]
swr: fix _BitScanForward64 on unix
it must apply to 64 bits types, and use the ctzll intrinsic instead of ctz
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Krzysztof Raszkowski <krzysztof.raszkowski@intel.com>
Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6705>
Michel Zou [Sun, 13 Sep 2020 06:59:34 +0000 (08:59 +0200)]
swr: missing _BitScanForward64 on 32 bits win
the code does not compile on 32 bits systems
for mingw we can use gcc intrinsics like the unix side
for msvc a generic implementation is provided
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Krzysztof Raszkowski <krzysztof.raszkowski@intel.com>
Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6705>
Tapani Pälli [Tue, 15 Sep 2020 14:05:00 +0000 (17:05 +0300)]
glsl: take EXT_gpu_shader4 in to account when adding round
GL_EXT_gpu_shader4 adds truncate() and round() builtins.
Fixes:
12567de2be7 ("glsl: mark some builtins with correct glsl(es) version check")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6731>
Vinson Lee [Thu, 17 Sep 2020 23:08:41 +0000 (16:08 -0700)]
turnip: Release bo_mutex lock before potential error path.
Fix defect reported by Coverity Scan.
Missing unlock (LOCK)
missing_unlock: Returning without unlocking queue->device->bo_mutex.
Suggested-by: Jonathan Marek <jonathan@marek.ca>
Fixes:
bea6290ca090 ("turnip: device global bo list")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6768>
Vinson Lee [Tue, 15 Sep 2020 00:53:31 +0000 (17:53 -0700)]
panfrost: Delete debug allocated syncobj.
Fix defect reported by Coverity Scan.
Logically dead code (DEADCODE)
dead_error_line: Execution cannot reach this statement: drmSyncobjDestroy(dev->fd, ...
Fixes:
64d6f56ad26f ("panfrost: Allocate syncobjs in panfrost_flush")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6720>
Vinson Lee [Tue, 15 Sep 2020 04:59:55 +0000 (21:59 -0700)]
radesonsi: Remove unsigned comparison to zero.
cbuf was changed to unsigned in commit
3fec2f67c3d9 ("radeonsi:
compact MRTs to save PS export memory space").
Fix defect reported by Coverity Scan.
Macro compares unsigned to 0 (NO_EFFECT)
unsigned_compare: This greater-than-or-equal-to-zero comparison of
an unsigned value is always true. cbuf >= 0U.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6739>
Vinson Lee [Tue, 15 Sep 2020 23:28:06 +0000 (16:28 -0700)]
disk_cache: Fix filename leak on error path.
Remove filename ralloc comment. filename is allocated by asprintf.
Clean up disk_cache_get dead code left over from
367ac07efcc8
("disk_cache: move cache item loading code into
disk_cache_load_item() helper").
Fix defect reported by Coverity Scan.
Logically dead code (DEADCODE)
dead_error_line: Execution cannot reach this statement:
free(filename);
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6738>
Mauro Rossi [Thu, 17 Sep 2020 19:16:20 +0000 (21:16 +0200)]
android: pan/bi: Use new packing
Fixes the following building error:
external/mesa/src/panfrost/bifrost/bi_pack.c:26:10: fatal error: 'bi_generated_pack.h' file not found
^~~~~~~~~~~~~~~~~~~~~
1 error generated.
Fixes:
2ff53879 ("pan/bi: Use new packing")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6765>
Mauro Rossi [Thu, 17 Sep 2020 19:05:10 +0000 (21:05 +0200)]
android: pan/bi: Use new disassembler
Fixes the following building error:
external/mesa/src/panfrost/bifrost/bi_pack.c:409:24: error: implicit declaration of function 'pan_pack_fma_nop_i32' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
return pan_pack_fma_nop_i32(clause, NULL, regs);
^
external/mesa/src/panfrost/bifrost/bi_pack.c:433:32: error: implicit declaration of function 'pan_pack_fma_fadd_f32' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
return pan_pack_fma_fadd_f32(clause, bundle.fma, regs);
^
external/mesa/src/panfrost/bifrost/bi_pack.c:433:32: note: did you mean 'pan_pack_fma_nop_i32'?
external/mesa/src/panfrost/bifrost/bi_pack.c:409:24: note: 'pan_pack_fma_nop_i32' declared here
return pan_pack_fma_nop_i32(clause, NULL, regs);
^
external/mesa/src/panfrost/bifrost/bi_pack.c:435:32: error: implicit declaration of function 'pan_pack_fma_fadd_v2f16' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
return pan_pack_fma_fadd_v2f16(clause, bundle.fma, regs);
^
external/mesa/src/panfrost/bifrost/bi_pack.c:435:32: note: did you mean 'pan_pack_fma_fadd_f32'?
external/mesa/src/panfrost/bifrost/bi_pack.c:433:32: note: 'pan_pack_fma_fadd_f32' declared here
return pan_pack_fma_fadd_f32(clause, bundle.fma, regs);
^
external/mesa/src/panfrost/bifrost/bi_pack.c:442:32: error: implicit declaration of function 'pan_pack_fma_fcmp_f32' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
return pan_pack_fma_fcmp_f32(clause, bundle.fma, regs);
^
external/mesa/src/panfrost/bifrost/bi_pack.c:442:32: note: did you mean 'pan_pack_fma_fadd_f32'?
external/mesa/src/panfrost/bifrost/bi_pack.c:433:32: note: 'pan_pack_fma_fadd_f32' declared here
return pan_pack_fma_fadd_f32(clause, bundle.fma, regs);
^
external/mesa/src/panfrost/bifrost/bi_pack.c:444:32: error: implicit declaration of function 'pan_pack_fma_fcmp_v2f16' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
return pan_pack_fma_fcmp_v2f16(clause, bundle.fma, regs);
^
external/mesa/src/panfrost/bifrost/bi_pack.c:444:32: note: did you mean 'pan_pack_fma_fadd_v2f16'?
external/mesa/src/panfrost/bifrost/bi_pack.c:435:32: note: 'pan_pack_fma_fadd_v2f16' declared here
return pan_pack_fma_fadd_v2f16(clause, bundle.fma, regs);
^
external/mesa/src/panfrost/bifrost/bi_pack.c:449:41: error: implicit declaration of function 'pan_pack_fma_rshift_and_i32' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
pan_pack_fma_rshift_and_i32(clause, bundle.fma, regs) :
^
external/mesa/src/panfrost/bifrost/bi_pack.c:449:41: note: did you mean 'pan_pack_fma_fadd_f32'?
external/mesa/src/panfrost/bifrost/bi_pack.c:433:32: note: 'pan_pack_fma_fadd_f32' declared here
return pan_pack_fma_fadd_f32(clause, bundle.fma, regs);
^
external/mesa/src/panfrost/bifrost/bi_pack.c:450:41: error: implicit declaration of function 'pan_pack_fma_lshift_and_i32' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
pan_pack_fma_lshift_and_i32(clause, bundle.fma, regs);
^
external/mesa/src/panfrost/bifrost/bi_pack.c:450:41: note: did you mean 'pan_pack_fma_rshift_and_i32'?
external/mesa/src/panfrost/bifrost/bi_pack.c:449:41: note: 'pan_pack_fma_rshift_and_i32' declared here
pan_pack_fma_rshift_and_i32(clause, bundle.fma, regs) :
^
external/mesa/src/panfrost/bifrost/bi_pack.c:453:41: error: implicit declaration of function 'pan_pack_fma_rshift_and_v2i16' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
pan_pack_fma_rshift_and_v2i16(clause, bundle.fma, regs) :
^
external/mesa/src/panfrost/bifrost/bi_pack.c:453:41: note: did you mean 'pan_pack_fma_fadd_v2f16'?
external/mesa/src/panfrost/bifrost/bi_pack.c:435:32: note: 'pan_pack_fma_fadd_v2f16' declared here
return pan_pack_fma_fadd_v2f16(clause, bundle.fma, regs);
^
external/mesa/src/panfrost/bifrost/bi_pack.c:454:41: error: implicit declaration of function 'pan_pack_fma_lshift_and_v2i16' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
pan_pack_fma_lshift_and_v2i16(clause, bundle.fma, regs);
^
external/mesa/src/panfrost/bifrost/bi_pack.c:454:41: note: did you mean 'pan_pack_fma_rshift_and_v2i16'?
external/mesa/src/panfrost/bifrost/bi_pack.c:453:41: note: 'pan_pack_fma_rshift_and_v2i16' declared here
pan_pack_fma_rshift_and_v2i16(clause, bundle.fma, regs) :
^
external/mesa/src/panfrost/bifrost/bi_pack.c:458:41: error: implicit declaration of function 'pan_pack_fma_rshift_and_v4i8' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
pan_pack_fma_rshift_and_v4i8(clause, bundle.fma, regs) :
^
external/mesa/src/panfrost/bifrost/bi_pack.c:459:41: error: implicit declaration of function 'pan_pack_fma_lshift_and_v4i8' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
pan_pack_fma_lshift_and_v4i8(clause, bundle.fma, regs);
^
external/mesa/src/panfrost/bifrost/bi_pack.c:459:41: note: did you mean 'pan_pack_fma_rshift_and_v4i8'?
external/mesa/src/panfrost/bifrost/bi_pack.c:458:41: note: 'pan_pack_fma_rshift_and_v4i8' declared here
pan_pack_fma_rshift_and_v4i8(clause, bundle.fma, regs) :
^
external/mesa/src/panfrost/bifrost/bi_pack.c:465:41: error: implicit declaration of function 'pan_pack_fma_rshift_or_i32' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
pan_pack_fma_rshift_or_i32(clause, bundle.fma, regs) :
^
external/mesa/src/panfrost/bifrost/bi_pack.c:465:41: note: did you mean 'pan_pack_fma_nop_i32'?
external/mesa/src/panfrost/bifrost/bi_pack.c:409:24: note: 'pan_pack_fma_nop_i32' declared here
return pan_pack_fma_nop_i32(clause, NULL, regs);
^
external/mesa/src/panfrost/bifrost/bi_pack.c:466:41: error: implicit declaration of function 'pan_pack_fma_lshift_or_i32' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
pan_pack_fma_lshift_or_i32(clause, bundle.fma, regs);
^
external/mesa/src/panfrost/bifrost/bi_pack.c:466:41: note: did you mean 'pan_pack_fma_rshift_or_i32'?
external/mesa/src/panfrost/bifrost/bi_pack.c:465:41: note: 'pan_pack_fma_rshift_or_i32' declared here
pan_pack_fma_rshift_or_i32(clause, bundle.fma, regs) :
^
external/mesa/src/panfrost/bifrost/bi_pack.c:469:41: error: implicit declaration of function 'pan_pack_fma_rshift_or_v2i16' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
pan_pack_fma_rshift_or_v2i16(clause, bundle.fma, regs) :
^
external/mesa/src/panfrost/bifrost/bi_pack.c:470:41: error: implicit declaration of function 'pan_pack_fma_lshift_or_v2i16' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
pan_pack_fma_lshift_or_v2i16(clause, bundle.fma, regs);
^
external/mesa/src/panfrost/bifrost/bi_pack.c:470:41: note: did you mean 'pan_pack_fma_rshift_or_v2i16'?
external/mesa/src/panfrost/bifrost/bi_pack.c:469:41: note: 'pan_pack_fma_rshift_or_v2i16' declared here
pan_pack_fma_rshift_or_v2i16(clause, bundle.fma, regs) :
^
external/mesa/src/panfrost/bifrost/bi_pack.c:474:41: error: implicit declaration of function 'pan_pack_fma_rshift_or_v4i8' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
pan_pack_fma_rshift_or_v4i8(clause, bundle.fma, regs) :
^
external/mesa/src/panfrost/bifrost/bi_pack.c:475:41: error: implicit declaration of function 'pan_pack_fma_lshift_or_v4i8' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
pan_pack_fma_lshift_or_v4i8(clause, bundle.fma, regs);
^
external/mesa/src/panfrost/bifrost/bi_pack.c:475:41: note: did you mean 'pan_pack_fma_rshift_or_v4i8'?
external/mesa/src/panfrost/bifrost/bi_pack.c:474:41: note: 'pan_pack_fma_rshift_or_v4i8' declared here
pan_pack_fma_rshift_or_v4i8(clause, bundle.fma, regs) :
^
external/mesa/src/panfrost/bifrost/bi_pack.c:482:41: error: implicit declaration of function 'pan_pack_fma_rshift_xor_i32' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
pan_pack_fma_rshift_xor_i32(clause, bundle.fma, regs) :
^
external/mesa/src/panfrost/bifrost/bi_pack.c:483:41: error: implicit declaration of function 'pan_pack_fma_lshift_xor_i32' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
pan_pack_fma_lshift_xor_i32(clause, bundle.fma, regs);
^
external/mesa/src/panfrost/bifrost/bi_pack.c:483:41: note: did you mean 'pan_pack_fma_rshift_xor_i32'?
external/mesa/src/panfrost/bifrost/bi_pack.c:482:41: note: 'pan_pack_fma_rshift_xor_i32' declared here
pan_pack_fma_rshift_xor_i32(clause, bundle.fma, regs) :
^
fatal error: too many errors emitted, stopping now [-ferror-limit=]
20 errors generated.
Fixes:
f8fc2105 ("pan/bi: Use new disassembler")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6765>
Adam Jackson [Thu, 17 Sep 2020 16:38:45 +0000 (12:38 -0400)]
glx: Allow depth-30 pbuffers to work without a depth-30 pixmap format
The backing pixmap needs to be big enough to hold depth-30 rendering,
but the server doesn't necessarily have a depth-30 pixmap format. Just
round up to the 32bpp format you'd be using anyway.
Fixes: mesa/mesa#3527
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6764>
Jason Ekstrand [Thu, 17 Sep 2020 12:21:52 +0000 (07:21 -0500)]
anv: Fix the target_bo assertion in anv_reloc_list_add
Fixes:
b75a92e2010e "anv: assert that the target bo is valid..."
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3528
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6759>
Rhys Perry [Tue, 15 Sep 2020 18:55:47 +0000 (19:55 +0100)]
radv: initialize with expanded cmask if the destination layout needs it
If radv_layout_can_fast_clear() is false, 028C70_COMPRESSION is unset when
the image is rendered to and CMASK isn't updated. This appears to cause
FMASK to be ignored and the 0th sample to always be used.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3449
Fixes:
7b21ce401f7e81deca5ab6a4353b1369d059bcee
('radv: disable FMASK compression when drawing with GENERAL layout')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6745>
Gert Wollny [Wed, 16 Sep 2020 18:24:23 +0000 (20:24 +0200)]
nir: remove ubo_r600 instrinsic since ubo_vec4 is used now
As suggested by Eric.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
eviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6743>
Gert Wollny [Sun, 6 Sep 2020 21:40:24 +0000 (23:40 +0200)]
r600/sfn: Use load_ubo_vec4 lowering pass
This replaces the lowering pass to align UBO loads at 16 byte
boundaries.
v2: use nir functions to query constants in ubo_vec4 (Eric)
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6743>
Gert Wollny [Sun, 13 Sep 2020 19:52:43 +0000 (21:52 +0200)]
r600: enable lowering uniforms to UBO
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6743>
Rhys Perry [Wed, 16 Sep 2020 14:48:22 +0000 (15:48 +0100)]
aco: fix incorrect assertion in emit_vop3a_instruction()
Fixes some float controls tests on Polaris10.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes:
0b6448bbe791474a152d53bfaf750408807ac166
('aco/isel: refactor emit_vop3a_instruction() to handle 2 operand instructions')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6744>
Eric Anholt [Wed, 16 Sep 2020 02:23:06 +0000 (19:23 -0700)]
turnip: Add support for a615.
Verified RB_CCU_CNTL, 9805, and A0F8 values from blob traces.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6741>
Marijn Suijten [Sun, 13 Sep 2020 12:26:21 +0000 (14:26 +0200)]
util: Makefile.sources: Add disk_cache_os.{c,h}
The functions in disk_cache_os are referenced by disk_cache but these
files are not included in builds based on Makefile.sources such as
Android, resulting in linker errors.
Fixes:
4339ecde35c ("disk_cache: move cache dir generation into OS specific helper file")
Signed-off-by: Marijn Suijten <marijns95@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6702>
Alejandro Piñeiro [Tue, 15 Sep 2020 21:53:14 +0000 (23:53 +0200)]
nir/lower_io: don't reduce range if parent length is zero
When handling arrays, range is increased based on the array size minus
one. But if such is zero, it has the effect of reducing the
range. Handle that case by returning the unknown range value.
v2:
* Add missing braces.
* Return unknown range in this case, instead of keeping the initial
range.
v3: Simplify code, using existing "fail" label. (Jason)
Fixes the following using v3dv:
dEQP-VK.graphicsfuzz.cov-simplify-clamp-max-itself
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6737>
Alyssa Rosenzweig [Thu, 10 Sep 2020 17:26:57 +0000 (13:26 -0400)]
pan/bi: Drop *FMIN reference
Even on G72, it's unsupported.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
Alyssa Rosenzweig [Fri, 31 Jul 2020 23:55:12 +0000 (19:55 -0400)]
pan/bi: Remove unused packing data structures
Replaced by metaprogrammed variants.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
Alyssa Rosenzweig [Wed, 2 Sep 2020 13:12:27 +0000 (09:12 -0400)]
pan/bi: Remove unused prints
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
Alyssa Rosenzweig [Mon, 3 Aug 2020 16:48:44 +0000 (12:48 -0400)]
pan/bi: Use new packing
...and remove the old manual code.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
Alyssa Rosenzweig [Mon, 14 Sep 2020 17:44:52 +0000 (13:44 -0400)]
pan/bi: Move packing helpers to dedicated file
We'll need to access them from the autogenerated section.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
Alyssa Rosenzweig [Wed, 9 Sep 2020 21:46:58 +0000 (17:46 -0400)]
pan/bi: Use src1/dest_invert instead of src_invert[]
This maps more closely to the hardware, which makes for easier packing.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
Alyssa Rosenzweig [Wed, 9 Sep 2020 21:40:22 +0000 (17:40 -0400)]
pan/bi: Use 8-bit shifts
Logically, it doesn't matter, but we want the IR to accurately reflect
the hardware behaviour.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
Alyssa Rosenzweig [Mon, 3 Aug 2020 16:48:25 +0000 (12:48 -0400)]
pan/bi: Pass blend descriptor explicitly in IR
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
Alyssa Rosenzweig [Mon, 3 Aug 2020 16:47:57 +0000 (12:47 -0400)]
pan/bi: Track compute_lod in IR
We'll need to differentiate tex and txl.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
Alyssa Rosenzweig [Fri, 31 Jul 2020 22:48:27 +0000 (18:48 -0400)]
pan/bi: Add format field to IR
To make register_format packing explicit, and possibly in the future
support the auto mode.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
Alyssa Rosenzweig [Fri, 31 Jul 2020 21:29:50 +0000 (17:29 -0400)]
pan/bi: Introduce segments into the IR
Needed to select between global, UBO, TLS, and WLS addressing modes,
required to implement loads/stores correctly.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
Alyssa Rosenzweig [Fri, 31 Jul 2020 20:47:05 +0000 (16:47 -0400)]
pan/bi: Add dummy carry/borrow argument for iadd/isub
On FMA, a carry/borrow is required for iaddc/isubb (whereas the ADD
counterparts don't support carrying/borrowing). The trick is to model
this with an extra dummy (ZERO) argument which is free to encode on FMA,
and in the scheduler, "demote" to the non-carried versions if we want to
schedule to ADD.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
Alyssa Rosenzweig [Tue, 8 Sep 2020 14:47:40 +0000 (10:47 -0400)]
pan/bi: Use canonical syntax for special constants
Adds some missing constants relevant to compute shaders, etc.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
Alyssa Rosenzweig [Tue, 8 Sep 2020 14:47:13 +0000 (10:47 -0400)]
pan/bi: Use canonical syntax for registers/uniforms/imms
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
Alyssa Rosenzweig [Mon, 14 Sep 2020 17:21:33 +0000 (13:21 -0400)]
pan/bi: Use new disassembler
We still use the clause/register decoding, but we now use the
metaprogrammed instruction decoding for the bulk of the operation.
We add a meson rule to call out to the Python generator script during
the build process.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
Alyssa Rosenzweig [Mon, 14 Sep 2020 17:09:53 +0000 (13:09 -0400)]
pan/bi: Export dump_src
Needed in generated disassembler.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
Alyssa Rosenzweig [Mon, 14 Sep 2020 17:08:44 +0000 (13:08 -0400)]
pan/bi: Add bi_disasm_dest_* helpers
Used to print the actual register/temporary for an instruction
destination given the port arrangement.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
Alyssa Rosenzweig [Mon, 14 Sep 2020 17:24:11 +0000 (13:24 -0400)]
pan/bi: Add disassembly prototypes
Fix a header guard too.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
Alyssa Rosenzweig [Mon, 14 Sep 2020 17:18:34 +0000 (13:18 -0400)]
pan/bi: Add disassembler generator
Given a parsed instruction set definition, this script generates
instruction disassembly routines responsible for decoding instruction
words and pretty-printing. Decoding is somewhat complex as with the
previous disassembler but can be automated.
Disssembly is complicated by indirect specifications of instruction
modifiers. These specifiers are given as logic expressions in the XML,
which optimizes for straightforwaard packing but makes disassembly
awkward. Instead of attempting to invert the logic directly, we generate
lookup tables of `modifiers -> encoding` maps which we may invert
directly to produce a lookup table for the `encoding -> modifiers` map
needed for disassembly.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
Alyssa Rosenzweig [Mon, 14 Sep 2020 17:48:28 +0000 (13:48 -0400)]
pan/bi: Add packing generator
From the ISA definition, we can generate a function for each instruction
that looks at the bi_instruction in the intermediate representation and
emits a 20- or 23-bit word (for ADD/FMA respectively) containing that
instruction with all of its modifiers.
These will approximate the old packing routines, although the mapping of
bi_instruction to machine instructions will be hardcoded (at least for
now).
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
Alyssa Rosenzweig [Mon, 14 Sep 2020 17:17:07 +0000 (13:17 -0400)]
pan/bi: Add ISA parser
This Python script parses the ISA.xml file to produce a normalized
in-memory representation suitable for the disassembly and packing
scripts to consume. In particular, it papers over details about
duplicate encodings and default fields.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
Alyssa Rosenzweig [Mon, 14 Sep 2020 17:14:48 +0000 (13:14 -0400)]
pan/bi: Add XML describing the instruction set
Throughout this series, this XML file will serve as architectural ground
truth. It contains every instruction in the instruction set with all
programmable modifiers, as well as logic for computing derived values
(indirectly specified modifiers) and swapping operands as needed by
numerous encodings. It also allows for multiple encodings per
instruction differentiated by exact bits (a generalization of opcodes),
with different derived fields in each encoding, and logic tests to
select between the encodings at pack time.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
Alyssa Rosenzweig [Wed, 16 Sep 2020 17:12:20 +0000 (13:12 -0400)]
pan/bi: Lower flrp16
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Fixes:
3c8934a644b ("nir/algebraic: add flrp patterns for 16 and 64 bits")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
Mike Blumenkrantz [Wed, 16 Sep 2020 16:38:58 +0000 (12:38 -0400)]
anv: assert that the target bo is valid when adding a reloc list
this catches some undefined behavior like e.g., using a stale descriptorset
that references deleted bos, which I would absolutely never do
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6747>
Mike Blumenkrantz [Fri, 11 Sep 2020 13:00:53 +0000 (09:00 -0400)]
anv: improve error message when failing to open device path
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6747>
Eric Engestrom [Wed, 16 Sep 2020 17:43:27 +0000 (19:43 +0200)]
docs: update calendar and link releases notes for 20.1.8
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6748>
Eric Engestrom [Wed, 16 Sep 2020 17:24:00 +0000 (19:24 +0200)]
docs: add release notes for 20.1.8
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6748>
Gert Wollny [Sun, 13 Sep 2020 19:31:27 +0000 (21:31 +0200)]
gallium+mesa/st: lower uniforms based on compiler flag instead of packed uniforms cap
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6316>
Gert Wollny [Sun, 13 Sep 2020 19:28:34 +0000 (21:28 +0200)]
llvmpipe: set lower_uniform_to_ubo compiler flag
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6316>
Gert Wollny [Sun, 13 Sep 2020 19:28:02 +0000 (21:28 +0200)]
intel/compiler: Set lower_uniform_to_ubo compiler flag
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6316>
Gert Wollny [Sun, 13 Sep 2020 19:27:35 +0000 (21:27 +0200)]
freedreno/ir3: set lower_uniforms_to_ubo compiler flag
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6316>
Gert Wollny [Sun, 13 Sep 2020 19:25:35 +0000 (21:25 +0200)]
radeonsi: set compiler flag lower_uniforms_to_ubo
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6316>
Gert Wollny [Sun, 13 Sep 2020 19:01:55 +0000 (21:01 +0200)]
nir: Add option lower_uniforms_to_ubo
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6316>
Erik Faye-Lund [Tue, 8 Sep 2020 16:31:20 +0000 (18:31 +0200)]
gallium/aux: remove unused u_blit.[ch]
There's no users of this code, so we might as well get rid of it to
avoid confusion with u_blitter.[ch].
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6651>
Erik Faye-Lund [Tue, 8 Sep 2020 16:29:43 +0000 (18:29 +0200)]
vc4: remove unused header
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6651>
Erik Faye-Lund [Tue, 8 Sep 2020 16:29:27 +0000 (18:29 +0200)]
v3d: remove unused header
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6651>
Gert Wollny [Wed, 16 Sep 2020 08:29:13 +0000 (10:29 +0200)]
r600/sfn: Fix comparison with different signedness
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6706>
Gert Wollny [Tue, 15 Sep 2020 18:50:58 +0000 (20:50 +0200)]
r600/sfn: more fixing of vec4 fetching
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6706>
Gert Wollny [Sun, 13 Sep 2020 18:12:12 +0000 (20:12 +0200)]
r600/sfn: Fix source swizzle for gradient queries
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6706>
Gert Wollny [Mon, 7 Sep 2020 06:14:51 +0000 (08:14 +0200)]
r600/sfn: Fix bitfield ops and 2x16 split_y
Don't reuse the dest register to make instruction dependency tracking
easier.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6706>
Gert Wollny [Sun, 2 Aug 2020 18:50:33 +0000 (20:50 +0200)]
r600/sfn: Fix split_alu_modifiers
Don't reuse the dest register so we can better track instruction
dependencies later.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6706>
Gert Wollny [Sun, 6 Sep 2020 21:39:46 +0000 (23:39 +0200)]
r600/sfn: Lower *sign opcodes in nir
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6706>
Gert Wollny [Mon, 3 Aug 2020 14:33:36 +0000 (16:33 +0200)]
r600/sfn: avoid some copies
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6706>
Gert Wollny [Sun, 2 Aug 2020 17:35:58 +0000 (19:35 +0200)]
r600/sfn: Fix ordering of tex param moves
Both moves should happen in the same instuction group, otherwise the
lod/bias value will be overwritten by the shadow compare value.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6706>
Gert Wollny [Fri, 31 Jul 2020 16:58:06 +0000 (18:58 +0200)]
r600/sfn: clone shader before lowering to registers and src/dest modifiers
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6706>
Gert Wollny [Thu, 30 Jul 2020 21:16:44 +0000 (23:16 +0200)]
r600/sfn: Fix loading vertex attributes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6706>
Gert Wollny [Sat, 25 Jul 2020 22:30:06 +0000 (00:30 +0200)]
r600/sfn: correct ring op patching
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6706>
Gert Wollny [Fri, 24 Jul 2020 18:18:37 +0000 (20:18 +0200)]
r600/nir: fetch sources and split uniforms before emittting alu instructions
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6706>
Gert Wollny [Sun, 5 Jul 2020 14:55:42 +0000 (16:55 +0200)]
r600: revert disabling llvm draw
Now that llvm supports NIR and lowers uniforms to UBO in draw
calls when this hasn't be done before this can be used again.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6706>
Pierre-Eric Pelloux-Prayer [Fri, 11 Sep 2020 09:52:18 +0000 (11:52 +0200)]
radeonsi: fix guardband handling for large values
When minx = -32768 (ViewportBounds.Min) we'll hit the "left <= -1, ..."
assert because 'left' is computed as:
(-65535 / 2 - translate_x) / (minx - translate_x)
This commit fixes the problem by using the full max_viewport_size => [-32768, 32767]
instead of [-32767, 32767] for SI_QUANT_MODE_16_8_FIXED_POINT_1_256TH.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3502
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6685>
Pierre-Eric Pelloux-Prayer [Fri, 11 Sep 2020 09:52:04 +0000 (11:52 +0200)]
radeonsi: fix quant_mode selection for large negative values
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6685>
Pierre-Eric Pelloux-Prayer [Wed, 2 Sep 2020 10:07:00 +0000 (12:07 +0200)]
radeon/vcn: set dec->bs_ptr = NULL on unmap
To avoid using a dangling pointer.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/1308
Cc: mesa-stable
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6556>
Pierre-Eric Pelloux-Prayer [Wed, 2 Sep 2020 09:58:12 +0000 (11:58 +0200)]
r600/uvd: set dec->bs_ptr = NULL on unmap
To avoid using a dangling pointer.
See https://gitlab.freedesktop.org/mesa/mesa/-/issues/1308
Cc: mesa-stable
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6556>
Eric Engestrom [Fri, 4 Sep 2020 12:48:30 +0000 (14:48 +0200)]
docs/release-calendar: update 20.2
In !6574 I fixed the dates, but I didn't realise there was one too many
releases in the list, as `-rc3` had already been released and `-rc4` was
about to be.
`-rc4` was since released, so the next 20.2 release is now `-rc5`, and
it's slipped another week; let's update the calendar to that.
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6614>
Eric Engestrom [Wed, 2 Sep 2020 21:06:44 +0000 (23:06 +0200)]
docs: add another 20.1.x release to allow for more overlap with 20.2
The aim is to have the last release of the old branch on or after the .1
release on new one, but as things stand the last 20.1 would happen
between 20.2.0 and 20.2.1, so let's add one more.
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6615>
Eric Engestrom [Thu, 10 Sep 2020 11:25:20 +0000 (13:25 +0200)]
docs/download: mention tarball GPG signatures and link to the keys
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3507
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6679>
Marek Olšák [Tue, 15 Sep 2020 01:04:44 +0000 (21:04 -0400)]
Revert "radeonsi: move L2_CACHE_CONTROL registers into si_emit_framebuffer_state"
This reverts commit
7edf15ad4762eac3bfbcfbf1c8ec8ea4d955c6d6.
The register value is immutable now.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6722>
Marek Olšák [Tue, 15 Sep 2020 00:59:36 +0000 (20:59 -0400)]
Revert "radeonsi: set BIG_PAGE fields on gfx10.3"
This reverts commit
430d384c311468c6180a1d67ed90bb74d4fe1c3b.
BIT_PAGE can't be set for GTT and we don't know if a buffer has been
evicted to GTT.
Fixes:
430d384c311468c6180a1d67ed90bb74d4fe1c3b
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6722>
Marek Olšák [Fri, 4 Sep 2020 10:25:47 +0000 (06:25 -0400)]
radeonsi: clean up ffma handling
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6596>