hyeongyu kim [Wed, 22 Sep 2021 14:30:33 +0000 (23:30 +0900)]
[InstCombine] Update InstCombine to use poison instead of undef for shufflevector's placeholder (2/3)
This patch is for fixing potential shufflevector-related bugs like D93818.
As D93818, this patch change shufflevector's default placeholder to poison.
To reduce risk, it was divided into several patches, and this patch is for InstCombineCompares and InstructionCombining.
Reviewed By: spatel
Differential Revision: https://reviews.llvm.org/D110227
Louis Dionne [Wed, 22 Sep 2021 15:13:47 +0000 (11:13 -0400)]
[libc++][NFC] Add link to Discord channel from documentation
Teresa Johnson [Wed, 22 Sep 2021 15:04:08 +0000 (08:04 -0700)]
[Sanitizer] Add Windows header for _mkdir
This will hopefully fix the sanitizer_windows bot failure after D109794:
https://lab.llvm.org/buildbot/#/builders/127/builds/17222
Simon Pilgrim [Wed, 22 Sep 2021 13:40:29 +0000 (14:40 +0100)]
[Target][CodeGen] Remove default CostKind arguments on inner/impl TTI overrides
Based off a discussion on D110100, we should be avoiding default CostKinds whenever possible.
This initial patch removes them from the 'inner' target implementation callbacks - these should only be used by the main TTI calls, so this should guarantee that we don't cause changes in CostKind by missing it in an inner call. This exposed a few missing arguments in getGEPCost and reduction cost calls that I've cleaned up.
Differential Revision: https://reviews.llvm.org/D110242
hyeongyu kim [Wed, 22 Sep 2021 13:39:54 +0000 (22:39 +0900)]
[InstCombine] Update InstCombine to use poison instead of undef for shufflevector's placeholder (1/3)
This patch is for fixing potential shufflevector-related bugs like D93818.
As D93818, this patch change shufflevector's default placeholder to poison.
To reduce risk, it was divided into several patches, and this patch is for InstCombineCasts.
Reviewed By: spatel
Differential Revision: https://reviews.llvm.org/D110226
Sander de Smalen [Fri, 17 Sep 2021 14:14:24 +0000 (15:14 +0100)]
[AArch64][SVE] NFC: Move extract_subvector tests around.
This patch splits up sve-extract-vector.ll into
* sve-extract-fixed-vector.ll
* sve-extract-scalable-vector.ll
For testing extracts of a fixed-width or scalable sub-vector from a
scalable source vector, respectively.
Joseph Huber [Wed, 22 Sep 2021 13:20:49 +0000 (09:20 -0400)]
[OpenMP] Make sure the Thread ID function is not removed
Summary:
The thread ID function was reintroduced in D110195, but could
potentially be removed by the optimizer. Make the function noinline to
preserve the call sites and add it to the externalization RAII so its
definition is not removed by the attributor.
Joseph Tremoulet [Wed, 22 Sep 2021 14:12:16 +0000 (10:12 -0400)]
[mailmap] Add entry for myself
Sander de Smalen [Wed, 22 Sep 2021 13:25:14 +0000 (14:25 +0100)]
[AArch64][SVE] Add extract_subvector patterns for unpacked fp16 and bfloat types.
Reviewed By: david-arm
Differential Revision: https://reviews.llvm.org/D110163
Sander de Smalen [Wed, 22 Sep 2021 12:34:00 +0000 (13:34 +0100)]
[SelectionDAG] Remove PromoteIntOp_EXTRACT_SUBVECTOR.
This code seems untested and is likely obsolete, because this case
should already be handled by the code that legalizes the result type
of EXTRACT_SUBVECTOR.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D110061
Tim Northover [Wed, 22 Sep 2021 12:06:55 +0000 (13:06 +0100)]
AArch64: use indivisible cmpxchg for 128-bit atomic loads at O0
Like normal atomicrmw operations, at -O0 the simple register-allocator can
insert spills into the LL/SC loop if it's expanded and visible when regalloc
runs. This can cause the operation to never succeed by repeatedly clearing the
monitor. Instead expand to a cmpxchg, which has a pseudo-instruction for -O0.
Andrew Ng [Mon, 20 Sep 2021 18:13:30 +0000 (19:13 +0100)]
[ELF][test] Restore important part of ICF alignment test
Restore the checking of addresses in ICF test which was testing the
behaviour of ICF with regards to different alignments of otherwise
identical sections. Also make the test more robust to layout changes.
Differential Revision: https://reviews.llvm.org/D110090
Alexey Bataev [Wed, 22 Sep 2021 12:50:14 +0000 (05:50 -0700)]
[SLP][NFC]Rename function in the test for better matching of the
transformation.
Stefan Gränitz [Wed, 22 Sep 2021 11:54:26 +0000 (13:54 +0200)]
[lldb] JITLoaderGDB tests can use lli in ORC greedy mode
At first, lli only supported lazy mode for ORC. Greedy mode was added with
e1579894d205 and is the default settings now. JITLoaderGDB tests don't rely on laziness, so we can switch them to greedy and remove some complexity.
Sander de Smalen [Wed, 22 Sep 2021 09:59:21 +0000 (10:59 +0100)]
[SelectionDAG] Add PromoteIntOp_INSERT_SUBVECTOR.
This is required to codegen something like:
<vscale x 8 x i16> @llvm.experimental.vector.insert(<vscale x 8 x i16> %vec,
<vscale x 2 x i16> %subvec,
i64 %idx)
where the output vector is legal, but the input vector needs promoting.
It implements this by performing the whole operation on the promoted type,
and then truncating the result.
Reviewed By: david-arm, craig.topper
Differential Revision: https://reviews.llvm.org/D110059
LLVM GN Syncbot [Wed, 22 Sep 2021 12:20:22 +0000 (12:20 +0000)]
[gn build] Port
7a320b279d07
Nico Weber [Wed, 22 Sep 2021 12:20:12 +0000 (08:20 -0400)]
[gn build] (manually) port
f8b1cc365786
Florian Hahn [Wed, 22 Sep 2021 11:29:48 +0000 (12:29 +0100)]
[Passes] Run vector-combine early with -fenable-matrix.
IR with matrix intrinsics is likely to also contain large vector
operations, which can benefit from early simplifications.
This is the last step in a series of changes to improve code-gen for
code using matrix subscript operators with the C/C++ matrix extension in
CLang, like
using matrix_t = double __attribute__((matrix_type(15, 15)));
void foo(unsigned i, matrix_t &A, matrix_t &B) {
for (unsigned j = 0; j < 4; ++j)
for (unsigned k = 0; k < i; k++)
B[k][j] -= A[k][j] * B[i][j];
}
https://clang.godbolt.org/z/6dKxK1Ed7
Reviewed By: spatel
Differential Revision: https://reviews.llvm.org/D102496
Sanjay Patel [Wed, 22 Sep 2021 11:44:17 +0000 (07:44 -0400)]
Revert "[InstCombine] fold cast of right-shift if high bits are not demanded"
This reverts commit
2f6b07316f560a1f6d225919019dff2e5d6346e5.
This caused several bots to hit an infinite loop at stage 2,
so it needs to be reverted while figuring out how to fix that.
Sanjay Patel [Wed, 22 Sep 2021 11:42:12 +0000 (07:42 -0400)]
Revert "[CodeGen] regenerate test checks; NFC"
This reverts commit
52832cd917af00e2b9c6a9d1476ba79754dcabff.
The motivating commit
2f6b07316f5 caused several bots to hit
an infinite loop at stage 2, so that needs to be reverted too
while figuring out how to fix that.
Florian Hahn [Wed, 22 Sep 2021 09:28:36 +0000 (10:28 +0100)]
[Matrix] Emit assumption that matrix indices are valid.
The matrix extension requires the indices for matrix subscript
expression to be valid and it is UB otherwise.
extract/insertelement produce poison if the index is invalid, which
limits the optimizer to not be bale to scalarize load/extract pairs for
example, which causes very suboptimal code to be generated when using
matrix subscript expressions with variable indices for large matrixes.
This patch updates IRGen to emit assumes to for index expression to
convey the information that the index must be valid.
This also adjusts the order in which operations are emitted slightly, so
indices & assumes are added before the load of the matrix value.
Reviewed By: erichkeane
Differential Revision: https://reviews.llvm.org/D102478
Martin Storsjö [Tue, 14 Sep 2021 10:50:41 +0000 (13:50 +0300)]
[lldb] [Windows] Fix continuing from breakpoints and singlestepping on ARM/AArch64
Based on suggestions by Eric Youngdale.
This fixes https://llvm.org/PR51673.
Differential Revision: https://reviews.llvm.org/D109777
David Green [Wed, 22 Sep 2021 11:07:52 +0000 (12:07 +0100)]
[ARM] Allow smaller VMOVL in tail predicated loops
This allows VMOVL in tail predicated loops so long as the the vector
size the VMOVL is extending into is less than or equal to the size of
the VCTP in the tail predicated loop. These cases represent a
sign-extend-inreg (or zero-extend-inreg), which needn't block tail
predication as in https://godbolt.org/z/hdTsEbx8Y.
For this a vecsize has been added to the TSFlag bits of MVE
instructions, which stores the size of the elements that the MVE
instruction operates on. In the case of multiple size (such as a
MVE_VMOVLs8bh that extends from i8 to i16, the largest size was be
chosen). The sizes are encoded as 00 = i8, 01 = i16, 10 = i32 and 11 =
i64, which often (but not always) comes from the instruction encoding
directly. A unit test was added, and although only a subset of the
vecsizes are currently used, the rest should be useful for other cases.
Differential Revision: https://reviews.llvm.org/D109706
Raphael Isemann [Wed, 22 Sep 2021 10:14:50 +0000 (12:14 +0200)]
Unbreak module builds by making InstructionWorklist.h non-modular
This regressed in D110181 and apparently the header intentionally requires
DEBUG_TYPE to be defined by the including file. Just exclude the header from
the module to unbreak the build.
Yi Kong [Wed, 22 Sep 2021 07:50:12 +0000 (15:50 +0800)]
Don't fold (select C, (gep Ptr, Idx), Ptr) if C is vector but Idx is scalar
The folding rule (select C, (gep Ptr, Idx), Ptr) -> (gep Ptr, (select C,
Idx, 0)) creates a malformed SELECT IR if C is a vector while Idx is scalar.
SELECT VecC, ScalarIdx, 0
We could splat Idx to a vector but it defeats the purpose of
optimisation. Don't apply the folding rule in this case.
This fixes a regression from commit
d561b6fbdbe6d1da05fd92003a4ac1e37bf4b8bc.
Florian Mayer [Wed, 15 Sep 2021 09:10:11 +0000 (10:10 +0100)]
[hwasan] also omit safe mem[cpy|mov|set].
Reviewed By: eugenis
Differential Revision: https://reviews.llvm.org/D109816
Sander de Smalen [Wed, 22 Sep 2021 08:47:16 +0000 (09:47 +0100)]
[SelectionDAG] Make WidenVecRes_Convert work for scalable vectors.
Most of the code wasn't yet scalable safe, although most of the
code conceptually just works for scalable vectors. This change
makes the algorithm work on ElementCount, where appropriate,
and leaves the fixed-width only code to use `getFixedNumElements`.
Reviewed By: david-arm
Differential Revision: https://reviews.llvm.org/D110058
Simon Pilgrim [Wed, 22 Sep 2021 09:08:14 +0000 (10:08 +0100)]
[LoopVectorize][X86] Add operands to make it more obvious what line the CHECK concerns
As we're checking the cost debug analysis these should match the original IR line - so we shouldn't have any variable naming issues.
I'm investigating v4i32 mul -> PMADDDW costs handling (for PR47437) and these CHECK lines were proving tricky to keep track of
Florian Hahn [Wed, 22 Sep 2021 08:30:53 +0000 (09:30 +0100)]
[VectorCombine] Switch to using a worklist.
This patch updates VectorCombine to use a worklist to allow iterative
simplifications where a combine enables other combines.
Suggested in D100302.
The main use case at the moment is foldSingleElementStore and
scalarizeLoadExtract working together to improve scalarization.
Note that we now also do not run SimplifyInstructionsInBlock on the
whole function if there have been changes. This means we fail to
remove/simplify instructions not related to any of the vector combines.
IMO this is fine, as simplifying the whole function seems more like a
workaround for not tracking the changed instructions.
Compile-time impact looks neutral:
NewPM-O3: +0.02%
NewPM-ReleaseThinLTO: -0.00%
NewPM-ReleaseLTO-g: -0.02%
http://llvm-compile-time-tracker.com/compare.php?from=
52832cd917af00e2b9c6a9d1476ba79754dcabff&to=
e66520a4637290550a945d528e3e59573485dd40&stat=instructions
Reviewed By: spatel, lebedev.ri
Differential Revision: https://reviews.llvm.org/D110171
Sander de Smalen [Tue, 21 Sep 2021 11:44:02 +0000 (12:44 +0100)]
[AArch64][SVE] Add missing load/store patterns for unpacked bfloat vectors.
Reviewed By: c-rhodes
Differential Revision: https://reviews.llvm.org/D110063
Jay Foad [Tue, 21 Sep 2021 12:03:23 +0000 (13:03 +0100)]
[AMDGPU] Convert mac/fmac to mad/fma when folding output modifiers
Use of output modifiers forces VOP3 encoding for a VOP2 mac/fmac
instruction, so we might as well convert it to the more flexible VOP3-
only mad/fma form.
With this change, the only way we should emit VOP3-encoded mac/fmac is
if regalloc chooses registers that require the VOP3 encoding, e.g. sgprs
for both src0 and src1. In all other cases the mac/fmac should either be
converted to mad/fma or shrunk to VOP2 encoding.
Differential Revision: https://reviews.llvm.org/D110156
Jay Foad [Thu, 16 Sep 2021 13:36:51 +0000 (14:36 +0100)]
[AMDGPU] Divergence-driven instruction selection for mul i32
Differential Revision: https://reviews.llvm.org/D109881
David Green [Wed, 22 Sep 2021 08:33:36 +0000 (09:33 +0100)]
[ARM] Add additional tests for VMOVL in tail predicated loops.
Dmitry Vyukov [Tue, 21 Sep 2021 11:09:31 +0000 (13:09 +0200)]
tsan: write uptime in mem profile
Write uptime in real time seconds for every mem profile record.
Uptime is useful to make more sense out of the profile,
compare random lines, etc.
Depends on D110153.
Reviewed By: melver, vitalybuka
Differential Revision: https://reviews.llvm.org/D110154
Dmitry Vyukov [Tue, 21 Sep 2021 09:54:03 +0000 (11:54 +0200)]
tsan: remove stale comment
We do query it every 100ms now.
(GetRSS was fixed to not be dead slow IIRC)
Depends on D110152.
Reviewed By: melver, vitalybuka
Differential Revision: https://reviews.llvm.org/D110153
Dmitry Vyukov [Tue, 21 Sep 2021 09:50:09 +0000 (11:50 +0200)]
tsan: move mem profile initialization into separate function
BackgroundThread function is quite large,
move mem profile initialization into a separate function.
Depends on D110151.
Reviewed By: melver, vitalybuka
Differential Revision: https://reviews.llvm.org/D110152
Dmitry Vyukov [Tue, 21 Sep 2021 09:38:52 +0000 (11:38 +0200)]
tsan: include internal allocator info in mem profile
We allocate things from the internal allocator,
it's useful to know how much it consumes.
Depends on D110150.
Reviewed By: melver, vitalybuka
Differential Revision: https://reviews.llvm.org/D110151
Dmitry Vyukov [Tue, 21 Sep 2021 09:31:18 +0000 (11:31 +0200)]
tsan: make mem profile data more consistent
We currently query number of threads before reading /proc/self/smaps.
But reading /proc/self/smaps can take lots of time for huge processes
and it's retries several times with different buffer sizes.
Overall it can take tens of seconds. This can make number of threads
significantly inconsistent with the rest of the stats.
So query it after reading /proc/self/smaps.
Depends on D110149.
Reviewed By: melver, vitalybuka
Differential Revision: https://reviews.llvm.org/D110150
Dmitry Vyukov [Tue, 21 Sep 2021 08:49:32 +0000 (10:49 +0200)]
tsan: include MBlock/SyncObj stats into mem profile
Include info about MBlock/SyncObj memory consumption in the memory profile.
Depends on D110148.
Reviewed By: melver, vitalybuka
Differential Revision: https://reviews.llvm.org/D110149
Dmitry Vyukov [Tue, 21 Sep 2021 08:37:33 +0000 (10:37 +0200)]
tsan: account for mid app range in mem profile
We account low and high ranges, but forgot abount the mid range.
Account mid range as well.
Reviewed By: melver
Differential Revision: https://reviews.llvm.org/D110148
Sebastian Neubauer [Tue, 21 Sep 2021 14:31:00 +0000 (16:31 +0200)]
[Utils] Replace llc with cat for tests
Make the update_llc_test_checks script test independant of llc behavior
by using cat with static files to simulate llc output.
This allows changing llc without breaking the script test case.
The update script is executed in a temporary directory, so the
llc-generated assembly files are copied there. %T is deprecated, but it
allows copying a file with a predictable filename.
Differential Revision: https://reviews.llvm.org/D110143
Balázs Kéri [Wed, 22 Sep 2021 07:15:29 +0000 (09:15 +0200)]
[clang][ASTImporter] Generic attribute import handling (first step).
Import of Attr objects was incomplete in ASTImporter.
This change introduces support for a generic way of importing an attribute.
For an usage example import of the attribute AssertCapability is
added to ASTImporter.
Updating the old attribute import code and adding new attributes or extending
the generic functions (if needed) is future work.
Reviewed By: steakhal, martong
Differential Revision: https://reviews.llvm.org/D109608
Florian Hahn [Wed, 22 Sep 2021 07:19:01 +0000 (08:19 +0100)]
[InstCombine] Move InstCombineWorklist to Utils to allow reuse (NFC).
InstCombine's worklist can be re-used by other passes like
VectorCombine. Move it to llvm/Transform/Utils and rename it to
InstructionWorklist.
Reviewed By: lebedev.ri
Differential Revision: https://reviews.llvm.org/D110181
Diana Picus [Tue, 21 Sep 2021 08:57:38 +0000 (08:57 +0000)]
[flang] Change complex type define in runtime for clang-cl
When compiling the runtime with a version of clang-cl newer than 12, we
define CMPLXF as __builtin_complex, which returns a float _Complex type.
This errors out in contexts where the result of CMPLXF is expected to be
a float_Complex_t. This is defined as _Fcomplex whenever _MSC_VER is
defined (and as float _Complex otherwise).
This patch defines float_Complex_t & friends as _Fcomplex only when
we're using "true" MSVC, and not just clang-pretending-to-be-MSVC. This
should only affect clang-cl >= 12.
Differential Revision: https://reviews.llvm.org/D110139
Jonas Devlieghere [Wed, 22 Sep 2021 05:08:48 +0000 (22:08 -0700)]
[lldb] Add --stack option to `target symbols add` command
Currently you can ask the target symbols add command to locate the debug
symbols for the current frame. This patch add an options to do that for
the whole call stack.
Differential revision: https://reviews.llvm.org/D110011
Dmitry Vyukov [Tue, 21 Sep 2021 19:26:13 +0000 (21:26 +0200)]
tsan: prepare for trace mapping removal
Don't test for presence of the trace mapping,
it will be removed soon.
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D110194
Dmitry Vyukov [Tue, 21 Sep 2021 12:13:12 +0000 (14:13 +0200)]
tsan: uninline Enable/DisableIgnores
ScopedInterceptor::Enable/DisableIgnores is only used for some special cases.
Unline them from the common interceptor handling.
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D110157
Dmitry Vyukov [Tue, 21 Sep 2021 19:07:43 +0000 (21:07 +0200)]
tsan: reset destination range in Java heap move
Switch Java heap move to the new scheme required for the new tsan runtime.
Instead of copying the shadow we reset the destination range.
The new v3 trace contains addresses of accesses, so we cannot simply copy the shadow.
This can lead to false negatives, but cannot lead to false positives.
Depends on D110159.
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D110190
Michael Kruse [Wed, 22 Sep 2021 04:56:24 +0000 (23:56 -0500)]
[Polly] Add -polly-reschedule and -polly-postopts options.
This command line options allow to off parts of the schedule tree optimization pipeline.
Dmitry Vyukov [Tue, 21 Sep 2021 19:17:28 +0000 (21:17 +0200)]
tsan: enable sse4.2 in tests
Pass -msse4.2 flag to the tests the same way we do for the runtime.
Layout of some structs in the runtime headers depends on the flag
(TSAN_VECTORIZE), so we need it to be consistent across the runtime
and tests.
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D110192
Dmitry Vyukov [Tue, 21 Sep 2021 12:18:44 +0000 (14:18 +0200)]
tsan: move errno spoiling reporting into a separate function (NFC)
CallUserSignalHandler function is quite large and complex.
Move errno spoiling reporting into a separate function.
No logical changes.
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D110159
Dmitry Vyukov [Tue, 21 Sep 2021 13:22:35 +0000 (15:22 +0200)]
tsan: don't call dlsym during exit
dlsym calls into dynamic linker which calls malloc and other things.
It's problematic to do it during the actual exit, because
it can happen from a singal handler or from within the runtime
after we reported the first bug, etc.
See https://github.com/google/sanitizers/issues/1440 for an example
(captured in the added test).
Initialize the callbacks during startup instead.
Depends on D110159.
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D110166
Chen Zheng [Wed, 22 Sep 2021 05:02:12 +0000 (05:02 +0000)]
[PowerPC] add testcase for chain commoning; nfc
Aart Bik [Wed, 22 Sep 2021 04:00:26 +0000 (21:00 -0700)]
[mlir][sparse] cleanup ABI issues in C interface with memrefs
This change adds automatic wrapper functoins with emit_c_interface
to all methods in the sparse support library that deal with MEMREFs.
The wrappers will take care of passing MEMREFs by value internally
and by pointer externally, thereby avoiding ABI issues across platforms.
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D110219
Shao-Ce SUN [Wed, 22 Sep 2021 03:27:41 +0000 (11:27 +0800)]
[RISCV][NFC] Fix clang test for vloxei/vluxei
Louis Dionne [Tue, 21 Sep 2021 22:57:21 +0000 (18:57 -0400)]
[libc++] Add some missing _LIBCPP_HIDE_FROM_ABI markup
Also, as a fly-by fix, use `inline` directly to define inline variables
(all compilers support it).
Differential Revision: https://reviews.llvm.org/D110208
David Blaikie [Mon, 20 Sep 2021 03:34:45 +0000 (20:34 -0700)]
DebugInfo: Don't use preferred template names in debug info
Using the preferred name creates a mismatch between the textual name of
a type and the DWARF tags describing the parameters as well as possible
inconsistency between DWARF producers (like Clang and GCC, or
older/newer Clang versions, etc).
Shao-Ce SUN [Fri, 17 Sep 2021 02:11:08 +0000 (10:11 +0800)]
[RISCV] add Half-precision test for clang
and deleted useless lines.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D109799
Matt Arsenault [Thu, 16 Sep 2021 21:49:50 +0000 (17:49 -0400)]
AMDGPU: Refactor getWavesPerEU to separate flat workgroup size query
Add an overload to pass the flat workgroup range in separately. This
will allow the attributor to use the assumed value for
amdgpu-flat-workgroup-sizes when inferring amdgpu-waves-per-eu.
Chen Zheng [Wed, 22 Sep 2021 01:54:12 +0000 (01:54 +0000)]
[PowerPC] prepare for udpate form with non-const increment.
This is a follow-up of D105872. Now we are able to prepare for update
form with non-const increment.
Reviewed By: jsji
Differential Revision: https://reviews.llvm.org/D106032
Joe Loser [Wed, 22 Sep 2021 02:45:32 +0000 (22:45 -0400)]
[libc++][test] Fix iterator assertion in span.cons/deduct.pass.cpp
Two tests in span.cons/deduct.pass.cpp accidentally check whether the
iterator range from member begin and member end are equivalent to the
ones from free begin and free end. This is obviously true and not
intended. Correct the intent by comparing the size/data from the span
with the source input.
While in the neighborhood, add test for const int arr[N], remove extraneous
type aliases, unused <type_traits> header, and the
disable_missing_braces_warning.h include.
Reviewed By: Quuxplusone, ldionne, #libc
Differential Revision: https://reviews.llvm.org/D109668
Matt Arsenault [Mon, 13 Sep 2021 16:49:45 +0000 (12:49 -0400)]
AMDGPU: Fix test relying on incompatible attributes
This combination of amdgpu-waves-per-eu and
amdgpu-flat-work-group-size cannot be satisfied at the same time, so
this was using the default.
David Blaikie [Wed, 22 Sep 2021 02:25:33 +0000 (19:25 -0700)]
DebugInfo: Don't suppress inline namespaces when printing template template parameter names
David Blaikie [Wed, 22 Sep 2021 02:29:07 +0000 (19:29 -0700)]
DebugInfo: Unify some printing policy adjustments
Shao-Ce SUN [Wed, 22 Sep 2021 02:27:11 +0000 (10:27 +0800)]
[NFC] Fix typo.
Shao-Ce SUN [Wed, 22 Sep 2021 02:25:57 +0000 (10:25 +0800)]
[RISCV][NFC] Deleted useless lines in clang tests.
Teresa Johnson [Wed, 22 Sep 2021 01:32:26 +0000 (18:32 -0700)]
[Sanitizer] Modify test to avoid bot timeouts
Change the mutex type to one that initializes on construction and
hopefully avoid what appear to be deadlock failures in the new test
on a couple bots, e.g.:
https://green.lab.llvm.org/green/job/clang-stage1-RA/24140/testReport/SanitizerCommon-Unit/__Sanitizer-x86_64-Test/SanitizerCommon_ReportFile/
Chris Lattner [Wed, 22 Sep 2021 01:06:02 +0000 (18:06 -0700)]
[DialectAsmPrinter] Add missing 'printAttributeWithoutType' member.
DialectAsmParser has a `parseAttribute` member that takes a
contextual type, but DialectAsmPrinter doesn't have the corresponding
member to take advantage of it. As such, custom attribute
implementations can't really use it. This adds the obvious missing
method which fills this hole.
Differential Revision: https://reviews.llvm.org/D110211
David Tenty [Tue, 7 Sep 2021 19:57:38 +0000 (15:57 -0400)]
[libcxx][AIX] Remove locale fallbacks for old OS levels
These routines were add years ago during initial porting attempts to AIX and are mostly build hacks for routines which we're missing at the time, but are available now on recent AIX OS levels.
Thus builds on modern AIX OS levels no longer need these and they cause problems if you try to build the library with a generic triple (i.e. powerpc-ibm-aix) as we'll pull them in and encounter duplicate definitions from the OS.
Reviewed By: #libc, ldionne
Differential Revision: https://reviews.llvm.org/D110183
Wenlei He [Tue, 21 Sep 2021 00:35:36 +0000 (17:35 -0700)]
[SamplePGO] Add switch to honor zero count on block level as accurate
Add a new LLVM switch `-profile-sample-block-accurate` to trust zero block counts for branches. Currently we leave out such zero counts when annotating branch weight metadata, which would lead to weights being considered as unknown.
Differential Revision: https://reviews.llvm.org/D110117
Louis Dionne [Mon, 20 Sep 2021 19:53:17 +0000 (15:53 -0400)]
[libc++abi] Remove unnecessary atomic_support.h header from libc++abi
The file was a duplicate of atomic_support.h in libc++. Since we now
require the libc++ sources in order to build libc++abi, it's OK to
remove this duplication.
Thanks to @chandlerc for noticing this.
Differential Revision: https://reviews.llvm.org/D110103
Teresa Johnson [Tue, 14 Sep 2021 23:34:52 +0000 (16:34 -0700)]
[Sanitizer] Allow setting the report path to create directory
When setting the report path, recursively create the directory as
needed. This brings the profile path support for memprof on par with
normal PGO. The code was largely cloned from __llvm_profile_recursive_mkdir
in compiler-rt/lib/profile/InstrProfilingUtil.c.
Differential Revision: https://reviews.llvm.org/D109794
Toshihito Kikuchi [Tue, 21 Sep 2021 22:49:03 +0000 (15:49 -0700)]
[compiler-rt] [windows] Add more assembly patterns for interception
To intercept the functions in Win11's ntdll.dll, we need to use the trampoline
technique because there are bytes other than 0x90 or 0xcc in the gaps between
exported functions. This patch adds more patterns that appear in ntdll's
functions.
Bug: https://bugs.llvm.org/show_bug.cgi?id=51721
Reviewed By: rnk
Differential Revision: https://reviews.llvm.org/D109941
Usman Nadeem [Sun, 12 Sep 2021 22:22:47 +0000 (15:22 -0700)]
[AArch64][SVE] Add patterns to generate ADR instruction
Differential Revision: https://reviews.llvm.org/D109665
Change-Id: I9d2928688b80b804a16f52928e2057749ec2c0b2
Yuanfang Chen [Tue, 21 Sep 2021 22:05:12 +0000 (15:05 -0700)]
[libc++] Surpress -Wunused-value warning in variant
The idiom helps with parameter unpacking so the return value is not
important. Make it explicit.
Arthur Eubanks [Tue, 21 Sep 2021 22:15:49 +0000 (15:15 -0700)]
Make DiagnosticInfoResourceLimit's limit param required
And always print it.
This makes some LLVM diagnostics match up better with Clang's diagnostics.
Updated some AMDGPU uses of DiagnosticInfoResourceLimit and now we print
better diagnostics for those.
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D110204
Kirill Stoimenov [Fri, 17 Sep 2021 22:55:35 +0000 (22:55 +0000)]
[asan] Fixed a bug causing a crash when redzone optimization kicked in on X86 with -asan-optimize-callbacks flag on.
This change adds the ASan intrinsic to the list whihc are setting hasCopyImplyingStackAdjustment.
Reviewed By: eugenis
Differential Revision: https://reviews.llvm.org/D110012
Alex Zinenko [Tue, 21 Sep 2021 09:39:43 +0000 (11:39 +0200)]
[mlir] Always create a list of alias scopes when emitting LLVM IR
Previously, the translation to LLVM IR would emit IR that directly uses
a scope metadata node in case only one scope was in use in alias.scopes
or noalias metadata. It should always be a list of scopes. The verifier
change in
8700f2bd36bb9b7d7075ed4dac0aef92b9489237 enforced this and
broke the test. Fix the translation to always create a list of scopes
using a new metadata node, update and reenable the respective test.
Fixes PR51919.
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D110140
Craig Topper [Tue, 21 Sep 2021 21:35:11 +0000 (14:35 -0700)]
Recommit "[X86] Clear kill flags when rewriting SETCC uses in flag copy lowering."
This time with the right bug number.
When we rewrite the setcc we replace set old setcc output register
with the new CondReg. But since CondReg can be shared by other
replacements, we don't know if the kill flags for the old register
are valid for CondReg. So be conservative and remove them.
The test case has a SETCCr and a SETCCm on the same condition so
they end up sharing the same CondReg. The SETCCr had one use with
a kill flag. This kill flag isn't valid after the replacement because
CondReg needs a live range extending to the later SETCCm replacment.
Fixes PR51903.
Xu Mingjie [Tue, 21 Sep 2021 19:56:50 +0000 (12:56 -0700)]
[LTO] Emit DebugLoc for dead function in optimization remarks
Currently, the dead functions information getting from optimizations remarks does not contain debug location, but knowing where these dead functions locate could be useful for debugging or for detecting dead code.
Cause in `LTO::addRegularLTO()` we use `BitcodeModule::getLazyModule()` to read the bitcode module, when we pass Function F to `ore::NV()`, F is not materialized, so `F->getSubprogram()` returns nullptr, and there is no debug location information of dead functions in optimizations remarks.
This patch call `F->materialize()` before we pass Function F to `ore::NV()`, then debug location information will be emitted for dead functions in optimization remarks.
Reviewed By: tejohnson
Differential Revision: https://reviews.llvm.org/D109737
Joseph Huber [Tue, 21 Sep 2021 19:32:41 +0000 (15:32 -0400)]
[OpenMP] Add thread ID function into new RTL
The new device runtime library currently lacks the
`kmpc_get_hardware_thread_id_in_block` function which is currently used
when doing the SPMDzation optimization. This call would be introduced
through the optimization and then cause a linking error because it was
not present. This patch adds support for this runtime call.
Reviewed By: tianshilei1992
Differential Revision: https://reviews.llvm.org/D110195
Arthur Eubanks [Tue, 21 Sep 2021 21:09:17 +0000 (14:09 -0700)]
[clang] Make -Rpass imply -Rpass=.*
Previously with -Rpass (and friends) we'd have remarks "enabled", but
without an actual regex.
As seen in the test change to line numbers, this can give us better
diagnostics by properly enabling NeedLocTracking with -Rpass.
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D110201
Craig Topper [Tue, 21 Sep 2021 21:33:44 +0000 (14:33 -0700)]
Revert "[X86] Clear kill flags when rewriting SETCC uses in flag copy lowering."
This reverts commit
7550f146ff75667d6e1828d64438dcc23b77f036.
I botched the bug number.
Craig Topper [Tue, 21 Sep 2021 20:54:55 +0000 (13:54 -0700)]
[X86] Clear kill flags when rewriting SETCC uses in flag copy lowering.
When we rewrite the setcc we replace set old setcc output register
with the new CondReg. But since CondReg can be shared by other
replacements, we don't know if the kill flags for the old register
are valid for CondReg. So be conservative and remove them.
The test case has a SETCCr and a SETCCm on the same condition so
they end up sharing the same CondReg. The SETCCr had one use with
a kill flag. This kill flag isn't valid after the replacement because
CondReg needs a live range extending to the later SETCCm replacment.
Fixes PR51908.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D110046
Albion Fung [Tue, 21 Sep 2021 20:46:30 +0000 (15:46 -0500)]
[PowerPC] Support for vector bool int128 on vector comparison builtins
This patch implements support for the type vector bool int128
for arguments on vector comparison builtins listed below,
which would otherwise crash due to ambiguity.
The following builtins are added:
vec_all_eq (vector bool __int128, vector bool __int128)
vec_all_ne (vector bool __int128, vector bool __int128)
vec_any_eq (vector bool __int128, vector bool __int128)
vec_any_ne (vector bool __int128, vector bool __int128)
vec_cmpne(vector bool __int128 a, vector bool __int128 b)
vec_cmpeq(vector bool __int128 a, vector bool __int128 b)
Differential revision: https://reviews.llvm.org/D110084
Sanjay Patel [Tue, 21 Sep 2021 20:52:32 +0000 (16:52 -0400)]
[CodeGen] regenerate test checks; NFC
This broke with
2f6b07316f56 because it wrongly runs the entire LLVM optimizer.
George Burgess IV [Tue, 21 Sep 2021 20:09:08 +0000 (13:09 -0700)]
MemoryBuiltins: update comment; NFC
This comment references behavior that was removed in
ccae43a247b0791f78ea89b9cb7e59fa70f5000d, which is a commit from 5 years
ago. It seems safe to assume that that behavior won't be coming back
soon. If it does, we can readd this part of the comment :)
Giorgis Georgakoudis [Tue, 21 Sep 2021 20:20:39 +0000 (13:20 -0700)]
Revert "[OpenMP] Codegen aggregate for outlined function captures"
This reverts commit
1d66649adf28d48ae1731516d87fb899426e3349.
Revert to fix AMG GPU issue.
Arthur O'Dwyer [Fri, 17 Sep 2021 03:14:57 +0000 (23:14 -0400)]
[libc++] counting_semaphore should not be default-constructible.
Neither the current C++2b draft, nor any revision of [p1135],
nor libstdc++, claims that `counting_semaphore` should be
default-constructible. I think this was just a copy-paste issue
somehow.
Also, `explicit` was missing from the constructor.
Also, `constexpr` remains missing; but that's probably more of a
technical limitation, since apparently there are some platforms
where we don't (can't??) use the atomic implementation and
have to rely on pthreads, which obviously isn't constexpr.
Differential Revision: https://reviews.llvm.org/D110042
Sanjay Patel [Tue, 21 Sep 2021 19:33:51 +0000 (15:33 -0400)]
[InstCombine] fold cast of right-shift if high bits are not demanded
(masked) trunc (lshr X, C) --> (masked) lshr (trunc X), C
Narrowing the shift should be better for analysis and can lead
to follow-on transforms as shown.
Attempt at a general proof in Alive2:
https://alive2.llvm.org/ce/z/tRnnSF
Here are a couple of the specific tests:
https://alive2.llvm.org/ce/z/bCnTp-
https://alive2.llvm.org/ce/z/TfaHnb
Differential Revision: https://reviews.llvm.org/D110170
Antonio Frighetto [Tue, 21 Sep 2021 19:54:40 +0000 (21:54 +0200)]
[IR] Look through bitcast in hasFnAttribute()
A logic incompleteness may lead MemorySSA to be too conservative
in its results. Specifically, when dealing with a call of kind
`call i32 bitcast (i1 (i1)* @test to i32 (i32)*)(i32 %1)`, where
the function `test` is declared with readonly attribute, the
bitcast is not looked through, obscuring function attributes. Hence,
some methods of CallBase (e.g., doesNotReadMemory) could provide
suboptimal results.
Differential Revision: https://reviews.llvm.org/D109888
Usman Nadeem [Tue, 21 Sep 2021 19:45:15 +0000 (12:45 -0700)]
[OpenMP][OMPD] Fix compile error when OMPD is not supported
Differential Revision: https://reviews.llvm.org/D110120
Change-Id: I9d39dacfab5b7fbab37ee4b4d960d51e0892b24d
Nikita Popov [Tue, 21 Sep 2021 19:42:58 +0000 (21:42 +0200)]
[MergeICmps] Remove unused NumMerged variable
Matheus Izvekov [Tue, 14 Sep 2021 23:46:30 +0000 (01:46 +0200)]
[clang] don't mark as Elidable CXXConstruct expressions used in NRVO
See PR51862.
The consumers of the Elidable flag in CXXConstructExpr assume that
an elidable construction just goes through a single copy/move construction,
so that the source object is immediately passed as an argument and is the same
type as the parameter itself.
With the implementation of P2266 and after some adjustments to the
implementation of P1825, we started (correctly, as per standard)
allowing more cases where the copy initialization goes through
user defined conversions.
With this patch we stop using this flag in NRVO contexts, to preserve code
that relies on that assumption.
This causes no known functional changes, we just stop firing some asserts
in a cople of included test cases.
Reviewed By: rsmith
Differential Revision: https://reviews.llvm.org/D109800
Dan F-M [Tue, 21 Sep 2021 19:19:07 +0000 (12:19 -0700)]
[Bazel] Add support for targeting macOS arm64
In attempting to build JAX on Apple Silicon, we discovered an issue with
the bazel configuration in llvm-project-overlay. This patch fixes the
logic, at least when building JAX. More context is included on the
following GitHub issue: https://github.com/google/jax/issues/5501
Differential Revision: https://reviews.llvm.org/D109839
Nikita Popov [Sat, 18 Sep 2021 15:10:29 +0000 (17:10 +0200)]
[MergeICmps] Don't reorder unmerged comparisons
MergeICmps will currently sort (by offset) all comparisons in a chain,
including those that do not get merged. This is problematic in two ways:
* We may end up moving the original first block into the middle of
the chain, in which case the "extra work" instructions will also
be in the middle of the chain, resulting in invalid IR
(reported in https://reviews.llvm.org/D108782#3005583).
* Reordering branches is generally not legal, because it may
introduce branch on poison, which is UB (PR51845). The merging
done by MergeICmps is legal as long as we assume that memcmp()
works on frozen memory, but the reordering of unmerged comparisons
is definitely incorrect (without inserting freeze instructions),
so we should avoid it.
There are easier ways to fix the first issue, but I figured it was
worthwhile to do this properly to also fix the second one. What we
now do is to restore the original relative order of (potentially
merged) comparisons.
I took the liberty of dropping the MERGEICMPS_DOT_ON functionality,
because it would be more awkward to implement now (as the before and
after representation is different) and it doesn't seem terribly
useful nowadays.
Differential Revision: https://reviews.llvm.org/D110024
David Blaikie [Tue, 21 Sep 2021 18:38:33 +0000 (11:38 -0700)]
nullptr printing - update for a change to clang type printing that now uses "std::nullptr_t"
Christian Sigg [Tue, 21 Sep 2021 11:37:06 +0000 (13:37 +0200)]
Support value-typed references in iterator facade's operator->()
Add a PointerProxy similar to the existing iterator_facade_base::ReferenceProxy and return it from the arrow operator. This prevents iterator facades with a reference type that is not a true reference to take the address of a temporary.
Forward the reference type of the mapped_iterator to the iterator adaptor which in turn forwards it to the iterator facade. This fixes mlir::op_iterator::operator->() to take the address of a temporary.
Make some polishing changes to op_iterator and op_filter_iterator.
Reviewed By: rriddle
Differential Revision: https://reviews.llvm.org/D109490
David Blaikie [Tue, 21 Sep 2021 18:32:17 +0000 (11:32 -0700)]
DebugInfo: Rebuild decltype(nullptr) as 'std::nullptr_t'
Now that Clang's been changed to render nullptr types/template
parameters as 'std::nullptr_t' do the same thing down here.
(Clang commit:
131e8786640a49daf533b7ead4d3b5b82e0aea2a )
Michael Liao [Tue, 21 Sep 2021 18:09:06 +0000 (14:09 -0400)]
[IR] Re-group AAMDNodes relevant interfaces. NFC.