Eric Huang [Tue, 8 Feb 2022 20:22:05 +0000 (15:22 -0500)]
drm/amdkfd: add asic support for GC 11.0.2
Changes are inherited from GC 11.0.0.
Signed-off-by: Eric Huang <jinhuieric.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Flora Cui [Fri, 15 Apr 2022 14:15:09 +0000 (10:15 -0400)]
drm/amdgpu: add initial GC 11.0.2 support
Add initial support for GC 11.0.2 to gfx_v11_0.c.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Flora Cui <flora.cui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Flora Cui [Sat, 2 Apr 2022 07:31:37 +0000 (15:31 +0800)]
drm/amdgpu: add gc v11_0_2 imu firmware
add gc v11_0_2 imu firmware
Signed-off-by: Flora Cui <flora.cui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Flora Cui [Fri, 15 Apr 2022 14:26:28 +0000 (10:26 -0400)]
drm/amdgpu/discovery: add mes11 support for GC 11.0.2
Enable Micro Engine Scheduler support.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Flora Cui <flora.cui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Flora Cui [Fri, 15 Apr 2022 14:13:43 +0000 (10:13 -0400)]
drm/amdgpu: add mes 11 firmware for mes 11.0.2
Define firmware for MES 11.0.2.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Flora Cui <flora.cui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Flora Cui [Fri, 15 Apr 2022 14:25:29 +0000 (10:25 -0400)]
drm/amdgpu/discovery: add sdma6 support for SDMA 6.0.2
Enable sdma6 support.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Flora Cui <flora.cui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Tue, 8 Feb 2022 20:35:31 +0000 (15:35 -0500)]
drm/amdkfd: add asic support for SDMA 6.0.2
It is inherited from SDMA 6.0.0.
Signed-off-by: Eric Huang <jinhuieric.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Flora Cui [Fri, 15 Apr 2022 14:12:16 +0000 (10:12 -0400)]
drm/amdgpu: add sdma 6.0.2 firware support
define sdma 6.0.2 firmware.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Flora Cui <flora.cui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
James Zhu [Fri, 11 Feb 2022 13:17:25 +0000 (08:17 -0500)]
drm/amdgpu/discovery: enable vcn/jpeg v4_0_4
Enable vcn/jpeg 4_0_4.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Sonny Jiang [Tue, 22 Feb 2022 21:24:10 +0000 (16:24 -0500)]
drm/amdgpu: Enable vcn v4_0_4 sram
enable vcn v4_0_4 sram
Signed-off-by: Sonny Jiang <sonjiang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
James Zhu [Thu, 6 Jan 2022 01:39:49 +0000 (20:39 -0500)]
drm/amdgpu/vcn: enable VCN DPG mode for VCN4_0_4
Enable VCN DPG mode for VCN4_0_4.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
James Zhu [Thu, 6 Jan 2022 01:39:06 +0000 (20:39 -0500)]
drm/amdgpu/vcn: enable VCN PG for VCN4_0_4
Enable VCN PG for VCN4_0_4.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
James Zhu [Thu, 6 Jan 2022 01:38:04 +0000 (20:38 -0500)]
drm/amdgpu/vcn: enable VCN CG for VCN4_0_4
Enable VCN CG for VCN4_0_4.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
James Zhu [Fri, 15 Apr 2022 15:50:10 +0000 (11:50 -0400)]
drm/amdgpu/jpeg: enable JPEG PG for VCN4_0_4
Enable JPEG PG for VCN4_0_4.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
James Zhu [Thu, 6 Jan 2022 01:36:08 +0000 (20:36 -0500)]
drm/amdgpu/jpeg: enable JPEG CG for VCN4_0_4
Enable JPEG CG for VCN4_0_4.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
James Zhu [Thu, 6 Jan 2022 01:27:49 +0000 (20:27 -0500)]
drm/amdgpu: add VCN4_0_4 firmware
Add VCN4_0_4 firmware.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chengming Gui [Fri, 15 Apr 2022 14:34:51 +0000 (10:34 -0400)]
drm/amdgpu/discovery: add psp13 support for PSP 13.0.7
Enable psp 13 support.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chengming Gui [Fri, 15 Apr 2022 14:37:37 +0000 (10:37 -0400)]
drm/amdgpu/psp13: add support for MP0 13.0.7
Enable support in psp code.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Flora Cui [Fri, 15 Apr 2022 14:20:54 +0000 (10:20 -0400)]
drm/amdgpu/discovery: add gmc11 support for GC 11.0.2
Enable gmc11 support.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Flora Cui <flora.cui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Flora Cui [Fri, 15 Apr 2022 14:18:35 +0000 (10:18 -0400)]
drm/amdgpu: add GMC11 support for GC 11.0.2
Add initial support for GC 11.0.2.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Flora Cui <flora.cui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Flora Cui [Fri, 15 Apr 2022 14:17:23 +0000 (10:17 -0400)]
drm/amdgpu: add UMC 8.11.0 support
Add initial support for UMC 8.11.0.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Flora Cui <flora.cui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Sun, 6 Feb 2022 16:55:03 +0000 (00:55 +0800)]
drm/amdgpu: split mmhub v3_0_2 callbacks from mmhub v3_0
So we don't need to add ip version check in every callback
when there is atc related programming that is only
available in mmhub v3_0
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Wed, 6 Apr 2022 10:28:53 +0000 (18:28 +0800)]
drm/amdgpu: add mmhub v3_0_2 ip callback functions
Unlike mmhub v3_0_0, there is no atc_l2 related
registers available in mmhub v3_0_2. Split the mmhub
v3_0_2 callback implementations from mmhub v3_0 so we
don't need to add ip version check when atc related
programming needs to be added to mmhub v3_0_0.
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Sun, 6 Feb 2022 16:34:00 +0000 (00:34 +0800)]
drm/amdgpu: add mmhub v3_0_2 ip headers
Add mmhub v3_0_2 register offset and shift masks
v2: update to latest headers
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chengming Gui [Thu, 10 Feb 2022 01:04:56 +0000 (09:04 +0800)]
drm/amdgpu/discovery: add SMUIO_13_0_8 func support
Add SMUIO funcs for SMUIO_13_0_8.
Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Flora Cui [Fri, 15 Apr 2022 14:29:42 +0000 (10:29 -0400)]
drm/amdgpu/discovery: add hdp6 support for HDP 6.0.1
Enable Host Data Path support.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Flora Cui <flora.cui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Flora Cui [Fri, 15 Apr 2022 14:28:37 +0000 (10:28 -0400)]
drm/amdgpu/discovery: add nbio 4.3 support for NBIO 4.3.1
Enable nbio 4.3 support.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Flora Cui <flora.cui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Flora Cui [Fri, 15 Apr 2022 14:23:20 +0000 (10:23 -0400)]
drm/amdgpu/discovery: add smu13 support for MP1 13.0.7
Enable System Management Unit support.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Flora Cui <flora.cui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Flora Cui [Fri, 15 Apr 2022 14:21:52 +0000 (10:21 -0400)]
drm/amdgpu/discovery: add ih6 support for IH 6.0.2
Enable Interrupt Handler v6 support.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Flora Cui <flora.cui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Flora Cui [Fri, 15 Apr 2022 14:10:42 +0000 (10:10 -0400)]
drm/amdgpu: add support for ATHUB 3.0.2
Add support 3.0.2 to the ATHUB 3.0 code.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Flora Cui <flora.cui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Flora Cui [Fri, 15 Apr 2022 14:19:56 +0000 (10:19 -0400)]
drm/amdgpu/discovery: add soc21 support for GC 11.0.2
Enable soc21 common soc support.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Flora Cui <flora.cui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Flora Cui [Fri, 15 Apr 2022 14:09:00 +0000 (10:09 -0400)]
drm/amdgpu: add soc21 support for GC 11.0.2
Add initial soc21 support.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Flora Cui <flora.cui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Fri, 15 Apr 2022 09:06:45 +0000 (17:06 +0800)]
drm/amdgpu: enable clock gating for HDP 6.0
Enable HDP 6.0 clock gating.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Fri, 15 Apr 2022 07:55:04 +0000 (15:55 +0800)]
drm/amdgpu: enable clock gating for IH 6.0
Enable IH 6.0 clock gating.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Fri, 15 Apr 2022 07:44:27 +0000 (15:44 +0800)]
drm/amdgpu: enable MGCG and LS for MMHUB 3.0
Enable MMHUB 3.0 MGCG and LS features.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Fri, 15 Apr 2022 06:38:02 +0000 (14:38 +0800)]
drm/amdgpu: enable MGCG and LS for ATHUB 3.0
Enable ATHUB 3.0 MGCG and LS features.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Tue, 19 Apr 2022 02:21:59 +0000 (10:21 +0800)]
drm/amd/pm: enable more dpm features to pair with PMFW 78.31.0
Enables the support for DCN DPM and DCFCLK DS features.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Wed, 13 Apr 2022 07:54:50 +0000 (15:54 +0800)]
drm/amd/pm: enable gfx ulv feature control for SMU 13.0.0
Fulfill the interface for gfx ulv control.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Wed, 13 Apr 2022 07:32:44 +0000 (15:32 +0800)]
drm/amd/pm: enable deep sleep features control for SMU 13.0.0
Fulfill the interface for deep sleep features control.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Tue, 12 Apr 2022 03:20:08 +0000 (11:20 +0800)]
drm/amd/pm: support more DPM features for SMU 13.0.0
To pair with 78.30.0 PMFW, support more dpm features:
- UCLK DPM (disabled temporarily)
- VMEMP Scaling (disabled temporarily)
- VDDIO Scaling (disabled temporarily)
- GFXCLK DS
- SOCCLK DS
- MPCLK Deep Sleep on VDD_SOC
- MPCLK Deep Sleep on VDD_BACO
- Memory Temperature Reading (disabled temporarily)
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Mon, 11 Apr 2022 06:39:59 +0000 (14:39 +0800)]
drm/amdgpu: enable more GFX clockgating features for GC 11.0.0
Support more GFX clockgating features(3D_CGCG, 3D_CGLS, MGCG,
FGCG and PERF_CLK).
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Thu, 7 Apr 2022 12:41:23 +0000 (20:41 +0800)]
drm/amd/pm: enable df cstate feature for SMU 13.0.0
As the feature is ready with 78.29.0 PMFW.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Wed, 6 Apr 2022 09:40:09 +0000 (17:40 +0800)]
drm/amd/pm: enable PMLOG support for SMU 13.0.0
Fulfill the interface for setting PMLOG DramAddr
on SMU 13.0.0.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Fri, 1 Apr 2022 07:52:12 +0000 (15:52 +0800)]
drm/amd/pm: enable ppfeature mask setting for SMU 13.0.0
Fulfill the interfaces for retrieving and setting ppfeature
masks on SMU 13.0.0.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Fri, 1 Apr 2022 03:40:00 +0000 (11:40 +0800)]
drm/amd/pm: enable RunDcBtc support for SMU 13.0.0
Fulfill the RunDcBtc for SMU 13.0.0.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Fri, 1 Apr 2022 02:49:33 +0000 (10:49 +0800)]
drm/amd/pm: enable power profile setting for SMU 13.0.0
Fulfill the interfaces for retrieving and setting power profile
mode on SMU 13.0.0.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Fri, 1 Apr 2022 02:02:28 +0000 (10:02 +0800)]
drm/amd/pm: enable ac/dc switching for SMU 13.0.0
Fulfill the ->set_power_source interface which notifies
PMFW the current system power source(AC/DC).
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Thu, 31 Mar 2022 09:50:13 +0000 (17:50 +0800)]
drm/amd/pm: enable power limit retrieving and setting for SMU 13.0.0
Fulfill the interfaces for retrieving and setting power limit on
SMU 13.0.0.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Minghao Chi [Thu, 5 May 2022 02:22:39 +0000 (02:22 +0000)]
drm/amdgpu: simplify the return expression of vega10_ih_hw_init()
Simplify the return expression.
Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Minghao Chi [Thu, 5 May 2022 02:10:57 +0000 (02:10 +0000)]
drm/amdgpu: simplify the return expression
Simplify the return expression.
Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Mike Lothian [Wed, 4 May 2022 22:24:14 +0000 (23:24 +0100)]
drm/amdgpu/gfx11: Avoid uninitialised variable 'index'
This stops clang complaining:
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c:376:6: warning: variable 'index' is used uninitialized whenever 'if' condition is true [-Wsometimes-uninitialized]
if (ring->is_mes_queue) {
^~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c:433:30: note: uninitialized use occurs here
amdgpu_device_wb_free(adev, index);
^~~~~
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c:376:2: note: remove the 'if' if its condition is always false
if (ring->is_mes_queue) {
^~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c:364:16: note: initialize the variable 'index' to silence this warning
unsigned index;
^
= 0
Signed-off-by: Mike Lothian <mike@fireburn.co.uk>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Mike Lothian [Wed, 4 May 2022 22:24:13 +0000 (23:24 +0100)]
drm/amdgpu/gfx10: Avoid uninitialised variable 'index'
This stops clang complaining:
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c:3846:6: warning: variable 'index' is used uninitialized whenever 'if' condition is true [-Wsometimes-uninitialized]
if (ring->is_mes_queue) {
^~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c:3903:30: note: uninitialized use occurs here
amdgpu_device_wb_free(adev, index);
^~~~~
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c:3846:2: note: remove the 'if' if its condition is always false
if (ring->is_mes_queue) {
^~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c:3839:16: note: initialize the variable 'index' to silence this warning
unsigned index;
^
= 0
Signed-off-by: Mike Lothian <mike@fireburn.co.uk>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Mike Lothian [Wed, 4 May 2022 16:50:09 +0000 (17:50 +0100)]
drm/amdgpu/gfx11: Add missing break
This stops clang complaining:
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c:5895:2: warning: unannotated fall-through between switch labels [-Wimplicit-fallthrough]
default:
^
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c:5895:2: note: insert 'break;' to avoid fall-through
default:
^
break;
Signed-off-by: Mike Lothian <mike@fireburn.co.uk>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 4 May 2022 13:27:10 +0000 (09:27 -0400)]
Revert "fbdev: fbmem: add a helper to determine if an aperture is used by a fw fb"
This reverts commit
9a45ac2320d0a6ae01880a30d4b86025fce4061b.
This was added a helper for amdgpu to workaround a runtime pm regression
caused by a runtime pm fix in efifb. We now have a better workaround
in amdgpu in
commit
f95af4a9236695 ("drm/amdgpu: don't runtime suspend if there are displays attached (v3)")
so this workaround is no longer necessary. Since amdgpu was the only
user of this interface, we can remove it.
Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 4 May 2022 13:23:28 +0000 (09:23 -0400)]
Revert "drm/amdgpu: disable runpm if we are the primary adapter"
This reverts commit
b95dc06af3e683d6b7ddbbae178b2b2a21ee8b2b.
This workaround is no longer necessary. We have a better workaround
in commit
f95af4a9236695 ("drm/amdgpu: don't runtime suspend if there are displays attached (v3)").
Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 5 May 2022 03:17:38 +0000 (23:17 -0400)]
drm/amdgpu/gfx11: remove some register fields that no longer exist
Some copy paste leftovers for older asics. They were protected
by __BIG_ENDIAN, so we didn't notice them initially.
Reported-by: kernel test robot <lkp@intel.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
James Zhu [Mon, 4 Apr 2022 21:35:39 +0000 (17:35 -0400)]
drm/amdgpu/discovery: add VCN 4.0 Support
Enable VCN 4.0 on asics where it is present.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
James Zhu [Sun, 13 Feb 2022 16:14:39 +0000 (11:14 -0500)]
drm/amdgpu: add vcn_4_0_0 video codec query
Add vcn_4_0_0 video codec query.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
James Zhu [Thu, 7 Apr 2022 05:37:07 +0000 (01:37 -0400)]
drm/amdgpu/vcn: enable vcn4 dpg mode
Enable vcn4 dpg mode.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
James Zhu [Thu, 14 Apr 2022 14:19:13 +0000 (10:19 -0400)]
drm/amdgpu/jpeg: enable JPEG PG and CG for VCN4_0_0
Enable JPEG PG and CG for VCN4_0_0.
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Sonny Jiang <sonny.jiang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Thu, 14 Apr 2022 14:16:42 +0000 (10:16 -0400)]
drm/amdgpu: enable VCN4 PG and CG for VCN4_0_0
Most of the tiles can be power/clock gated.
Reviewed-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
James Zhu [Sat, 9 Oct 2021 20:58:10 +0000 (16:58 -0400)]
drm/amdgpu/jpeg: add jpeg support for VCN4_0_0
Add jpeg support for VCN4_0_0.
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Sonny Jiang <sonny.jiang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Wed, 13 Apr 2022 15:45:03 +0000 (11:45 -0400)]
drm/amdgpu: add VCN4 ip block support
Add VCN 4.0 initialization and decoder/encoder ring functions.
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
James Zhu [Thu, 20 Jan 2022 04:10:56 +0000 (23:10 -0500)]
drm/amdgpu: add irq sources for vcn v4_0
Add the interrupt source packet definitions for VCN4.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
James Zhu [Sat, 4 Dec 2021 17:20:37 +0000 (12:20 -0500)]
drm/amdgpu: move out asic specific definition from common header
Move out asic specific definition from common header.
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Sun, 26 Sep 2021 00:20:52 +0000 (20:20 -0400)]
drm/amdgpu: make software ring functions reuseable for newer VCN
Software ring will be supported only from VCN4
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Thu, 30 Dec 2021 11:34:16 +0000 (19:34 +0800)]
drm/amdgpu: add vcn 4_0_0 header files v7
Add VCN 4.0.0 registers
Signed-off-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Stanley Yang [Fri, 12 Mar 2021 10:02:33 +0000 (18:02 +0800)]
drm/amdgpu/discovery: add SDMA v6_0 ip block
Add SDMA v6 ip block for asics which support it.
Signed-off-by: Stanley Yang <Stanley.Yang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Stanley Yang [Wed, 13 Apr 2022 18:26:40 +0000 (14:26 -0400)]
drm/amdgpu: add initial support for sdma v6.0
Add functions for SDMA version 6.
Signed-off-by: Stanley Yang <Stanley.Yang@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Sun, 20 Feb 2022 10:22:28 +0000 (18:22 +0800)]
drm/amdgpu: add sdma v6_0_0 pkt header v3
v1: add sdma v6_0_0 pkt definitions (Hawking)
v2: add gcr control field definition (Likun)
v3: correct some definitions (Likun)
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Aric Cyr [Mon, 25 Apr 2022 03:19:52 +0000 (23:19 -0400)]
drm/amd/display: 3.2.184
This version brings along following fixes:
- Have optc3 function accessible to newer DCN
- Add CM boot option for USB4 tunneling
- Fix system hang issue when game resolution is changed
- Remove outdated register for dcn3+
- Add new DSC interface to disconnect from pipe
- Clean up pixel format types in enum surface_pixel_format
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Anthony Koo [Sat, 23 Apr 2022 16:01:47 +0000 (12:01 -0400)]
drm/amd/display: [FW Promotion] Release 0.0.115.0
- Add new cmd for querying HPD state
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Aric Cyr [Sat, 23 Apr 2022 19:21:01 +0000 (15:21 -0400)]
drm/amd/display: Clean up pixel format types
[Why & How]
Equate the first non-subsampled video surface format to
the enum SURFACE_PIXEL_FORMAT_SUBSAMPLE_END since it's
not a real format.
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Bernstein [Thu, 21 Apr 2022 20:19:34 +0000 (16:19 -0400)]
drm/amd/display: Add new DSC interface to disconnect from pipe
[Why & How]
Add new DSC interface to disconnect from pipe.
Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tse, Kaitlyn [Tue, 19 Apr 2022 14:44:26 +0000 (10:44 -0400)]
drm/amd/display: Remove outdated register for dcn3+
[Why & How]
Remove MPCC_OGAM_LUT_RAM_CONTROL register which is outdated.
Reviewed-by: Nevenko Stupar <Nevenko.Stupar@amd.com>
Reviewed-by: Martin Leung <Martin.Leung@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Tse Kaitlyn <Kaitlyn.Tse@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evgenii Krasnikov [Wed, 20 Apr 2022 20:04:33 +0000 (16:04 -0400)]
Revert "drm/amd/display: Reset cached PSR parameters after hibernate"
This reverts commit
d2069326d26c7de78e77a060fb6e6d0d21c35dbd.
Commit
d2069326d26c ("drm/amd/display: Reset cached PSR parameters after hibernate")
causes a system hang when game resolution is changed. Revert it.
Reviewed-by: Jayendran Ramani <Jayendran.Ramani@amd.com>
Reviewed-by: Harry Vanzylldejong <Harry.Vanzylldejong@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Evgenii Krasnikov <Evgenii.Krasnikov@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jimmy Kizito [Thu, 7 Apr 2022 17:55:04 +0000 (13:55 -0400)]
drm/amd/display: Add Connection Manager boot option.
[Why]
Boot up behaviour may differ depending on the Connection Manager
handling USB4 tunneling.
[How]
Send boot option to firmware to indicate Connection Manager.
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Jimmy Kizito <Jimmy.Kizito@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lee, Alvin [Tue, 19 Apr 2022 15:22:17 +0000 (11:22 -0400)]
drm/amd/display: Make OPTC3 function accessible to other DCN
[Why]
Newer DCN should use optc3
[How]
Declare optc3 vmin/vmax function in header.
Reviewed-by: Harry Vanzylldejong <Harry.Vanzylldejong@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 13 Apr 2022 22:07:17 +0000 (18:07 -0400)]
drm/amdgpu/discovery: add MES11 support
Enable MES 11 on asics which support it.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Likun Gao [Mon, 4 Apr 2022 21:02:31 +0000 (17:02 -0400)]
drm/amdgpu/discovery: add GFX 11.0 Support
Enable GFX 11.0 on asics where it is present.
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jack Xiao [Tue, 4 Aug 2020 07:56:20 +0000 (15:56 +0800)]
drm/amdgpu/gfx11: enable kiq to map mes ring
Enable KIQ to map MES ring:
1). add MES queue mapping support in MAP_QUEUES packet.
2). use correct MQD settings for MES queue.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jack Xiao [Tue, 4 Aug 2020 07:56:20 +0000 (15:56 +0800)]
drm/amdgpu/gfx10: enable kiq to map mes ring
Enable KIQ to map MES ring:
1). add MES queue mapping support in MAP_QUEUES packet.
2). use correct MQD settings for MES queue.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Wed, 6 Apr 2022 04:08:12 +0000 (12:08 +0800)]
drm/amdgpu: enable GENERIC0_INT for gfx/compute pipes
To generate an interrupt to RLC for accessing indirect
registers that CP can not access directly
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Thu, 14 Apr 2022 14:14:34 +0000 (10:14 -0400)]
drm/amdgpu: enable fgcg for soc21
Enable Fine Grained Clock Gating on soc21 asics.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Thu, 14 Apr 2022 14:12:10 +0000 (10:12 -0400)]
drm/amdgpu: enable GFX CGCG/CGLS for GC11.0.0
Enable GFX CGCG (coarse grained clockgating) and
CGLS (coarse grained light sleep) for GC11.0.0.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Mukul Joshi [Tue, 26 Apr 2022 17:00:11 +0000 (13:00 -0400)]
drm/amdkfd: Add KFD support for soc21 v3
Add initial support for soc21 in KFD compute
driver (Mukul)
- Add new definition for soc21 device.
- Add new file for amdgpu-kfd interface for GFX11 family.
- Add new file for queue management, interrupt handling,
mqd management for GFX11 family in KFD driver.
- Related changes/updates for soc21 device in
KFD driver.
- Repurpose last 2 entries of SDMA MQD for driver use.
v2: Add an optional argument into update queue operation (Mukul)
v3: Switch to ip version check, replace kgd_dev with
amdgpu_device (Hawking)
Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Oak Zeng <Oak.Zeng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 29 Mar 2022 20:41:12 +0000 (16:41 -0400)]
drm/amdkfd: add helper to generate cache info from gfx config
Rather than using hardcoded tables, we can use the gfx and
gmc config pulled from the IP discovery table to generate the
cache configuration.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Wed, 13 Apr 2022 18:27:32 +0000 (14:27 -0400)]
drm/amdgpu: add init support for GFX11 (v2)
Add initial support for GC version 11. GC is
the graphics and compute block on the GPU.
v1: add initial gfx11 support (Wenhui)
v2: switch to new amdgpu_gfx_is_high_priority_compute_queue
interface (Hawking)
v3: fix num_mec (Alex)
Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jack Xiao [Wed, 13 Apr 2022 18:30:03 +0000 (14:30 -0400)]
drm/amdgpu/mes11: initiate mes v11 support
Initiate mes v11 code base from mes v10, rename function
and register names.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Likun Gao [Wed, 13 Apr 2022 18:28:02 +0000 (14:28 -0400)]
drm/amdgpu: support imu for gfx11
Add support to initialize imu for gfx v11.
IMU is a new power management block for
gfx which manages gfx power.
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jack Xiao [Wed, 13 Apr 2022 18:30:37 +0000 (14:30 -0400)]
drm/amdgpu: add mes unmap legacy queue routine
For mes kiq has been taken over by mes sched, drv can't directly
use mes kiq to unmap queues. drv has to use mes sched api to
unmap legacy queue.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Likun Gao [Tue, 12 Apr 2022 21:00:11 +0000 (17:00 -0400)]
drm/amdgpu: support RS64 CP fw front door load
Support to load RS64 CP firmware front door load.
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Likun Gao [Fri, 12 Mar 2021 09:27:44 +0000 (17:27 +0800)]
drm/amdgpu: renovate sdma fw struct
Add sdma firmware struct version 2 to support new SDMA v6 and forward
firmware version.
v2: squash in fix
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 13 Apr 2022 22:08:49 +0000 (18:08 -0400)]
drm/amdgpu/discovery: handle AMDGPU_FW_LOAD_RLC_BACKDOOR_AUTO in SMU
Handle SMU load ordering when firmware load type is
AMDGPU_FW_LOAD_RLC_BACKDOOR_AUTO. This works similarly
to AMDGPU_FW_LOAD_DIRECT where the SMU load order is
different from the standard ordering when front door
loading is enabled.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Likun Gao [Tue, 12 Apr 2022 20:57:45 +0000 (16:57 -0400)]
drm/amdgpu: fix the fw size for sdma
For SDMA, if use the total size of SDMA TH0 and TH1 to allocate fw BO
may result to the ucode data overflow when copy ucode to BO as the PAGE
alignment.
IMU have the same issue.
Fix the above issue by alignment the fw size per fw ID.
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chengming Gui [Thu, 17 Feb 2022 10:01:27 +0000 (18:01 +0800)]
drm/amd/amdgpu: add more fw load type to fit new ASICs
Align exported fw load types with internal used.
Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jack Xiao [Tue, 12 Apr 2022 20:17:41 +0000 (16:17 -0400)]
drm/amdgpu: correct cp doorbell range
1. move MES doorbell inside the mec doorbell range,
for mes belongs to mec block
2. setting the correct gfx/mec doorbell range, so that
fw can correctly detect gfx/compute work load to enter/exit
power saving state.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Tested-and-acked-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chengming Gui [Thu, 17 Feb 2022 11:22:01 +0000 (19:22 +0800)]
drm/amd/amdgpu: adjust the fw load type list
Use 0 for legacy backdoor and 1 for frontdoor.
Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Likun Gao [Mon, 31 May 2021 06:16:56 +0000 (14:16 +0800)]
drm/amdgpu/gfx: refine fw hdr check fuction
The return value of function amdgpu_ucode_hdr_version
doesn't make sense, so change it to return true when
fw header version is match with passed in parameters.
Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Likun Gao [Tue, 7 Sep 2021 03:38:41 +0000 (11:38 +0800)]
drm/amdgpu: extend the show ucode name function
Extend amdgpu_ucode_name function to show SDMA TH0, TH1, IMU, RLCP, RLCV
and MES related ucode name via ucode id.
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>