Tapani Pälli [Wed, 27 Sep 2023 08:54:26 +0000 (11:54 +0300)]
iris: correct dst alpha blend factor in Wa_14018912822
Fixes:
0e9a26372bb4 ("iris: implement Wa_14018912822")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25424>
Lionel Landwerlin [Fri, 29 Sep 2023 22:29:41 +0000 (01:29 +0300)]
anv: fix internal compute copy shader build
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9907
Fixes:
2cc5b3b1e0 ("anv: add a memcpy compute internal kernel")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25480>
Christian Gmeiner [Thu, 28 Sep 2023 10:15:29 +0000 (12:15 +0200)]
docs: Move isaspec out of drivers/freedreno
Lets put it under 'Developer Topics'.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25452>
Iago Toral Quiroga [Wed, 27 Sep 2023 07:19:33 +0000 (09:19 +0200)]
v3d: get rid of shader_state pointer in v3d_key
Having this pointer in the key is undesirable since it makes
copying keys difficult and error prone (as seen in previous
patches), also, it is only there for convenience and we don't
strictly need it (in fact the vulkan driver doesn't use it at
all), so let's just get rid of it so our v3d_key is fully
static.
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25418>
Iago Toral Quiroga [Tue, 26 Sep 2023 11:50:09 +0000 (12:50 +0100)]
v3d: fix RAM shader cache
The RAM shader cache was using the v3d_key for hashes and
comparisons which is not correct. Particularly, this struct
has a void pointer where we store a reference to an uncompiled
shader with the NIR code, and that is of course not accounted
for when hashing and comparing keys, which can lead to bogus
cache hits.
This patch introduces a v3d_cache_key that has both the v3d key
and a sha1 of the uncompiled NIR. Now key hashing and comparison
is done on the static part of the v3d key (that is, excluding the
uncompiled shader pointer, which may be invalid in the cache if
the original shader was deleted) and taking the sha1 from the
uncompiled shader. This also makes sure the shader key we store
in the cache has a NULL shader_state pointer to make it more
clear that this field may not be used at all for caching purposes.
This fixes GPU hangs with some OpenCL tests (through Rusticl)
caused by incorrect RAM cache hits.
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25418>
Iago Toral Quiroga [Tue, 26 Sep 2023 11:11:39 +0000 (12:11 +0100)]
v3d: use pre-computed shader sha1 for disk cache
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25418>
Iago Toral Quiroga [Tue, 26 Sep 2023 08:17:24 +0000 (09:17 +0100)]
v3d: compute nir sha1 for uncompiled shader state
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25418>
Iago Toral Quiroga [Tue, 26 Sep 2023 08:15:17 +0000 (09:15 +0100)]
broadcom/compiler: add a couple of shader key helpers
Our shader key includes a void pointer that we can't just memcmp,
so add helpers that allow us toget the 'static' portion and size
of a key. We will use this to fix up the shader cache in v3d in
a later patch.
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25418>
Sergi Blanch Torne [Mon, 25 Sep 2023 07:32:10 +0000 (09:32 +0200)]
ci: disable Collabora's LAVA lab for maintance
This is to inform you of some planned downtime in the LAVA lab as follows:
* Start: 2023-10-02 08:00 BST (07:00 UTC)
* End: 2023-10-02 12:00 BST (11:00 UTC)
Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25368>
Martin Roukala (né Peres) [Sun, 1 Oct 2023 06:38:06 +0000 (09:38 +0300)]
ci/vkcts-navi21: mark more of the RT handles checks as flakes
We keep hitting more and more of them, so let's be more inclusive.
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25495>
Martin Roukala (né Peres) [Sun, 1 Oct 2023 06:34:00 +0000 (09:34 +0300)]
ci/vkcts-vangogh: mark dEQP-VK.dynamic_rendering.primary_cmd_buff.basic.* as flake
This mirrors what we did on navi21, as there are just too many of these tests.
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25495>
Janne Grunau [Sun, 17 Sep 2023 08:42:15 +0000 (10:42 +0200)]
asahi: decode: Fix uint64_t format modifiers in agxdecode_stateful()
Fixes i386 build.
Fixes:
acd5ed0451d6 ("asahi: decode: Implement VDM call/ret")
Signed-off-by: Janne Grunau <j@jannau.net>
Alyssa Rosenzweig [Mon, 28 Aug 2023 15:41:16 +0000 (11:41 -0400)]
asahi: Handle layered background programs
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Alyssa Rosenzweig [Mon, 28 Aug 2023 13:43:56 +0000 (09:43 -0400)]
asahi: Generate layered EOT programs
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Alyssa Rosenzweig [Wed, 16 Aug 2023 19:53:13 +0000 (15:53 -0400)]
asahi: Use a 2D Array texture for array render targets
Fixes KHR-GLES31.core.geometry_shader.layered_framebuffer.blending_support with
eMRT forced.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Alyssa Rosenzweig [Thu, 17 Aug 2023 16:51:45 +0000 (12:51 -0400)]
asahi: Write to cubes/etc attachments as 2D array
To reduce shader variants, the tilebuffer lowering code does not know the
actual texture targets of the spilled render targets, only whether they are
layered or not. As such, all layered targets (3D, cube map, etc) get written out
uniformly as 2D Arrays. For that to work, the driver needs to do the
corresponding transform.
Regular imageStore() instructions are not affected by any of this.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Alyssa Rosenzweig [Wed, 16 Aug 2023 21:58:48 +0000 (17:58 -0400)]
asahi: Predicate layer ID reads
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Alyssa Rosenzweig [Wed, 16 Aug 2023 21:58:06 +0000 (17:58 -0400)]
asahi: Add pass to predicate layer ID reads
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Alyssa Rosenzweig [Mon, 28 Aug 2023 12:46:06 +0000 (08:46 -0400)]
asahi: Assume LAYER is flat-shaded
It can't be anything else, this makes sure the varyings are sorted properly.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Alyssa Rosenzweig [Mon, 28 Aug 2023 12:44:56 +0000 (08:44 -0400)]
asahi: Account for layering for attachment views
Do not force a single-layer view, use an actual array attachment when there are
multiple layers, since this corresponds to a layered framebuffer that will write
to an array with the eMRT path.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Alyssa Rosenzweig [Mon, 28 Aug 2023 12:44:04 +0000 (08:44 -0400)]
asahi: Expose VS_LAYER_VIEWPORT behind a flag
We can't technically expose the extension without a higher GL version, but the
implemented subset should work and this lets us test with piglit.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Alyssa Rosenzweig [Mon, 28 Aug 2023 12:43:20 +0000 (08:43 -0400)]
asahi: Use layered layouts
For correct eMRT code.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Alyssa Rosenzweig [Mon, 28 Aug 2023 12:36:40 +0000 (08:36 -0400)]
agx/lower_tilebuffer: Support spilled layered RTs
If we spill render targets with a layered framebuffer, our spilled targets are
assumed to be 2D Arrays (in general). We need to use arrayed image operations to
load/store from these. The layer is given by the layer as read in the fragemnt
shader. This handles the eMRT portion of layered rendering.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Alyssa Rosenzweig [Mon, 28 Aug 2023 12:42:14 +0000 (08:42 -0400)]
agx/tilebuffer: Support layered layouts
Just add a flag for it. We don't care about the actual # of layers when
calculating the layout, only the boolean fact of being layered or not. The
reason we need this at all is because the eMRT implementation needs to
account for layering and that is only keyed off the tilebuffer layout.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Alyssa Rosenzweig [Mon, 28 Aug 2023 12:35:28 +0000 (08:35 -0400)]
agx: Support packed layered rendering writes
With the new pass.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Alyssa Rosenzweig [Mon, 28 Aug 2023 12:17:19 +0000 (08:17 -0400)]
asahi,agx: Select layered rendering outputs
These 2 are together
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Alyssa Rosenzweig [Fri, 15 Sep 2023 20:20:15 +0000 (16:20 -0400)]
asahi: Add helper to get layer id in internal program
For background/EOT only.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Alyssa Rosenzweig [Mon, 28 Aug 2023 12:14:58 +0000 (08:14 -0400)]
agx: Add pass to lower layer ID writes
The hardware needs the layer ID and the viewport index packed together. That
consumes an entire varying slot, if we want those available in the frag shader
we need a separate slot. Add a pass to insert the extra packed write.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Alyssa Rosenzweig [Mon, 28 Aug 2023 15:40:39 +0000 (11:40 -0400)]
agx: Handle layered block image stores
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Alyssa Rosenzweig [Mon, 28 Aug 2023 13:58:00 +0000 (09:58 -0400)]
agx: Pack block image store dim correctly
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Alyssa Rosenzweig [Mon, 28 Aug 2023 16:32:47 +0000 (12:32 -0400)]
agx/nir_lower_texture: Allow disabling layer clamping
For background program with layered.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Alyssa Rosenzweig [Mon, 28 Aug 2023 13:40:46 +0000 (09:40 -0400)]
nir: Support arrays in block_image_store_agx
For layered rendering, runs once per layer.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Alyssa Rosenzweig [Wed, 16 Aug 2023 21:58:27 +0000 (17:58 -0400)]
nir: Add layer_id_written_agx sysval
We'll implement layer ID reads in the frag shader with a varying read, but if
the VS doesn't write the varying we need to return 0 per the spec. Add a sysval
to detect that case so we can handle it at runtime without keys.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Alyssa Rosenzweig [Wed, 30 Aug 2023 20:03:46 +0000 (16:03 -0400)]
agx: Insert jmp_exec_none instructions
With the exception of the backwards branch for loops, all the control flow we
insert during instruction selection just predicates instructions rather than
actually jumping around. That means, for example, we execute both sides of the
if even for a uniform condition! That's inefficient. The solution is insert
jmp_exec_none instructions after control flow in order to skip unexecuted
regions, which is much faster than predicating them out. However, jmp_exec_none
is costly in itself, so we need to use a heuristic to determine when it's
actually beneficial.
This uses a very simple heuristic for this purpose. However, it is a massive
performance speed-up for Dolphin uber shaders: 39fps -> 67fps at 2x resolution.
Nearly a doubling of performance!
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Alyssa Rosenzweig [Wed, 30 Aug 2023 20:47:31 +0000 (16:47 -0400)]
agx: Add agx_prev_block helper
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Alyssa Rosenzweig [Wed, 30 Aug 2023 20:25:02 +0000 (16:25 -0400)]
agx: Add jumps to block ends
jmp_exec_none variant that jumps to the last instruction of the target block,
rather than the beginning. This is convenient for skipping over elses, while
still executing the block-final pop_exec instruction. Similarly for skipping
over loop bodies while still executing the block-final pop_exec, after break
instructions.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Alyssa Rosenzweig [Wed, 30 Aug 2023 19:43:51 +0000 (15:43 -0400)]
agx: Augment if/else/while_cmp with a target
Add an optional pointer to a target block for these instructions. This does NOT
act like a logical branch, and does NOT get added to the logical control flow.
It is ignored wholesale until after RA, when physical edges may be inserted by a
pass we add later in this series.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Alyssa Rosenzweig [Sun, 3 Sep 2023 23:03:04 +0000 (19:03 -0400)]
agx: Set PIPE_SHADER_CAP_CONT_SUPPORTED
So we get adequate testing of continues, rather than lowering them in GLSL. We
don't really /want/ to see continues but lowering them away will just make them
harder to test... and besides, we should be optimizing them in NIR (not GLSL) so
we can get the win on Vulkan too.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Alyssa Rosenzweig [Wed, 30 Aug 2023 21:56:37 +0000 (17:56 -0400)]
agx: Hoist sample_mask/zs_emit
Although this is well-motivated, perf effect seems to be neglible for Dolphin.
It does prevent the scheduler from making things worse by sinking these
instructions though, so as a way to prevent future problems this seems sensible.
The kind of problem this affects (late discard) isn't modelled in shader-db.
Nevertheless, nothing concerning there:
total instructions in shared programs: 1756699 -> 1756722 (<.01%)
instructions in affected programs: 10106 -> 10129 (0.23%)
helped: 21
HURT: 41
Inconclusive result (value mean confidence interval includes 0).
total bytes in shared programs:
11525404 ->
11525452 (<.01%)
bytes in affected programs: 72900 -> 72948 (0.07%)
helped: 27
HURT: 41
Inconclusive result (value mean confidence interval includes 0).
total halfregs in shared programs: 483394 -> 483286 (-0.02%)
halfregs in affected programs: 4945 -> 4837 (-2.18%)
helped: 88
HURT: 78
Inconclusive result (value mean confidence interval includes 0).
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Alyssa Rosenzweig [Mon, 4 Sep 2023 14:03:57 +0000 (10:03 -0400)]
agx: Align the reg file for 256-bit vectors
This fixes live range splitting with 3D textureGrad(), which involves vectors
larger than the natural 128-bit maximum and hence requires special handling.
Fixes this assert with a combination of debug flags and new patches:
unsigned int find_best_region_to_evict(struct ra_ctx *, unsigned int,
unsigned int *, unsigned int *):
Assertion `(rctx->bound % size) == 0 && "register file size must be aligned
to the maximum vector size"' failed
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Alyssa Rosenzweig [Thu, 31 Aug 2023 00:29:43 +0000 (20:29 -0400)]
asahi: Clamp index buffer extent to what's read
This makes for cleaner agxdecodes, I think this matches what I've seen on the
macOS side but I might be misremembering. Certainly shouldn't hurt.
This only applies for direct draws.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Friedrich Vock [Fri, 18 Aug 2023 21:01:26 +0000 (23:01 +0200)]
radv: Fix check in insert_block
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25496>
Friedrich Vock [Fri, 18 Aug 2023 20:59:09 +0000 (22:59 +0200)]
radv: Initialize shader freelist on allocation
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25496>
Vitaliy Triang3l Kuzmin [Sat, 5 Aug 2023 13:53:36 +0000 (16:53 +0300)]
r600: Replace R600_BIG_ENDIAN with UTIL_ARCH_BIG_ENDIAN
In particular, removes the dependency of r600_formats.h on r600_pipe.h so
it can be shared between Gallium and Vulkan.
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24513>
Marek Olšák [Mon, 7 Aug 2023 04:59:05 +0000 (00:59 -0400)]
winsys/amdgpu: pad gfx and compute IBs with a single NOP packet
to minimize CP overhead
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25043>
Marek Olšák [Mon, 7 Aug 2023 03:59:52 +0000 (23:59 -0400)]
ac/gpu_info: pad IBs according to ib_size_alignment
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25043>
Marek Olšák [Mon, 7 Aug 2023 03:17:48 +0000 (23:17 -0400)]
ac/gpu_info: replace ib_alignment with per-IP IB base and size alignments
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25043>
Eric Engestrom [Wed, 16 Aug 2023 21:16:17 +0000 (22:16 +0100)]
ci/deqp-runner: restore exit-on-error after getting deqp-runner's exit code
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24738>
Eric Engestrom [Wed, 16 Aug 2023 18:44:37 +0000 (19:44 +0100)]
ci/deqp-runner: fix indentation
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24738>
Marek Olšák [Mon, 4 Sep 2023 17:23:53 +0000 (13:23 -0400)]
amd: rename GFX110x to NAVI31-33
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25492>
Marek Olšák [Sat, 2 Sep 2023 02:45:05 +0000 (22:45 -0400)]
ac/llvm: fix flat PS input corruption
Fixes:
0a54fbb5b40fc4e4a - radeonsi/gfx11: interp changes for 32bit
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25492>
Marek Olšák [Mon, 7 Aug 2023 05:04:04 +0000 (01:04 -0400)]
ac/gpu_info: don't align IBs to the GL2 cache line size
PAL doesn't do it. If drivers want IBs not to share cache lines with other buffers,
they should align the size manually.
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25492>
Marek Olšák [Thu, 3 Aug 2023 00:24:04 +0000 (20:24 -0400)]
ac/llvm: set !fpmath 3.0 for llvm.sqrt
LLVM will be changed to increase precision with additional instructions,
which we don't want.
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25492>
Marek Olšák [Sat, 30 Sep 2023 07:36:58 +0000 (03:36 -0400)]
ac/perfcounter: remove a bogus assert to fix an assertion failure on gfx11
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25485>
Eric Engestrom [Fri, 4 Aug 2023 17:22:55 +0000 (18:22 +0100)]
ci: move shader-db clone/build into its own script
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24504>
Eric Engestrom [Fri, 8 Sep 2023 17:34:52 +0000 (18:34 +0100)]
ci: drop unused shader-db clone + build from fedora image
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24504>
Eric Engestrom [Fri, 8 Sep 2023 17:34:52 +0000 (18:34 +0100)]
ci: drop unused shader-db clone + build from alpine image
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24504>
Konstantin Seurer [Wed, 23 Aug 2023 12:30:51 +0000 (14:30 +0200)]
radv: Do not sync after radv_update_buffer_cp
WR_CONFIRM is set.
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24846>
Konstantin Seurer [Wed, 23 Aug 2023 12:17:18 +0000 (14:17 +0200)]
radv: Merge the sync_data and header initialization
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24846>
Konstantin Seurer [Wed, 23 Aug 2023 10:13:27 +0000 (12:13 +0200)]
radv/bvh/ploc: Load child bounds from LDS
The bounds are already in LDS so there is no need to load them from
VRAM.
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24846>
Eric Engestrom [Fri, 8 Sep 2023 09:28:59 +0000 (10:28 +0100)]
docs: document the merging process and what is allowed or not
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25117>
Cong Liu [Thu, 28 Sep 2023 10:36:06 +0000 (18:36 +0800)]
virgl:Fix ITEM_CPY macro pointer copy bug
The ITEM_CPY macro uses the memcpy function to copy the item variable.
When item is a pointer, the memcpy function will copy the value of the
pointer, not the address that the pointer points to.
Signed-off-by: Cong Liu <liucong2@kylinos.cn>
Reviewerd-by: Feng Jiang <jiangfeng@kylinos.cn>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25453>
Guilherme Gallo [Fri, 29 Sep 2023 06:35:10 +0000 (03:35 -0300)]
ci/anv: Catch some flakes
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25469>
Guilherme Gallo [Fri, 29 Sep 2023 06:25:26 +0000 (03:25 -0300)]
ci/zink: Found some flakes
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25469>
Guilherme Gallo [Fri, 29 Sep 2023 06:22:27 +0000 (03:22 -0300)]
ci/freedreno: Add a new flake
KHR-GLES31.core.compute_shader.simple-compute-shared_context resulted in
an UnexpectedPass during execution of the job
https://gitlab.freedesktop.org/mesa/mesa/-/jobs/
49445812
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25469>
Guilherme Gallo [Fri, 29 Sep 2023 06:18:02 +0000 (03:18 -0300)]
ci/radeonsi: Update flake list
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25469>
Mike Blumenkrantz [Fri, 29 Sep 2023 13:15:31 +0000 (09:15 -0400)]
radv: fix external handle type queries for dmabuf/fd
the intent of the VkExternalMemoryProperties API is that all compatible
handle types are returned, not just the type being queried. these two
types are compatible, so return both when both are supported
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25474>
Rhys Perry [Fri, 29 Sep 2023 10:36:43 +0000 (11:36 +0100)]
aco: don't combine DPP into v_cmpx
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25471>
Rhys Perry [Fri, 29 Sep 2023 10:01:45 +0000 (11:01 +0100)]
aco/optimizer_postRA: don't combine DPP across exec on GFX8/9
GFX8/9 seem to use FI=0 behaviour.
fossil-db (vega10):
Totals from 1 (0.00% of 63053) affected shaders:
Instrs: 542 -> 570 (+5.17%)
CodeSize: 2928 -> 3040 (+3.83%)
Latency: 2087 -> 2118 (+1.49%)
InvThroughput: 1103 -> 1143 (+3.63%)
Affected shader is from Cyberpunk 2077 fossil.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Cc: 23.2 <mesa-stable>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9784
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25471>
Helen Koike [Fri, 29 Sep 2023 12:40:32 +0000 (09:40 -0300)]
ci/ci_run_n_monitor: add docs for multiple targets
clarify how multiple targets can be used with the pipe character.
Signed-off-by: Helen Koike <helen.koike@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25472>
Lionel Landwerlin [Mon, 7 Aug 2023 11:03:57 +0000 (14:03 +0300)]
intel/fs: switch from SIMD 1 to 8 instructions surface/sampler rematerialization
SIMD1 instructions are problematic because they are considered partial
writes. This increases the liveness of the destination register
written by those instructions. To workaround this we use UNDEF
instructions to bound the liveness of the register. But this causing
other issues like in this case :
undef(1) vgrf2
mov(1) vgrf2, u4.0
add(1) vgrf3, vgrf2.0, 64UD
In this case the copy propagation pass in unable to see that vgrf2 in
the add() instruction can be replaced with the uniform u4.0.
To fix this problem, we switch NoMask SIMD8 instructions that cover
the entire register. We can drop the UNDEF instructions and now copy
propagation can do its job.
Good results on 2 apps :
Cyberpunk 2077 :
Totals from 7258 (68.80% of 10549) affected shaders:
Instrs: 6332210 -> 6073833 (-4.08%); split: -4.11%, +0.03%
Cycles:
130667501 ->
127351268 (-2.54%); split: -3.12%, +0.58%
Subgroup size: 90320 -> 90400 (+0.09%)
Spill count: 90 -> 68 (-24.44%)
Fill count: 82 -> 64 (-21.95%)
Scratch Memory Size: 8192 -> 6144 (-25.00%)
Max live registers: 385464 -> 375152 (-2.68%)
Max dispatch width: 64336 -> 64424 (+0.14%); split: +0.96%, -0.82%
Gaining 60 SIMD16/SIMD32 shaders, loosing 33
Strange Brigade :
Totals from 2137 (53.12% of 4023) affected shaders:
Instrs: 1544031 -> 1457544 (-5.60%); split: -5.60%, +0.00%
Cycles:
22292564 ->
21868978 (-1.90%); split: -2.43%, +0.53%
Subgroup size: 25328 -> 25344 (+0.06%)
Max live registers: 113716 -> 111214 (-2.20%)
Max dispatch width: 17232 -> 18608 (+7.99%); split: +8.36%, -0.37%
Gaining 138 SIMD16/SIMD32 shaders, loosing 4
On app slightly negatively affected :
Dota2 :
Totals from 232 (14.73% of 1575) affected shaders:
Instrs: 30029 -> 28194 (-6.11%)
Cycles: 385155 -> 371422 (-3.57%); split: -3.59%, +0.02%
Max live registers: 6792 -> 6780 (-0.18%)
Max dispatch width: 2256 -> 2160 (-4.26%)
Loosing 6 SIMD32 shaders
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24554>
Lionel Landwerlin [Mon, 7 Aug 2023 11:09:21 +0000 (14:09 +0300)]
intel/fs: handle add3 in surface/sampler rematerialization
Some recent NIR changes started generated those instructions. We need
to handle them to be able to rematerialize.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24554>
Lionel Landwerlin [Fri, 8 Sep 2023 06:52:14 +0000 (09:52 +0300)]
intel/fs: handle ishl in surface/sampler rematerialization
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24554>
Samuel Pitoiset [Wed, 27 Sep 2023 13:15:51 +0000 (15:15 +0200)]
radv: emit missing PA_{SC,SU}_LINE_STIPPLE_xxx regs in gfx preamble
Ported from RadeonSI and PAL.
This might fix the line stipple flakes in CI.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25428>
Samuel Pitoiset [Tue, 26 Sep 2023 16:19:59 +0000 (18:19 +0200)]
radv: fix COMPUTE_SHADER_INVOCATIONS query on compute queue
The VA needs to be adjusted, otherwise the hw always writes at offset 0.
This fixes dEQP-VK.query_pool.statistics_query.*_cq.
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25406>
Samuel Pitoiset [Wed, 27 Sep 2023 15:20:01 +0000 (17:20 +0200)]
radv: re-enable DCC with mipmaps on GFX11
This is now fixed.
Hi-Fi Rush, Sonic Frontiers and Hogwarts Legacy were known broken games.
I personally reproduced the issue with Hi-Fi Rush which has been fixed
since
e6735409eef ("radv: disable DCC with signedness reinterpretation
on GFX11"). I also tested Sonic Frontiers which has been fixed since
52b68869922 ("amd: update addrlib"). I didn't check Hogwarts Legacy but
I think it was also fixed by
e6735409eef.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25435>
Caio Oliveira [Fri, 8 Sep 2023 18:57:48 +0000 (11:57 -0700)]
compiler/types: Add void parameter to ensure these are valid C prototypes
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25445>
Caio Oliveira [Fri, 8 Sep 2023 18:17:16 +0000 (11:17 -0700)]
compiler/types: Spell struct and enum in type names
This is a preparation for moving compiler/types from C++ to C.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25445>
Caio Oliveira [Fri, 8 Sep 2023 18:36:19 +0000 (11:36 -0700)]
compiler/types: Use C compatible cast syntax
This is a preparation for moving compiler/types from C++ to C.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25445>
Caio Oliveira [Wed, 27 Sep 2023 23:02:20 +0000 (16:02 -0700)]
compiler/types: Remove use of auto
This is a preparation for moving compiler/types from C++ to C.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25445>
Caio Oliveira [Wed, 27 Sep 2023 22:54:42 +0000 (15:54 -0700)]
compiler/types: Remove use of references
This is a preparation for moving compiler/types from C++ to C.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25445>
Caio Oliveira [Wed, 27 Sep 2023 22:49:26 +0000 (15:49 -0700)]
compiler/types: Remove use of new/delete
This is a preparation for moving compiler/types from C++ to C.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25445>
Caio Oliveira [Fri, 1 Sep 2023 21:07:41 +0000 (14:07 -0700)]
compiler/types: Remove private related declarations
Now there's no private data in glsl_type anymore, so we can remove
the friend declaration and move the private functions into file local
statics.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25445>
Karol Herbst [Thu, 28 Sep 2023 21:02:20 +0000 (23:02 +0200)]
rusticl/mesa: create COMPUTE_ONLY contexts
This allows drivers to skip initializing unnecessary bits.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25466>
Sagar Ghuge [Fri, 8 Sep 2023 21:15:22 +0000 (14:15 -0700)]
anv: Enable barrier handling on video engines
v1: (Lionel)
- Don't check for the layout transition
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9776
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25131>
Marek Olšák [Tue, 26 Sep 2023 04:28:36 +0000 (00:28 -0400)]
ac/llvm: replace removed amdgcn.ldexp for LLVM 18
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25393>
Emma Anholt [Wed, 27 Sep 2023 20:15:48 +0000 (13:15 -0700)]
ci/etnaviv: Drop some gc2k flakes that I think are resolved.
All these basic GLSL tests should be stable now that other processes
aren't hanging the GPU on us.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25442>
Emma Anholt [Wed, 27 Sep 2023 19:34:07 +0000 (12:34 -0700)]
ci/etnaviv: Skip some tests that hang the GPU and knock out other tests.
Just a few tests were causing GPU hangs that seem to cause spurious
failures in other tests. With those skipped, the results mostly
stabilize.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25442>
Marek Olšák [Tue, 26 Sep 2023 00:09:17 +0000 (20:09 -0400)]
radeonsi: fix compute-only contexts
We can't skip redundant register updates on compute queues, at least
not all of them.
Fixes:
315231b5a519bdc14 - radeonsi: eliminate redundant compute SH register changes
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25390>
Faith Ekstrand [Thu, 28 Sep 2023 15:13:31 +0000 (10:13 -0500)]
nvk: Init pipelineCacheUUID
Fixes:
968cefbff113 ("nvk: Cache NIR shaders")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25458>
Martin Roukala (né Peres) [Sun, 17 Sep 2023 10:55:34 +0000 (13:55 +0300)]
radv/ci: add a manual job for vkd3d-proton on navi31
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25266>
Martin Roukala (né Peres) [Sun, 17 Sep 2023 10:50:52 +0000 (13:50 +0300)]
radv/ci: add a manual job to run vkcts on navi31
We currently only have a single navi31, but we'll get more in the
next month or so.
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25266>
Martin Roukala (né Peres) [Wed, 27 Sep 2023 07:01:02 +0000 (10:01 +0300)]
radv/ci: update the vkcts gfx1100 flake/fail lists
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25266>
Timothy Arceri [Mon, 25 Sep 2023 08:18:44 +0000 (18:18 +1000)]
glsl: remove now unused varying linker code
All of this varying linking code has now been ported to the NIR linker.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25371>
Timothy Arceri [Mon, 25 Sep 2023 00:57:15 +0000 (10:57 +1000)]
glsl: switch to nir linkers cross_validate_outputs_to_inputs()
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25371>
Timothy Arceri [Mon, 25 Sep 2023 00:45:24 +0000 (10:45 +1000)]
glsl: implement cross_validate_outputs_to_inputs() in nir linker
This is mostly a direct port of the GLSL IR code there are only
2 real functional changes.
1. The direct use of mesa symbol_table instead of glsl_symbol_table.
However since none of the extra functionality offered by
glsl_symbol_table was ever used here this can be seen as an
improvement.
2. Because interface blocks are lowered before this new nir linker
sees them we must explicitly skip them (they are validated
elsewhere) to avoid errors.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25371>
Timothy Arceri [Mon, 25 Sep 2023 00:37:05 +0000 (10:37 +1000)]
nir: add used field to nir variables
Will be use in a following path by the glsl nir based linker.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25371>
Timothy Arceri [Mon, 25 Sep 2023 00:16:15 +0000 (10:16 +1000)]
glsl: move is_gl_identifier() to linker_util
This had started to multiply around the NIR linker. Here we move it to a
common helper shared by GLSL IR and NIR.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25371>
Timothy Arceri [Mon, 25 Sep 2023 00:04:24 +0000 (10:04 +1000)]
glsl: move interpolation_string() to linker_util
Moving it here allows us to use in in the NIR linker too.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25371>
Timothy Arceri [Fri, 22 Sep 2023 06:07:25 +0000 (16:07 +1000)]
nir: copy explicit_invariant flag to nir vars
This will be used in the following patch.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25371>