River Riddle [Tue, 26 Apr 2022 20:27:03 +0000 (13:27 -0700)]
[mlir:PDLL] Fix error handling of eof within a string literal
We currently aren't handling this properly, and in the case
of a string block just crash. This commit adds proper error handling
and detection for eof.
Differential Revision: https://reviews.llvm.org/D124585
River Riddle [Tue, 26 Apr 2022 20:05:23 +0000 (13:05 -0700)]
[mlir:LSP] Improve conversion between SourceMgr and LSP locations
SourceMgr generally uses 1-based locations, whereas the LSP is zero based.
This commit corrects this conversion and also enhances the conversion from SMLoc
to SMRange to support string tokens.
Differential Revision: https://reviews.llvm.org/D124584
River Riddle [Tue, 26 Apr 2022 19:18:27 +0000 (12:18 -0700)]
[mlir:PDL] Rework errors for pdl.operations with non-inferrable results
We currently emit an error during verification if a pdl.operation with non-inferrable
results is used within a rewrite. This allows for catching some errors during compile
time, but is slightly broken. For one, the verification at the PDL level assumes that
all dialects have been loaded, which is true at run time, but may not be true when
the PDL is generated (such as via PDLL). This commit fixes this by not emitting the
error if the operation isn't registered, i.e. it uses the `mightHave` variant of trait/interface
methods.
Secondly, we currently don't verify when a pdl.operation has no explicit results, but the
operation being created is known to expect at least one. This commit adds a heuristic
error to detect these cases when possible and fail. We can't always capture when the user
made an error, but we can capture the most common case where the user expected an
operation to infer its result types (when it actually isn't possible).
Differential Revision: https://reviews.llvm.org/D124583
River Riddle [Tue, 26 Apr 2022 18:21:18 +0000 (11:21 -0700)]
[mlir:PDL] Fix a syntax ambiguity in pdl.attribute
pdl.attribute currently has a syntax ambiguity that leads to the incorrect parsing
of pdl.attribute operations with locations that don't also have a constant value. For example:
```
pdl.attribute loc("foo")
```
The above IR is treated as being a pdl.attribute with a constant value containing the location,
`loc("foo")`, which is incorrect. This commit changes the syntax to use `= <constant-value>` to
clearly distinguish when the constant value is present, as opposed to just trying to parse an attribute.
Differential Revision: https://reviews.llvm.org/D124582
River Riddle [Tue, 26 Apr 2022 18:12:45 +0000 (11:12 -0700)]
[mlir] Attach InferTypeOpInterface on SameOperandsAndResultType operations when possible
This allows for inferring the result types of operations in certain situations by using the type of
an operand. This commit allowed for automatically supporting type inference for many more
operations with no additional effort, e.g. nearly all Arithmetic operations now support
result type inferrence with no additional changes.
Differential Revision: https://reviews.llvm.org/D124581
River Riddle [Tue, 26 Apr 2022 18:00:35 +0000 (11:00 -0700)]
[mlir:ODS] Support using attributes in AllTypesMatch to automatically add InferTypeOpInterface
This allows for using attribute types in result type inference for use with
InferTypeOpInterface. This was a TODO before, but it isn't much
additional work to properly support this. After this commit,
arith::ConstantOp can now have its InferTypeOpInterface implementation automatically
generated.
Differential Revision: https://reviews.llvm.org/D124580
Peter Klausler [Wed, 27 Apr 2022 19:45:07 +0000 (12:45 -0700)]
[flang][runtime] Support B/O/Z editing of CHARACTER
This is a common extension, though semantics differ across
compilers. I've chosen to interpret the CHARACTER data
as if it were an arbitrary-precision integer value and
format or read it as such. This matches Intel's compilers
and nvfortran. (GNU Fortran can't handle lengths > 1 and XLF
seems to get the enddianness wrong.)
This patch generalizes the previous implementations of
B/O/Z input and output so that they'll work for arbitrary data
in memory, and then uses them for all B/O/Z input/output,
including (now) CHARACTER.
Differential Revision: https://reviews.llvm.org/D124547
Mircea Trofin [Thu, 28 Apr 2022 18:18:28 +0000 (11:18 -0700)]
[NFC] const-ed the return type of FunctionPropertiesAnalysis
The result is a data bag, this makes sure it's signaled to a user that
the data can't be mutated when, for example, doing something like:
auto &R = FAM.getResult<FunctionPropertiesAnalysis>(F)
...
R.Uses++
Simon Pilgrim [Thu, 28 Apr 2022 19:12:38 +0000 (20:12 +0100)]
[X86] setcc.ll - add "NOTBM" check-prefix for expected common code
Florian Hahn [Thu, 28 Apr 2022 19:16:21 +0000 (20:16 +0100)]
Revert "[VPlan] Remove uneeded needsVectorIV check."
This reverts commit
43842b887e0a7b918bb2d6c9f672025b2c621f8a while I
investigate a buildbot failure.
It also reverts the follow-up commit
2883de05145fc5b4afb99b91f69ebb835af36af5.
Chris Lattner [Thu, 28 Apr 2022 18:37:17 +0000 (11:37 -0700)]
[OpAsmParser] Simplify logic for requiredOperandCount in parseOperandList.
I would ideally like to eliminate 'requiredOperandCount' as a bit of
verification that should be in the client side, but it is much more
widely used than I expected. Just tidy some pieces up around it given
we can't drop it immediately.
NFC.
Differential Revision: https://reviews.llvm.org/D124629
Bill Wendling [Thu, 28 Apr 2022 19:00:47 +0000 (12:00 -0700)]
[randstruct] Randomize all elements of a record
A record may have more than just FieldDecls in it. If so, then we're
likely to drop them if we only randomize the FieldDecls.
We need to be careful about anonymous structs/unions. Their fields are
made available in the RecordDecl as IndirectFieldDecls, which are listed
after the anonymous struct/union. The ordering doesn't appear to be
super important, however we place them unrandomized at the end of the
RecordDecl just in case. There's also the possiblity of
StaticAssertDecls. We also want those at the end.
All other non-FieldDecls we place at the top, just in case we get
something like:
struct foo {
enum e { BORK };
enum e a;
};
Link: https://github.com/KSPP/linux/issues/185
Reviewed By: aaron.ballman
Differential Revision: https://reviews.llvm.org/D123958
Dominic Chen [Thu, 21 Apr 2022 22:08:04 +0000 (15:08 -0700)]
[libc] Support 32-bit ARM platform tests
Set LONG_DOUBLE_IS_DOUBLE, add ifdefs for 128-bit integer types
Differential Revision: https://reviews.llvm.org/D124204
David Tenty [Tue, 5 Apr 2022 21:27:00 +0000 (17:27 -0400)]
[LLVM] Add exported visibility style for XCOFF
For the AIX linker, under default options, global or weak symbols which
have no visibility bits set to zero (i.e. no visibility, similar to ELF
default) are only exported if specified on an export list provided to
the linker. So AIX has an additional visibility style called
"exported" which indicates to the linker that the symbol should
be explicitly globally exported.
This change maps "dllexport" in the LLVM IR to correspond to XCOFF
exported as we feel this best models the intended semantic (discussion
on the discourse RFC thread: https://discourse.llvm.org/t/rfc-adding-exported-visibility-style-to-the-ir-to-model-xcoff-exported-visibility/61853)
and allows us to enable writing this visibility for the AIX target
in the assembly path.
Reviewed By: DiggerLin
Differential Revision: https://reviews.llvm.org/D123951
David Green [Thu, 28 Apr 2022 18:46:12 +0000 (19:46 +0100)]
[VectorCombine] Try to reduce shuffle cost for commutative reduction operands
Given a shuffle feeding a commutative reduction, the lane ordering of
the shuffle will not alter the result. This is also true if there are a
number of operations between the reduction and the shuffle, providing
they only operate lane-wise. This patch searches for cases like that in
Vector Combine, allowing us to check the cost of the shuffle vs an
in-order identity shuffle and replace the order if possible. This only
handles a single shuffle at the moment to keep things simple, and is
able to ignore splats that produce results where every result is the
same.
This is a more powerful version of a combine that already happens in
instrcombine, capable of optimizing more cases by looking through more
instructions and being able to cost the shuffle.
Differential Revision: https://reviews.llvm.org/D123494
Jacques Pienaar [Thu, 28 Apr 2022 18:42:46 +0000 (11:42 -0700)]
[mlir] Add basic tree-sitter grammar file
tree-sitter grammar file that tries to closely matches LangRef (it could use
some tweaking and cleanup, but kept fairly basic). Also updated LangRef in
places where found some issues while doing the nearly direct transcription.
This only adds a grammar file, not all the other parts (npm etc) that
accompanies it. Those I'll propose for separate repo like we do for vscode
extension.
Reviewed By: rriddle
Differential Revision: https://reviews.llvm.org/D124352
Biplob Mishra [Thu, 28 Apr 2022 18:24:28 +0000 (19:24 +0100)]
InstCombine: Add no-one-use tests and create thwart complexity-based canonicalization for the or-and combine tests
Chris Lattner [Tue, 26 Apr 2022 19:03:03 +0000 (12:03 -0700)]
[AsmParser] Rework logic around "region argument parsing"
The asm parser had a notional distinction between parsing an
operand (like "%foo" or "%4#3") and parsing a region argument
(which isn't supposed to allow a result number like #3).
Unfortunately the implementation has two problems:
1) It didn't actually check for the result number and reject
it. parseRegionArgument and parseOperand were identical.
2) It had a lot of machinery built up around it that paralleled
operand parsing. This also was functionally identical, but
also had some subtle differences (e.g. the parseOptional
stuff had a different result type).
I thought about just removing all of this, but decided that the
missing error checking was important, so I reimplemented it with
a `allowResultNumber` flag on parseOperand. This keeps the
codepaths unified and adds the missing error checks.
Differential Revision: https://reviews.llvm.org/D124470
Yitzhak Mandelbaum [Wed, 27 Apr 2022 17:21:59 +0000 (17:21 +0000)]
[clang][dataflow] Perform structural comparison of indirection values in `join`.
This patch changes `Environment::join`, in the case that two values at the same
location are not (pointer) equal, to structurally compare indirection values
(pointers and references) for equivalence (that is, equivalent pointees) before
resorting to merging.
This change makes join consistent with equivalence, which also performs
structural comparison. It also fixes a bug where the values are `ReferenceValue`
but the merge creates a non-reference value. This case arises when the
`ReferenceValue`s were created to represent an lvalue, so the "reference-ness"
is not reflected in the type. In this case, the pointees will always be
equivalent, because lvalues at the same code location point to the location of a
fixed declaration, whose location is itself stable across blocks.
We were unable to reproduce a unit test for this latter bug, but have verified
the fix in the context of a larger piece of code that triggers the bug.
Differential Revision: https://reviews.llvm.org/D124540
Alexey Bataev [Mon, 7 Mar 2022 21:11:12 +0000 (13:11 -0800)]
[OPENMP]PR53344: Emit code for final update of the inscan reduction vars in worksharing loops.
Need to emit final update of the inscan reduction variables. For
worksharing loops, the reduction values are stored in the temp array,
need to copy the last element to the original var at the end of the
construct.
Differential Revision: https://reviews.llvm.org/D121156
Paul Robinson [Thu, 28 Apr 2022 17:34:57 +0000 (10:34 -0700)]
[PS5] Default to omit leaf frame pointer
Alan Zhao [Thu, 28 Apr 2022 17:01:10 +0000 (13:01 -0400)]
[llvm-ml] Improve indirect call parsing
In MASM, if a QWORD symbol is passed to a jmp or call instruction in
64-bit mode or a DWORD or WORD symbol is passed in 32-bit mode, then
MSVC's assembler recognizes that as an indirect call. Additionally, if
the operand is qualified as a ptr, then that should also be an indirect
call.
Furthermore, in 64-bit mode, such operands are implicitly rip-relative
(in fact, MSVC's assembler ml64.exe does not allow explicitly specifying
rip as a base register.)
To keep this patch managable, this patch does not include:
* error messages for wrong operand types (e.g. passing a QWORD in 32-bit
mode)
* resolving indirect calls if the symbol is declared after it's first
use (llvm-ml currently only runs a single pass).
* imlementing the extern keyword (required to resolve
https://crbug.com/762167.)
This patch is likely missing a bunch of edge cases, so please do point
them out in the review.
Reviewed By: epastor, hans, MaskRay
Committed By: epastor (on behalf of ayzhao)
Differential Revision: https://reviews.llvm.org/D124413
Simon Pilgrim [Thu, 28 Apr 2022 16:49:11 +0000 (17:49 +0100)]
[InstCombine][X86] simplifyDemandedVectorEltsIntrinsic - handle avx2 per-element vector shifts
Alexey Bataev [Wed, 14 Apr 2021 14:49:32 +0000 (07:49 -0700)]
[COST]Improve cost model for shuffles in SLP.
Introduced masks where they are not added and improved target dependent
cost models to avoid returning of the incorrect cost results after
adding masks.
Differential Revision: https://reviews.llvm.org/D100486
Paul Robinson [Thu, 28 Apr 2022 16:58:47 +0000 (09:58 -0700)]
[PS5] Defaults for -fdeclspec, -ffunction/data-sections
Craig Topper [Thu, 28 Apr 2022 16:21:13 +0000 (09:21 -0700)]
[RISCV] Use default promotion for (i32 (shl 1, X)) on RV64 when Zbs is enabled.
This improves opportunities to use bset/bclr/binv. Unfortunately,
there are no W versions of these instrcutions so this isn't always
a clear win. If we use SLLW we get free sign extend and shift masking,
but need to put a 1 in a register and can't remove an or/xor. If
we use bset/bclr/binv we remove the immediate materializationg and
logic op, but might need a mask on the shift amount and sext.w.
Reviewed By: luismarques
Differential Revision: https://reviews.llvm.org/D124096
Aaron Ballman [Thu, 28 Apr 2022 16:57:07 +0000 (12:57 -0400)]
Fix "not all control paths return a value" diagnostic; NFC
Pavel Samolysov [Thu, 28 Apr 2022 16:51:39 +0000 (09:51 -0700)]
[ArgPromotion] Move ArgPart and OffsetAndArgPart to anonymous namespace
The structure ArgPart and alias OffsetAndArgPart have been moved
into the anonymous namespace. NFC.
Reviewed By: aeubanks
Differential Revision: https://reviews.llvm.org/D124617
Pavel Samolysov [Thu, 28 Apr 2022 16:37:35 +0000 (09:37 -0700)]
[ArgPromotion] Change the condition to check the promotion limit
The condition should be 'ArgParts.size() > MaxElements', so that if we
have exactly 3 elements in the 'ArgParts' vector, the promotion should
be allowed because the 'MaxElement' threshold is not exceeded yet.
The default value for 'MaxElement' has been decreased to 2 in order
to avoid an actual change in argument promoting behavior. However,
this changes byval argument transformation behavior by allowing
adding not more than 2 arguments to the function instead of 3 allowed
before.
Reviewed By: aeubanks
Differential Revision: https://reviews.llvm.org/D124178
Bjorn Pettersson [Thu, 28 Apr 2022 16:31:05 +0000 (18:31 +0200)]
[SelectionDAG] Use correct boolean representation in FoldConstantArithmetic
The description of SETCC says
/// SetCC operator - This evaluates to a true value iff the condition is
/// true. If the result value type is not i1 then the high bits conform
/// to getBooleanContents.
Without this patch, we sign extended the i1 to the used larger type
regardless of getBooleanContents. This resulted in miscompiles, as
shown in the attached testcase that ended up returning -1 instead of
1 when using -mattr=+v.
Fixes https://github.com/llvm/llvm-project/issues/55168
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D124618
Daniel Kiss [Thu, 28 Apr 2022 08:01:22 +0000 (10:01 +0200)]
[libunwind][AArch64] Fix _Unwind_ForcedUnwind via sigreturn.
When the sigreturn trampoline is found the unw_proc_info_t.end_ip need to be set to
indicate a stack frame is found.
Reviewed By: cjdb, #libunwind, MaskRay
Differential Revision: https://reviews.llvm.org/D124522
Simon Pilgrim [Thu, 28 Apr 2022 16:14:39 +0000 (17:14 +0100)]
[InstCombine][X86] Add exhaustive simplify demanded vector elts tests for avx2 per-element vector shifts
Benjamin Kramer [Thu, 28 Apr 2022 16:29:43 +0000 (18:29 +0200)]
[bazel] Port
84fe39a45b73
Peter Klausler [Tue, 26 Apr 2022 23:09:42 +0000 (16:09 -0700)]
[flang][runtime] Correct emission & reading of unterminated final records
When the last operation on a foramtted sequential or stream file (prior
to an implied or explicit ENDFILE) is a non-advancing WRITE, ensure
that any partial record data is emitted to the file without a line
terminator. Further, when that last record is read with a non-advancing
READ, ensure that it won't raise an end-of-record condition after its
data, but instead will signal an end-of-file.
Differential Revision: https://reviews.llvm.org/D124546
Simon Pilgrim [Thu, 28 Apr 2022 16:08:20 +0000 (17:08 +0100)]
[X86] getTargetVShiftByConstNode - use SelectionDAG::FoldConstantArithmetic to perform constant folding. NFCI.
Remove some unnecessary code duplication.
Alexey Bataev [Thu, 28 Apr 2022 15:49:52 +0000 (08:49 -0700)]
[COST][NFC]Add a test for non-power-2 shuffles, NFC.
Vitaly Buka [Wed, 27 Apr 2022 23:16:39 +0000 (16:16 -0700)]
[mlir] Don't iterate mutable user list
executeOp.operandsMutable().append(asyncTokens) in
addAsyncDependencyAfter can resize and invalidate iterators.
Fixes reports like https://reviews.llvm.org/P8286
Reviewed By: herhut
Differential Revision: https://reviews.llvm.org/D124577
Vitaly Buka [Wed, 27 Apr 2022 23:07:21 +0000 (16:07 -0700)]
[mlir][msan] Don't access destroyed node
Marius Brehler [Mon, 11 Apr 2022 14:14:51 +0000 (14:14 +0000)]
[mlir][emitc] Add a cast op
This adds a cast operation that allows to perform an explicit type
conversion. The cast op is emitted as a C-style cast. It can be applied
to integer, float, index and EmitC types.
Reviewed By: jpienaar
Differential Revision: https://reviews.llvm.org/D123514
Vitaly Buka [Wed, 27 Apr 2022 23:04:47 +0000 (16:04 -0700)]
[mlir][msan][test] Disable jit tests
I am going to enable MLIR test on msan bot
https://lab.llvm.org/buildbot/#/builders/sanitizer-x86_64-linux-bootstrap-msan
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D124574
Jonas Devlieghere [Thu, 28 Apr 2022 15:43:12 +0000 (08:43 -0700)]
[llvm] Ignore .rej files in .gitignore
Ignore reject files (.rej) files generated by patch. I can't imagine a
reason they should ever be checked in. I considered ignoring patch files
as well but decided to err on the side of caution because we might not
want them to be easily deleted by something like git clean.
Differential revision: https://reviews.llvm.org/D124619
Chris Bieneman [Thu, 28 Apr 2022 15:13:20 +0000 (10:13 -0500)]
[HLSL] Adjust access specifier behavior
HLSL doesn't support access specifiers. This change has two components:
1) Make default access for classes public
2) Diagnose the use of access specifiers as a clang HLSL extension
As long as the default behavior for access specifiers matches HLSL,
allowing them to be used doesn't cause sourece incompatability with
valid code. As such enabling them as a clang extension seems like a
reasonable approach.
Fixes #55124
Reviewed By: aaron.ballman
Differential Revision: https://reviews.llvm.org/D124487
Craig Topper [Thu, 28 Apr 2022 15:21:02 +0000 (08:21 -0700)]
[Driver] Add f16 support to -mrecip parsing.
This is a followup to D120158 which added an 'h' suffix to the
backend handling.
Reviewed By: spatel
Differential Revision: https://reviews.llvm.org/D124551
Craig Topper [Thu, 28 Apr 2022 15:20:42 +0000 (08:20 -0700)]
[RISCV] Fix alias printing for vmnot.m
By clearing the HasDummyMask flag from mask register binary operations
and mask load/store.
HasDummyMask was causing an extra operand to get appended when
converting from MachineInstr to MCInst. This extra operand doesn't
appear in the assembly string so was mostly ignored, but it prevented
the alias instruction printing from working correctly.
Reviewed By: arcbbb
Differential Revision: https://reviews.llvm.org/D124424
Florian Hahn [Thu, 28 Apr 2022 15:31:48 +0000 (16:31 +0100)]
[VPlan] Fix comment formatting from
43842b887e.
Florian Hahn [Thu, 28 Apr 2022 15:27:34 +0000 (16:27 +0100)]
[VPlan] Remove uneeded needsVectorIV check.
Remove one of the last remaining uses of ::needsVectorIV, preparing for
its removal. Now that usesScalars is available and based on the
information explicit in VPlan, there is no need to use the pre-computed
needsVectorIV.
Reviewed By: Ayal
Differential Revision: https://reviews.llvm.org/D123720
Marius Brehler [Thu, 28 Apr 2022 15:18:12 +0000 (15:18 +0000)]
[mlir][emitc] Replace !emitc.opaque pointers
Replaces using !emitc.opaque pointers which using !emitc.ptr types.
Jonas Devlieghere [Thu, 28 Apr 2022 15:16:26 +0000 (08:16 -0700)]
[lldb] Remove patch reject file (.rej)
Yaxun (Sam) Liu [Wed, 27 Apr 2022 16:23:52 +0000 (12:23 -0400)]
[HIP] Add HIP runtime library arguments for linker
Add -L -l options for linker.
Reviewed by: Artem Belevich
Differential Revision: https://reviews.llvm.org/D124545
Alexey Bataev [Thu, 28 Apr 2022 14:49:37 +0000 (07:49 -0700)]
Revert "[COST]Improve cost model for shuffles in SLP."
This reverts commit
29a470e3804ca216d4e76c88a38086eb61c200f9 to fix
a crash reported in https://reviews.llvm.org/D100486#3479989.
Mark de Wever [Sat, 23 Apr 2022 17:50:31 +0000 (19:50 +0200)]
[NFC][libc++][format] Enable unit tests.
The GCC failures were partly fixed in D124103.
The format functions tests are fixed on GCC but they require a huge
amount of RAM (>10 GB). This fails with parallel testing in the CI. It
can be solved by splitting the test, but GCC-12 will be released shortly
and might fix the memory usage in these tests. Therefore these tests
remain disabled.
Reviewed By: #libc, ldionne
Differential Revision: https://reviews.llvm.org/D124335
Simon Pilgrim [Thu, 28 Apr 2022 15:01:33 +0000 (16:01 +0100)]
[X86] getBT - attempt to peek through aext(and(trunc(x),c)) mask/modulo
Ideally we'd fold this with generic DAGCombiner, but that only works for !isTruncateFree cases - we might be able to adapt IsDesirableToPromoteOp to find truncated src ops in the future, but for now just use this peephole.
Noticed in Issue #55138
Marius Brehler [Tue, 19 Apr 2022 09:23:44 +0000 (09:23 +0000)]
[mlir][emitc] Disallow !emitc.opaque pointers
Fordbids to express pointer via the `!emitc.opaque` type. Point the user
to use the `!emitc.ptr` type instead.
Reviewed By: jpienaar
Differential Revision: https://reviews.llvm.org/D124002
Paul Robinson [Thu, 28 Apr 2022 15:07:36 +0000 (08:07 -0700)]
[PS5] Rename a test to reflect its new purpose
gbreynoo [Thu, 28 Apr 2022 14:55:26 +0000 (15:55 +0100)]
[demangler] Fix demangling a template argument which happens to be a null pointer
As seen in https://github.com/llvm/llvm-project/issues/51854
llvm-cxxfilt was having trouble demangling the case "_Z1fIDnLDn0EEvv".
We handled the "LDNE" case and "LPi0E" but not "LDn0E". This change adds
that handling.
Differential Revision: https://reviews.llvm.org/D124010
Paul Robinson [Thu, 28 Apr 2022 14:50:20 +0000 (07:50 -0700)]
[PS5] Set default cpu to znver2, with no tuning
Bjorn Pettersson [Thu, 28 Apr 2022 14:46:00 +0000 (16:46 +0200)]
[test][NewPM] Use -passes=loop-vectorize instead of -loop-vectorize
Update a bunch of loop-vectorize regression tests to use the new PM
syntax (opt -passes=loop-vectorize) instead of the deprecated legacy
PM syntax (opt -loop-vectorize).
Paul Robinson [Thu, 28 Apr 2022 14:16:01 +0000 (07:16 -0700)]
[PS5] Disable exceptions by default
David Green [Thu, 28 Apr 2022 14:06:24 +0000 (15:06 +0100)]
[VecCombine] Add tests for removing shuffles from reductions. NFC
Simon Pilgrim [Thu, 28 Apr 2022 14:00:38 +0000 (15:00 +0100)]
[InstCombine][X86] Show failure to simplify demanded vector elts for x86 per-element vector shifts
David Spickett [Wed, 13 Apr 2022 12:27:46 +0000 (13:27 +0100)]
[lldb] Add FixAnyAddress to ABI plugins
FixAnyAddress is to be used when we don't know or don't care
whether we're fixing a code or data address.
By using FixAnyAddress over the others, you document that no
specific choice was made.
On all existing platforms apart from Arm Thumb, you could use
either FixCodeAddress or FixDataAddress and be fine. Up until
now I've chosen to use FixDataAddress but if I had
chosen to use FixCodeAddress that would have broken Arm Thumb.
Hence FixAnyAddress, to give you the "safest" option when you're
in generic code.
Uses of FixDataAddress in memory region code have been changed
to FixAnyAddress. The functionality is unchanged.
Reviewed By: omjavaid, JDevlieghere
Differential Revision: https://reviews.llvm.org/D124000
Pavel Samolysov [Thu, 28 Apr 2022 13:31:00 +0000 (15:31 +0200)]
[ArgPromotion] Rename variables according to the code style. NFC
Some loop counters ('i', 'e') and variables ('type') were named not
in accordance with the code style and clang-tidy issues warnings
about the using of such variables. This patch renames the variables
and fixes some typos in the comments within the source file.
Differential Revision: https://reviews.llvm.org/D123662
David Green [Thu, 28 Apr 2022 13:28:45 +0000 (14:28 +0100)]
[AArch64] Add a fp128 shuffle test. NFC
These legalize to scalar types, so it's useful to have a test case that
covers them.
Chris Jackson [Thu, 28 Apr 2022 13:10:25 +0000 (14:10 +0100)]
[Debuginfo][LSR] Add salvaging variadic dbg.value intrinsics [2/2]
Reland
3f2b76ec90b5f108272a3072a1345ba55d8ec75b with the test corrected
to require x86-registered-target.
Differential Revision: https://reviews.llvm.org/D120169
Nico Weber [Thu, 28 Apr 2022 13:16:10 +0000 (09:16 -0400)]
try to fix check-llvm on windows after
e39e9d33
Pavel Labath [Thu, 28 Apr 2022 12:43:55 +0000 (14:43 +0200)]
[lldb/DWARF] Fix a typo in
57f99d0dc3
The lambda should take a reference argument.
Matt Arsenault [Thu, 28 Apr 2022 13:09:41 +0000 (09:09 -0400)]
llvm-reduce: Don't check tool name in error message check
Windows is being difficult and I don't know how to check the program name here
Chris Jackson [Thu, 28 Apr 2022 13:06:34 +0000 (14:06 +0100)]
Revert "[Debuginfo][LSR] Add salvaging variadic dbg.value intrinsics [2/2]"
This reverts commit
3f2b76ec90b5f108272a3072a1345ba55d8ec75b.
Nikita Popov [Thu, 28 Apr 2022 12:44:24 +0000 (14:44 +0200)]
[InstCombine] Fold or of icmp ne trunc/and
This adds the de Morgan conjugated variant for the existing
"and eq" style fold.
Proof: https://alive2.llvm.org/ce/z/tkNAcG
Kiran Chandramohan [Thu, 28 Apr 2022 12:20:11 +0000 (12:20 +0000)]
[Flang] Initial lowering of the Fortran Do loop
This patch adds code to lower simple Fortran Do loops with loop control.
Lowering is performed by the the `genFIR` function when called with a
`Fortran::parser::DoConstruct`. `genFIR` function calls `genFIRIncrementLoopBegin`
then calls functions to lower the body of the loop and finally calls
the function `genFIRIncrementLoopEnd`. `genFIRIncrementLoopBegin` is
responsible for creating the FIR `do_loop` as well as storing the value of
the loop index to the loop variable. `genFIRIncrementLoopEnd` returns
the incremented value of the loop index and also stores the index value
outside the loop. This is important since the loop variable can be used
outside the loop. Information about a loop is collected in a structure
`IncrementLoopInfo`.
Note 1: Future patches will bring in lowering for unstructured,
infinite, while loops
Note 2: This patch is part of upstreaming code from the fir-dev branch of
https://github.com/flang-compiler/f18-llvm-project.
Reviewed By: awarzynski
Differential Revision: https://reviews.llvm.org/D124277
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
Co-authored-by: Jean Perier <jperier@nvidia.com>
Co-authored-by: Val Donaldson <vdonaldson@nvidia.com>
Co-authored-by: Peter Klausler <pklausler@nvidia.com>
Co-authored-by: Valentin Clement <clementval@gmail.com>
Chris Jackson [Thu, 28 Apr 2022 11:52:03 +0000 (12:52 +0100)]
[Debuginfo][LSR] Add salvaging variadic dbg.value intrinsics [2/2]
Reland commit
74273d575f9938d751a1c67862cffe553fe2de8b following a fix
for a memory leak. The DVIRecoveryRecord vectors now use unique_ptr.
Differential Revision: https://reviews.llvm.org/D120169
Devin Jeanpierre [Thu, 28 Apr 2022 12:02:36 +0000 (14:02 +0200)]
re-roll-forward "[clang] Mark `trivial_abi` types as "trivially relocatable"".""
This reverts commit
b0bc93da926a943cdc2d8b04f8dcbe23a774520c.
Changes: `s/_WIN32/_WIN64/g` in clang/test/SemaCXX/attr-trivial-abi.cpp.
The calling convention is specific to 64-bit windows. It's even in the name: `CCK_MicrosoftWin64`.
After this, the test passes with both `-triple i686-pc-win32` and `-triple x86_64-pc-win32`. Phew!
Reviewed By: gribozavr2
Differential Revision: https://reviews.llvm.org/D123059
Nikita Popov [Thu, 28 Apr 2022 12:40:42 +0000 (14:40 +0200)]
[InstCombine] Add tests for or of icmp trunc/and (NFC)
Rosie Sumpter [Tue, 12 Apr 2022 12:17:49 +0000 (13:17 +0100)]
[Sema][SVE2] Move/simplify Sema testing for SVE2 ACLE builtins
Currently for SVE2 ACLE builtins, single tests are used to verify both
clang code generation (when the feature is available) and semantic
error/warning messages (when the feature is unavailable). This WIP
patch moves the semantic testing for the values of immediate arguments
into dedicated Sema tests.
Nico Weber [Thu, 28 Apr 2022 12:39:12 +0000 (08:39 -0400)]
[gn build] (manually) port
0f1b5f115a7f
Kadir Cetinkaya [Thu, 28 Apr 2022 12:27:43 +0000 (14:27 +0200)]
[clangd] Record latency for ASTSignal derivation
Michael Forster [Thu, 28 Apr 2022 10:54:49 +0000 (12:54 +0200)]
Use `-text` git attribute instead of `text eol=...`
These automatic conversions lead to issues in various workflows, and all
we want here are files that retain their line endings under all
circumstances. `-text` captures that perfectly well and leads to fewer
issues.
It is preferable to `binary`, because with `-text` we still get textual
diffs.
Differential Revision: https://reviews.llvm.org/D124606
Lei Zhang [Thu, 28 Apr 2022 12:18:08 +0000 (08:18 -0400)]
[mlir][spirv] Remove layout decoration on unneeded storage classes
Per SPIR-V validation rules, explict layout decorations are only
needed for StorageBuffer, PhysicalStorageBuffer, Uniform, and
PushConstant storage classes. (And even that is for Shader
capabilities). So we don't need such decorations on the rest.
Reviewed By: hanchung
Differential Revision: https://reviews.llvm.org/D124543
Lei Zhang [Thu, 28 Apr 2022 12:13:22 +0000 (08:13 -0400)]
[mlir][spirv] Convert memref.alloca to spv.Variable
Reviewed By: hanchung
Differential Revision: https://reviews.llvm.org/D124542
Simon Pilgrim [Thu, 28 Apr 2022 12:06:48 +0000 (13:06 +0100)]
[X86] Add test case for Issue #55158
Andrew Savonichev [Wed, 27 Apr 2022 19:43:55 +0000 (22:43 +0300)]
[NVPTX] Integrate ptxas to LIT tests
ptxas is a proprietary compiler from Nvidia that can compile PTX to
machine code (SASS). It has a lot of diagnostics to catch errors
in PTX, which can be used to verify PTX output from llc.
Set -DPXTAS_EXECUTABLE=/path/to/ptxas CMake option to enable it.
If this option is not set, then ptxas is substituted to true which
effectively disables all ptxas RUN lines.
LLVM_PTXAS_EXECUTABLE environment variable takes precedence over
the CMake option, and allows to override ptxas executable that is used for LIT
without complete re-configuration.
Differential Revision: https://reviews.llvm.org/D121727
Bernhard Manfred Gruber [Fri, 8 Apr 2022 12:45:00 +0000 (14:45 +0200)]
[clang-tidy] support --load in clang-tidy-diff.py/run-clang-tidy.py
Support for loading shared objects as plugins into clang-tidy was added
in http://reviews.llvm.org/D111100. Unfortunately, the utility scripts
`clang-tidy-diff.py` and `run-clang-tidy.py` did not receive
corresponding arguments to forward such plugins to clang-tidy.
This diff adds a `-load=plugin` option to both scripts.
Differential Revision: http://reviews.llvm.org/D12306
Reviewed By: aaron.ballman
Simon Pilgrim [Thu, 28 Apr 2022 11:32:58 +0000 (12:32 +0100)]
[X86] getFauxShuffle - don't assume an UNDEF src element for AND/ANDNP results in an UNDEF shuffle mask index
The other src element might be zero, guaranteeing zero.
Fixes #55157
Simon Pilgrim [Thu, 28 Apr 2022 11:25:14 +0000 (12:25 +0100)]
Revert rG8680dd5117b0c36f807fecc4360122ae1dd73b6d "[X86] getFauxShuffle - don't assume an UNDEF src element for AND/ANDNP results in an UNDEF shuffle mask index"
I screwed up the merge somehow.
Simon Pilgrim [Thu, 28 Apr 2022 10:54:18 +0000 (11:54 +0100)]
[X86] getFauxShuffle - don't assume an UNDEF src element for AND/ANDNP results in an UNDEF shuffle mask index
The other src element might be zero, guaranteeing zero.
Fixes #55157
Michael Forster [Thu, 28 Apr 2022 10:38:03 +0000 (12:38 +0200)]
Revert "[llvm-pdbutil] Add options to only dump symbol record at specified offset and its parents or children with spcified depth."
This reverts commit
a3b7cb015fd5fd2aa98afda8ae22759576ce2888.
symbol-offset.test fails under MSAN:
[ 1] ; RUN: llvm-pdbutil yaml2pdb %p/Inputs/symbol-offset.yaml --pdb=%t.pdb [FAIL]
llvm-pdbutil yaml2pdb <REDACTED>/llvm/test/tools/llvm-pdbutil/Inputs/symbol-offset.yaml --pdb=<REDACTED>/tmp/symbol-offset.test/symbol-offset.test.tmp.pdb
==9283==WARNING: MemorySanitizer: use-of-uninitialized-value
#0 0x55f975e5eb91 in __libcpp_tls_set <REDACTED>/include/c++/v1/__threading_support:428:12
#1 0x55f975e5eb91 in set_pointer <REDACTED>/include/c++/v1/thread:196:5
#2 0x55f975e5eb91 in void* std::__msan::__thread_proxy<std::__msan::tuple<std::__msan::unique_ptr<std::__msan::__thread_struct, std::__msan::default_delete<std::__msan::__thread_struct> >, llvm::parallel::detail::(anonymous namespace)::ThreadPoolExecutor::ThreadPoolExecutor(llvm::ThreadPoolStrategy)::'lambda'()::operator()() const::'lambda'()> >(void*) <REDACTED>/include/c++/v1/thread:285:27
#3 0x7f74a1e55b54 in start_thread (<REDACTED>/libpthread.so.0+0xbb54) (BuildId:
64752de50ebd1a108f4b3f8d0d7e1a13)
#4 0x7f74a1dc9f7e in clone (<REDACTED>/libc.so.6+0x13cf7e) (BuildId:
7cfed7708e5ab7fcb286b373de21ee76)
Andrzej Warzynski [Thu, 28 Apr 2022 10:07:13 +0000 (10:07 +0000)]
[flang][driver] Fix spelling (nfc)
Merely making sure that we use consistent spelling.
Simon Pilgrim [Thu, 28 Apr 2022 10:18:37 +0000 (11:18 +0100)]
[X86] Add test case for Issue #55157
Dmitry Makogon [Thu, 28 Apr 2022 10:01:58 +0000 (17:01 +0700)]
[RS4GC] Add tests showing cases in which we could find a better base (NFC)
Mike Kashkarov [Thu, 28 Apr 2022 09:57:51 +0000 (18:57 +0900)]
[flang] Support FINDLOC/MAXLOC/MINLOC with scalar mask
Previously MASK= elements were accessed in assumption that mask is an array of
input argument rank (and in combination with explicit DIM= argument we had
out-of-bounds access), but for MAXLOC/MINLOC/FINDLOC mask should be be
conformable and could be scalar.
Add new regression tests with scalar mask for verification.
Reviewed By: klausler
Differential Revision: https://reviews.llvm.org/D124408
Mike Kashkarov [Thu, 28 Apr 2022 09:56:16 +0000 (18:56 +0900)]
[flang] Fix UBOUND() constant folding for parentheses expr
Similarly to LBOUND((x)) in https://reviews.llvm.org/D123838 - fix UBOUND((x))
folding for constant arrays to return shape instead of recurse scan.
Depends on D123520
Reviewed By: jeanPerier
Differential Revision: https://reviews.llvm.org/D123944
Marco Antognini [Wed, 20 Apr 2022 09:56:19 +0000 (11:56 +0200)]
[Analyzer] Remove undefined function
This getLValue function was declared in
98db1f990fc2 ([Analyzer] [NFC]
Parameter Regions, 2020-05-11) but was never implemented.
Reviewed By: NoQ
Differential Revision: https://reviews.llvm.org/D124461
Ties Stuij [Thu, 28 Apr 2022 09:23:54 +0000 (10:23 +0100)]
[ARM] add Armv9 build attribute
The build attribute number can be found in the Arm ABI addenda32 document:
https://github.com/ARM-software/abi-aa/blob/main/addenda32/addenda32.rst#335target-related-attributes
Reviewed By: tmatheson
Differential Revision: https://reviews.llvm.org/D124090
Ilya Biryukov [Thu, 28 Apr 2022 08:39:47 +0000 (08:39 +0000)]
[AST] Improve traversal of concepts and concept requirements
- Do not traverse concept decl inside `AutoType`. We only traverse
declaration and definitions, not references to a declaration.
- Do not visit implicit AST node the relevant traversal mode.
- Add traversal extension points for concept requirements.
- Renamed `TraverseConceptReference` to mark as helper to share
the code. Having an extension point there seems confusing given that
there are many concept refences in the AST that do not call the
helper. Those are `AutoType`, `AutoTypeLoc` and constraint requirements.
Only clangd code requires an update.
There are no use-cases for concept requirement traversals yet, but
I added them in the earlier version of the patch and decided to keep
them for completeness.
Reviewed By: sammccall
Differential Revision: https://reviews.llvm.org/D124532
Krasimir Georgiev [Thu, 28 Apr 2022 09:01:27 +0000 (11:01 +0200)]
[clang-format] add a regression test for include sorting
This adds a regression test from the comments
on https://reviews.llvm.org/D121370.
Reviewed By: MyDeveloperDay, curdeius
Differential Revision: https://reviews.llvm.org/D124513
Krasimir Georgiev [Thu, 28 Apr 2022 08:58:46 +0000 (10:58 +0200)]
Revert "[clang-format] SortIncludes should support "@import" lines in Objective-C"
This reverts commit
d46fa023caa2db5a9f1e21dd038bcb626261d958.
Regressed include order in some cases with trailing comments, see the
comments on https://reviews.llvm.org/D121370. Will add a regression test
in a follow-up commit.
Pavel Labath [Thu, 28 Apr 2022 08:57:35 +0000 (10:57 +0200)]
[lldb] Reduce duplication in DWARFASTParserClang::CopyUniqueClassMethodTypes
Use lambdas to replace identical bits of code.
Lian Wang [Tue, 26 Apr 2022 01:46:27 +0000 (01:46 +0000)]
[RISCV] Support VP_SETCC mask operations
Support VP_SETCC mask operations, turn it to logical operation.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D124438
Javier Setoain [Tue, 26 Apr 2022 13:39:29 +0000 (14:39 +0100)]
[mlir][SparseTensor] Enable VLA ops in index value generation
Current index value generation uses fixed-length vector ops, this patch
adds an alterantive codegen path compatible with scalable vectors by
using `LLVM::StepVectorOp`.
Differential Revision: https://reviews.llvm.org/D124454
Jay Foad [Thu, 28 Apr 2022 08:06:36 +0000 (09:06 +0100)]
[CodeGen] Remove an outdated comment in MachinePointerInfo
This comment has been untrue since D39758 changed
MachinePointerInfo to store AddrSpace separately from V.