Jason Ekstrand [Tue, 14 Jun 2016 15:40:49 +0000 (08:40 -0700)]
anv: Add proper support for depth clamping
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Tue, 14 Jun 2016 15:15:34 +0000 (08:15 -0700)]
anv/cmd_buffer: Split emit_viewport in two
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Tue, 14 Jun 2016 00:09:37 +0000 (17:09 -0700)]
anv/cmd_buffer: Set depth/stencil extent based on the image
It used to be based on the framebuffer which isn't quite right.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Wed, 15 Jun 2016 21:30:33 +0000 (14:30 -0700)]
anv/cmd_buffer: Don't crash if push constants are provided for missing stages
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Thu, 16 Jun 2016 17:57:39 +0000 (10:57 -0700)]
anv/pipeline: Do invariance propagation on SPIR-V shaders
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Mon, 13 Jun 2016 21:41:05 +0000 (14:41 -0700)]
nir/alu_to_scalar: Respect the exact ALU operation qualifier
Just setting builder->exact isn't sufficient because that only applies to
instructions that are built with the builder but instructions created
manually and only inserted using the builder are left alone.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Mon, 13 Jun 2016 19:47:19 +0000 (12:47 -0700)]
nir: Add a pass for propagating invariant decorations
This pass is similar to propagate_invariance in the GLSL compiler. The
real "output" of this pass is that any algebraic operations which are
eventually consumed by an invariant variable get marked as "exact".
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Sat, 18 Jun 2016 19:30:36 +0000 (12:30 -0700)]
nir/algebraic: Remove imprecise flog2 optimizations
While mathematically correct, these two optimizations result in an
expression with substantially lower precision than the original. For any
positive finite floating-point value, log2(x) is well-defined and finite.
More precisely, it is in the range [-150, 150] so any sum of logarithms
log2(a) + log2(b) is also well-defined and finite as long as a and b are
both positive and finite. However, if a and b are either very small or
very large, their product may get flushed to infinity or zero causing
log2(a * b) to be nowhere close to log2(a) + log2(b).
This imprecision was causing incorrect rendering in Talos Principal because
part of its HDR rendering process involves doing 8 texture operations,
clamping the result to [0, 65000], taking a dot-product with a constant,
and then taking the log2. This is done 6 or 8 times and summed to produce
the final result which is written to a red texture. In cases where you
have a region of the screen that is very dark, it can end up getting a
result value of -inf which is not what is intended.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96425
Cc: "11.1 11.2 12.0" <mesa-stable@lists.freedesktop.org>
Ian Romanick [Mon, 16 May 2016 19:11:57 +0000 (12:11 -0700)]
i965: Delete redundant extension enables
A nearly identical block already exists in the gen >= 6 block above.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Ian Romanick [Mon, 13 Jun 2016 20:48:47 +0000 (13:48 -0700)]
mesa: Fix incorrect "see also" comments
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Ian Romanick [Mon, 13 Jun 2016 20:45:00 +0000 (13:45 -0700)]
mesa: Silence unused parameter warning
main/pipelineobj.c: In function ‘delete_pipelineobj_cb’:
main/pipelineobj.c:110:30: warning: unused parameter ‘id’ [-Wunused-parameter]
delete_pipelineobj_cb(GLuint id, void *data, void *userData)
^
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Rob Clark [Tue, 7 Jun 2016 18:32:16 +0000 (14:32 -0400)]
gallium: make image_view const
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Rob Clark [Tue, 7 Jun 2016 18:29:01 +0000 (14:29 -0400)]
gallium: make constant_buffer const
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Rob Clark [Tue, 7 Jun 2016 16:49:37 +0000 (12:49 -0400)]
gallium: make shader_buffers const
Be consistent with the rest of the "set_xyz" state interfaces.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Nicolai Hähnle [Fri, 17 Jun 2016 18:08:42 +0000 (20:08 +0200)]
radeonsi: use trapezoid distribution for tess on Fiji and Polaris
This yields a small performance improvement in Unigine Heaven.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Tue, 17 May 2016 15:12:16 +0000 (10:12 -0500)]
radeonsi/sid: add Fiji+ tesselation distribution mode
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 17 Jun 2016 09:01:30 +0000 (11:01 +0200)]
radeonsi: emit PA_SC_RASTER_CONFIG_1 only once
It is the same for all SEs.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 17 Jun 2016 08:48:53 +0000 (10:48 +0200)]
radeonsi: fix calculation of valid RB mask per SE
The old calculation treated too many RBs as disabled.
Cc: 11.0 11.1 11.2 12.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 17 Jun 2016 08:30:44 +0000 (10:30 +0200)]
radeonsi: raise SI_PM4_MAX_DW
The old limit, introduced in commit
afa752d3f03ac6697581ff5d324e8ac0512ef513,
was exceeded by 4 SE configurations which hit si_write_harvested_raster_configs.
Cc: 11.1 11.2 12.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Roland Scheidegger [Sun, 19 Jun 2016 01:56:11 +0000 (03:56 +0200)]
gallivm: don't use integer min/max sse intrinsics with llvm >= 3.9
Apparently, these are deprecated. There's some AutoUpgrade feature which
is supposed to promote these to cmp/select, which apparently doesn't work
with jit code. It is possible it's not actually even meant to work (see
the bug filed against llvm which couldn't provide an answer neither)
but in any case this is meant to be only temporary unless the intrinsics
are really illegal. So, just use the fallback code (which should be cmp/select,
we're actually doing cmp/sext/trunc/select, but in any case llvm 3.9 manages
to optimize this back to pmin/pmax in the end).
This addresses https://llvm.org/bugs/show_bug.cgi?id=28176
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Tested-by: Vinson Lee <vlee@freedesktop.org>
Tested-by: Aaron Watry <awatry@gmail.com>
Ilia Mirkin [Sun, 19 Jun 2016 04:28:36 +0000 (00:28 -0400)]
nvc0: don't make use of push hint if there are no non-const user vbos
This makes the check match up what we do on nv50 as well - there's no
point in switching over the push path if everything's in managed
buffers. This can happen when a shader uses a vertex without an enabled
array - we end up passing it a constant attribute.
This also has the effect of "fixing" some flickering in Talos. I have no
idea why. I've stared at the push logic forwards, backwards, and
sideways. By always forcing the push path (which is slow), the
flickering also goes away, but other rendering is still wrong
(specifically draw 383068 as identified in the bug). However by not
switching over to the push path, draw 383068 is correct.
Note that other flickering remains in Talos, like the red/green
walls/floors. This takes care of the shadow flickering though.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90513
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Ilia Mirkin [Sat, 18 Jun 2016 19:22:09 +0000 (15:22 -0400)]
gk104/ir: fix tex use generation to be more careful about eliding uses
If we have a loop, instructions before the tex might be added as tex
uses, and those may in fact dominate all other uses of the tex results.
This however doesn't mean that we don't need a texbar after the tex.
Only check if uses dominate each other they are dominated by the tex.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96565
Fixes:
7752bbc44 (gk104/ir: simplify and fool-proof texbar algorithm)
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "11.2 12.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Ilia Mirkin [Sun, 12 Jun 2016 20:05:31 +0000 (16:05 -0400)]
nv50: add support for GL_EXT_window_rectangles
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Sun, 12 Jun 2016 04:46:18 +0000 (00:46 -0400)]
nvc0: add support for GL_EXT_window_rectangles
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Ilia Mirkin [Sat, 11 Jun 2016 20:52:17 +0000 (16:52 -0400)]
st/mesa: add support for GL_EXT_window_rectangles
Make sure to pass the requisite information in draws, blits, and clears
that work on the context's draw buffer.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Ilia Mirkin [Sat, 11 Jun 2016 19:26:45 +0000 (15:26 -0400)]
gallium: add PIPE_CAP_MAX_WINDOW_RECTANGLES to all drivers
This says how many window rectangles are supported by the
implementation, although it may not exceed PIPE_MAX_WINDOW_RECTANGLES.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Brian Paul <brianp@vmware.com>
Ilia Mirkin [Sat, 11 Jun 2016 15:35:01 +0000 (11:35 -0400)]
gallium: add API for setting window rectangles
Window rectangles apply to all framebuffer operations, either in
inclusive or exclusive mode. They may also be specified as part of a
blit operation.
In exclusive mode, any fragment inside any of the specified rectangles
will be discarded.
In inclusive mode, any fragment outside every rectangle will be
discarded.
The no-op state is to have 0 rectangles in exclusive mode.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Ilia Mirkin [Fri, 10 Jun 2016 02:50:43 +0000 (22:50 -0400)]
mesa: add GL_EXT_window_rectangles state storage/retrieval functionality
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Brian Paul <brianp@vmware.com>
Ilia Mirkin [Fri, 10 Jun 2016 02:10:10 +0000 (22:10 -0400)]
glapi: add GL_EXT_window_rectangles entrypoints
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Brian Paul <brianp@vmware.com>
Samuel Pitoiset [Wed, 15 Jun 2016 14:14:39 +0000 (16:14 +0200)]
nv50/ir: add missing strings for some recent sysvals
This is pretty useful for debugging purposes and those should
not be omitted.
Fixes:
517a93b3 ("nvc0: add ARB_shader_draw_parameters support")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Bruce Cherniak [Fri, 17 Jun 2016 17:14:54 +0000 (12:14 -0500)]
swr: Update screen->context pointer with multiple contexts.
A pipe pointer in the screen allows for access to current device context
in flush_frontbuffer and resource_destroy. This wasn't tracking current
context in multi-context situations.
v2: More caffeine. Corrected compare, removed unnecessary set of
screen-pipe in create_context, and added a few comments.
Brian Paul [Wed, 15 Jun 2016 16:42:34 +0000 (10:42 -0600)]
scons: put the generated git_sha1.h file in top-level src/ directory
To match what's done in the automake build.
v2: Use git rev-parse to get a 10-character hash ID
Fix Python imports
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Tim Rowley [Thu, 16 Jun 2016 19:56:39 +0000 (14:56 -0500)]
swr: switch from overriding -march to selecting features
Acked-by: Chuck Atkins <chuck.atkins@kitware.com>
Tested-by: Chuck Atkins <chuck.atkins@kitware.com>
Timothy Arceri [Fri, 17 Jun 2016 05:12:38 +0000 (15:12 +1000)]
mesa: remove remaining tabs in api_validate.c
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Samuel Iglesias Gonsálvez [Mon, 13 Jun 2016 06:29:53 +0000 (08:29 +0200)]
i965/fs: indirect addressing with doubles is not supported in CHV/BSW/BXT
From the Cherryview's PRM, Volume 7, 3D Media GPGPU Engine, Register Region
Restrictions, page 844:
"When source or destination datatype is 64b or operation is integer DWord
multiply, indirect addressing must not be used."
v2:
- Fix it for Broxton too.
v3:
- Simplify code by using subscript() and not creating a new num_components
variable (Kenneth).
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95462
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Iago Toral Quiroga [Mon, 13 Jun 2016 07:13:23 +0000 (03:13 -0400)]
i965/fs: Fix single-precision to double-precision conversions for CHV/BSW/BXT
From the Cherryview PRM, Volume 7, 3D Media GPGPU Engine,
Register Region Restrictions:
"When source or destination is 64b (...), regioning in Align1
must follow these rules:
1. Source and destination horizontal stride must be aligned to
the same qword.
(...)"
v2:
- Fix it for Broxton too.
v3:
- Remove inst->regs_written change as it is not necessary (Ken)
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95462
Tested-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Fri, 17 Jun 2016 00:10:08 +0000 (17:10 -0700)]
docs: Mention GL_ARB_ES3_1_compatibility in release notes.
Ilia reminded me that I forgot this.
Kenneth Graunke [Tue, 14 Jun 2016 08:35:20 +0000 (01:35 -0700)]
i965: Fix comment about CS scratch space encodings on Broadwell+.
I typo'd this.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Thu, 16 Jun 2016 21:39:44 +0000 (14:39 -0700)]
docs: Update ARB_ES3_1_compatibility status for i965.
Kenneth Graunke [Wed, 11 May 2016 00:54:45 +0000 (17:54 -0700)]
i965: Drop perf_debug about rasterizer discard in SOL vs. clipper.
I recently experimented with performing rasterizer discard in the SOL
unit instead of the clipper, and as far as I can tell, it's basically
the same performance. The clipper comes directly after SOL anyway,
and setting the clipper to REJECT_ALL should be pretty darn cheap.
Keep the perf_debug on Sandybridge, where the GS actually does work.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Fri, 13 May 2016 01:08:49 +0000 (18:08 -0700)]
i965: Enable GL_ARB_ES3_1_compatibility on Gen8+ if CS are available.
There are almost no tests in any test suite, but what little I've found
seems to work. Ilia believes everything is in place.
v2: Predicate the enable on ES 3.1 being available (Gen8+) and also
ARB_compute_shader being available (requested by Ilia).
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Ian Romanick [Mon, 13 Jun 2016 16:59:10 +0000 (09:59 -0700)]
mesa: If validation fails in a debug context just emit a debug message
There are quite a few pipelines that desktop applications (including a
bunch of piglit test) can expect to have run but don't meet the GLES
requirements. Instead of failing validation, just emit a debug message.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96358
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Cc: Gregory Hainaut <gregory.hainaut@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Ian Romanick [Mon, 13 Jun 2016 22:22:34 +0000 (15:22 -0700)]
glsl: Always strip arrayness in precision_qualifier_allowed
Previously some callers of precision_qualifier_allowed would strip the
arrayness from the type and some would not. As a result, some places
would not notice that float[6], for example, needed a precision
qualifier.
Fixes the new piglit test no-default-float-array-precision.frag.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96358
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Cc: Gregory Hainaut <gregory.hainaut@gmail.com>
Cc: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Jose Fonseca [Thu, 16 Jun 2016 14:22:37 +0000 (15:22 +0100)]
mesa/main: Update _mesa_new_shader.
Left over from
31dee99e052902bc08ddbb1009748dc982ac3211. It should fix
Clang Windows build.
Trivial.
Christian König [Thu, 9 Jun 2016 12:44:39 +0000 (14:44 +0200)]
st/vdpau: we support lumakeying now
Signed-off-by: Christian König <christian.koenig@amd.com>
Christian König [Thu, 9 Jun 2016 12:43:10 +0000 (14:43 +0200)]
vl: support luma keying for interlaced surfaces as well
We had the CSC code twice in there, factor it out into a separate function.
Signed-off-by: Christian König <christian.koenig@amd.com>
Timothy Arceri [Thu, 16 Jun 2016 06:12:09 +0000 (16:12 +1000)]
i965: remove remaining tabs in brw_link.cpp
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
vbo: Use a bitmask to track the active arrays in vbo_save*.
The use of a bitmask makes functions iterating only active
attributes less visible in profiles.
v2: Use _mesa_bit_scan{,64} instead of open coding.
v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}.
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
vbo: Use a bitmask to track the active arrays in vbo_exec*.
The use of a bitmask makes functions iterating only active
attributes less visible in profiles.
v2: Use _mesa_bit_scan{,64} instead of open coding.
v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}.
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
mesa: Use bitmask/ffs to iterate the active_samplers bitmask.
Replaces an iterate and test bit in a bitmask loop by a
loop only iterating over the bits set in the bitmask.
v2: Use _mesa_bit_scan{,64} instead of open coding.
v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}.
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
mesa: Use bitmask/ffs to iterate the enabled textures.
Replaces an iterate and test bit in a bitmask loop by a
loop only iterating over the bits set in the bitmask.
v2: Use _mesa_bit_scan{,64} instead of open coding.
v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}.
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
mesa: Use designated bool value to check texture unit completeness.
The change helps to use the bitmask/ffs in the next change.
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
mesa: Use bitmask/ffs to iterate SamplersUsed
Replaces an iterate and test bit in a bitmask loop by a
loop only iterating over the bits set in the bitmask.
v2: Use _mesa_bit_scan{,64} instead of open coding.
v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}.
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
i965: Use bitmask/ffs to iterate used vertex attributes.
Replaces an iterate and test bit in a bitmask loop by a
loop only iterating over the bits set in the bitmask.
v2: Use _mesa_bit_scan{,64} instead of open coding.
v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}.
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
i965: Use bitmask/ffs to iterate enabled clip planes.
Replaces an iterate and test bit in a bitmask loop by a
loop only iterating over the bits set in the bitmask.
v2: Use _mesa_bit_scan{,64} instead of open coding.
v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}.
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
radeon/r200: Use bitmask/ffs to iterate enabled clip planes.
Replaces an iterate and test bit in a bitmask loop by a
loop only iterating over the bits set in the bitmask.
v2: Use _mesa_bit_scan{,64} instead of open coding.
v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}.
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
mesa: Use bitmask/ffs to iterate enabled clip planes.
Replaces an iterate and test bit in a bitmask loop by a
loop only iterating over the bits set in the bitmask.
v2: Use _mesa_bit_scan{,64} instead of open coding.
v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}.
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
mesa: Use bitmask/ffs to iterate color material attributes.
Replaces an iterate and test bit in a bitmask loop by a
loop only iterating over the bits set in the bitmask.
v2: Use _mesa_bit_scan{,64} instead of open coding.
v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}.
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
mesa: Use bitmask/ffs to build ff fragment shader keys.
Replaces an iterate and test bit in a bitmask loop by a
loop only iterating over the bits set in the bitmask.
The bitmask used here for iteration is a combination
of different enabled masks present for texture units.
v2: Use _mesa_bit_scan{,64} instead of open coding.
v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}.
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
mesa: Use bitmask/ffs to build ff vertex shader keys.
Replaces an iterate and test bit in a bitmask loop by a
loop only iterating over the bits set in the bitmask.
The bitmask used here for iteration is a combination
of different enabled masks present for texture units.
v2: Use _mesa_bit_scan{,64} instead of open coding.
v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}.
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
mesa: Remove the linked list of enabled lights
Clean up after conversion to bitmasks.
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
mesa: Switch to bitmask based enabled lights in gen_matypes.c
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
radeon/r200: Use bitmask/ffs to iterate enabled lights
Replaces a loop that iterates all lights and test
which of them is enabled by a loop only iterating over
the bits set in the enabled bitmask.
v2: Use _mesa_bit_scan{,64} instead of open coding.
v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}.
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
nouveau: Use bitmask/ffs to iterate enabled lights
Replaces a loop that iterates all lights and test
which of them is enabled by a loop only iterating over
the bits set in the enabled bitmask.
v2: Use _mesa_bit_scan{,64} instead of open coding.
v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}.
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
tnl: Use bitmask/ffs to iterate enabled lights
Replaces loops that iterate all lights and test
which of them is enabled by a loop only iterating over
the bits set in the enabled bitmask.
v2: Use _mesa_bit_scan{,64} instead of open coding.
v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}.
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
mesa: Use bitmask/ffs to iterate enabled lights for ff shader keys.
Replaces a loop that iterates all lights and test
which of them is enabled by a loop only iterating over
the bits set in the enabled bitmask.
v2: Use _mesa_bit_scan{,64} instead of open coding.
v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}.
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
mesa: Use bitmask/ffs to iterate enabled lights
Replaces loops that iterate all lights and test
which of them is enabled by a loop only iterating over
the bits set in the enabled bitmask.
v2: Use _mesa_bit_scan{,64} instead of open coding.
v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}.
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
mesa: Track enabled lights in a bitmask
This enables some optimizations afterwards.
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
mesa: Rename CoordReplaceBits back to CoordReplace.
It used to be called like that and fits better with 80 columns.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
mesa: Remove the now unused CoordsReplace array.
Now that all users are converted, remove the array.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
i965: Convert i965 to use CoordsReplaceBits.
Switch over to use the CoordsReplaceBits bitmask.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
i915: Convert i915 to use CoordsReplaceBits.
Switch over to use the CoordsReplaceBits bitmask.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
r200: convert r200 to use CoordsReplaceBits.
Switch over to use the CoordsReplaceBits bitmask.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
gallium: Convert the state_tracker to use CoordsReplaceBits.
Switch over to use the CoordsReplaceBits bitmask.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
swrast: Convert swrast to use CoordsReplaceBits.
Switch over to use the CoordsReplaceBits bitmask.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
mesa: Add gl_point_attrib::CoordReplaceBits bitfield.
The aim is to replace the CoordReplace array by
a bitfield. Until all drivers are converted,
establish the bitfield in parallel to the
CoordReplace array.
v2: Fix bitmask logic.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Timothy Arceri [Sun, 5 Jun 2016 03:17:51 +0000 (13:17 +1000)]
mesa/glsl: stop using GL shader type internally
Instead use the internal gl_shader_stage enum everywhere. This
makes things more consistent and gets rid of unnecessary
conversions.
Ideally it would be nice to remove the Type field from gl_shader
altogether but currently it is used to differentiate between
gl_shader and gl_shader_program in the ShaderObjects hash table.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Brian Paul [Wed, 15 Jun 2016 02:35:53 +0000 (20:35 -0600)]
auxilary/os: allow appending to GALLIUM_LOG_FILE
If the log file specified by the GALLIUM_LOG_FILE begins with '+', open
the file in append mode. This is useful to log all gallium output for
an entire piglit run, for example.
v2: put GALLIUM_LOG_FILE support inside an #ifdef DEBUG block.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Chad Versace [Tue, 14 Jun 2016 23:20:07 +0000 (16:20 -0700)]
anv: Fix a harmless overflow warning
anv_pipeline_binding::index is a uint8_t, but some code assigned to it
UINT16_MAX.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewd-by: Jason Ekstrand <jason@jlekstrand.net>
Rob Herring [Tue, 14 Jun 2016 21:17:44 +0000 (16:17 -0500)]
vc4: fix vc4_resource_from_handle() stride calculation
The expected stride calculation is completely wrong. It should
ultimately be multiplying cpp and width rather than dividing. The width
also needs to be aligned to the tiling width first before converting to
stride bytes.
The whole stride check here is possibly pointless. Any buffers which
were allocated outside of vc4 may have strides with larger alignment
requirements.
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Wed, 1 Jun 2016 07:08:55 +0000 (00:08 -0700)]
i965: Use a uniform for gl_PatchVerticesIn in the TCS on Gen8+.
We still need to recompile the passthrough shader when this value
changes, as it also affects the output vertex count. But otherwise,
we can eliminate recompiles on Gen8+.
We probably want to do this for Gen7 as well, but that requires
rewriting the input release code to use a loop, which is a trade-off
I'd need to consider in more detail.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Cc: mesa-stable@lists.freedesktop.org
Kenneth Graunke [Fri, 27 May 2016 03:21:58 +0000 (20:21 -0700)]
glsl: Optionally lower TCS gl_PatchVerticesIn to a uniform.
i965 has no special hardware for this, so the best way to implement
this is to pass it in via a uniform.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Cc: mesa-stable@lists.freedesktop.org
Kenneth Graunke [Wed, 1 Jun 2016 07:08:55 +0000 (00:08 -0700)]
i965: Use a uniform for gl_PatchVerticesIn in the TES.
Fixes three GL44-CTS.tessellation_shader subtests:
- max_patch_vertices
- single.max_patch_vertices
- tessellation_control_to_tessellation_evaluation.gl_PatchVerticesIn
These use gl_PatchVerticesIn in the TES, but don't link against a
TCS (which would allow the linker to lower it to a constant). We had
no handling for the system value in the backend, so it would just
assert fail.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Cc: mesa-stable@lists.freedesktop.org
Kenneth Graunke [Fri, 27 May 2016 03:21:58 +0000 (20:21 -0700)]
glsl: Optionally lower TES gl_PatchVerticesIn to a uniform.
i965 has no special hardware for this, so we need to pass this value in
as a uniform (unless the TES is linked against a TCS, in which case the
linker can just replace this with a constant).
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Cc: mesa-stable@lists.freedesktop.org
Marek Olšák [Sat, 11 Jun 2016 12:58:55 +0000 (14:58 +0200)]
winsys/radeon: use the common job queue for multithreaded command submission v2
v2: fixup after renaming to util_queue_fence
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sat, 11 Jun 2016 11:10:49 +0000 (13:10 +0200)]
gallium/util: import the multithreaded job queue from amdgpu winsys (v2)
v2: rename the event to util_queue_fence
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Nicolai Hähnle [Fri, 13 May 2016 05:04:04 +0000 (00:04 -0500)]
radeonsi: fix undefined left-shift into sign bit
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 13 May 2016 06:56:44 +0000 (01:56 -0500)]
st_glsl_to_tgsi: don't read potentially uninitialized buffer variable
Found by -fsanitize=undefined. Note that this should be a harmless issue in
practice because the inst->op check always dominates anyway.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Nicolai Hähnle [Fri, 13 May 2016 06:48:04 +0000 (01:48 -0500)]
mesa/main: fix integer overflows in _mesa_image_offset
Found using -fsanitize=undefined.
Cc: "11.1 11.2 12.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Timothy Arceri [Tue, 14 Jun 2016 04:39:16 +0000 (14:39 +1000)]
i965: remove type_size_vec4_times_4()
type_size_vec4_times_4() was introduced as a fix in
8dcf807cb43383
however since
3810c1561 we can just use type_size_scalar() and
get the actual number of outputs we need.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Fri, 27 May 2016 02:56:48 +0000 (19:56 -0700)]
mesa: Pass gl_constant_value union into _mesa_fetch_state().
We've had some trouble in the past with copying integers around via
float pointers, as the C compiler sometimes uses x87 floating point
registers to load values on 32-bit systems. Passing the
gl_constant_value union should be safer.
To avoid churn, this patch creates a "GLfloat *value" variable so
existing uses can stay the same.
Not observed to fix anything, but I was in the area adding more integer
state vars, and thought it'd be wise.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Cc: mesa-stable@lists.freedesktop.org
Marek Olšák [Fri, 10 Jun 2016 11:14:31 +0000 (13:14 +0200)]
gallium/radeon: num-cs-flushes query should display per-frame average
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Thu, 9 Jun 2016 21:16:43 +0000 (23:16 +0200)]
gallium/radeon: add driver queries for compute/dma call stats and spills
also print the average count per frame
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Thu, 9 Jun 2016 00:22:25 +0000 (02:22 +0200)]
radeonsi: don't generate "ret void undef"
Use LLVMBuildRetVoid in epilogs and the GS copy shader and
si_llvm_build_ret otherwise.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Marek Olšák [Wed, 8 Jun 2016 19:00:22 +0000 (21:00 +0200)]
radeonsi: try to hit direct hw MSAA resolve by changing micro mode in clear
We could also do MSAA resolve in a compute shader like Vulkan and remove
these workarounds.
v2: comment the magic numbers
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 8 Jun 2016 18:51:50 +0000 (20:51 +0200)]
radeonsi: clarify the MSAA resolve limitation with scanout
this is the correct hw requirement
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 8 Jun 2016 18:24:21 +0000 (20:24 +0200)]
gallium/radeon: add micro_tile_mode to radeon_surf
for easier access
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Gurchetan Singh [Mon, 16 May 2016 23:34:07 +0000 (16:34 -0700)]
Added pbuffer hooks for surfaceless platform
This change enables the creation of pbuffer
surfaces on the surfaceless platform.
v3: Going back to single-buffered pbuffer
plus additional code review changes
Reviewed-by: Chad Versace <chad.versace@intel.com>
Roland Scheidegger [Tue, 14 Jun 2016 01:31:20 +0000 (03:31 +0200)]
gallium/util: don't use blocksize for minify for assertions
The previous assertions required for texture sizes smaller than block_size
that src_box.x + src_box.width still be block size.
(e.g. for a texture with width 3, and src_box.x = 0, src_box.width would
have to be 4 to not assert.)
This caused some assertions with some other state tracker.
It looks though like callers aren't expected to round up widths to block sizes
(for sizes larger than block size the assertion would still have verified it
wouldn't have been rounded up) so we simply shouldn't use a minify which
rounds up to block size.
(No piglit change with llvmpipe.)
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Roland Scheidegger [Mon, 13 Jun 2016 15:49:01 +0000 (17:49 +0200)]
llvmpipe: hack-fix bugs due to bogus bind flags
The gallium contract would be that bind flags must indicate all possible
bindings a resource might get used, but fact is the mesa state tracker does
not set bind flags correctly, and this is more or less unfixable due to GL.
This caused a bug with piglit arb_uniform_buffer_object-rendering-dsa
since
6e6fd911da8a1d9cd62fe0a8a4cc0fb7bdccfe02 - the commit is correct,
but it caused us to miss updates to fs UBOs completely, since the
corresponding buffer didn't have the appropriate bind flag set (thus we
wouldn't check if it is indeed currently bound).
See the discussion about this starting here:
https://lists.freedesktop.org/archives/mesa-dev/2016-June/119829.html
So, update the bind flags when we detect such usage.
Note we update this value for now only in places which matter for us - that
is creating sampler/surface view, or binding constant buffer. There's plenty
more places (setting streamout buffers, vertex/index buffers, ...) where
things can be set with the wrong bind flags, but the bind flags there never
matter.
While here also make sure we only set dirty constant bit when it's a fs
constant buffer - totally doesn't matter if it's vs/gs.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>