Masahiro Yamada [Thu, 26 Feb 2015 17:27:02 +0000 (02:27 +0900)]
ARM: UniPhier: support 1CS support card for all the UniPhier SoCs
Two support card variants are used with UniPhier reference boards:
- 1 chip select support card (original CPLD)
- 3 chip selects support card (ARIMA-compatible CPLD)
Currently, the former is only supported on PH1-Pro4, but it can be
expanded to PH1-LD4, PH1-sLD8 with a little code change.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Thu, 26 Feb 2015 17:27:01 +0000 (02:27 +0900)]
ARM: UniPhier: switch to xHCI for PH1-Pro4
PH1-Pro4 includes both EHCI and xHCI IP cores.
Unfortunately, U-Boot cannot enable EHCI and xHCI support
simultaneously. Some users may wish Super-Speed connection.
Disable CONFIG_USB_EHCI_HCD and enable CONFIG_USB_XHCI_HCD.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Thu, 26 Feb 2015 17:27:00 +0000 (02:27 +0900)]
usb: UniPhier: add UniPhier on-chip xHCI host driver support
Support xHCI host driver used on Panasonic UniPhier platform.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Marek Vasut <marex@denx.de>
Masahiro Yamada [Thu, 26 Feb 2015 17:26:59 +0000 (02:26 +0900)]
ARM: UniPhier: add xHCI device nodes to PH1-Pro4 device tree
Each USB port corresponds to the following IP core:
port0: xHCI (0x65a00000) SS+HS
port1: xHCI (0x65c00000) HS (SS PHY is not implemented)
port2: EHCI (0x5a800100) HS
port3: EHCI (0x5a810100) HS
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Thu, 26 Feb 2015 17:26:58 +0000 (02:26 +0900)]
ARM: UniPhier: enable xHCI and GIO cores for PH1-Pro4
This is necessary to use the USB 3.0 host controllers on PH1-Pro4.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Thu, 26 Feb 2015 17:26:57 +0000 (02:26 +0900)]
ARM: UniPhier: add I/O pin settings for xHCI on PH1-Pro4
This is necessary to use the xHCI cores for PH1-Pro4.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Thu, 26 Feb 2015 17:26:56 +0000 (02:26 +0900)]
ARM: UniPhier: replace "usb-ehci" with "generic-ehci"
EHCI host controllers have a common register interface.
We may wish to implement a generic EHCI driver someday.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Thu, 26 Feb 2015 17:26:55 +0000 (02:26 +0900)]
ARM: UniPhier: move uniphier_ehci_reset() function
Because uniphier_ehci_reset() is only called from ehci-uniphier.c,
it can be a static function there.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Marek Vasut <marex@denx.de>
Masahiro Yamada [Thu, 26 Feb 2015 17:26:54 +0000 (02:26 +0900)]
ARM: UniPhier: remove EHCI platform devices
Now UniPhier platform highly depends on Device Tree configuration
(CONFIG_OF_CONTROL is select'ed by Kconfig). Since the EHCI is only
used on main U-Boot, we can drop platform devices of the EHCI
controllers. We still keep UART platform devices because they might
be useful for SPL.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Marek Vasut <marex@denx.de>
Masahiro Yamada [Thu, 26 Feb 2015 17:26:53 +0000 (02:26 +0900)]
ARM: UniPhier: enable STDMAC for EHCI
Deassert the reset signal and provide the clock for STDMAC core.
This is necessary for the USB 2.0 host controllers.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Thu, 26 Feb 2015 17:26:52 +0000 (02:26 +0900)]
ARM: UniPhier: reset NAND core in SPL for non-NAND boot mode
For all the UniPhier SoCs so far, the reset signal of the NAND core
is automatically deasserted after the PLL gets stabled.
(The bit 2 of SC_RSTCTRL is default to one.)
This causes a fatal problem on the NAND controller of PH1-LD4.
For that SoC, the NAND I/O pins are not set up yet at the power-on
reset except the NAND boot mode. As a result, the NAND controller
begins automatic device scanning with wrong I/O pins and finally
hangs up.
Actually, U-Boot dies after printing "NAND:" on the console unless
the boot mode latch detected the NAND boot mode.
To work around this problem, reset the NAND core in SPL for non-NAND
boot modes. If CONFIG_NAND_DENALI is enabled, the reset signal is
deasserted again in U-Boot proper. At this time, I/O pins have been
correctly set up, the device scanning should succeed.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Thu, 26 Feb 2015 17:26:51 +0000 (02:26 +0900)]
ARM: UniPhier: split clkrst_init() into two functions
Split the current clkrst_init() into two functions:
- early_clkrst_init(): called from SPL
Deassert the reset signals of the memory controller and some other
basic cores.
- clkrst_init(): called from main U-boot
Deassert the reset signals that are necessary for the access to
peripherals etc.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Thu, 26 Feb 2015 17:26:50 +0000 (02:26 +0900)]
ARM: UniPhier: rename SC_CLKCTRL_CLK_* to SC_SCLKCTRL_CEN_*
Follow the register macros in the LSI specification book.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Thu, 26 Feb 2015 17:26:49 +0000 (02:26 +0900)]
ARM: UniPhier: fix SBC init code
Now UniPhier SoCs only work with CONFIG_SPL and the function
sbc_init() is called from SPL.
The conditional #if !defined(CONFIG_SPL_BUILD) has no point
any more.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Thu, 26 Feb 2015 17:26:48 +0000 (02:26 +0900)]
ARM: UniPhier: fix comments in PH1-Pro4 SBC code
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Thu, 26 Feb 2015 17:26:47 +0000 (02:26 +0900)]
serial: UniPhier: move LCR register setting to probe function
We do not have to set the LCR register every time we change the
baud-rate. We just need to set it up once in the probe function.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Thu, 26 Feb 2015 17:26:46 +0000 (02:26 +0900)]
serial: UniPhier: use 32 bit register access
For PH1-Pro4, the 8 bit write access to LCR register (offset = 0x11)
is not working correctly. As a side effect, it also modifies MCR
register (offset = 0x10) and results in unexpected behavior.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Thu, 26 Feb 2015 17:26:45 +0000 (02:26 +0900)]
ARM: UniPhier: update defconfigs using savedefconfig
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Thu, 26 Feb 2015 17:26:44 +0000 (02:26 +0900)]
ARM: UniPhier: include <mach/*.h> instead of <asm/arch/*.h>
Since commit
0e7368c6c426 (kbuild: prepare for moving headers into
mach-*/include/mach), we can replace #include <asm/arch/*.h> with
<mach/*.h> so we do not need to create the symbolic link during the
build.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Thu, 26 Feb 2015 17:26:43 +0000 (02:26 +0900)]
ARM: UniPhier: move SoC headers to mach-uniphier/include/mach
Move arch/arm/include/asm/arch-uniphier/*
-> arch/arm/mach-uniphier/include/mach/*
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Thu, 26 Feb 2015 17:26:42 +0000 (02:26 +0900)]
ARM: UniPhier: move SoC sources to mach-uniphier
Move
arch/arm/cpu/armv7/uniphier/* -> arch/arm/mach-uniphier/*
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tom Rini [Wed, 25 Feb 2015 23:14:18 +0000 (18:14 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
gaurav rana [Fri, 20 Feb 2015 07:21:46 +0000 (12:51 +0530)]
crypto/fsl - Add progressive hashing support using hardware acceleration.
Currently only normal hashing is supported using hardware acceleration.
Added support for progressive hashing using hardware.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com>
CC: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <yorksun@freescale.com>
gaurav rana [Wed, 25 Feb 2015 04:07:09 +0000 (09:37 +0530)]
crypto/fsl: Make function names consistent for blob encapsulation/decapsulation.
This patch does the following:
1. The function names for encapsulation and decapsulation
were inconsitent in freescale's implementation and cmd_blob file.
This patch corrects the issues.
2. The function protopye is also modified to change the length parameter
from u8 to u32 to allow encapsulation and decapsulation of larger images.
3. Modified the description of km paramter in the command usage for better
readability.
Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com>
Reviewed-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Fabio Estevam [Mon, 23 Feb 2015 11:51:38 +0000 (08:51 -0300)]
zmx25: Convert to generic board
Boards need to select CONFIG_SYS_GENERIC_BOARD in order to prevent removal
from the project.
Cc: Matthias Weisser <weisserm@arcor.de>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Fabio Estevam [Mon, 23 Feb 2015 11:51:37 +0000 (08:51 -0300)]
imx31_phycore: Convert to generic board
Boards need to select CONFIG_SYS_GENERIC_BOARD in order to prevent removal
from the project.
Acked-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Fabio Estevam [Mon, 23 Feb 2015 11:51:36 +0000 (08:51 -0300)]
mx31ads: Convert to generic board
Boards need to select CONFIG_SYS_GENERIC_BOARD in order to prevent removal
from the project.
Acked-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Masahiro Yamada [Tue, 24 Feb 2015 02:45:10 +0000 (11:45 +0900)]
ARM: davinci: remove hawkboard support
This is still a non-generic board.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Sughosh Ganu <urwithsughosh@gmail.com>
Cc: Syed Mohammed Khasim <sm.khasim@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
Masahiro Yamada [Tue, 24 Feb 2015 02:45:09 +0000 (11:45 +0900)]
ARM: remove tnetv107x board support
This is still a non-generic board.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Chan-Taek Park <c-park@ti.com>
Acked-by: Marek Vasut <marex@denx.de>
Masahiro Yamada [Tue, 24 Feb 2015 02:45:08 +0000 (11:45 +0900)]
ARM: remove a320evb board support
This is still a non-generic board.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Po-Yu Chuang <ratbert@faraday-tech.com>
Acked-by: Marek Vasut <marex@denx.de>
Masahiro Yamada [Tue, 24 Feb 2015 02:45:07 +0000 (11:45 +0900)]
ARM: remove cm4008 and cm41xx board support
These are still non-generic boards.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Greg Ungerer <greg.ungerer@opengear.com>
Acked-by: Marek Vasut <marex@denx.de>
Masahiro Yamada [Tue, 24 Feb 2015 02:45:06 +0000 (11:45 +0900)]
ARM: remove dkb board support
This is still a non-generic board.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Lei Wen <leiwen@marvell.com>
Acked-by: Marek Vasut <marex@denx.de>
Masahiro Yamada [Tue, 24 Feb 2015 02:45:05 +0000 (11:45 +0900)]
ARM: remove jadecpu board support
This is still a non-generic board.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Matthias Weisser <weisserm@arcor.de>
Acked-by: Marek Vasut <marex@denx.de>
Masahiro Yamada [Tue, 24 Feb 2015 13:26:21 +0000 (22:26 +0900)]
kconfig: remove unneeded dependency on !SPL_BUILD
Now CONFIG_SPL_BUILD is not defined in Kconfig, so
"!depends on SPL_BUILD" and "if !SPL_BUILD" are redundant.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Tue, 24 Feb 2015 13:26:20 +0000 (22:26 +0900)]
kconfig: switch to single .config configuration
When Kconfig for U-boot was examined, one of the biggest issues was
how to support multiple images (Normal, SPL, TPL). There were
actually two options, "single .config" and "multiple .config".
After some discussions and thought experiments, I chose the latter,
i.e. to create ".config", "spl/.config", "tpl/.config" for Normal,
SPL, TPL, respectively.
It is true that the "multiple .config" strategy provided us the
maximum flexibility and helped to avoid duplicating CONFIGs among
Normal, SPL, TPL, but I have noticed some fatal problems:
[1] It is impossible to share CONFIG options across the images.
If you change the configuration of Main image, you often have to
adjust some SPL configurations correspondingly. Currently, we
cannot handle the dependencies between them. It means one of the
biggest advantages of Kconfig is lost.
[2] It is too painful to change both ".config" and "spl/.config".
Sunxi guys started to work around this problem by creating a new
configuration target. Commit
cbdd9a9737cc (sunxi: kconfig: Add
%_felconfig rule to enable FEL build of sunxi platforms.) added
"make *_felconfig" to enable CONFIG_SPL_FEL on both images.
Changing the configuration of multiple images in one command is a
generic demand. The current implementation cannot propose any
good solution about this.
[3] Kconfig files are getting ugly and difficult to understand.
Commit
b724bd7d6349 (dm: Kconfig: Move CONFIG_SYS_MALLOC_F_LEN to
Kconfig) has sprinkled "if !SPL_BUILD" over the Kconfig files.
[4] The build system got more complicated than it should be.
To adjust Linux-originated Kconfig to U-Boot, the helper script
"scripts/multiconfig.sh" was introduced. Writing a complicated
text processor is a shell script sometimes caused problems.
Now I believe the "single .config" will serve us better. With it,
all the problems above would go away. Instead, we will have to add
some CONFIG_SPL_* (and CONFIG_TPL_*) options such as CONFIG_SPL_DM,
but we will not have much. Anyway, this is what we do now in
scripts/Makefile.spl.
I admit my mistake with my apology and this commit switches to the
single .config configuration.
It is not so difficult to do that:
- Remove unnecessary processings from scripts/multiconfig.sh
This file will remain for a while to support the current defconfig
format. It will be removed after more cleanups are done.
- Adjust some makefiles and Kconfigs
- Add some entries to include/config_uncmd_spl.h and the new file
scripts/Makefile.uncmd_spl. Some CONFIG options that are not
supported on SPL must be disabled because one .config is shared
between SPL and U-Boot proper going forward. I know this is not
a beautiful solution and I think we can do better, but let's see
how much we will have to describe them.
- update doc/README.kconfig
More cleaning up patches will follow this.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 24 Feb 2015 13:26:19 +0000 (22:26 +0900)]
kconfig: Adjust ordering so that defaults work as expected
At present defaults in arch-specific Kconfig files are ignored if the
top-level item comes ahead of it in include order. This means that it is
not possible to have a U-Boot default that architectures and boards can
override. This does not seem very useful.
Move the include earlier to support this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Tue, 24 Feb 2015 13:26:18 +0000 (22:26 +0900)]
ARM: UniPhier: set CONFIG_SYS_MALLOC_F to the global default value
It is true that malloc is necessary for Driver Model before
relocation, but there is no good reason to reserve the malloc
space more than enough. The default value 0x400 works well.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Enric Balletbo i Serra [Tue, 24 Feb 2015 18:27:15 +0000 (19:27 +0100)]
OMAP3: igep0032: Fix regression due commit
f3b4bc45.
Commit referenced in subject breaks IGEP0032 build with the following
error:
drivers/misc/status_led.c:30:7: error: 'RED_LED_GPIO' undeclared here (not in a function)
scripts/Makefile.build:275: recipe for target 'drivers/misc/status_led.o' failed
make[2]: *** [drivers/misc/status_led.o] Error 1
scripts/Makefile.build:420: recipe for target 'drivers/misc' failed
make[1]: *** [drivers/misc] Error 2
Makefile:1093: recipe for target 'drivers' failed
make: *** [drivers] Error 2
Fix this by skipping the status led on IGEP0032 machine as is not available
and throw an error for future machines if the status led is not configured
to avoid build breakage.
Reported-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Volodymyr Riazantsev [Tue, 20 Jan 2015 15:16:44 +0000 (10:16 -0500)]
mmc: fsl_esdhc: Add support for DDR mode
Add support of the DDR mode for eSDHC driver.
Enable it for i.MX6 SoC family only.
Signed-off-by: Volodymyr Riazantsev <volodymyr.riazantsev@globallogic.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Alison Wang [Fri, 16 Jan 2015 09:21:34 +0000 (17:21 +0800)]
arm: ls1021x: Add support for initializing CAAM's stream id
There 4 JRs, 4 RTICs and 8 DECOs, and set them the same stream id
for using the same SMMU3 on LS1021A.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
chenhui zhao [Fri, 23 Jan 2015 07:53:53 +0000 (15:53 +0800)]
arm: ls102xa: workaround for cache coherency problem
The RCPM FSM may not be reset after power-on, for example,
in the cases of cold boot and wakeup from deep sleep.
It causes cache coherency problem and may block deep sleep.
Therefore, reset them if they are not be reset.
Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Minghuan Lian [Wed, 21 Jan 2015 09:29:20 +0000 (17:29 +0800)]
driver/pci: add Layerscape PCIe driver
The patch adds Freescale Layerscape PCIe driver and provides
up to 4 controllers support.
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Minghuan Lian [Wed, 21 Jan 2015 09:29:19 +0000 (17:29 +0800)]
arm/ls1021a: add PCIe settings
The patch enables and adds PCIe settings for boards LS1021AQDS
and LS1021ATWR.
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Minghuan Lian [Wed, 21 Jan 2015 09:29:18 +0000 (17:29 +0800)]
arm/ls102xa: use a array to define pexmscportsr
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Minghuan Lian [Wed, 21 Jan 2015 09:29:17 +0000 (17:29 +0800)]
arm/ls102xa: create TLB to map PCIe region
LS1021A's PCIe1 region begins 0x40_00000000; PCIe2 begins
0x48_00000000. In order to access PCIe device, we must create
TLB to map the 40bit physical address to 32bit virtual address.
This patch will enable MMU after DDR is available and creates MMU
table in DRAM to map all 4G space; then, re-use the reserved space
to map PCIe region. The following the mapping layout.
VA mapping:
------- <---- 0GB
| |
| |
|-------| <---- 0x24000000
|///////| ===> 192MB VA map for PCIe1 with offset 0x40_0000_0000
|-------| <---- 0x300000000
| |
|-------| <---- 0x34000000
|///////| ===> 192MB VA map for PCIe2 with offset 0x48_0000_0000
|-------| <---- 0x40000000
| |
|-------| <---- 0x80000000 DDR0 space start
|\\\\\\\|
|\\\\\\\| ===> 2GB VA map for 2GB DDR0 Memory space
|\\\\\\\|
------- <---- 4GB DDR0 space end
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Alison Wang [Fri, 16 Jan 2015 09:23:04 +0000 (17:23 +0800)]
arm: ls102xa: Define default values for some CCSR macros
This patch is to define default values for some CCSR macros
to make header files cleaner.
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
J. German Rivera [Tue, 6 Jan 2015 21:19:02 +0000 (13:19 -0800)]
drivers/mc: Migrated MC Flibs to 0.5.2
Upgrade Manage Complex (MC) flib API to 0.5.2. Rename directory
fsl_mc to fsl-mc. Change the fsl-mc node in Linux device tree
from "fsl,dprcr" to "fsl-mc". Print MC version info when
appropriate.
Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
Signed-off-by: Lijun Pan <Lijun.Pan@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
York Sun [Tue, 6 Jan 2015 21:19:01 +0000 (13:19 -0800)]
armv8/ls2085a_emu: Enable sync of refresh
Enable sync of DDR refresh for LS2085a platform. GPP DDR controllers
stay in sync. DP-DDR has only one controller so it does no harm.
Signed-off-by: York Sun <yorksun@freescale.com>
York Sun [Tue, 6 Jan 2015 21:19:00 +0000 (13:19 -0800)]
armv8/fsl-lsch3: Enable erratum workround for A008514
Erratum A008514 appleis to ls2085a.
Signed-off-by: York Sun <yorksun@freescale.com>
York Sun [Tue, 6 Jan 2015 21:18:59 +0000 (13:18 -0800)]
armv8/fsl-lsch3: Enable workaround for A008336
Erratum A008336 applied to LS2085A.
Signed-off-by: York Sun <yorksun@freescale.com>
Bhupesh Sharma [Tue, 6 Jan 2015 21:18:58 +0000 (13:18 -0800)]
ls2085/configs: Ensure right banners are printed for EMU and SIMU
This patch enusres that right banners are printed for LS2085A
emulator and simulator platforms.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Stuart Yoder [Tue, 6 Jan 2015 21:18:57 +0000 (13:18 -0800)]
ARMv8/ls2085a: Move kernel image load address
Move the load address of the kernel image to get it away from the
region of the uncompressed kernel.
Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Arnab Basu [Tue, 6 Jan 2015 21:18:56 +0000 (13:18 -0800)]
ARMv8/ls2085a: Switch to passing earlycon to kernel
Since Linux v3.16-rc1 earlyprintk has been removed for arm64.
Switch to using earlycon.
Signed-off-by: Arnab Basu <arnab.basu@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
York Sun [Tue, 6 Jan 2015 21:18:55 +0000 (13:18 -0800)]
driver/ddr/fsl: Add sync of refresh
Add sync of refresh for multiple DDR controllers. DDRC initialization
needs to complete first. Code is re-ordered to keep refresh close.
Signed-off-by: York Sun <yorksun@freescale.com>
York Sun [Tue, 6 Jan 2015 21:18:54 +0000 (13:18 -0800)]
ARMv8/LS2085A: Adjust system clock and DDR clock
Set system clock to 100MHz and DDR clock to 133MHz.
Signed-off-by: York Sun <yorksun@freescale.com>
Kuldip Giroh [Tue, 6 Jan 2015 21:18:53 +0000 (13:18 -0800)]
ARMv8/LS2085A: HugeTLB support is required by default in LS NADK
LS NADK memory manager by default works on HugeTLB. Hence bootargs
must include parameters default_hugepagesz (default hugepagesize,
hugepagesz (hugepage size) and hugepages (number of hugepages to be
reserved in kernel for the given size).
Signed-off-by: Kuldip Giroh <kuldip.giroh@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
York Sun [Tue, 6 Jan 2015 21:18:52 +0000 (13:18 -0800)]
driver/ddr/fsl: Fix a typo in timing_cfg_8 calculation
wwt_bg should match rrt_bg. It was a typo in driver.
Signed-off-by: York Sun <yorksun@freescale.com>
York Sun [Tue, 6 Jan 2015 21:18:51 +0000 (13:18 -0800)]
ARMv8/LS2085A: Enable auto precharge for DP-DDR
DP-DDR benefits from auto precharge because of its specific
application.
Signed-off-by: York Sun <yorksun@freescale.com>
York Sun [Tue, 6 Jan 2015 21:18:50 +0000 (13:18 -0800)]
driver/ddr/fsl: Add support for multiple DDR clocks
Controller number is passed for function calls to support individual
DDR clock, depending on SoC implementation. It is backward compatible
with exising platforms. Multiple clocks have been verifyed on LS2085A
emulator.
Signed-off-by: York Sun <yorksun@freescale.com>
York Sun [Tue, 6 Jan 2015 21:18:49 +0000 (13:18 -0800)]
armv8/fsl-lsch3: Add support for second DDR clock
FSL-LSCH3 platforms can have multiple DDR clocks. LS2085A has one clock for
general DDR controlers, and another clock for DP-DDR. DDR driver needs to
change to support multiple clocks.
Signed-off-by: York Sun <yorksun@freescale.com>
York Sun [Tue, 6 Jan 2015 21:18:48 +0000 (13:18 -0800)]
driver/ddr/fsl: Add workround for erratumn A008514
Erratum A008514 workround requires writing register eddrtqcr1 with
value 0x63b20002.
Signed-off-by: York Sun <yorksun@freescale.com>
York Sun [Tue, 6 Jan 2015 21:18:47 +0000 (13:18 -0800)]
driver/ddr/fsl: Add workaround for A008336
Erratum A008336 requires setting EDDRTQCR1[2] in DDRC DCSR space
for 64-bit DDR controllers.
Signed-off-by: York Sun <yorksun@freescale.com>
York Sun [Tue, 6 Jan 2015 21:18:45 +0000 (13:18 -0800)]
driver/ddr/fsl: Adjust CAS to preamble override for emulator
On ZeBu emulator, CAS to preamble overrides need to be set to
satisfy the timing. This only impact platforms with CONFIG_EMU.
These should be set before MEM_EN is set.
Signed-off-by: York Sun <yorksun@freescale.com>
Bhupesh Sharma [Tue, 6 Jan 2015 21:18:44 +0000 (13:18 -0800)]
armv8/fsl-lsch3: Add fdt-fixup for clock frequency of the DUART nodes
This patch adds the fdt-fixup logic for the clock frequency of the
NS16550A related device tree nodes.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
York Sun [Tue, 6 Jan 2015 21:18:43 +0000 (13:18 -0800)]
armv8/ls2085a: Enable cluster timebase for all clusters
LS2085A and its variants can have up to four clusters. It is safe
to enable timebase for all even some may be disabled.
Signed-off-by: York Sun <yorksun@freescale.com>
York Sun [Tue, 6 Jan 2015 21:18:42 +0000 (13:18 -0800)]
armv8/fsl-lsch3: Convert flushing L3 to assembly to avoid using stack
Flushing L3 cache in CCN-504 requries d-cache to be disabled. Using
assembly function to guarantee stack is not used before flushing is
completed. Timeout is needed for simualtor on which CCN-504 is not
implemented. Return value can be checked for timeout situation.
Change bootm.c to disable dcache instead of simply flushing, required
by flushing L3.
Signed-off-by: York Sun <yorksun@freescale.com>
Arnab Basu [Tue, 6 Jan 2015 21:18:41 +0000 (13:18 -0800)]
ARMv8/fsl-lsch3: Patch cpu node properties in DT for online cores
U-Boot should only add "enable-method" and "cpu-release-address"
properties to the "cpu" node of the online cores.
Signed-off-by: Arnab Basu <arnab.basu@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
York Sun [Tue, 6 Jan 2015 21:11:22 +0000 (13:11 -0800)]
armv8/fsl-lsch3: Change normal memory shareability
According to hardware implementation, a single outer shareable global
coherence group is defined. Inner shareable has not bee enabled.
Signed-off-by: York Sun <yorksun@freescale.com>
Bhupesh Sharma [Tue, 6 Jan 2015 21:11:21 +0000 (13:11 -0800)]
fsl-ch3/lowlevel: TZPC and TZASC programming to configure non-secure accesses
This patch ensures that the TZPC (BP147) and TZASC-400 programming
happens for LS2085A SoC only when the desired config flags are
enabled and ensures that the TZPC programming is done to allow Non-secure
(NS) + secure (S) transactions only for DCGF registers.
The TZASC component is not present on LS2085A-Rev1, so the TZASC-400
config flag is turned OFF for now.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Tom Rini [Mon, 23 Feb 2015 21:18:06 +0000 (16:18 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-mmc
Matt Reimer [Thu, 19 Feb 2015 18:22:53 +0000 (11:22 -0700)]
mmc: sdhci: fix bus width switching on Samsung SoCs
Fix bus width switching from 8-bit mode down to 4-bit or 1-bit modes on
Samsung SoCs using SDHCI_QUIRK_USE_WIDE8. These SoCs report controller
version 2.0 yet they support 8-bit bus widths. If 8-bit mode was
previously enabled and then an operation like "mmc dev" caused a switch
back down to 4-bit or 1-bit mode, WIDE8 was left set, causing failures.
This problem was manifested by "mmc dev" timing out.
Signed-off-by: Matt Reimer <mreimer@sdgsystems.com>
Przemyslaw Marczak [Fri, 20 Feb 2015 11:29:27 +0000 (12:29 +0100)]
mmc: print SD/eMMC type for inited mmc devices
Depending on the boot priority, the eMMC/SD cards,
can be initialized with the same numbers for each boot.
To be sure which mmc device is SD and which is eMMC,
this info is printed by 'mmc list' command, when
the init is done.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Przemyslaw Marczak [Fri, 20 Feb 2015 11:29:26 +0000 (12:29 +0100)]
mmc: exynos dwmmc: check boot mode before init dwmmc
Before this commit, the mmc devices were always registered
in the same order. So dwmmc channel 0 was registered as mmc 0,
channel 1 as mmc 1, etc.
In case of possibility to boot from more then one device,
the CONFIG_SYS_MMC_ENV_DEV should always point to right mmc device.
This can be achieved by init boot device as first, so it will be
always registered as mmc 0. Thanks to this, the 'saveenv' command
will work fine for all mmc boot devices.
Exynos based boards usually uses mmc host channels configuration:
- 0, or 0+1 for 8 bit - as a default boot device (usually eMMC)
- 2 for 4bit - as an optional boot device (usually SD card slot)
And usually the boot order is defined by OM pin configuration,
which can be changed in a few ways, eg.
- Odroid U3 - eMMC card insertion -> first boot from eMMC
- Odroid X2/XU3 - boot priority jumper
By this commit, Exynos dwmmc driver will check the OM pin configuration,
and then try to init the boot device and register it as mmc 0.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Akshay Saraswat <akshay.s@samsung.com>
Hans de Goede [Thu, 19 Feb 2015 20:03:21 +0000 (21:03 +0100)]
sunxi: mmc: Always declare High Capacity capability
High Capacity (e)MMC cards work fine on sun4i / sun5i, and not having this
capability set causes u-boot to not recognize the eMMC on an Utoo P66 A13
tablet, so always set it thereby fixing this.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Jaehoon Chung [Wed, 4 Feb 2015 06:48:40 +0000 (15:48 +0900)]
mmc: exynos_dw_mmc: use the exynos specific data structure
Clksel value is exynos specific value.
It removed "clksel_val" into dwmci_host and created the
"dwmci_exynos_priv_data" structure for exynos specific data.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Jaehoon Chung [Wed, 4 Feb 2015 06:48:39 +0000 (15:48 +0900)]
mmc: exynos_dw_mmc: set to clksel_val into board-init function
"clksel_val" is assigned to property of mmc or defined value.
But it doesn't write at initial sequence.
There is a reason that get the wrong source-clock value.
This patch fixed it.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Jaehoon Chung [Wed, 14 Jan 2015 08:37:53 +0000 (17:37 +0900)]
mmc: dw_mmc: fixed the wrong bit control
If mode is not DDR-mode, then it needs to clear it.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Pantelis Antoniou [Fri, 23 Jan 2015 10:12:01 +0000 (12:12 +0200)]
mmc: Implement SD/MMC versioning properly
The SD/MMC version scheme was buggy when dealing with standard
major.minor.change cases. Fix it by using something similar to
the linux's kernel versioning method.
Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
Reported-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Tom Rini [Sun, 22 Feb 2015 03:01:09 +0000 (22:01 -0500)]
Merge git://git.denx.de/u-boot-sunxi
Siarhei Siamashka [Sat, 21 Feb 2015 05:34:09 +0000 (07:34 +0200)]
sunxi: Machine id hack to prevent loading buggy sunxi-3.4 kernels
Right now U-Boot supports the CONFIG_OLD_SUNXI_KERNEL_COMPAT option,
which makes it go out of its way in limiting the selection of PLL clock
frequencies and PMIC voltages in order not to upset outdated buggy
sunxi-3.4 kernel releases. And if the CONFIG_OLD_SUNXI_KERNEL_COMPAT
option is not set, then booting such old kernels exhibits various
failures at runtime. This is very user unfriendly, and there were
already several incidents when people wasted their time being hit
by these runtime failures and trying to debug them.
The right solution is not to add hacks and workarounds to the mainline
U-Boot, but to fix these bugs in the sunxi-3.4 kernel. And in fact,
the updated sunxi-3.4 kernels already exist. Still we need to follow
the 'Principle of Least Surprise' and U-Boot needs to ensure that
the old buggy kernels are not getting happily booted when the
CONFIG_OLD_SUNXI_KERNEL_COMPAT option is not set. And this patch
addresses this particular issue.
This patch makes U-Boot store the 'compatibility revision' number in
the top 4 bits of the machine id and pass it to the kernel. The old
buggy kernels will fail to load with a very much googlable error
message on the serial console (the "r1 = 0x100010bb" part of it):
"Error: unrecognized/unsupported machine ID (r1 = 0x100010bb)"
This error message can be documented in the linux-sunxi wiki with
proper explanations about how to resolve this situation and where
to get the necessary bugfixes for the sunxi-3.4 kernel.
The fixed sunxi-3.4 kernels implement a revision compatibility check
and clear the top 4 bits of the machine id if everything is alright.
By accepting the machine id with the bits 31:28 set to 1, the sunxi-3.4
kernel effectively certifies that it has the PLL5 clock speed and
AXP209 DCDC3 voltage fixes applied.
It is still possible to set the CONFIG_OLD_SUNXI_KERNEL_COMPAT option
in U-Boot if the user desires to use an outdated unpatched sunxi-3.4
kernel.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Hans de Goede [Fri, 20 Feb 2015 15:55:12 +0000 (16:55 +0100)]
sunxi: Set the /chosen/stdout-path fdt property for sunxi boards
While discussing with some people how to get the Linux kernel to do the
right thing wrt sending output to both the serial console and the
hdmi out / lcd screen when booting on ARM devices, Grant Likely pointed out
that there already is a solution for this.
All we need to do is set the /chosen/stdout-path fdt property, and if no
console= arguments were specified on the kernel commandline the kernel
will honor this and add this device as a console (next to the primary
video output on hdmi).
And u-boot already has support for setting this, all we need to do is
define OF_STDOUT_PATH and then everything will just work ootb, without
people needing to meddle with adding console= arguments in extlinux.conf .
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Reviewed-by: Tom Rini <trini@ti.com>
Hans de Goede [Thu, 19 Feb 2015 13:46:44 +0000 (14:46 +0100)]
sunxi: Fix sun5i mbus speed when booting old kernels
Older linux-sunxi-3.4 kernels override our PLL6 setting with 300 MHz,
halving the mbus frequency, so set it to 300 MHz ourselves and base the
mbus divider on that.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Mon, 16 Feb 2015 21:13:43 +0000 (22:13 +0100)]
sunxi: musb: Check Vbus-det before enabling otg port power
Sending out 5V when there is a charger connected to the otg port is not a
good idea, so check for this and error out.
Note this commit currently breaks otg support on the q8h tablets, as we need
to do some magic with the pmic there to get vbus info, this is deliberate
(better safe then sorry), fixing this is on my TODO list.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Mon, 16 Feb 2015 18:47:43 +0000 (19:47 +0100)]
sunxi: Add support for the UTOO P66 tablet
The UTOO P66 is a 6" A13 tablet / lcd ereader. It features a 6" 480x800 ips
lcd screen, 512MB RAM & 4GB emmc.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Thu, 19 Feb 2015 19:34:32 +0000 (20:34 +0100)]
sunxi: mmc: Always declare High Capacity capability
High Capacity (e)MMC cards work fine on sun4i / sun5i, and not having this
capability set causes u-boot to not recognize the eMMC on an Utoo P66 A13
tablet, so always set it thereby fixing this.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Stephen Warren [Mon, 16 Feb 2015 19:16:15 +0000 (12:16 -0700)]
rpi: add support for Raspberry Pi 2 model B
USB doesn't seem to work yet; the controller detects the on-board Hub/
Ethernet device but can't read the descriptors from it. I haven't
investigated yet.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Stephen Warren [Mon, 16 Feb 2015 19:16:14 +0000 (12:16 -0700)]
bcm2836 SoC support (used in Raspberry Pi 2 model B)
The bcm2835 and bcm2836 are essentially identical, except:
- The CPU is an ARM1176 v.s. a quad-core Cortex-A7.
- The physical address of many IO controllers has moved.
Rather than introducing a whole new bcm2836 value for $(SOC) or $(ARCH),
update the existing bcm2835 code to handle the minor differences, and
plumb it into the ARMv7 CPU architecture.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Stephen Warren [Mon, 16 Feb 2015 19:16:13 +0000 (12:16 -0700)]
bcm2835/rpi: add SPDX license tags for some files
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Masahiro Yamada [Fri, 20 Feb 2015 08:04:19 +0000 (17:04 +0900)]
ARM: prepare for including <mach/*.h>
This commit adds $(srctree)/arch/arm/$(machdirs)/include/mach to
the headers search path.
It allows us to replace "#include <asm/arch/foo.h>" with
"#include <mach/foo.h>". As "#include <asm/arch/foo.h>" is still
supported, we can modify each file one by one.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Fri, 20 Feb 2015 08:04:18 +0000 (17:04 +0900)]
ARM: keystone: move SoC headers to mach-keystone/include/mach
Move arch/arm/include/asm/arch-keystone/*
-> arch/arm/mach-keystone/include/mach/*
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>
Masahiro Yamada [Fri, 20 Feb 2015 08:04:17 +0000 (17:04 +0900)]
ARM: orion5x: move SoC headers to mach-orion5x/include/mach
Move arch/arm/include/asm/arch-orion5x/*
-> arch/arm/mach-orion5x/include/mach/*
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Masahiro Yamada [Fri, 20 Feb 2015 08:04:16 +0000 (17:04 +0900)]
ARM: nomadik: move SoC headers to mach-nomadik/include/mach
Move arch/arm/include/asm/arch-nomadik/*
-> arch/arm/mach-nomadik/include/mach/*
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Nomadik Linux Team <STN_WMM_nomadik_linux@list.st.com>
Cc: Alessandro Rubini <rubini@unipv.it>
Masahiro Yamada [Fri, 20 Feb 2015 08:04:15 +0000 (17:04 +0900)]
ARM: kirkwood: move SoC headers to mach-kirkwood/include/mach
Move arch/arm/include/asm/arch-kirkwood/*
-> arch/arm/mach-kirkwood/include/mach/*
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Stefan Roese <sr@denx.de>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Masahiro Yamada [Fri, 20 Feb 2015 08:04:14 +0000 (17:04 +0900)]
ARM: davinci: move SoC headers to mach-davinci/include/mach
Move arch/arm/include/asm/arch-davinci/*
-> arch/arm/mach-davinci/include/mach/*
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>
Masahiro Yamada [Fri, 20 Feb 2015 08:04:13 +0000 (17:04 +0900)]
ARM: at91: move SoC headers to mach-at91/include/mach
Move arch/arm/include/asm/arch-at91/*
-> arch/arm/mach-at91/include/mach/*
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
Masahiro Yamada [Fri, 20 Feb 2015 08:04:12 +0000 (17:04 +0900)]
kbuild: prepare for moving headers into mach-*/include/mach
In U-Boot, SoC-specific headers are placed in
arch/$(ARCH)/include/asm/arch-$(SOC) and a symbolic link to that
directory is created at the early stage of the build process.
Creating and removing a symbolic link during the build is not
preferred. In fact, Linux Kernel did away with include/asm-$(ARCH)
directories a long time time ago.
As for ARM, now it is possible to collect SoC sources into
arch/arm/mach-$(SOC). It is also reasonable to move SoC headers
into arch/arm/mach-$(SOC)/include/mach.
This commit prepares for that.
If the directory arch/$(ARCH)/mach-$(SOC)/include/mach exists,
a symbolic to that directory is created. Otherwise, a symbolic link
to arch/$(ARCH)/include/asm/arch-$(SOC) or arch-$(CPU) is created.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Fri, 20 Feb 2015 08:04:11 +0000 (17:04 +0900)]
ARM: keystone: move SoC sources to mach-keystone
Move
arch/arm/cpu/armv7/keystone/* -> arch/arm/mach-keystone/*
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>
Masahiro Yamada [Fri, 20 Feb 2015 08:04:10 +0000 (17:04 +0900)]
ARM: versatile: move SoC sources to mach-versatile
Move
arch/arm/cpu/arm926ejs/versatile/* -> arch/arm/mach-versatile/*
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Fri, 20 Feb 2015 08:04:09 +0000 (17:04 +0900)]
ARM: orion5x: move SoC sources to mach-orion5x
Move
arch/arm/cpu/arm926ejs/orion5x/* -> arch/arm/mach-orion5x/*
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Masahiro Yamada [Fri, 20 Feb 2015 08:04:08 +0000 (17:04 +0900)]
ARM: highbank: move SoC sources to mach-highbank
Move
arch/arm/cpu/armv7/highbank/* -> arch/arm/mach-highbank/*
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Rob Herring <robh@kernel.org>