zink: add ntv handling for geometry shader variables

these can reuse the unified loader codepath

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7139>

zink: handle shader io vars more generically for use with gs

geometry shaders have more inputs and use a lot of the same codepaths as
vertex shaders, so these changes add the inputs and remove checks for vertex-only
shaders

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7139>

zink: add some spirv_builder functions we'll be using for geometry shaders

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7139>

r600/sfn: Update state docu

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7142>

r600/sfn: Fix the parameter component type

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7142>

r600/sfn: Use register keep-alive also when scanning the shader

Temporaries don't appear in the mapping, so they are not in the initial
register list.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7142>

r600/sfn: fix remapping of deleted attributes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7142>

r600/sfn: use 32 bit bools

That's closer to what the driver actually does.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7142>

r600/sfn: use cacheless op for coherent image write

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7142>

r600/sfn: Handle mem barrier and image barrier by using ACK

When reading from and writing to the same image in a shader the
memory_barrier can possibly be handled by emitting an ack-write and then
wait for the ack when the memory barrier is set.

Not sure whow well this goes with the syncronization across all shader
invocations though.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7142>

r600/sfn: use shared pointer to GPR for FS sysvalues

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7142>

r600/sfn: Rework get_temp_register to return a smart pointer to GPRValue

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7142>

r600/sfn: fix mega fetch count for SSBO/Image atomics result fetch

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7142>

r600/sfn: Fix keepalive patch

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7142>

r600/sfn: Fix ssbo resource offset for buffer loads

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7142>

r600/sfn: Don't reuse registers for workgroup ID and local invocation ID

This fixes a number of compute shader tests. I'm not sure why though.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7142>

glsl: Initialize add_uniform_to_shader member var in constructor.

Fix defect reported by Coverity Scan.

Uninitialized pointer field (UNINIT_CTOR)
uninit_member: Non-static class member var is not initialized in
this constructor nor in any functions that it calls.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7121>

zink: fix stencil wrapping

this was using the wrong enums

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7176>

glsl: Initialize lower_ubo_reference_visitor members in constructor.

Fix defects reported by Coverity Scan.

Uninitialized pointer field (UNINIT_CTOR)
uninit_member: Non-static class member buffer_access_type is not
initialized in this constructor nor in any functions that it
calls.
uninit_member: Non-static class member uniform_block is not
initialized in this constructor nor in any functions that it
calls.
uninit_member: Non-static class member progress is not initialized
in this constructor nor in any functions that it calls.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7120>

v3dv: Fix assert using assign instead of compare.

Fix defect reported by Coverity Scan.

Assign instead of compare (PW.ASSIGN_WHERE_COMPARE_MEANT)
assign_where_compare_meant: use of "=" where "==" may have been intended

Fixes: c75846e674e8 ("v3dv: implement DRM modifier setup for WSI")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7124>

intel/fs: Handle nir_intrinsic_terminate

For terminate operation, jump the invocation without predicating on
the rest of the quad being disabled -- which is what is done for
demote and discard.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7150>

spirv: Handle SpvOpTerminateInvocation

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7150>

spirv: Update headers and metadata from latest Khronos commit

This corresponds to c43a43c7cc3af55910b9bec2a71e3e8a622443cf
(" Register the Xenia emulator as a generator (#171)") in
https://github.com/KhronosGroup/SPIRV-Headers.

Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7150>

nir: Add nir_intrinsic_terminate and nir_intrinsic_terminate_if

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7150>

aco: add missing SCC clobber in get_buffer_size

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: fcd6d832456 ("aco: fix imageSize()/textureSize() with large buffers on GFX8")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7162>

Revert "iris: Use the data cache for indirect UBO pulls"

This reverts commit 3b784370c376dbe642c2a8232169363d4fda0c02.

This fixes a 30% performance regression in Manhattan 3.1 on Icelake.

Fixes: 3b784370c376d "iris: Use the data cache for indirect UBO pulls"
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7173>

anv: Go back to using the sampler for UBO pulls

This functionally reverts b54d37a8676acbd725ef1817479f2630d3ea95be.

This fixes a 12% performance regression in DOOM (2016) on Tigerlake.

Fixes: b54d37a8676a "anv: Use the data cache for indirect UBO..."
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7173>

vc4: Enable nir_lower_io for uniforms

Altough the driver isn't expected to receive nir_var_uniform types
from GLSL this happens currently for one of the internal driver shaders.

At vc4_get_yuv_fs at vc4_blit.c there is a "stride" nir_var_uniform
variable that needs to be lowered so the shader can be compiled.

This regression was affecting several piglit tests under
spec/ext_image_dma_buf_import and at least MythTV application.

Fixes: 96d99f2eccb ("vc4: Only call nir_lower_io on shader_in/out")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3536
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Piotr Oniszczuk <piotr.oniszczuk@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7160>

vc4: Add missing range_base/range at nir_load_ubos in yuv_blit fs.

Fixes: f3b33a5a35e ("nir: Add a range_base+range to nir_intrinsic_load_ubo().")
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Piotr Oniszczuk <piotr.oniszczuk@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7160>

vc4: Add missing load_ubo set_align in yuv_blit fs.

Fixes: e78a7a18252 ("nir: Assert memory loads are aligned")
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Piotr Oniszczuk <piotr.oniszczuk@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7160>

nir/opt_load_store_vectorize: add some tests for discard/demote behaviour

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7163>

nir/opt_load_store_vectorize: don't vectorize stores across demote

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Fixes: ce9205c03bd ("nir: add a load/store vectorization pass")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7163>

intel: Remove Gen10-specific device entries

The enables removal of gen_device_info::is_cannonlake.

v2: Remove GEN10_FEATURES and GEN10_HW_INFO macros.  Suggested by
Lionel.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6899>

intel: Remove Gen10-speicific perf support

v2: Also update Makefile.sources and Android build files.  Noticed by
Lionel.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Suggested-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6899>

anv: Don't generate Gen10-specific functions

v2: Re-wrap lines in meson.build.  Suggested by Jason.

v3: Also update Makefile.sources and Android build files.  Noticed by
Lionel.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> [v2]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6899>

iris: Don't generate Gen10-specific functions

v2: Also update Makefile.sources and Android build files.  Noticed by
Lionel.  Remove more stuff from iris_context.h.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> [v1]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6899>

intel/isl: Don't generate Gen10-specific functions

v2: Also update Makefile.sources and Android build files.  Noticed by
Lionel.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> [v1]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6899>

intel: Remove Gen10-specific cache config code

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6899>

i965: Don't build Gen10-specific files and libraries

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6899>

i965: Remove Gen10-specific state setup and workarounds

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6899>

intel/compiler: Remove Gen10-specific code

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6899>

intel: Disable all support for Gen10

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6899>

i965: Rename gen10_emit_isp_disable to gen7_emit_isp_disable

It's used on Gen7+, and there's nothing Gen10-specific about it.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6899>

i965: Make MOCS index tables static const

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6899>

i965: Silence many unused parameter warnings in genX_state_upload.c

This file gets built per-Gen, so the warnings are repeated a lot.

src/mesa/drivers/dri/i965/genX_state_upload.c: In function ‘vf_invalidate_for_vb_48bit_transitions’:
src/mesa/drivers/dri/i965/genX_state_upload.c:405:60: warning: unused parameter ‘brw’ [-Wunused-parameter]
  405 | vf_invalidate_for_vb_48bit_transitions(struct brw_context *brw)
      |                                        ~~~~~~~~~~~~~~~~~~~~^~~
src/mesa/drivers/dri/i965/genX_state_upload.c: In function ‘vf_invalidate_for_ib_48bit_transition’:
src/mesa/drivers/dri/i965/genX_state_upload.c:444:59: warning: unused parameter ‘brw’ [-Wunused-parameter]
  444 | vf_invalidate_for_ib_48bit_transition(struct brw_context *brw)
      |                                       ~~~~~~~~~~~~~~~~~~~~^~~
src/mesa/drivers/dri/i965/genX_state_upload.c: In function ‘gen4_upload_default_color’:
src/mesa/drivers/dri/i965/genX_state_upload.c:4951:40: warning: unused parameter ‘format’ [-Wunused-parameter]
 4951 |                            mesa_format format, GLenum base_format,
      |                            ~~~~~~~~~~~~^~~~~~

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6899>

i965: Silence many unused parameter warnings in genX_blorp_exec.c

This file gets built per-Gen, so the warnings are repeated a lot.

src/mesa/drivers/dri/i965/genX_blorp_exec.c: In function ‘blorp_get_surface_address’:
src/mesa/drivers/dri/i965/genX_blorp_exec.c:98:47: warning: unused parameter ‘blorp_batch’ [-Wunused-parameter]
   98 | blorp_get_surface_address(struct blorp_batch *blorp_batch,
      |                           ~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~
src/mesa/drivers/dri/i965/genX_blorp_exec.c:99:48: warning: unused parameter ‘address’ [-Wunused-parameter]
   99 |                           struct blorp_address address)
      |                           ~~~~~~~~~~~~~~~~~~~~~^~~~~~~
src/mesa/drivers/dri/i965/genX_blorp_exec.c: In function ‘blorp_vf_invalidate_for_vb_48b_transitions’:
src/mesa/drivers/dri/i965/genX_blorp_exec.c:208:64: warning: unused parameter ‘batch’ [-Wunused-parameter]
  208 | blorp_vf_invalidate_for_vb_48b_transitions(struct blorp_batch *batch,
      |                                            ~~~~~~~~~~~~~~~~~~~~^~~~~
src/mesa/drivers/dri/i965/genX_blorp_exec.c:209:72: warning: unused parameter ‘addrs’ [-Wunused-parameter]
  209 |                                            const struct blorp_address *addrs,
      |                                            ~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~
src/mesa/drivers/dri/i965/genX_blorp_exec.c:211:53: warning: unused parameter ‘num_vbs’ [-Wunused-parameter]
  211 |                                            unsigned num_vbs)
      |                                            ~~~~~~~~~^~~~~~~

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6899>

intel: Silence many unused parameter warnings in blorp_genX_exec.h

I considered a couple other options (including adding #if / #endif
around UNUSED and adding an UNUSED_ON_SOME_GEN), but this seemed the
best.  There was also at least one other case of having UNUSED on a
paramter that is sometimes unused (params in
blorp_emit_color_calc_state).

This header gets included in a lot of places (esp. in files that get
built per-Gen), so the warnings are repeated a lot.

In file included from src/mesa/drivers/dri/i965/genX_blorp_exec.c:33:
src/intel/blorp/blorp_genX_exec.h: In function ‘emit_urb_config’:
src/intel/blorp/blorp_genX_exec.h:193:48: warning: unused parameter ‘deref_block_size’ [-Wunused-parameter]
  193 |                 enum gen_urb_deref_block_size *deref_block_size)
      |                 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~
src/intel/blorp/blorp_genX_exec.h: In function ‘blorp_fill_vertex_buffer_state’:
src/intel/blorp/blorp_genX_exec.h:350:52: warning: unused parameter ‘batch’ [-Wunused-parameter]
  350 | blorp_fill_vertex_buffer_state(struct blorp_batch *batch,
      |                                ~~~~~~~~~~~~~~~~~~~~^~~~~
src/intel/blorp/blorp_genX_exec.h: In function ‘blorp_emit_surface_state’:
src/intel/blorp/blorp_genX_exec.h:1403:42: warning: unused parameter ‘aux_op’ [-Wunused-parameter]
 1403 |                          enum isl_aux_op aux_op,
      |                          ~~~~~~~~~~~~~~~~^~~~~~
src/intel/blorp/blorp_genX_exec.h: In function ‘blorp_update_clear_color’:
src/intel/blorp/blorp_genX_exec.h:1867:46: warning: unused parameter ‘batch’ [-Wunused-parameter]
 1867 | blorp_update_clear_color(struct blorp_batch *batch,
      |                          ~~~~~~~~~~~~~~~~~~~~^~~~~

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6899>

i965: Allow viewport array extensions with allow_higher_compat_version

Also fix the obtuse comment.  I had to dig back through the commit logs
to find the real issue.  GL_ARB_viewport_array requires geometry
shaders, and in i965 the only way to have that is with a 3.2+ Core
profile context... or use allow_higher_compat_version.

This increases the maximum Compatibility profile version from 4.0 to 4.6
(on supported hardware) when the allow_higher_compat_version option is
used.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7118>

ci: Unskip fragment_ops tests on Bifrost

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7165>

zink: add last few format maps for ARB_vertex_type_2_10_10_10_rev

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7140>

zink: add VK_BUFFER_USAGE_INDEX_BUFFER_BIT to vertex buffer creation

these can be mixed vertex/index buffers, and there's not really any way
to know in advance

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7132>

zink: handle null attachment for ARB_texture_buffer_object samplers

according to spec:

If no buffer object is bound to the buffer texture,
the results of the texel access are undefined.

so this is technically allowed

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7132>

zink: assert valid format in zink_create_sampler_view()

catch issues higher up the stack here

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7132>

zink: ensure resource tracking for sampler buffers in render batches

this fixes some synchronization issues when using e.g., buffer textures
that change their data repeatedly

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7132>

zink: implement ARB_texture_buffer_object

the pipe cap for this was enabled for some reason, but the actual functionality
was never implemented

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7132>

zink: increase descriptor pool sizes for other descriptor types we'll be using

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7132>

glsl: more accurately handle swizzle in 64bit varying split with no left value

as implied in the surrounding code, left_components can be 0 here, in which
case creating a left swizzle is unnecessary (and triggers an assert)

this moves a failing assert farther down the stack to a more useful location
when trying to pack e.g., struct[3] { dvec3; float; }

ref spec@arb_gpu_shader_fp64@execution@inout@vs-out-fs-in-s1-s2@3-dvec2-float

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7134>

aco: don't use v_pack_b32_f16 if 16-bit input denormals are flushed

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7111>

aco: propagate literals into sub-dword pseudo instructions on GFX9+

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7111>

aco: implement 16-bit literals

We can copy any value into a 16-bit subregister with a 3 dword
v_pack_b32_f16 on GFX10 or a v_and_b32+v_or_b32 on GFX9.

Because the generated code can depend on the register assignment and to
improve constant propagation, Builder::copy creates a p_create_vector in
the case of sub-dword literals.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7111>

panfrost: Add blend shader support to bifrost

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7151>

panfrost: Add missing tile-buffer formats to the format enum

Some tile-buffer formats are missing, add them.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7151>

pan/bi: Special-case load_input for blend shaders

Blend shaders are passed blend inputs through r0-r3. Let's emit a MOV
from those register when we see a load_input intrinsic.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7151>

pan/bi: Reserve r0-r3 in blend shaders

Blend shaders are passed the source color through r0-r3. Let's avoid
allocating those. The is definitely not the right solution but is good
enough for now.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7151>

pan/bi: Special-case BLEND instruction emission for blend shaders

Blend shaders shouldn't use the blend descriptors stored in the FAU RAM
since this is what triggered the blend shader call in the first place.
The descriptor is instead extracted from the compiler inputs and passed
as a constant to the blend instruction.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7151>

pan/bi: Collect return addresses of blend calls

We will need that for blend shaders so they can be passed a return
address and jump back to the fragment shader when they're done.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7151>

pan/bi: Add load_output support

This is mapped to the LD_TILE instruction. Note that multi-sample RTs
are not supported yet.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7151>

panfrost: Flag blend shader function as an entry point

Some lowering functions used by bifrost are searching for an entry point.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7151>

panfrost: Scalarize nir_load_blend_const_color_rgba

Bifrost is a scalar architecture, which means we can't load all
components of the blend constant at once. We could add a lowering pass
to scalarize nir_load_blend_const_color_rgba, but it's easier to handle
that at when lowering the blend equations.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7151>

panfrost: Add a "Bifrost Internal Blend" descriptor

This descriptor can be passed directly as a constant to the bifrost
BLEND instruction and we'll need to pass this information to blend
shaders. Let's extract the "Bifrost Internal Blend" descriptor from the
"Bifrost Blend Overlay" definition.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7151>

pan/bi: Support indirect jumps

We need that for blend shaders which are passed the return address
through r48.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7151>

pan/bi: Add support for load_blend_const_color_{r,g,b,a}_float

Needed for blend shaders.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7151>

pan/bi: Rework blend descriptor access handling

The current logic assumes blend descriptors are always retrieved from
the blend descriptor slots present in the FAU RAM, but this assumption
no longer stands when we add blend shaders to the mix. In that case we
need to use an 'opaque blend' whose descriptor is passed through
embedded constants.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7151>

pan/bi: Get rid of the regs argument in bi_assign_fau_idx()

Regs are already part of the bundle struct, let's just pass a pointer
to this bundle object instead of passing both the bundle and regs.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7151>

pan/bi: Use canonical name for FAU RAM sources

The uniform_constant field and BIFROST_SRC_CONST_{LO,HI} definitions
seem to imply that those only deal with embedded constants. Let's
rename them to reflect the fact that they actually encode accesses to
the Fast-Access-Uniform RAM.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7151>

pan/bi: Copy blend shader info from compile_inputs

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7151>

panfrost: Extend compile_inputs to pass a blend descriptor

This is needed for BLEND instructions used from a blend shader so we can
store the result of the shader-based blending back to the tile buffer.
We let the gallium driver build this blend descriptor for us in order
to keep the compiler cmdstream-agnostic.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7151>

panfrost: Fix fixed-function blend on bifrost

The conversion from a 32b float to a 16b fixed-point number was wrong.

Fixes: 8389976b7c09 ("panfrost: XML-ify the blend descriptors")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7151>

v3d/compiler: implement load interpolated input intrinsics

We will lower GLSL interpolateAt functions to these.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Acked-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7155>

broadcom/compiler: track partially interpolated fragment inputs

We will need these to implement GLSL's interpolateAt*() functions where
we are required to perform interpolation in the shader at arbitrary
offsets.

Acked-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7155>

iris: Fix doubling of shared local memory (SLM) sizes.

Commit 67ee9c5f5537fe85357556a4322a07253d13a697 added support for
using the `pipe_compute_state::req_local_mem` field, because Clover
can have a run-time specified size that isn't baked into the shaders.

However, it started adding the static size from the shader to the
dynamic state-supplied size.  The Mesa state tracker fills out
req_local_mem to prog->Base.info.cs.shared_size, which is exactly
what we fill out prog_data->total_shared to be.  Effectively, this
meant that we double-counted the same SLM requirements, doubling
our space requirements.

Fixes a 10% performance regression in Synmark2's OglCSDof test.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7152>

intel/compiler, anv: Delete cs_prog_data->slm_size

cs_prog_data->slm_size is basically redundant with
prog_data->total_shared, which is the field that we actually use for
controlling the shared local memory size in all drivers.  We were
still using it in one place for VK_EXT_pipeline_executable_properties,
but we should just fix that and delete the field.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7152>

broadcom/compiler: use nir io semantics

This allows to clean up some code.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6721>

nir/lower_io_to_scalar: update io semantics on per-component inst

When we replace the original instruction with per-channel operations,
the new instruction should inherint the semantics of the original
instruction.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6721>

broadcom/compiler: support varyings with struct types

This adds support for using structs as outputs from vertex shaders and
inputs to fragment shaders.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6721>

docs/release-calendar: plan 20.3 release

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6616>

intel/fs: Allow constant-propagation into SAMPLEINFO and IMAGE_SIZE

Without this, we end up with indirect sampler messages all the time
because we don't propagate the texture/image BTI.  This makes debugging
shaders with imageSize or textureSamples in them a pain.

Shader-db results on Ice Lake:

    total instructions in shared programs: 19720612 -> 19720564 (<.01%)
    instructions in affected programs: 4998 -> 4950 (-0.96%)
    helped: 12
    HURT: 0

All affected shaders were compute shaders in Deus Ex: Mankind Divided.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6794>

docs: update calendar and link releases notes for 20.1.10

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7147>

docs: add release notes for 20.1.10

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7147>

isl: Allow CCS for 8bpp surfaces with 3+ miplevels

I can't find a restriction for enabling CCS on these surfaces in recent
versions of the Bspec. Since I didn't cite my source, I'm not even sure
such a restriction existed in the first place.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7085>

iris: Add fast-clear restriction for 8bpp surfaces

For 8bpp surfaces on TGL, prevent LOD1+ from being fast-cleared. This
will be relevant once ISL starts allowing CCS for 8bpp surfaces with
more than 2 miplevels. I verified the problem behind this restriction
with a modified version of the fbo-clearmipmap piglit test.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7085>

docs: update calendar and link releases notes for 20.2.1

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7141>

docs: add SHA256 sums for 20.2.1

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7141>

docs: add release notes for 20.2.1

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7141>

radv: fix optimizing needed states if some are marked as dynamic

From the Vulkan spec 1.2.157:

    "VK_DYNAMIC_STATE_STENCIL_TEST_ENABLE_EXT specifies that the
     stencilTestEnable state in VkPipelineDepthStencilStateCreateInfo
     will be ignored and must be set dynamically with
     vkCmdSetStencilTestEnableEXT before any draw call."

So, stencilTestEnable should be ignored if dynamic. While we are
at it, fix depthBoundsTestEnable too.

Cc: 20.2
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3633
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7112>

docs: Document how to replicate a CI build locally.

Who hasn't needed to do this at some point?  Turns out it's not too hard
to do, and was useful for me in iterating on the Android build.

Acked-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6700>

ci/android: Switch to using the Android NDK.

To support Android drivers, we're going to want to be tracking that Mesa's
build succeeds on a real android toolchain.  This still uses the android
stubs since these libs aren't in the NDK.

Note that I had to drop the Intel and AMD drivers currently: we don't have
LLVM cross-compiled for Android in this container, and I'm honestly hoping
ACO saves us from that.  Intel has dependencies on libexpat, which AOSP
really doesn't want to bring in, and it looks to me like those dependencies
could be optional.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6700>

symbols-check: Add __cxa_guard_* to the list of approved symbols.

These are introduced by the compiler during static local initialization in
c++ for thread safety.  This seems to end up being public in the driver
with --static-libc++ on android.

Reviewed-by: <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6700>

glsl/tests: Make the tests skip on Android binary execution failures.

We don't have a suitable exe wrapper for running them, and the missing
linker is throwing return code 255 instead of an ENOEXEC.  Catch it and
return skip from the tests.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6700>

meson: Drop adding -Wl,--gc-sections to project c/cpp arguments.

We already have the targets we care about doing this using
ld_args_gc_sections, and by adding it to project arguments we caused
warnings spam in the android clang build about the compile stage not using
the argument.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6700>