Marek Olšák [Tue, 26 Sep 2017 13:30:34 +0000 (15:30 +0200)]
radeonsi: use si_get_indirect_index for CONST indexing
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Thu, 28 Sep 2017 19:45:51 +0000 (21:45 +0200)]
tgsi/ureg: allow any register file in address operands
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 26 Sep 2017 13:56:15 +0000 (15:56 +0200)]
gallium: add PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 26 Sep 2017 14:17:47 +0000 (16:17 +0200)]
tgsi/scan: scan address operands (v2)
v2: set swizzled usage mask
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Mon, 2 Oct 2017 18:35:15 +0000 (20:35 +0200)]
tgsi/scan: set correct usage mask for tex offsets in scan_src_operand
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Mon, 2 Oct 2017 17:59:22 +0000 (19:59 +0200)]
tgsi/scan: take advantage of already swizzled usage mask in scan_src_operand
It has always been a usage mask *after* swizzling.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Mon, 2 Oct 2017 17:51:16 +0000 (19:51 +0200)]
tgsi/scan: set non-valid src_index for tex offsets in scan_src_operand
tex offsets are not "Src" operands.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Mon, 2 Oct 2017 20:30:55 +0000 (22:30 +0200)]
tgsi: implement tgsi_util_get_inst_usage_mask properly
All opcodes are handled.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Mon, 2 Oct 2017 20:28:46 +0000 (22:28 +0200)]
tgsi: add docs for some existing pack opcodes
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Bas Nieuwenhuizen [Thu, 5 Oct 2017 23:12:48 +0000 (01:12 +0200)]
radv: Enable VK_KHR_maintenance2 extension.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Thu, 5 Oct 2017 23:10:44 +0000 (01:10 +0200)]
radv: Make tess winding order a bit more intuitive.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Thu, 5 Oct 2017 23:10:11 +0000 (01:10 +0200)]
radv: Allow setting the domain origin in tess.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Thu, 5 Oct 2017 22:55:57 +0000 (00:55 +0200)]
radv: Disable usage checks in metadata for images with extended usage data.
The app can extend the usage, so knowing that the usage is limitied
does not help us here.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Thu, 5 Oct 2017 22:50:15 +0000 (00:50 +0200)]
radv: Implement querying the point clipping behavior.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Daniel Stone [Wed, 27 Sep 2017 17:42:22 +0000 (18:42 +0100)]
broadcom: Fix out-of-tree build include path
Reviewed-by: Eric Anholt <eric@anholt.net>
Fixes:
5b102160ae ("broadcom/genxml: Introduce a V3D packet/struct decoder.")
Bas Nieuwenhuizen [Thu, 5 Oct 2017 19:31:29 +0000 (21:31 +0200)]
meson: generate builddir/src/amd/vulkan/dev_icd.json
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Kenneth Graunke [Wed, 4 Oct 2017 08:08:37 +0000 (01:08 -0700)]
mesa: Use a 565 format for GL_RGB and GL_UNSIGNED_SHORT_5_6_5 textures.
Found while trying to optimize an application.
Not observed to help performance on i965, but should at least reduce
the memory usage of such textures a bit.
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Eero Tamminen <eero.t.tamminen@intel.com>
Jason Ekstrand [Wed, 4 Oct 2017 20:20:52 +0000 (13:20 -0700)]
intel/compiler: Don't propagate cmod into integer multiplies
No shader-db change on Sky Lake.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
Jason Ekstrand [Wed, 4 Oct 2017 20:49:29 +0000 (13:49 -0700)]
intel/compiler: Don't cmod propagate into a saturated operation
Shader-db results on Sky Lake:
total instructions in shared programs:
12954445 ->
12955125 (0.01%)
instructions in affected programs: 141862 -> 142542 (0.48%)
helped: 0
HURT: 626
Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
Derek Foreman [Thu, 5 Oct 2017 17:41:08 +0000 (12:41 -0500)]
broadcom/vc4: Don't advertise tiled dmabuf modifiers if we can't use them
If the DRM_VC4_GET_TILING ioctl isn't present then we can't tell
if a dmabuf bo is tiled or linear, so will always assume it's
linear.
By not advertising tiled formats in this situation we ensure the
assumption is correct.
This fixes a bug where most attempts to render a gl wayland client
under weston will result in a client side abort.
Signed-off-by: Derek Foreman <derekf@osg.samsung.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Daniel Stone <daniels@collabora.com> (on irc)
Adam Jackson [Mon, 28 Aug 2017 15:23:58 +0000 (11:23 -0400)]
egl: Simplify the "driver" interface
"Driver" isn't a great word for what this layer is, it's effectively a
build-time choice about what OS you're targeting. Despite that both of
the extant backends totally ignore the display argument, the old code
would only set up the backend relative to a display.
That causes problems! One problem is it means eglGetProcAddress can
generate X or Wayland protocol when it tries to connect to a default
display so it can call into the backend, which is, you know, completely
bonkers. Any other EGL API that doesn't reference a display, like
EGL_EXT_device_query, would have the same issue.
Fortunately this is a problem that can be solved with the delete key.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Adam Jackson <ajax@redhat.com>
Thomas Hellstrom [Thu, 14 Sep 2017 11:09:05 +0000 (13:09 +0200)]
loader/dri3: Don't accidently free buffer holding new back content
Avoid freeing buffers holding new back content
(with GLX_SWAP_COPY_OML and GLX_SWAP_EXCHANGE_OML)
Prevously that would have resulted in back buffer content becoming
incorrect after a swap, although I haven't managed to trigger such a
situation yet.
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Thomas Hellstrom [Thu, 14 Sep 2017 10:39:18 +0000 (12:39 +0200)]
loader/dri3: Avoid resizing existing buffers in dri3_find_back_alloc
Resize only in loader_dri3_get_buffers(),
where the dri driver has a chance to immediately update the viewport.
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Thomas Hellstrom [Thu, 14 Sep 2017 10:15:43 +0000 (12:15 +0200)]
loader/dri3: Use local blits and local buffers when resizing
When a drawable is resized, and we fill the resized buffers, with data
from the old buffers, use a local blit if there is a local buffer (back or
fake front), and we have local blitting capability.
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Ben Crocker [Thu, 28 Sep 2017 18:09:13 +0000 (14:09 -0400)]
gallivm/ppc64le: allow environmental control of Altivec code generation
In check_os_altivec_support(), allow control of Altivec (first PPC vector
instruction set) code generation via a new environmental control,
GALLIVM_ALTIVEC, which is expected to take on a value of 1 or 0.
The default is to enable Altivec code generation.
This environmental control of Altivec code generation is initially
available only #ifdef DEBUG.
Cc: "17.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Ben Crocker <bcrocker@redhat.com>
Acked-by: Roland Scheidegger <sroland@vmware.com>
Ben Crocker [Thu, 28 Sep 2017 18:09:12 +0000 (14:09 -0400)]
gallivm/ppc64le: adjust VSX code generation control.
In lp_build_create_jit_compiler_for_module(), advance the minimum
version of LLVM for VSX code generation to 4.0; this is the minimum
revision at which several known VSX code generation bugs are fixed:
https://llvm.org/bugs/show_bug.cgi?id=25503 (fixed in 3.8.1)
https://llvm.org/bugs/show_bug.cgi?id=26775 (fixed in 3.8.1)
https://llvm.org/bugs/show_bug.cgi?id=33531 (fixed in 4.0)
An llc performance bug introduced in LLVM 4.0,
https://llvm.org/bugs/show_bug.cgi?id=34647
is still pending as of LLVM 5.0, but only has a pronounced effect on
one of the Piglit tests: ext_transform_feedback-max-varyings.
All changes tested via Piglit.
Cc: "17.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Ben Crocker <bcrocker@redhat.com>
Acked-by: Roland Scheidegger <sroland@vmware.com>
Ben Crocker [Thu, 28 Sep 2017 18:09:11 +0000 (14:09 -0400)]
gallivm: allow additional llc options
In init_native_targets, allow the passing of additional options to
the LLC compiler via new GALLIVM_LLC_OPTIONS environmental control.
This option is available only #ifdef DEBUG, initially.
At top, add #include <llvm-c/Support.h> for LLVMParseCommandLineOptions()
declaration.
v2: Fix compile error with old llvm versions (sroland)
Cc: "17.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Ben Crocker <bcrocker@redhat.com>
Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Ben Crocker [Thu, 28 Sep 2017 18:09:10 +0000 (14:09 -0400)]
gallivm: fix typo in debug_printf message
In gallivm_compile_module, fix a typo in the
debug_printf("Invoke as \"llc ..." message.
Cc: "17.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Ben Crocker <bcrocker@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Samuel Pitoiset [Wed, 4 Oct 2017 20:27:39 +0000 (22:27 +0200)]
radv: remove useless checks around radv_CmdBindPipeline()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Wed, 4 Oct 2017 20:27:38 +0000 (22:27 +0200)]
radv: check that pipeline is different before binding it
We only need to dirty the descriptors when the pipeline is
a new one, because user SGPRs can be potentially different.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Matt Turner [Wed, 30 Aug 2017 01:29:29 +0000 (18:29 -0700)]
i965: Validate "Special Requirements for Handling Double Precision Data Types"
I did not implement:
CNL's restriction on 64-bit int + align16, because I don't think
we'll ever use this combination regardless of hardware generation.
The restriction on immediate DF -> F conversions, because there's no
reason to ever generate that, and I don't even know how DF -> F
conversions are supposed to work in Align16 since (1) the dst stride
must be 1, but (2) the dst stride would have to be 2 for src and dst
strides to be aligned.
Matt Turner [Fri, 1 Sep 2017 22:22:40 +0000 (15:22 -0700)]
i965: Fix and enable forgotten validation test
I seem to have forgotten I still had work to do.
Matt Turner [Mon, 18 Sep 2017 21:07:20 +0000 (14:07 -0700)]
i965: Only insert error message if not already present
Some restrictions require something like strides to match between src
and dest. For multi-source instructions, I'd rather encapsulate the
logic for not inserting already present errors in ERROR_IF than
open-coding it multiple places.
Matt Turner [Fri, 1 Sep 2017 22:21:48 +0000 (15:21 -0700)]
i965: Avoid validation error when src1 is not present
There can be no violation of the restriction that source offsets are
aligned if there is only one source offset.
Matt Turner [Mon, 11 Sep 2017 17:08:59 +0000 (10:08 -0700)]
i965: Remove validate_reg()
Replaced by the assembly validator, and in fact gets in the way of
writing tests for the assembly validator.
Matt Turner [Wed, 30 Aug 2017 01:25:54 +0000 (18:25 -0700)]
i965: Add and use STRIDE and WIDTH macros
You'll notice there were bugs in some of the code being replaced.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Matt Turner [Fri, 1 Sep 2017 22:34:54 +0000 (15:34 -0700)]
i965: Add parentheses around usage of macro arguments
Otherwise I cannot use this macro in test_eu_validate.cpp
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Matt Turner [Wed, 30 Aug 2017 22:45:22 +0000 (15:45 -0700)]
i965: Add GLK, CFL, CNL to test_eu_validate.c
Matt Turner [Tue, 29 Aug 2017 22:32:11 +0000 (15:32 -0700)]
i965: Add Atom graphics names to parse_devid_override()
Matt Turner [Thu, 21 Sep 2017 20:52:28 +0000 (13:52 -0700)]
i965: Fix support for disassembling 64-bit integer immediates
The type suffixes were wrong, and the 16 was missing the 0 prefix.
Fixes:
92f787ff86ab ("i965: Add support for disassembling 64-bit integer immediates")
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Matt Turner [Fri, 29 Sep 2017 03:59:49 +0000 (20:59 -0700)]
i965/fs: Rewrite fsign64 to skip the float -> double conversion
... without the float -> double conversion. Low power parts have
additional restrictions when it comes to operating on 64-bit types, and
the instruction used to do the conversion violates one of them:
specifically, the restriction that "Source and Destination horizontal
stride must be aligned to the same qword".
Previously we generated a float and then converted, but we can avoid the
conversion by using the same extract-the-sign-bit + or-in-1.0 algorithm
by directly operating on the high four bytes of each double-precision
component in the result.
In SIMD8 and SIMD16 this cuts one instruction from the implementation,
and more importantly that instruction is the one which violated the
regioning restriction.
Along the way I removed some comments that I did not think helped, and
some code about double comparisons which does not seem to be necessary
today.
This prevents validation failures caught by the new EU validation code
added in later patches.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Matt Turner [Thu, 21 Sep 2017 23:42:02 +0000 (16:42 -0700)]
i965/fs: Unpack count argument to 64-bit shift ops on Atom
64-bit operations on Atom parts have additional restrictions over their
big-core counterparts (validated by later patches).
Specifically, the restriction that "Source and Destination horizontal
stride must be aligned to the same qword" is violated by most shift
operations since NIR uses a 32-bit value as the shift count argument,
and this causes instructions like
shl(8) g19<1>Q g5<4,4,1>Q g23<4,4,1>UD
where src1 has a 32-bit stride, but the dest and src0 have a 64-bit
stride.
This caused ~4 pixels in the ARB_shader_ballot piglit test
fs-readInvocation-uint.shader_test to be incorrect. Unfortunately no
ARB_gpu_shader_int64 test hit this case because they operate on
uniforms, and their scalar regions are an exception to the restriction.
We work around this by effectively unpacking the shift count, so that we
can read it with a 64-bit stride in the shift instruction. Unfortunately
the unpack (a MOV with a dst stride of 2) is a partial write, and cannot
be copy-propagated or CSE'd.
Bugzilla: https://bugs.freedesktop.org/101984
Matt Turner [Fri, 25 Aug 2017 22:52:27 +0000 (15:52 -0700)]
i965/fs: Don't apply POW/FDIV workaround on Gen10+
The documentation says it applies only to Gens 8 and 9.
Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
Matt Turner [Tue, 3 Oct 2017 05:15:07 +0000 (22:15 -0700)]
i965: Fix src0 vs src1 typo
A typo caused us to copy src0's reg file to src1 rather than reading
src1's as intended. This caused us to fail to compact instructions like
mov(8) g4<1>D 0D { align1 1Q };
because src1 was set to immediate rather than architecture file. Fixing
this reenables compaction (after the precompact() pass changes the data
types):
mov(8) g4<1>UD 0x00000000UD { align1 1Q compacted };
Fixes:
1cb0a7941b27 ("i965: Switch to using the logical register types")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Dave Airlie [Tue, 13 Jun 2017 03:31:14 +0000 (13:31 +1000)]
radv: enable tc compatible htile for d32s8 also.
This enables tc compatible htile for stencil surfaces as well.
This gives a 3-5fps boost on Mad Max on high@4k.
It also depends on Bas's tc-compat htile patch.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Samuel Pitoiset [Fri, 22 Sep 2017 14:56:40 +0000 (16:56 +0200)]
radv: dump SPIRV when a GPU hang is detected
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Fri, 22 Sep 2017 14:44:08 +0000 (16:44 +0200)]
radv: dump NIR when a GPU hang is detected
This looks a bit ugly to me, but the existing codepath
is not terribly elegant as well.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Marek Olšák [Wed, 4 Oct 2017 14:59:40 +0000 (16:59 +0200)]
ac: silence a warning
Daniel Stone [Mon, 2 Oct 2017 15:40:53 +0000 (16:40 +0100)]
egl/wayland: Don't use dmabuf with no modifiers
The dmabuf interface requires a valid modifier to be sent. If we don't
explicitly get a modifier from the driver, we can't know what to send;
it must be inferred from legacy side-channels (or assumed to linear, if
none exists).
If we have no modifier, then we can only have a single-plane format
anyway, so fall back to the old wl_drm buffer import path.
Fixes:
a65db0ad1c ("st/dri: don't expose modifiers in EGL if the driver doesn't implement them")
Fixes:
02cc359372 ("egl/wayland: Use linux-dmabuf interface for buffers")
Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reported-by: Andy Furniss <adf.lists@gmail.com>
Cc: Marek Olšák <marek.olsak@amd.com>
Daniel Stone [Mon, 2 Oct 2017 15:40:53 +0000 (16:40 +0100)]
egl/wayland: Check queryImage return for wl_buffer
When creating a wl_buffer from a DRIImage, we extract all the DRIImage
information via queryImage. Check whether or not it actually succeeds,
either bailing out if the query was critical, or providing sensible
fallbacks for information which was not available in older DRIImage
versions.
Fixes:
a65db0ad1c ("st/dri: don't expose modifiers in EGL if the driver doesn't implement them")
Fixes:
02cc359372 ("egl/wayland: Use linux-dmabuf interface for buffers")
Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reported-by: Andy Furniss <adf.lists@gmail.com>
Cc: Marek Olšák <marek.olsak@amd.com>
Eric Engestrom [Wed, 4 Oct 2017 12:54:14 +0000 (13:54 +0100)]
travis: move include path from $CC to $CFLAGS
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tobias Klausmann [Tue, 3 Oct 2017 13:45:22 +0000 (15:45 +0200)]
wayland-egl: adds CFLAGS for wayland.egl.h include
Starting with commit
ab0589c6ed ("wayland-egl: remove no longer needed
wayland-client dependency") the wayland-egl.h include was missing leading to a
build failure:
CC wayland-egl.lo
wayland-egl.c:33:10: fatal error: wayland-egl.h: No such file or directory
#include "wayland-egl.h"
^~~~~~~~~~~~~~~
Strictly speaking we should be checking for wayland-egl in configure and
propagating its CFLAGS here.
Yet again, the current wayland-egl split is bonkers as the Wayland repo
provides single header, no pkg-config file or library.
That will be resolved at a later stage, but in the meanwhile fix the
build.
Fixes:
ab0589c6ed ("wayland-egl: remove no longer needed wayland-client
dependency")
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
[Emil Velikov: add some text about CFLAGS and current wayland-egl situation]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Wed, 4 Oct 2017 13:21:40 +0000 (14:21 +0100)]
automake: add texcompress_s3tc_tmp.h to the sources list
Otherwise it will be missing from the tarball.
Fixes:
f7daa737d17 ("mesa: Combine libtxc_dxtn sources into
texcompress_s3tc_tmp.h")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Leo Liu [Mon, 2 Oct 2017 01:27:21 +0000 (21:27 -0400)]
st/va: add RGB support to vlVaPutSurface
Tested-by: Andy Furniss <adf.lists@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Leo Liu [Mon, 2 Oct 2017 01:27:20 +0000 (21:27 -0400)]
st/va: don't re-allocate interlaced buffer with pakced format
It caused corruption, when vlVaPutImage putting raw data to the fields
v2: add RGB formats since it got uploaded here as well
Cc: mesa-stable@lists.freedesktop.org
Cc: Andy Furniss <adf.lists@gmail.com>
Tested-by: Andy Furniss <adf.lists@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Leo Liu [Sun, 1 Oct 2017 02:19:49 +0000 (22:19 -0400)]
st/vdpau: don't re-allocate interlaced buffer with packed YUV format
It caused corruption, when vlVdpVideoSurfacePutBitsYCbCr putting YUV to the fields
Cc: mesa-stable@lists.freedesktop.org
Cc: Andy Furniss <adf.lists@gmail.com>
Tested-by: Andy Furniss <adf.lists@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Bas Nieuwenhuizen [Tue, 9 May 2017 06:26:07 +0000 (08:26 +0200)]
radv: Implement TC compatible HTILE.
The situations where we enable it are quite limitied, but it works,
even for madmax, so lets just enable it.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Wed, 4 Oct 2017 02:06:04 +0000 (03:06 +0100)]
radv: emit fmuladd instead of fma to llvm.
For Vulkan SPIR-V the spec states
fma() Inherited from OpFMul followed by OpFAdd.
Matt says the backend will do the right thing depending on the
hardware being compiled for, if you use the fmuladd intrinsic.
Using the Mad Max pts test, on high settings at 4K:
CHP: 55->60
HGDD: 46->50
LM: 55->60
No change on Stronghold.
Thanks to Feral for spending the time to track this down.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "17.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Tapani Pälli [Tue, 3 Oct 2017 08:06:12 +0000 (11:06 +0300)]
android: fix build issues with brw_nir_trig_workarounds.c
Fixes:
848da66222 ("intel: use a flag instead of setting PYTHONPATH")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Lionel Landwerlin [Tue, 3 Oct 2017 15:05:07 +0000 (16:05 +0100)]
intel: compiler: vec4: add missing default 0 lod
We set a similar default value for LOD in the fs backend for TXS/TXL.
Without this we end up generating invalid MOV with a null src.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: "17.2 17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Jason Ekstrand [Thu, 28 Sep 2017 00:01:27 +0000 (17:01 -0700)]
anv: Remove base_vertex/instance from push_constants
This is just legacy cruft. We don't push these values; we pass them in
as vertex attributes.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Brian Paul [Tue, 3 Oct 2017 19:56:01 +0000 (13:56 -0600)]
util: include string.h in u_string.h
To fix MinGW compiler warning about missing strlen() prototype.
Not sure how I missed this when fixing the malloc() / stdlib.h issue.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Brian Paul [Tue, 3 Oct 2017 19:55:38 +0000 (13:55 -0600)]
llvmpipe: silence 'variable may be used uninitialized' warnings
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Brian Paul [Tue, 3 Oct 2017 19:54:54 +0000 (13:54 -0600)]
mesa: silence 'variable may be used uninitialized' warning in teximage.c
Found with MinGW optimized build.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Brian Paul [Tue, 3 Oct 2017 19:54:31 +0000 (13:54 -0600)]
mesa: silence 'variable may be used uninitialized' warning in bufferobj.c
Found with MinGW optimized build.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Brian Paul [Fri, 29 Sep 2017 17:40:58 +0000 (11:40 -0600)]
svga: wrap long comments in svga_tgsi_vgpu10.c
Trivial.
Brian Paul [Fri, 18 Aug 2017 20:38:03 +0000 (14:38 -0600)]
svga: tweak pre-VGPU10 rasterization offsets
It seems there's no perfect x/y biases for line drawing to satisfy all
applications. Depending on the biases, either real apps produce results
similar to VGPU10 while Piglit's gl-1.0-ortho-pos fails, or vice versa.
Let's lean toward real applications (Solidworks, SolidEdge, Google Earth)
over Piglit.
Using (-0.5, -0.5) for points, lines and triangles, seems to generally
work well.
We don't seem to have these issues with VGPU10.
Tested with Piglit and CAD-oriented apitraces. See VMware bugs 1775498
and 1905053.
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Brian Paul [Thu, 3 Aug 2017 16:54:18 +0000 (10:54 -0600)]
svga: if we get nr_samples==1, store nr_samples=0
We need to be more careful not to treat nr_samples=1 as an msaa surface.
This patch prevents us from errantly declaring an MSAA shader resource
with 1 sample.
No Piglit regressions, fixes the above-described errors.
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Charmaine Lee [Sat, 22 Jul 2017 05:42:30 +0000 (22:42 -0700)]
svga: emit sampler constants only if sampler view exists
It is possible to have holes in the shader emitter's sampler_target array.
0 sampler_target does not necessarily mean there is no sampler view
specified since texture buffer target has the value 0.
With this patch, a sampler_view array is added to the shader emitter structure
to specify if there is a sampler view for each texture unit. Only if there
is a sampler view, we will emit constant for texcoord scale factor or texture
buffer size for that sampler view.
Fixes a rendering issue with Turbine after commit
1020e960440.
Reviewed-by: Brian Paul <brianp@vmware.com>
Brian Paul [Tue, 27 Jun 2017 16:00:58 +0000 (10:00 -0600)]
svga: fix incorrect case in svga_typeless_format()
For the case of SVGA3D_X32_G8X24_UINT we incorrectly returned
SVGA3D_R32_FLOAT_X8X24. We should return SVGA3D_R32G8X24_TYPELESS.
Note that we never actually use SVGA3D_X32_G8X24_UINT so this has
no impact.
No Piglit regressions.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Brian Paul [Tue, 27 Jun 2017 02:49:35 +0000 (20:49 -0600)]
svga: add typeless switch cases in svga_typeless_format()
We sometimes pass typeless formats to this function. By adding switch
cases we avoid the "Unexpected format XXX in svga_typeless_format"
warning messages. No functional change.
No Piglit regressions, no above-mentioned warning messages.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Neha Bhende [Thu, 4 May 2017 18:25:18 +0000 (11:25 -0700)]
svga: Allow sRGB format with PIPE_BIND_DISPLAY_TARGET binding flag on vgpu10.
This patch allows to use sRGB formats for DISPLAY_TARGET on vgpu10.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Wladimir J. van der Laan [Sun, 1 Oct 2017 14:23:56 +0000 (16:23 +0200)]
etnaviv: Set up unknown GC3000 states
Set up new states that the blob started setting for GC3000 consistently.
This makes sure that when another test or driver leaves the GPU in
unpredictable state, these states are set up correctly for our
rendering.
Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Wladimir J. van der Laan [Sun, 1 Oct 2017 14:23:55 +0000 (16:23 +0200)]
etnaviv: Fix point sprite rendering on GC3000
Setting PA_VIEWPORT_UNK state correctly is necessary to make point sprite
rendering on GC3000 work.
Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Wladimir J. van der Laan [Sun, 1 Oct 2017 09:21:20 +0000 (11:21 +0200)]
etnaviv: Add support for DP2 instruction
A two-component dot product instruction is supported with HALTI2, use it
on hardware that supports it.
Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Wladimir J. van der Laan [Sun, 1 Oct 2017 09:21:19 +0000 (11:21 +0200)]
etnaviv: Support opcodes with bit 6 set in assembler
Support opcodes with bit 6 set in assembler, and assert that only ops
0x00..0x7f are used.
Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Dylan Baker [Wed, 27 Sep 2017 17:37:28 +0000 (10:37 -0700)]
travis: add meson build for vulkan drivers.
v2: - use -isystem`pwd` instead of cp to include fake linux header
(Eric E., Emil)
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Dylan Baker [Sun, 1 Oct 2017 03:48:32 +0000 (20:48 -0700)]
meson: convert gtest to an internal dependency
In truth gtest is an external dependency that upstream expects you to
"vendor" into your own tree. As such, it makes sense to treat it more
like a dependency than an internal library, and collect it's
requirements together in a dependency object.
v2: - include with -isystem instead of setting compiler args (Eric)
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Dylan Baker [Sun, 1 Oct 2017 03:04:09 +0000 (20:04 -0700)]
meson: set C++ standard to C++11
RadeonSI requires C++11, clover requires C++11, LLVM requires it, so
llvmpipe may require it, and that covers most of the C++ code in mesa.
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Dylan Baker [Fri, 29 Sep 2017 22:44:31 +0000 (15:44 -0700)]
meson: add window system deps to intel vulkan common
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Dylan Baker [Wed, 27 Sep 2017 18:30:21 +0000 (11:30 -0700)]
meson: look for libelf as a library if there is no pkgconfig
Required for older versions of libelf that don't have a pkgconfig file.
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Gurchetan Singh [Mon, 2 Oct 2017 20:48:24 +0000 (13:48 -0700)]
egl/surfaceless: Use KMS swrast fallback
The kms_swrast extension is an actively developed software fallback,
and platform_surfaceless can use it if there are no available
hardware drivers.
v2: Split into 2 patches, use booleans, check LIBGL_ALWAYS_SOFTWARE,
and modify the eglLog level (Emil, Eric, Tomasz).
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Gurchetan Singh [Mon, 2 Oct 2017 20:43:57 +0000 (13:43 -0700)]
egl/surfaceless: add probe device helper function
This will help us initialize a software driver, if it's needed
or requested.
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
George Kyriazis [Tue, 3 Oct 2017 15:31:16 +0000 (10:31 -0500)]
gallium/u_tests: fix ifdef for sync_file fences
include libsync.h only when libdrm is compiled in
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Brian Paul [Mon, 2 Oct 2017 22:33:46 +0000 (16:33 -0600)]
util: include stdlib.h in u_string.h to silence MinGW warning
Otherwise we don't get a prototype for malloc().
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Kenneth Graunke [Thu, 28 Sep 2017 21:51:53 +0000 (14:51 -0700)]
intel: Always set Cube Face Enables for all surfaces.
These shouldn't matter for non-cubes, and we always enable them all
for cubes, so we may as well set them all the time.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Thu, 28 Sep 2017 21:51:53 +0000 (14:51 -0700)]
intel: Make Cube Face Enable fields consistent across generations.
I decided to use the one-boolean-per-cube-face approach because it's
clearer which bits correspond to which cube face.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Matt Turner [Tue, 3 Oct 2017 05:30:29 +0000 (22:30 -0700)]
docs: Document that libtxc_dxtn is now no longer needed
Matt Turner [Tue, 3 Oct 2017 05:27:46 +0000 (22:27 -0700)]
docs: GL_ARB_indirect_parameters is now supported on i965/gen7+
Matt Turner [Thu, 28 Sep 2017 04:41:26 +0000 (21:41 -0700)]
travis: Remove libtxc_dxtn from the build
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Matt Turner [Mon, 2 Oct 2017 06:20:55 +0000 (23:20 -0700)]
build: Remove HAVE_DLOPEN
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Matt Turner [Thu, 28 Sep 2017 04:39:50 +0000 (21:39 -0700)]
mesa: Delete now unused dlopen.h
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Matt Turner [Thu, 28 Sep 2017 04:37:46 +0000 (21:37 -0700)]
mesa: Remove force_s3tc_enable driconf variable
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Matt Turner [Thu, 28 Sep 2017 21:23:39 +0000 (14:23 -0700)]
gallium: Remove util_format_s3tc_init()
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Matt Turner [Thu, 28 Sep 2017 21:16:18 +0000 (14:16 -0700)]
gallium: Remove util_format_s3tc_enabled
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Matt Turner [Thu, 28 Sep 2017 04:19:23 +0000 (21:19 -0700)]
mesa/st: Drop has_lib_dxtc argument from st_init_extensions()
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Matt Turner [Thu, 28 Sep 2017 04:17:45 +0000 (21:17 -0700)]
mesa: Drop Mesa_DXTn from gl_context
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Matt Turner [Thu, 28 Sep 2017 04:24:27 +0000 (21:24 -0700)]
mesa: Drop function pointer checks in s3tc code
Now never null!
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Matt Turner [Thu, 28 Sep 2017 04:04:36 +0000 (21:04 -0700)]
mesa: Call DXTn functions directly
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Matt Turner [Thu, 28 Sep 2017 21:09:55 +0000 (14:09 -0700)]
mesa: Remove fprintf referring to libdxtn
When this file is included by Gallium, the fprintf causes it to fail to
compile. This is an unreachable error case, and we shouldn't be calling
fprintf directly.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>