Alyssa Rosenzweig [Sun, 30 May 2021 22:03:05 +0000 (03:33 +0530)]
asahi: Respect linear strides
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
Alyssa Rosenzweig [Sun, 30 May 2021 22:01:43 +0000 (03:31 +0530)]
asahi: Identify line stride in texture/RT XML
The off-by-four is concerning.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
Alyssa Rosenzweig [Sun, 30 May 2021 21:55:34 +0000 (03:25 +0530)]
asahi: Translate layouts for texture and RTs
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
Alyssa Rosenzweig [Sun, 30 May 2021 21:49:35 +0000 (03:19 +0530)]
asahi: Add layout enum to XML
Used for textures and render targets. There are more values here, probably for
other tiling schemes and compression.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
Alyssa Rosenzweig [Sun, 30 May 2021 21:45:10 +0000 (03:15 +0530)]
asahi: Use dt_stride for line_stride where needed
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
Alyssa Rosenzweig [Sun, 30 May 2021 21:31:07 +0000 (03:01 +0530)]
asahi: Determine tiling vs linear for internal textures
Logic lifted from Panfrost.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
Alyssa Rosenzweig [Sun, 30 May 2021 17:18:37 +0000 (22:48 +0530)]
asahi: Implement wide lines
Identify line width field and route through the Gallium line width.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
Alyssa Rosenzweig [Fri, 28 May 2021 02:51:09 +0000 (22:51 -0400)]
asahi: Fix off-by-one in viewport scissoring
As discovered during the stream. Typo pointed out by someone in the Twitch chat.
Fixes:
f285a1220ea ("asahi: Implement scissors and scissor to viewport")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
Rob Clark [Mon, 31 May 2021 20:24:04 +0000 (13:24 -0700)]
freedreno/headergen2: Fix compile warnings with CP_DRAW_INDIRECT_MULTI
Using stripes to deal with the different packet layout variants resulted
in redefining "register" offsets with different values, so use "prefix"
to add a suffix to disambiguate.
drivers/gpu/drm/msm/adreno/adreno_pm4.xml.h:1066: warning: "REG_A6XX_CP_DRAW_INDIRECT_MULTI_INDIRECT" redefined
1066 | #define REG_A6XX_CP_DRAW_INDIRECT_MULTI_INDIRECT 0x00000006
|
drivers/gpu/drm/msm/adreno/adreno_pm4.xml.h:1057: note: this is the location of the previous definition
1057 | #define REG_A6XX_CP_DRAW_INDIRECT_MULTI_INDIRECT 0x00000003
|
(Admittedly it isn't really a "prefix" but that was the field in the
schema available to use, and REG_INDEXED_CP_DRAW_INDIRECT_MULTI_STRIDE
sounds somewhat more funny.)
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10944>
Rob Clark [Mon, 24 May 2021 18:00:28 +0000 (11:00 -0700)]
freedreno/afuc: Use emulator to extract jmptbl
This runs through the SQE bootstrap code to extract the packet-table,
rather than relying on heuristics. As a bonus, it can detect the start
of the LPAC fw in a660+ fw so that we can properly decode the LPAC fw
and packet-table.
Note that this decodes the jmptable as normal instructions, which is a
change in behavior from the previous heuristic based jmptbl extraction.
Not sure if that is a good or bad thing.
For a5xx, for now the legacy heuristic based jmptable decoding is
preserved, at least until enough control regs are figured out.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10944>
Rob Clark [Thu, 27 May 2021 21:37:59 +0000 (14:37 -0700)]
freedreno/ci: Add real packet-table loading for afuc test
When we start running the bootstrap code thru the emulator we will need
the packet-table loading to actually happen. So add this.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10944>
Rob Clark [Thu, 27 May 2021 19:18:53 +0000 (12:18 -0700)]
freedreno/afuc: Add emulator support to run bootstrap
Run until the packet-table is populated, so the disassembler can use
this to know the offsets of various pm4 packet handlers without having
to rely on heuristics.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10944>
Rob Clark [Thu, 27 May 2021 18:35:21 +0000 (11:35 -0700)]
freedreno/afuc: Split out helpers to parse labels and packet-table
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10944>
Rob Clark [Thu, 27 May 2021 18:04:42 +0000 (11:04 -0700)]
freedreno/afuc: Extract full gpu-id
Some of the a6xx gens will require some control reg initialization, and
go into an infinite loop if they don't see the values they expect, so
we'll need to extract the compute gpu-id.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10944>
Rob Clark [Sun, 23 May 2021 17:46:07 +0000 (10:46 -0700)]
freedreno/registers: Add a few a6xx regs and notes
A few things I noticed while playing with the emulator.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10944>
Rob Clark [Sun, 16 May 2021 20:09:29 +0000 (13:09 -0700)]
freedreno/afuc: Add emulator mode to afuc-disasm
This is an (at least somewhat complete) logical emulator of the a6xx SQE
that lets us step through firmware execution (bootstrap, cmdstream pkt
handling, etc). It lets us poke at various fw visible state and run
through pm4 packet(s) to better understand what the fw is doing when it
handles various packets.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10944>
Rob Clark [Fri, 21 May 2021 15:39:08 +0000 (08:39 -0700)]
freedreno/afuc: Add pipe reg name decoding
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10944>
Rob Clark [Fri, 21 May 2021 00:12:35 +0000 (17:12 -0700)]
freedreno/afuc: Clean up special regs
Allow for different mnemonics depending on whether they are used as
source or destination register, to better reflect what they do.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10944>
Rob Clark [Mon, 17 May 2021 01:43:20 +0000 (18:43 -0700)]
freedreno/afuc: Split out utils
With disasm emulator mode, we'll start wanting some things that are
duplicationg what the assembler does, so just split out all the rnndb
bits into shared utils.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10944>
Rob Clark [Sun, 16 May 2021 19:15:31 +0000 (12:15 -0700)]
freedreno/afuc: Split out instruction decode helper
Split the giant switch/decode out into a helper function so that we can
re-use it for emulator mode.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10944>
Rob Clark [Fri, 21 May 2021 20:58:13 +0000 (13:58 -0700)]
freedreno: Move pkt parsing helpers to common
I'll be needing these in afuc as well.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10944>
Rob Clark [Fri, 21 May 2021 19:16:37 +0000 (12:16 -0700)]
freedreno/tu+drm: Extract out pm4 pkt header helpers
I'm going to need these in a 3rd place, so let's deduplicate first.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10944>
Andres Gomez [Mon, 31 May 2021 18:41:58 +0000 (21:41 +0300)]
ci: replace glslangValidator with glslang-tools
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11096>
Andres Gomez [Mon, 31 May 2021 17:50:30 +0000 (20:50 +0300)]
ci: remove glslangValidator installation from the VK test container
We already include glslang-tools.
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11095>
Mike Blumenkrantz [Sun, 16 May 2021 14:16:41 +0000 (10:16 -0400)]
compiler/spirv: expand_to_vec4 -> nir_pad_vec4
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10821>
Rhys Perry [Mon, 31 May 2021 14:35:03 +0000 (15:35 +0100)]
radv: make attrib_end variable in radv_flush_vertex_descriptors 32-bit
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes:
1e9dc0474ef ("radv: make radv_pipeline::attrib_ends 32bit")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11089>
Danylo Piliaiev [Mon, 31 May 2021 08:41:22 +0000 (11:41 +0300)]
freedreno: reduce the upper bound of IB size by one
Going beyond 0x100000 results in hangs, however I found that the
last 0x100000 packet just doesn't get executed. Thus the real limit is
0x0FFFFF. At least this is true for a6xx.
This could be tested by appending nops to the cmdstream and placing
e.g. CP_INTERRUPT at the end, at any position other than being
0x100000 packet it results in a hang.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10786>
Danylo Piliaiev [Thu, 13 May 2021 13:50:45 +0000 (16:50 +0300)]
turnip: place a limit on the growth of BOs
There is a limit on IB size, which on freedreno is set to 0x100000.
Going beyond it results in hangs, however I found that the last
0x100000 packet just doesn't get executed. Thus the real limit is
0x0FFFFF.
This could be tested by appending nops to the cmdstream and placing
e.g. CP_INTERRUPT at the end, at any position other than being
0x100000 packet it results in a hang.
Fixes:
dEQP-VK.api.command_buffers.record_many_draws_secondary_2
dEQP-VK.api.command_buffers.record_many_draws_primary_2
However these tests could trigger hangcheck timeouts.
Also this fixes hangs when opening captures of games in RenderDoc.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10786>
Georg Lehmann [Fri, 28 May 2021 12:53:25 +0000 (14:53 +0200)]
v3dv: use VKAPI_ATTR and VKAPI_CALL.
Closes #4852
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Tested-by: Roman Stratiienko <r.stratiienko@gmail.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11062>
Neil Roberts [Mon, 31 May 2021 14:32:57 +0000 (16:32 +0200)]
kmsro: Fix confusing comma expression
It looks like this was a copy-and-paste mistake in
827e0d6654a2 where
the initialiser was moved from being a struct initialiser to a
standalone statement. Some of them were fixed with an unrelated change
in
187218395d7c but not all of them. This shouldn’t make any practical
difference to the compiled code.
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11090>
Mike Blumenkrantz [Sat, 29 May 2021 03:01:12 +0000 (23:01 -0400)]
Revert "zink: call tc_driver_internal_flush_notify() on flush"
This reverts commit
4d62fca0877104080d4dee8656d09c67e93c8d0e.
this is broken beyond space and time but only reveals its true nature
when used outside of a unit test
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11080>
Mike Blumenkrantz [Tue, 26 Jan 2021 20:58:53 +0000 (15:58 -0500)]
zink: stop using util_set_vertex_buffers_mask()
we're already iterating this, so there's no point in double iterating
also no point in doing the extra refcounting
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10997>
Mike Blumenkrantz [Tue, 26 Jan 2021 20:58:29 +0000 (15:58 -0500)]
zink: ref vertex buffers during set_vertex_buffers
now we don't need to do it during bind
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10997>
Mike Blumenkrantz [Tue, 26 Jan 2021 15:37:32 +0000 (10:37 -0500)]
zink: update scissor only when necessary
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10997>
Mike Blumenkrantz [Tue, 26 Jan 2021 15:31:24 +0000 (10:31 -0500)]
zink: only update viewport state when necessary
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10997>
Mike Blumenkrantz [Tue, 26 Jan 2021 15:27:32 +0000 (10:27 -0500)]
zink: only rebind vertex buffers when necessary
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10997>
Mike Blumenkrantz [Sat, 30 Jan 2021 14:06:25 +0000 (09:06 -0500)]
zink: handle rebinds for vertex buffers
now that the tracking info is there, it's easy to make this happen
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10997>
Mike Blumenkrantz [Tue, 26 Jan 2021 15:27:50 +0000 (10:27 -0500)]
zink: only rebind pipelines when necessary
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10997>
Mike Blumenkrantz [Tue, 26 Jan 2021 15:19:51 +0000 (10:19 -0500)]
zink: mark some draw functions inline
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10997>
Mike Blumenkrantz [Tue, 26 Jan 2021 19:52:40 +0000 (14:52 -0500)]
zink: remove barriers/refs from descriptor cache
these are applied on bind now so there's no need to track them
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10997>
Mike Blumenkrantz [Tue, 26 Jan 2021 14:56:04 +0000 (09:56 -0500)]
zink: reapply program refs automatically
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10997>
Mike Blumenkrantz [Tue, 26 Jan 2021 14:37:17 +0000 (09:37 -0500)]
zink: reapply resource/surface refs after app flushes
instead of doing this during descriptor update, we can automatically handle
this rollover
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10997>
Iago Toral Quiroga [Thu, 27 May 2021 07:16:18 +0000 (09:16 +0200)]
v3dv: implement VK_KHR_device_group
We only support one device group with a single device, so the
implementation is trivial.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11037>
Iago Toral Quiroga [Thu, 27 May 2021 08:17:08 +0000 (10:17 +0200)]
v3dv: implement interactions of VK_KHR_device_group with VK_KHR_swapchain
There are some interactions between these two extensions that need to be
implemented when both are supported. Particularly:
1. Applications can create images that will be bound to swapchain memory
by passing a VkImageSwapchainCreateInfoKHR in the pNext chain
of VkImageCreateInfo. In this case we need to make sure that the
created image takes some of its parameters from the underlying
swapchain.
2. Applications can bind memory from a swapchain image to a VkImage
by passing a VkBindImageMemorySwapchainInfoKHR in the pNext chain
of VkBindImageMemoryInfo.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11037>
Iago Toral Quiroga [Thu, 27 May 2021 08:00:37 +0000 (10:00 +0200)]
v3dv: create a helper for image creation
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11037>
Iago Toral Quiroga [Thu, 27 May 2021 07:06:00 +0000 (09:06 +0200)]
v3dv: implement vkCmdDispatchBase
This was added with VK_KHR_device_group and allows users to specify
a base offset that will be automatically added to gl_WorkGroupID.
Unfortunately, V3D doesn't support this natively, so we need to add
the base to the workgroup id generated by hardware manually. For this,
we inject add instructions that source from a QUNIFORM that will
retrieve the actual dispatch base from the compute job when it is
dispatched.
Since a compute shader can be dispatched with CmdDispatch and/or
CmdDispatchBase, we always need to add these additional add
instructions and use a base of (0,0,0) for regular dispatches.
Since we don't support any version of OpenGL with this dispatch
base functionality we can avoid the extra instructions there.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11037>
Samuel Pitoiset [Thu, 27 May 2021 07:26:24 +0000 (09:26 +0200)]
radv: enable RADV_DEBUG=invariantgeom for Monster Hunter World
DXVK 1.8.1 marks position as always invariant but the DX12 version
of the game has the same issue and it's not yet fixed on the
vkd3d-proton side.
Fixes some Z-fighting on GFX10.3.
Cc: 21.1 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11029>
Alyssa Rosenzweig [Fri, 28 May 2021 02:51:09 +0000 (22:51 -0400)]
asahi: Implement scissors and scissor to viewport
Construct a scissor descriptor correpsonding to the intersection of the
framebuffer, the viewport, and the region selected for scissoring by the app.
Use the intersected scissor in the "clip tile" fields in the viewport. Select
this scissor descriptor from the command stream.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11084>
Alyssa Rosenzweig [Sun, 30 May 2021 20:25:19 +0000 (01:55 +0530)]
asahi: Update viewport descriptor depth fields
Acts like a translate/scale pair more generally, not specific to near/far
planes.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11084>
Alyssa Rosenzweig [Sun, 30 May 2021 20:13:15 +0000 (01:43 +0530)]
asahi: Enable depth culling
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11084>
Alyssa Rosenzweig [Sun, 30 May 2021 20:12:43 +0000 (01:42 +0530)]
asahi: Add unknown bits seen with the GL driver
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11084>
Alyssa Rosenzweig [Sun, 30 May 2021 20:11:37 +0000 (01:41 +0530)]
asahi: Expose PIPE_CAP_CLIP_HALFZ
Use the Zink lowering pass to handle the non-halfz case. Metal, like Vulkan,
uses half-z (and Metal is not configurable, making r/e tricky).
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11084>
Alyssa Rosenzweig [Fri, 28 May 2021 03:11:18 +0000 (23:11 -0400)]
agx: Add scissor upload BO
Not sure what the proper data structure for this is yet, but this will
hold over until we start optimizing for memory usage.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11084>
Alyssa Rosenzweig [Sun, 30 May 2021 19:58:25 +0000 (01:28 +0530)]
asahi: Skip draws if the scissor culls everything
We can't pack the scissor descriptor for these, and there would be no rendering
anyway, so detect this condition and skip the draw.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11084>
Alyssa Rosenzweig [Sun, 30 May 2021 20:34:41 +0000 (02:04 +0530)]
asahi: Mark scissor dirty if rast->scissor changes
Although there is a scissor enable bit in the hardware rasterizer state, we
cannot rely on it alone as we also "scissor" to the viewport.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11084>
Alyssa Rosenzweig [Fri, 28 May 2021 02:51:00 +0000 (22:51 -0400)]
asahi: Track scissor states
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11084>
Alyssa Rosenzweig [Fri, 28 May 2021 02:44:55 +0000 (22:44 -0400)]
asahi: Dirty track viewport descriptor
Mitigates the extra CPU cost from packing in the previous commit, and
avoids the redundant memcpy.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11084>
Alyssa Rosenzweig [Fri, 28 May 2021 02:42:48 +0000 (22:42 -0400)]
asahi: Defer viewport pack
Nontrivial interaction between viewport state and scissor state, so
defer until draw time to deal with it.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11084>
Alyssa Rosenzweig [Fri, 28 May 2021 02:33:26 +0000 (22:33 -0400)]
asahi: Add scissor enable bit
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11084>
Alyssa Rosenzweig [Fri, 28 May 2021 02:31:08 +0000 (22:31 -0400)]
asahi: Add "set scissor" command
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11084>
Alyssa Rosenzweig [Fri, 28 May 2021 02:29:02 +0000 (22:29 -0400)]
asahi: Fix scissor descriptor definition
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11084>
Daniel Stone [Sun, 30 May 2021 21:59:13 +0000 (22:59 +0100)]
docs: Even more gratutious nitpicks
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11085>
Alyssa Rosenzweig [Tue, 25 May 2021 00:38:41 +0000 (20:38 -0400)]
agx: Zero r0l before first use of control flow
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
Alyssa Rosenzweig [Mon, 24 May 2021 02:50:48 +0000 (22:50 -0400)]
agx: Add break/continue support
Following Dougall's notes closely.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
Alyssa Rosenzweig [Wed, 26 May 2021 23:51:46 +0000 (19:51 -0400)]
agx: Implement loops in the simplest way
Again, optimizations are possible, but for now go for conformance.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
Alyssa Rosenzweig [Mon, 24 May 2021 02:51:21 +0000 (22:51 -0400)]
agx: Optimize out empty else blocks
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
Alyssa Rosenzweig [Sun, 23 May 2021 21:26:50 +0000 (17:26 -0400)]
agx: Implement emit_if the simplest way
Lots of optimizations are possible from here.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
Alyssa Rosenzweig [Tue, 25 May 2021 00:15:03 +0000 (20:15 -0400)]
agx: Fix up branch offsets at pack time
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
Alyssa Rosenzweig [Wed, 26 May 2021 23:51:36 +0000 (19:51 -0400)]
agx: Model jump instructions
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
Alyssa Rosenzweig [Sun, 23 May 2021 21:18:20 +0000 (17:18 -0400)]
agx: Pack control flow instructions
Nearly ALU.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
Alyssa Rosenzweig [Tue, 25 May 2021 00:52:16 +0000 (20:52 -0400)]
agx: Add push_exec alias
Use the same canonical form as Metal, so the disassembler can alias it
back.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
Alyssa Rosenzweig [Sun, 23 May 2021 18:07:58 +0000 (14:07 -0400)]
agx: Model pop_exec
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
Alyssa Rosenzweig [Sun, 23 May 2021 16:36:14 +0000 (12:36 -0400)]
agx: Model control flow instructions
Thankfully the encoding is regular, if a bit complicated.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
Alyssa Rosenzweig [Wed, 26 May 2021 23:46:59 +0000 (19:46 -0400)]
agx: Add inner loop nesting count field
Needed for proper handling of break/continue with nested if-else.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
Alyssa Rosenzweig [Wed, 26 May 2021 23:51:19 +0000 (19:51 -0400)]
agx: Add branch target to IR
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
Alyssa Rosenzweig [Sun, 23 May 2021 21:17:16 +0000 (17:17 -0400)]
agx: Add invert_cond (ccn) to IR
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
Alyssa Rosenzweig [Sun, 23 May 2021 16:35:58 +0000 (12:35 -0400)]
agx: Add nest field to IR
Needed to model control flow instructions.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
Alyssa Rosenzweig [Mon, 24 May 2021 23:47:58 +0000 (19:47 -0400)]
agx: Track block offsets
For fixing branch offsets.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
Alyssa Rosenzweig [Sun, 23 May 2021 21:27:26 +0000 (17:27 -0400)]
agx: Track current_block
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
Alyssa Rosenzweig [Wed, 26 May 2021 23:29:35 +0000 (19:29 -0400)]
agx: Implement boolean mov
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
Alyssa Rosenzweig [Wed, 26 May 2021 23:29:26 +0000 (19:29 -0400)]
agx: Enable 1-bit load_const
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
Alyssa Rosenzweig [Sun, 16 May 2021 18:19:21 +0000 (14:19 -0400)]
agx: Pack ld_var Dx
In the expected place.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
Alyssa Rosenzweig [Sun, 23 May 2021 16:20:33 +0000 (12:20 -0400)]
agx: Drop cmdline version back to ES3.0
The patch needed for this to work was dropped. Fixes the standalone
compiler.
Fixes:
972409dacb9 ("asahi: Stub command-line compiler for AGX G13B")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
Alyssa Rosenzweig [Sun, 30 May 2021 13:40:51 +0000 (19:10 +0530)]
asahi: Fix meson.build definition to depend on agx_pack.h
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
Daniel Stone [Sun, 30 May 2021 13:43:25 +0000 (14:43 +0100)]
doc: Gratuituous promotion of Wayland
This is really just a dummy commit to get the docs regenerated so
we can stop 404ing.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11083>
Karol Herbst [Tue, 14 Jul 2020 20:38:05 +0000 (22:38 +0200)]
gv100/ir: fix quadop/pop lowering
Fixes: texture_cube_map_array.sampling
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11061>
Karol Herbst [Tue, 14 Jul 2020 20:36:47 +0000 (22:36 +0200)]
gm107/ir: emit barrier sources for quadon/pop
We drop them later on, but it's actually how that needs to be done on
Volta.
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11061>
Karol Herbst [Tue, 14 Jul 2020 20:36:02 +0000 (22:36 +0200)]
gv100/ir: add support for barrier thread state files for OP_CVT
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11061>
Karol Herbst [Tue, 14 Jul 2020 20:34:34 +0000 (22:34 +0200)]
nv50/ir: add barrier and thread_state files
Those are required on Turing+ to handle cross thread synchronization and
other goodies as the c/r stack is gone.
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11061>
Karol Herbst [Tue, 14 Jul 2020 20:32:47 +0000 (22:32 +0200)]
nv50/ir/ra: fixes upcoming barrier file
Replaces some FILE_ADDRESS with LAST_REGISTER_FILE and makes RA not choke
on instructions using TS values.
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11061>
Daniel Stone [Sun, 30 May 2021 11:40:43 +0000 (12:40 +0100)]
CI: Disable rk3399-gru-kevin jobs for now
We lost a few machines from the rota due to an infrastructure issue and
we don't have enough for good parallelism.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11082>
Hoe Hao Cheng [Thu, 27 May 2021 14:12:57 +0000 (22:12 +0800)]
vulkan/util: generate vk_dispatch_table that combines all dispatch tables
Zink uses this, as it doesn't need to differentiate all the entrypoints.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11045>
Boyuan Zhang [Wed, 19 May 2021 18:47:26 +0000 (14:47 -0400)]
radeon/vcn: enable parsing support for st_rps_bits
Set st_rps_bits in hevc message buffer and set corresponding flag to indicate
that st_rps_bits will be used for parsing the short_term_ref_pic_set structure.
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10889>
Boyuan Zhang [Wed, 19 May 2021 18:39:17 +0000 (14:39 -0400)]
frontends/vdpau: disable UseStRpsBits for vdpau hevc
vdpau interface doesn't provide st_rps_bits, it uses NumDeltaPocsOfRefRpsIdx
instead. So disabling the flag to indicate st_rps_bits will not be used.
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10889>
Boyuan Zhang [Wed, 19 May 2021 18:34:57 +0000 (14:34 -0400)]
frontends/va: get st_rps_bits from VA pic param hevc
Get st_rps_bits from VAPictureParameterBufferHEVC, and set the flag that
indicates st_rps_bits will be used for parsing the short_term_ref_pic_set
structure
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10889>
Boyuan Zhang [Wed, 19 May 2021 18:23:40 +0000 (14:23 -0400)]
vl: add st_rps_bits for HEVC decode
st_rps_bits is used for accelorater to skip parsing the short_term_ref_pic_set
structure, which is needed for HEVC decode.
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10889>
Vinson Lee [Thu, 27 May 2021 04:35:17 +0000 (21:35 -0700)]
travis: Download XQuartz from GitHub.
Bintray was sunsetted on May 1st, 2021.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11026>
Erik Faye-Lund [Fri, 28 May 2021 10:14:46 +0000 (12:14 +0200)]
util/prim_restart: revert part of bad fix
When drawing using util_translate_prim_restart_ib, zink explicitly
ignores pipe_draw_start_count_bias::start, because
util_translate_prim_restart_ib used to create a new index-buffer without
padding at the start.
This makes a lot of sense, because creating a padded index buffer is
just wasteful.
So let's walk back on the choice of starting to pad the output buffer.
Fixes:
1272c2e0524 ("util/prim_restart: fix util_translate_prim_restart_ib")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4851
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11059>
Erik Faye-Lund [Wed, 26 May 2021 12:03:58 +0000 (14:03 +0200)]
zink: add support for string-markers
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11004>
Erik Faye-Lund [Wed, 26 May 2021 12:30:27 +0000 (14:30 +0200)]
zink: untangle have_EXT_debug_utils and ZINK_DEBUG_VALIDATION
EXT_debug_utils is useful for more than just validation, so let's
untangle these a bit.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11004>