Rafael Antognolli [Wed, 21 Nov 2018 19:24:59 +0000 (11:24 -0800)]
anv/allocator: Add getter for anv_block_pool.
We will need the anv_block_pool_map to find the map relative to some BO
that is not at the start of the block pool.
v2: just return a pointer instead of a struct (Jason)
v4: Update comment (Jason)
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Rafael Antognolli [Wed, 28 Nov 2018 19:43:03 +0000 (11:43 -0800)]
anv/allocator: Add anv_state_table.
Add a structure to hold anv_states. This table will initially be used to
recycle anv_states, instead of relying on a linked list implemented in
GPU memory. Later it could be used so that all anv_states just point to
the content of this struct, instead of making copies of anv_states
everywhere.
One has to call anv_state_table_add(), which returns an index for the
state in the table, and then get a pointer to such index, and finally
fill in the rest of the struct.
TODO:
1) There's a lot of common code between this table backing store
memory and the anv_block_pool buffer, due to how we grow it. I think
it's possible to refactory this and reuse code on both places.
2) Add unit tests.
v3:
- Rename state table memfd (Jason)
- Return VK_ERROR_OUT_OF_HOST_MEMORY on more places (Jason)
- anv_state_table_grow returns VkResult (Jason)
- Rename variables to be more informative (Jason)
- Return errors on state table grow.
- Rename anv_state_table_push/pop to anv_free_list_push2/pop2
This will be renamed again to remove the trailing "2" later.
v4:
- Remove exit(-1) from anv_state_table (Jason).
- Use uint32_t "next" field in anv_free_entry (Jason).
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Rafael Antognolli [Thu, 29 Nov 2018 00:36:41 +0000 (16:36 -0800)]
anv/tests: Fix block_pool_no_free test.
There were 2 problems with this test.
First it was comparing highest, which was -1, with an uint32_t. So the
current value would never be higher than that, and the assert would
always be false. It just never reached this point because of the next
problem.
It was always looking for the highest value of each thread and storing
it in thread_max. So a test case like this wouldn't work:
[Thread]: [Blocks]
[0]: [0, 32, 64, 96]
[1]: [128, 160, 192, 224]
[2]: [256, 288, 320, 352]
Not only that would skip values and iterate only over thread number 2,
instead of walking through all of them, but thread_max was also
initialized to -1. And then compared to unsigned blocks[i][next[i].
We fix that by getting the smallest value of each thread, and checking
if it is lower than thread_min, which is initialized to INT32_MAX. And
then we end up walking through all the blocks of all threads. We also
change "blocks" to be int32_t instead of uint32_t, since in some places
(alloc_blocks) it was already referenced as int32_t, and that fixes the
comparison to -1.
v2:
- keep highest initialized to -1, and change blocks to be int32_t.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Lionel Landwerlin [Thu, 17 Jan 2019 18:19:59 +0000 (18:19 +0000)]
anv: fix invalid binding table index computation
The ++ operator strikes again.
Fixes:
f92c5bc8f3f517 ("anv/device: fix maximum number of images supported")
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Eric Engestrom [Thu, 17 Jan 2019 16:26:26 +0000 (16:26 +0000)]
docs: explain how to see what meson options exist
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Emil Velikov [Thu, 17 Jan 2019 11:37:41 +0000 (11:37 +0000)]
docs: update calendar, add news item and link release notes for 18.3.2
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Thu, 17 Jan 2019 11:30:49 +0000 (11:30 +0000)]
docs: add sha256 checksums for 18.3.2
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit
8320a07221a342ea56528a1839ce5b33c8226b36)
Emil Velikov [Thu, 17 Jan 2019 11:24:36 +0000 (11:24 +0000)]
docs: add release notes for 18.3.2
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit
95a3b709c0d4618d900f8b8bed429ee4f786fab2)
Iago Toral Quiroga [Thu, 10 Jan 2019 12:34:07 +0000 (13:34 +0100)]
anv/device: fix maximum number of images supported
We had defined MAX_IMAGES as 8, which we used to size the array for
image push constant data. The comment there stated that this was for
gen8, but anv_nir_apply_pipeline_layout runs for all gens and writes
that array, asserting that we don't exceed that number of images,
which imposes a limit of MAX_IMAGES on all gens.
Furthermore, despite this, we are exposing up to 64 images per shader
stage on all gens, gen8 included.
This patch lowers the number of images we expose in gen8 to 8 and
keeps 64 images for gen9+ while making sure that only pre-SKL gens
use push constant space to handle images.
v2:
- <= instead of < in the assert (Eric, Lionel)
- Change the way the assertion is written (Eric)
v3:
- Revert the way the assertion is written to the form it had in v1,
the version in v2 was not equivalent and was incorrect. (Lionel)
v4:
- gen9+ doesn't need push constants for images at all (Jason)
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v3)
Tapani Pälli [Wed, 16 Jan 2019 12:15:28 +0000 (14:15 +0200)]
anv: do not advertise AHW support if extension not enabled
Fixes following failing vk-gl-cts cases on Linux desktop:
dEQP-VK.api.external.memory.android_hardware_buffer.suballocated.buffer.info
dEQP-VK.api.external.memory.android_hardware_buffer.suballocated.image.info
dEQP-VK.api.external.memory.android_hardware_buffer.dedicated.image.info
dEQP-VK.api.external.memory.android_hardware_buffer.dedicated.buffer.info
Fixes:
517103abf1c "anv/android: add ahardwarebuffer external memory properties"
Reported-by: Juan A. Suarez <jasuarez@igalia.com>
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Eric Anholt [Wed, 16 Jan 2019 00:02:23 +0000 (16:02 -0800)]
vc4: Don't leak the GPU fd for renderonly usage.
Noticed while debugging V3D -- the ro->gpu_fd was freshly opened in ro
setup, and it needs to stay open until screen close (since it may be used
by renderonly) and should be the same one used by the vc4 screen.
Fixes:
7029ec05e2c7 ("gallium: Add renderonly-based support for pl111+vc4.")
Eric Anholt [Wed, 16 Jan 2019 00:03:44 +0000 (16:03 -0800)]
v3d: Don't leak the GPU fd for renderonly usage.
The CTS was running out of fds, because of the ro->gpu_fd never being
closed. ro->gpu_fd should match the screen (in case the caller of
v3d_drm_screen_create_renderonly() has a scanout_for_resource() that uses
gpu_fd) and the screen is expected to close its fd at the end, fixing the
resource leak.
Fixes:
e113b21cb779 ("v3d: Add renderonly support.")
Eric Anholt [Tue, 15 Jan 2019 05:44:16 +0000 (21:44 -0800)]
v3d: Restructure RO allocations using resource_from_handle.
I had bugs in the old path where I was laying out as tiled (so we'd render
tiled) but then only allocating space in the shared object for linear
rendering. The resource_from_handle makes it so the same layout choices
are made in both the import and export scanout cases. Also, fixes a leak
of the fd that was tripping up the CTS.
Now that we're checking PIPE_BIND_SHARED to choose to use RO, the
DRM_FORMAT_MOD_LINEAR check wasn't needed any more.
Fixes visual corruption and MMU faults in X in renderonly mode.
Fixes:
bd09bb1629a7 ("v3d: SHARED but not necessarily SCANOUT buffers on RO must be linear.")
Eric Anholt [Tue, 15 Jan 2019 20:47:02 +0000 (12:47 -0800)]
v3d: If the modifier is not known on BO import, default to linear for RO.
Part of fixing DRI3 rendering with RO on X11.
Fixes:
e113b21cb779 ("v3d: Add renderonly support.")
Timothy Arceri [Wed, 9 Jan 2019 04:07:51 +0000 (15:07 +1100)]
ac/nir_to_llvm: add support for structs to get_sampler_desc()
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Timothy Arceri [Wed, 9 Jan 2019 04:03:36 +0000 (15:03 +1100)]
ac/nir_to_llvm: fix regression in bindless support
This wasn't ported over when deref support was implemented.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Timothy Arceri [Wed, 9 Jan 2019 03:53:52 +0000 (14:53 +1100)]
radeonsi/nir: get correct type for images inside structs
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Timothy Arceri [Wed, 9 Jan 2019 02:15:05 +0000 (13:15 +1100)]
ac/nir_to_llvm: fix type handling in image code
The current code only strips off arrays and cannot find the type
for images that are struct members.
Instead of trying to get the image type from the variable, we just
get it directly from the deref instruction.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Rhys Perry [Wed, 9 Jan 2019 14:40:15 +0000 (14:40 +0000)]
radv: use dithered alpha-to-coverage
This matches the behaviour of AMDVLK and hides banding.
It is also seems to be allowed by the Vulkan spec.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Alok Hota [Thu, 20 Sep 2018 03:23:15 +0000 (22:23 -0500)]
swr/rast: Store cached files in multiple subdirs
This improves cache filesystem performance, especially during CI tests
Also updated jitcache magic number due to codegen parameter changes
Removed 2 `if constexpr` to prevent C++17 requirement
Alok Hota [Thu, 20 Sep 2018 02:15:51 +0000 (21:15 -0500)]
swr/rast: New execution engine per JIT
Fixes relocation errors with LLVM 7.0.0
Alok Hota [Fri, 7 Sep 2018 00:58:53 +0000 (19:58 -0500)]
swr/rast: Scope MEM_CLIENT enum for mem usages
Avoids confusion with other defaulted integer parameters
- fixed some unspecified usages
- removed unnecessary includes
- removed unecessary protected access specifier in buckets framework
Alok Hota [Thu, 30 Aug 2018 22:45:06 +0000 (17:45 -0500)]
swr/rast: Unaligned and translations in gathers
- added graphics address translation in odd gathers
- added support for unaligned gathers in fetch shader
- changed how 2+ GB offsets are handled to make them compatible with
unaligned offsets
Alok Hota [Thu, 23 Aug 2018 23:42:25 +0000 (18:42 -0500)]
swr/rast: partial support for Tiled Resources
- updated sample from TRTT surfaces correctly
- implemented mapped status return for TRTT surfaces
- implemented per-sample instruction minLod clamp
- updated bilinear filter weight calculation to be closer to D3D specs
- implemented "ReducedTexcoordRange" operation from D3D specs to avoid
loss of precision on high-value normalized coordinates
Alok Hota [Tue, 14 Aug 2018 07:42:13 +0000 (02:42 -0500)]
swr/rast: Add annotator to interleave isa text
To make debugging simpler
Alok Hota [Mon, 9 Jul 2018 21:55:30 +0000 (16:55 -0500)]
swr/rast: Use gfxptr_t value in JitGatherVertices
Use gfxptr_t type value for stream pointer uses in gather and similar
calls
Gert Wollny [Sun, 16 Dec 2018 11:23:52 +0000 (12:23 +0100)]
autotools: Deprecate the use of autotools
Since Meson will eventually be the only build system deprecate autotools
now. It can still be used by invoking configure with the flag
--enable-autotools
NAKed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Rob Clark <robdclark@gmail.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Kristian H. Kristensen <hoegsberg@chromium.org>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Dylan Baker [Tue, 15 Jan 2019 19:55:36 +0000 (11:55 -0800)]
meson: allow building dri driver without window system if osmesa is classic
This was already enabled for gallium based osmesa with gallium drivers
in
9d10581897ef7cfa0f6c392e2048cc04357281b9, so do the same for classic
driver with classic osmesa.
Fixes:
cbbd5bb889a2c271a504c379f36a7cb717a85af4
("meson: build classic osmesa")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Bruce Cherniak [Fri, 4 Jan 2019 20:53:59 +0000 (14:53 -0600)]
gallium/swr: Fix multi-context sync fence deadlock.
Various recreation scenarios lead to API thread getting stuck in
swr_fence_finish(). This is a multi-context issue, whereby one context
overwrites the fence read-value with a previous sync's lesser value.
The fence sync value is supposed to be always increasing.
In swr_fence_cb(), only update the "read" value if the new value is
greater.
(This may seem like we're not waiting on the other context to finish, but
had we needed for it to finish there would have been a wait prior to
submitting a new sync.)
cc: mesa-stable@lists.freedesktop.org
Samuel Pitoiset [Tue, 15 Jan 2019 08:44:20 +0000 (09:44 +0100)]
ac/nir: don't trash L1 caches for store operations with writeonly memory
Ported from RadeonSI.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Kenneth Graunke [Sun, 22 Jul 2018 06:40:16 +0000 (23:40 -0700)]
st/mesa: Optionally override RGB/RGBX dst alpha blend factors
Intel's blending hardware does not properly return 1.0 for destination
alpha for RGBX formats; it requires the factors to be overridden to
either zero or one. Broadcom vc4 and v3d also could use this override.
While overriding these factors is safe in general, Nouveau and Radeon
would prefer not to. Their blending hardware already returns correct
values for RGB/RGBX formats, and would like to avoid the resulting
per-buffer blending and independent blend factors (rgb != a) since it
can cause additional overhead.
I considered simply handling this in the driver, but it's not as nice.
pipe_blend_state doesn't have any format information, so we'd need the
hardware blend state to depend on both pipe_blend_state and
pipe_framebuffer_state. Furthermore, Intel GPUs don't have a native
RGBX_SNORM format, so I avoid exposing one, which makes Gallium fall
back to RGBA_SNORM. The pipe_surfaces we get in the driver have an RGBA
format, making it impossible to tell that there shouldn't be an alpha
channel. One could argue that st not handling it in that case is a bug.
To work around this, we'd have to expose RGBX pipe formats, mapped to
RGBA hardware formats, and add format swizzling special cases. All
doable, but it ends up being more code than I'd like.
st_atom_blend already has access to the right information and it's
trivial to accomplish there, so we just add a cap bit and do that.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Marek Olšák [Thu, 3 Jan 2019 13:33:45 +0000 (08:33 -0500)]
winsys/amdgpu: fix whitespace
Pierre Moreau [Wed, 9 Jan 2019 22:03:45 +0000 (23:03 +0100)]
meson: Fix with_gallium_icd to with_opencl_icd
`with_gallium_icd` is never used throughout the different Meson build
files, whereas `with_opencl_icd` tracks whether or not `gallium-opencl`
was set to "icd".
Fixes:
42ea0631f108d82554339530d6c88aa1b448af1e
("meson: build clover")
Signed-off-by: Pierre Moreau <pierre.morrow@free.fr>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Kenneth Graunke [Fri, 28 Sep 2018 09:21:47 +0000 (11:21 +0200)]
gallium: Add the ability to query a single pipeline statistics counter
Gallium historically has treated pipeline statistics queries as a single
query, PIPE_QUERY_PIPELINE_STATISTICS, which returns a block of 11
values. This was originally patterned after the D3D1x API. Much later,
Brian introduced an OpenGL extension that exposed these counters - but
it exposes 11 separate queries, each of which returns a single value.
Today, st/mesa simply queries all 11 values, and returns a single value.
While pipeline statistics counters aren't typically performance
critical, this is still not a great fit. A D3D1x->GL translator might
request all 11 counters by creating 11 separate GL queries...which
Gallium would map to reads of all 11 values each time, resulting in a
total 121 counter reads. That's not ideal.
This patch adds a new cap, PIPE_CAP_QUERY_PIPELINE_STATISTICS_SINGLE,
and corresponding query type PIPE_QUERY_PIPELINE_STATISTICS_SINGLE.
When calling create_query(), q->index should be set to one of the
PIPE_STAT_QUERY_* enums to select a counter. Unlike the block query,
this returns the value in pipe_query_result::u64 (as it's a single
value) instead of the pipe_query_data_pipeline_statistics group.
We update st/mesa to expose ARB_pipeline_statistics_query if either
capability is set, preferring the new SINGLE variant when available.
Thanks to Roland, Ilia, and Marek for helping me sort this out.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Kenneth Graunke [Fri, 11 Jan 2019 21:22:57 +0000 (13:22 -0800)]
st/mesa: Rearrange PIPE_QUERY_PIPELINE_STATISTICS result fetching.
This just changes the order of the switch statements, so we only
look at target if the query type is PIPE_QUERY_PIPELINE_STATISTICS.
The next commit will introduce a new SINGLE query type which can be
used for the same GL query types, and it won't want this processing.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Kenneth Graunke [Sat, 15 Dec 2018 05:09:32 +0000 (21:09 -0800)]
st/mesa: Make an enum for pipeline statistics query result indices.
Gallium handles pipeline statistics queries as a single query
(PIPE_QUERY_PIPELINE_STATISTICS) which returns a struct with 11 values.
Sometimes it's useful to refer to each of those values individually,
rather than as a group. To avoid hardcoding numbers, we define a new
enum for each value. Here, the name and enum value correspond to the
index in the struct pipe_query_data_pipeline_statistics result.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Dylan Baker [Fri, 11 Jan 2019 23:36:05 +0000 (15:36 -0800)]
meson: Add a script to extract the cmd line used for meson
Upstream I'm persuing a more comprehensive solution, but this should
prove a suitable stop-gap measure in the meantime.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109325
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Samuel Pitoiset [Wed, 9 Jan 2019 13:40:00 +0000 (14:40 +0100)]
radv: add support for VK_EXT_memory_budget
A simple Vulkan extension that allows apps to query size and
usage of all exposed memory heaps.
The different usage values are not really accurate because
they are per drm-fd, but they should be close enough.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alex Smith <asmith@feralinteractive.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Mon, 7 Jan 2019 16:38:08 +0000 (17:38 +0100)]
radv: add two small helpers for getting VRAM and visible VRAM sizes
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alex Smith <asmith@feralinteractive.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Wed, 9 Jan 2019 13:40:28 +0000 (14:40 +0100)]
radv: remove unnecessary returns in GetPhysicalDevice*Properties()
These functions return nothing.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alex Smith <asmith@feralinteractive.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Bas Nieuwenhuizen [Sat, 12 Jan 2019 19:09:23 +0000 (20:09 +0100)]
radv: Set partial_vs_wave for pipelines with just GS, not tess.
Looking at -pro we need to enable it for pipelines with just a
GS too.
This seems to reduce the hangs from
https://bugs.freedesktop.org/show_bug.cgi?id=109242 on a RX 550 to
the point where I can't reproduce, after the false start with the
wd_switch_on_eop patch due to flakiness.
(but people are reporting it does not fix the issue completely for
them on polaris 11)
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Marek Olšák [Mon, 14 Jan 2019 23:24:08 +0000 (18:24 -0500)]
radeonsi: also apply the GS hang workaround to draws without tessellation
ported from AMDVLK.
Cc: 18.3 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Eric Anholt [Mon, 14 Jan 2019 18:39:43 +0000 (10:39 -0800)]
v3d: SHARED but not necessarily SCANOUT buffers on RO must be linear.
We don't have a way to talk to RO about modifiers it can do yet, so assume
the minimum.
Eric Anholt [Mon, 10 Dec 2018 06:03:42 +0000 (22:03 -0800)]
v3d: Add support for CS barrier() intrinsics.
Eric Anholt [Mon, 10 Dec 2018 03:44:33 +0000 (19:44 -0800)]
v3d: Add support for CS shared variable load/store/atomics.
CS shared variables are handled effectively as SSBO access to a temporary
buffer that will be allocated at CS dispatch time.
Eric Anholt [Fri, 7 Dec 2018 23:47:18 +0000 (15:47 -0800)]
v3d: Add support for CS workgroup/invocation id intrinsics.
We get a payload for the ivec3 workgroup and an int local invocation
index, and we use the core lowering to turn into the global invocation id
and the local invocation id ivec3s.
Eric Anholt [Mon, 11 Dec 2017 20:52:27 +0000 (12:52 -0800)]
v3d: Add support for shader_image_load_store.
This is only exposed on V3D 4.1+, because we didn't have the TMU write
operations for images on 3.3 (To do GLES 3.1 there, you have to lower it
to SSBO load/stores, which is a problem to solve later).
Eric Anholt [Mon, 11 Dec 2017 01:11:25 +0000 (17:11 -0800)]
v3d: Add SSBO/atomic counters support.
So far I assume that all the buffers get written. If they weren't, you'd
probably be using UBOs instead.
Eric Anholt [Tue, 8 Jan 2019 18:16:51 +0000 (10:16 -0800)]
v3d: Drop the GLSL version level.
This was an arbitrary "we support lots of stuff" value when I started the
driver. However, at 400 we expose OES_gpu_shader5, which claims support
for dynamically indexing samplers, which the driver doesn't do yet.
Eric Anholt [Tue, 8 Jan 2019 17:56:52 +0000 (09:56 -0800)]
v3d: Add support for matrix inputs to the FS.
We've been relying on linking splitting up our varying matrices into
separate vectors, but with SSO that doesn't happen. Supporting matrix
inputs isn't too hard, though.
Eric Anholt [Fri, 4 Jan 2019 17:17:15 +0000 (09:17 -0800)]
v3d: Add an isr to the simulator to catch GMP violations.
Otherwise, the simulator raises the GMP interrupt and waits for it to be
handled, and v3d ends up spinning in v3d_hw_tick(). Aborting right when
violation happens gives us a chance to look at the backtrace of whatever
thread triggered the violation.
Eric Anholt [Fri, 28 Dec 2018 07:11:49 +0000 (23:11 -0800)]
v3d: Fix txf_ms 2D_ARRAY array index.
We need to pass the array index through our coordinate transform
unchanged. Fixes
dEQP-GLES31.functional.texture.multisample.samples_1.*_2d_array
Eric Anholt [Fri, 28 Dec 2018 03:57:03 +0000 (19:57 -0800)]
v3d: Add support for GL_ARB_framebuffer_no_attachments.
Fixes
dEQP-GLES31.functional.state_query.integer.max_framebuffer_height_getboolean
when GLES3 is enabled.
Eric Anholt [Fri, 4 Jan 2019 21:33:35 +0000 (13:33 -0800)]
v3d: Add support for the early_fragment_tests flag.
If this flag hasn't been set by the shader and it has some visible side
effects, then we need to disable EZ.
Eric Anholt [Mon, 3 Dec 2018 23:28:49 +0000 (15:28 -0800)]
v3d: Add support for flushing dirty TMU data at job end.
This will be needed for SSBOs and image_load_store.
Samuel Pitoiset [Mon, 14 Jan 2019 16:55:18 +0000 (17:55 +0100)]
ac: add missing 16-bit types to glsl_base_to_llvm_type()
Fix crashes with
dEQP-VK.spirv_assembly.instruction.compute.workgroup_memory.*16
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Bas Nieuwenhuizen [Mon, 14 Jan 2019 13:44:15 +0000 (14:44 +0100)]
radv: Only use 32 KiB per threadgroup on Stoney.
Causes hangs on some machines.
What works for dEQP-VK.tessellation.shader_input_output.barrier:
- running num_patches = 6 (which limits LDS to 32 KiB)
- running num_patches = 8, and artificially cutting LDS size at 32 KiB.
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Marek Olšák [Fri, 11 Jan 2019 21:19:02 +0000 (16:19 -0500)]
st/dri: fix dri2_format_table for argb1555 and rgb565
The bug caused that rgb565 framebuffers used argb1555.
Fixes:
433ca3127a3b94bfe9a513e7c7ce594e09e1359f
Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Jason Ekstrand [Mon, 22 Oct 2018 21:44:59 +0000 (16:44 -0500)]
nir: Add a bool to float32 lowering pass
From @jekstrand's nir-1-bit-bool branch, with improved ior/inot lowering.
ior: fmax instead of fadd allows removing the fsat.
inot: seq(x, 0) can be better than fsub(1, x). On a2xx, it works better
with the scalar instruction set.
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Caio Marcelo de Oliveira Filho [Fri, 11 Jan 2019 20:01:30 +0000 (12:01 -0800)]
src/intel: use new hash table and set creation helpers
Replace calls to create hash tables and sets that use
_mesa_hash_pointer/_mesa_key_pointer_equal with the helpers
_mesa_pointer_hash_table_create() and _mesa_pointer_set_create().
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Caio Marcelo de Oliveira Filho [Fri, 11 Jan 2019 19:50:53 +0000 (11:50 -0800)]
src/compiler: use new hash table and set creation helpers
Replace calls to create hash tables and sets that use
_mesa_hash_pointer/_mesa_key_pointer_equal with the helpers
_mesa_pointer_hash_table_create() and _mesa_pointer_set_create().
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Caio Marcelo de Oliveira Filho [Tue, 11 Sep 2018 23:37:33 +0000 (16:37 -0700)]
util: Helper to create sets and hashes with pointer keys
These combinations are common enough and deserve a shortcut.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Samuel Pitoiset [Mon, 29 Oct 2018 15:31:07 +0000 (16:31 +0100)]
ac/nir: set cache policy when loading/storing buffer images
This was missing.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Mon, 29 Oct 2018 15:16:46 +0000 (16:16 +0100)]
ac/nir: add get_cache_policy() helper and use it
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Jason Ekstrand [Tue, 26 Jun 2018 16:08:48 +0000 (09:08 -0700)]
anv: Implement VK_KHR_depth_stencil_resolve
Jason Ekstrand [Fri, 31 Aug 2018 19:50:08 +0000 (14:50 -0500)]
anv: Move resolve_subpass to genX_cmd_buffer.c
We may have to do transitions around certain kinds of resolves so it
helps to have it genX code.
Jason Ekstrand [Tue, 26 Jun 2018 17:01:00 +0000 (10:01 -0700)]
anv/blorp: Refactor MSAA resolves into an exportable helper function
This function is modeled after the aux_op functions except that it has a
lot more parameters because it deals with two images as well as source
and destination regions.
Jason Ekstrand [Tue, 26 Jun 2018 16:35:35 +0000 (09:35 -0700)]
anv: Rename has_resolve to has_color_resolve
Jason Ekstrand [Tue, 26 Jun 2018 15:22:17 +0000 (08:22 -0700)]
intel/blorp: Add two more filter modes
Andres Gomez [Fri, 11 Jan 2019 14:43:27 +0000 (16:43 +0200)]
bin/get-pick-list.sh: fix redirection in sh
"&>" is bash specific.
Fixes:
e0dbfc99537 ("bin/get-pick-list.sh: warn when commit lists invalid sha")
Cc: Juan A. Suarez <jasuarez@igalia.com>
Cc: Eric Engestrom <eric.engestrom@intel.com>
Cc: Dylan Baker <dylan@pnwbakers.com>
Cc: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Andres Gomez [Fri, 11 Jan 2019 14:42:25 +0000 (16:42 +0200)]
bin/get-pick-list.sh: fix the oneline printing
"--summary" will also print extended header information such as
creations, renames and mode changes.
Let's just use "--no-patch", which suppresses the diff output.
v2: Use "--no-patch" instead of the "-s" abbreviation (Eric).
Fixes:
559c32d2412 ("bin/get-pick-list.sh: simplify git oneline printing")
Cc: Juan A. Suarez <jasuarez@igalia.com>
Cc: Eric Engestrom <eric.engestrom@intel.com>
Cc: Dylan Baker <dylan@pnwbakers.com>
Cc: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Michel Dänzer [Mon, 14 Jan 2019 11:52:52 +0000 (12:52 +0100)]
amd/common: Restore v4i32 suffix for llvm.SI.load.const intrinsic
It was accidentally dropped in commit
e4803ab7d2b6 "amd/common: use
llvm.amdgcn.s.buffer.load for LLVM 8.0", breaking the universe with LLVM
7.
Trivial.
Nicolai Hähnle [Thu, 10 Jan 2019 22:21:46 +0000 (23:21 +0100)]
amd/common/vi+: enable SMEM loads with GLC=1
Only on LLVM 8.0+, which supports the new intrinsic.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Nicolai Hähnle [Thu, 10 Jan 2019 21:59:58 +0000 (22:59 +0100)]
amd/common: use llvm.amdgcn.s.buffer.load for LLVM 8.0
llvm.SI.load.const is deprecated.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Iago Toral Quiroga [Fri, 11 Jan 2019 11:54:16 +0000 (12:54 +0100)]
anv/pipeline_cache: free NIR shader cache
Fixes:
f6aa9f718516 'anv/pipeline_cache: Add support for caching NIR'
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Danylo Piliaiev [Thu, 10 Jan 2019 16:16:59 +0000 (18:16 +0200)]
glsl: Fix copying function's out to temp if dereferenced by array
Function's out variable could be an array dereferenced by an array:
func(v[w[i]]);
or something more complicated.
Copy index in any case.
Fixes:
76c27e47b906 ("glsl: Copy function out to temp if we don't directly ref a variable")
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Sat, 29 Dec 2018 01:54:57 +0000 (17:54 -0800)]
i965: Drop mark_surface_used mechanism.
The original idea was that the backend compiler could eliminate
surfaces, so we would have it mark which ones are actually used,
then shrink the binding table accordingly. Unfortunately, it's a
pretty blunt mechanism - it can only prune things from the end,
not the middle - since we decide the layout before we even start
the backend compiler, and only limit the size. It also basically
gives up if it sees indirect array access.
Besides, we do the vast majority of our surface elimination in NIR
anyway, not the backend - and I don't see that trend changing any
time soon. Vulkan abandoned this plan a long time ago, and I don't
use it in Iris, but it's still been kicking around in i965.
I hacked shader-db to print the binding table size in bytes, and
observed no changes with this patch. So, this code appears to do
nothing useful.
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Eric Engestrom [Wed, 7 Nov 2018 13:07:09 +0000 (13:07 +0000)]
egl: fix python lib deprecation warning
DeprecationWarning: the imp module is deprecated in favour of importlib
Instead of complicated logic, just import the file directly.
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Jason Ekstrand [Sat, 12 Jan 2019 03:36:28 +0000 (21:36 -0600)]
spirv: Emit switch conditions on-the-fly
Instead of emitting all of the conditions for the cases of a switch
statement up-front, emit them on-the-fly as we emit the code for each
case. The original justification for this was that we were going to
have to build a default case anyway which would need them all. However,
we can just trust CSE to clean up the mess in that case. Emitting each
condition right before the if statement that uses it reduces register
pressure and, in one customer benchmark, reduces spilling and improves
performance by about 2x.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Jason Ekstrand [Sat, 12 Jan 2019 08:04:14 +0000 (02:04 -0600)]
nir/gcm: Support deref instructions
Even though no one's been brave enough to ever use this pass, I like to
keep it functionally working.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Jason Ekstrand [Fri, 11 Jan 2019 20:33:17 +0000 (14:33 -0600)]
intel/nir: Call nir_opt_deref in brw_nir_optimize
It's an optimization so we should probably be calling it in the
optimization loop.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Jason Ekstrand [Fri, 11 Jan 2019 21:02:39 +0000 (15:02 -0600)]
spirv: Contain the GLSLang issue #179 workaround to old GLSLang
Instead of applying the workaround universally, detect semi-old GLSLang
via the generator ID and only enable the workaround on old GLSLang.
This isn't nearly as precise as one would like it to be because the
first GLSLang generator id version bump was on October 7, 2017 which is
about 1.5 years after the bug was fixed. However, it at least lets us
disable it for non-GLSLang and for more modern versions.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Jason Ekstrand [Fri, 11 Jan 2019 20:17:24 +0000 (14:17 -0600)]
spirv: Whack sampler/image pointers to uniform
A long time in a galaxy far far away, there was a GLSLang bug with how
it handled samplers passed in as function parameters. (The bug can be
found here: https://github.com/KhronosGroup/glslang/issues/179.)
Unfortunately, that version was shipped in several apps and has been
causing heartburn for our SPIR-V parser ever since.
Recent changes to NIR uncovered a moderately old bug in how we work
around this issue. In particular, we ended up with a deref_cast from
uniform to local which is not a no-op cast so nir_opt_deref wasn't
getting rid of the cast. The only reason why it worked before was
because someone just happened to call nir_fixup_deref_modes which
"fixed" the cast (that shouldn't be happening) and then a later round of
copy-prop would get rid of it. The fact that the deref_cast survived
that long without causing trouble for other parts of NIR is a bit
surprising.
Just whacking the mode of the pointer seems to fix it fairly
unobtrusively. Currently, only apps with this bug will have a local
variable containing an image or sampler.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109304
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Kenneth Graunke [Thu, 19 Jul 2018 01:46:09 +0000 (18:46 -0700)]
st/nir: Lower TES gl_PatchVerticesIn to a constant if linked with a TCS.
If the TCS and TES are linked together, we can simply replace the TES's
gl_PatchVerticesIn system value with a constant, possibly allowing extra
optimization or letting the driver avoid uploading a special value.
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Jonathan Marek [Wed, 19 Dec 2018 04:31:30 +0000 (23:31 -0500)]
glsl/nir: keep bool types when native_integers=false
With the new handling of bool types, the conversion to float in glsl_to_nir
should not apply to bool types anymore.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Jonathan Marek [Mon, 12 Nov 2018 22:00:08 +0000 (17:00 -0500)]
glsl/nir: ftrunc for native_integers=false float to int cast
out_type in the default cast case is always GLSL_TYPE_FLOAT, so we get a
mov otherwise.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Jonathan Marek [Mon, 12 Nov 2018 18:08:50 +0000 (13:08 -0500)]
glsl/nir: int constants as float for native_integers=false
All alu instructions emitted with native_integers=false expect float
(or bool in some cases) constants, so this change is necessary.
This will cause changes with some intrinsics which had integer sources,
such as nir_intrinsic_load_uniform. Apparently it might cause issues with
some opt passes, but perhaps those don't apply in OpenGL ES 2.0 cases?
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Jason Ekstrand [Wed, 17 Oct 2018 16:34:32 +0000 (11:34 -0500)]
intel/peephole_ffma: Fix swizzle propagation
The num_components value passed into get_mul_for_src is used to only
compose the parts of the swizzle that we know will be used so we don't
compose invalid swizzle components. However, we had a bug where we
passed the number of components of the add all the way through. For the
given source, we need the number of components read from that source.
In the case where we have a narrow add, say 2 components, that is
sourced from a chain of wider instructions, we may not compose all the
swizzles. All we really need to do is pass through the right number of
components at each level.
Fixes:
2231cf0ba3a "nir: Fix output swizzle in get_mul_for_src"
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Thu, 10 Jan 2019 19:10:13 +0000 (11:10 -0800)]
nir: Allow a non-existent sampler deref in nir_lower_samplers_as_deref
GL_ARB_gl_spirv does not provide a sampler deref for e.g. texelFetch(),
so we can't assume that both are present and identical. Simply lower
each if it is present.
Fixes regressions in GL_ARB_gl_spirv tests since I switched everyone to
using this pass. Thanks to Alejandro Piñeiro for catching these.
Fixes:
f003859f97c nir: Make gl_nir_lower_samplers use gl_nir_lower_samplers_as_deref
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Alejandro Piñeiro <apinheiro@igalia.com>
Eric Engestrom [Wed, 2 Jan 2019 12:28:48 +0000 (12:28 +0000)]
travis: avoid using unset llvm-config
Fixes the following errors:
usage: which [-as] program ...
/Users/travis/.travis/job_stages: line 110: --version: command not found
... caused by the use of an undefined $LLVM_CONFIG
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Eric Engestrom [Wed, 16 May 2018 13:18:02 +0000 (14:18 +0100)]
egl: remove unused include
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Eric Engestrom [Wed, 16 May 2018 13:17:30 +0000 (14:17 +0100)]
egl: add missing includes
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Iago Toral Quiroga [Fri, 11 Jan 2019 10:41:01 +0000 (11:41 +0100)]
anv/pipeline_cache: fix incorrect guards for NIR cache
Fixes:
f6aa9f718516 'anv/pipeline_cache: Add support for caching NIR'
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Kenneth Graunke [Wed, 9 Jan 2019 23:15:49 +0000 (15:15 -0800)]
blorp: Pass the batch to lookup/upload_shader instead of context
This will allow drivers to pin shader buffers if necessary.
i965 and anv do not need to do this today, but iris will.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Wed, 9 Jan 2019 21:31:18 +0000 (13:31 -0800)]
blorp: Add blorp_get_surface_address to the driver interface.
Currently, BLORP expects drivers to provide two functions for dealing
with buffers: blorp_emit_reloc and blorp_surface_reloc. Both record a
relocation and combine the BO address and offset into a full 64-bit
address. Traditionally, blorp_surface_reloc has written that combined
address to an implicitly-known buffer where surface states are stored.
(In contrast, blorp_emit_reloc returns the value.)
The upcoming Iris driver stores surface states in multiple buffers,
which makes it impossible for blorp_surface_reloc to write the combined
address - it only takes an offset, not the actual buffer to write to.
This commit adds a third function, blorp_get_surface_address, which
combines and returns an address, which is then passed to ISL's surface
state fill functions. Softpin-only drivers can return a real address
here and skip writing it in blorp_surface_reloc. Relocation-based
drivers are have options. They can simply return 0 from the new
function, and continue writing the address from blorp_surface_reloc.
Or, they can return a presumed address from blorp_get_surface_address,
and have other relocation processing write the real value later.
For now, i965 and anv simply return 0.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Ilia Mirkin [Thu, 27 Dec 2018 01:57:18 +0000 (20:57 -0500)]
docs: fix gallium screen cap docs
Make sure that the next line starts with spaces so that bullets are
maintained throughout, add `` around a few more special tokens, and fix
SAMPLE_COUNT_TEXTURE -> SAMPLE_COUNT.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Danylo Piliaiev [Wed, 5 Sep 2018 12:26:48 +0000 (15:26 +0300)]
glsl: Make invariant outputs in ES fragment shader not to cause error
In all GLSL ES versions output variables in fragment shader are allowed
to be invariant.
From Section 4.6.1 ("The Invariant Qualifier") GLSL ES 1.00 spec:
"Only the following variables may be declared as invariant:
...
- Built-in special variables output from the fragment shader."
From Section 4.6.1 ("The Invariant Qualifier") GLSL ES 3.00 spec:
"Only variables output from a shader can be candidates for invariance."
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107842
Jason Ekstrand [Fri, 12 Oct 2018 22:54:41 +0000 (17:54 -0500)]
anv/pipeline: Cache the pre-lowered NIR
This adds a second level of caching for the pre-lowered NIR that's only
based off of the shader module, entrypoint and specialization constants.
This is enough for spirv_to_nir as well as our first round of lowering
and optimization. Caching at this level should allow for faster shader
recompiles due to state changes.
The NIR caching does not get serialized to disk via either the
VkPipelineCache serialization mechanism or the transparent on-disk
cache. We could but it's usually not that expensive to fall back to
SPIR-V for the odd cache miss especially if it only happens once for
several misses and it simplifies the cache.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Jason Ekstrand [Fri, 12 Oct 2018 22:40:21 +0000 (17:40 -0500)]
anv/pipeline_cache: Add support for caching NIR
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Jason Ekstrand [Fri, 12 Oct 2018 22:01:24 +0000 (17:01 -0500)]
anv/pipeline: Hash shader modules and spec constants separately
The stuff hashed by anv_pipeline_hash_shader is exactly the inputs to
anv_shader_compile_to_nir so it can be used for NIR caching.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>