Mike Blumenkrantz [Thu, 2 Feb 2023 22:15:25 +0000 (17:15 -0500)]
zink: enable bindless texture with ZINK_DESCRIPTORS=db
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21085>
Mike Blumenkrantz [Thu, 2 Feb 2023 22:14:36 +0000 (17:14 -0500)]
zink: implement descriptor buffer handling of bindless texture
pretty straightforward, just lazily allocating the context-based db
and then writing updates to it on-demand
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21085>
Mike Blumenkrantz [Thu, 2 Feb 2023 22:09:14 +0000 (17:09 -0500)]
zink: add a flag to indicate whether a descriptor buffer is bound
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21085>
Mike Blumenkrantz [Thu, 2 Feb 2023 22:08:35 +0000 (17:08 -0500)]
zink: break out descriptor binding into separate function
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21085>
Mike Blumenkrantz [Thu, 2 Feb 2023 21:14:56 +0000 (16:14 -0500)]
zink: set VK_PIPELINE_CREATE_DESCRIPTOR_BUFFER_BIT_EXT on compute pipelines
same as gfx
Fixes:
7ab5c5d36d2 ("zink: use EXT_descriptor_buffer with ZINK_DESCRIPTORS=db")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21085>
Mike Blumenkrantz [Thu, 2 Feb 2023 19:06:40 +0000 (14:06 -0500)]
zink: skip updating descriptor buffer sets that aren't active
this is a no-op and illegal
Fixes:
7ab5c5d36d2 ("zink: use EXT_descriptor_buffer with ZINK_DESCRIPTORS=db")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21085>
Mike Blumenkrantz [Thu, 2 Feb 2023 18:02:06 +0000 (13:02 -0500)]
zink: fix bindless struct member comments
this was a bit confusing having the overall substruct comment which
was occasionally wrong
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21085>
Mike Blumenkrantz [Thu, 2 Feb 2023 16:22:25 +0000 (11:22 -0500)]
zink: make bindless buffer_infos a union
prep for descriptor buffer handling
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21085>
Mike Blumenkrantz [Thu, 2 Feb 2023 15:44:12 +0000 (10:44 -0500)]
zink: enable PIPE_CAP_ALLOW_GLTHREAD_BUFFER_SUBDATA_OPT
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21073>
Marek Olšák [Wed, 1 Feb 2023 17:03:27 +0000 (12:03 -0500)]
amd/ci: update sanctuary trace sha1
I guess it's because RB+ blending is now more precise.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
Marek Olšák [Tue, 31 Jan 2023 06:05:44 +0000 (01:05 -0500)]
radeonsi: set sampler COMPAT_MODE in the corresponding branch
no functional change
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
Marek Olšák [Tue, 31 Jan 2023 12:30:51 +0000 (07:30 -0500)]
radeonsi: call ac_init_llvm_once before any util_queue initialization
The winsys uses util_queue, which calls atexit, so do it before the winsys
is created.
Cc: stable
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
Marek Olšák [Wed, 25 Jan 2023 03:26:38 +0000 (22:26 -0500)]
amd/llvm: fix LLVM 15 & 16 crashes in SelectionDAG.cpp
Cc: stable
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
Marek Olšák [Tue, 31 Jan 2023 11:15:34 +0000 (06:15 -0500)]
radeonsi: set NEVER as the depth compare func if depth compare is disabled
Fixes:
0c6e56c391a262bef - mesa: (more) correctly handle incomplete depth textures
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
Marek Olšák [Tue, 31 Jan 2023 05:16:55 +0000 (00:16 -0500)]
amd/registers: remove confusing definitions from gfx10-rsrc.json
this will never be used and shouldn't have been added
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
Marek Olšák [Mon, 30 Jan 2023 12:49:34 +0000 (07:49 -0500)]
amd: document OOB behavior on gfx11
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
Marek Olšák [Fri, 27 Jan 2023 23:02:37 +0000 (18:02 -0500)]
amd: fix typo in shadowed uconfig registers on gfx11
It used an invalid offset, which hung.
Fixes:
f24f8665dbe2a - ac: implement register shadowing for gfx11
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
Marek Olšák [Fri, 27 Jan 2023 04:31:38 +0000 (23:31 -0500)]
amd: sort and re-indent packet definitions
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
Marek Olšák [Wed, 25 Jan 2023 09:40:38 +0000 (04:40 -0500)]
amd: update late_alloc_wave64 for gfx11
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
Marek Olšák [Wed, 25 Jan 2023 09:40:13 +0000 (04:40 -0500)]
amd: update the cache size for gfx1103_r1
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
Marek Olšák [Wed, 25 Jan 2023 09:39:03 +0000 (04:39 -0500)]
amd: change pbb_max_alloc_count for gfx11
based on PAL
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
Marek Olšák [Wed, 25 Jan 2023 09:37:54 +0000 (04:37 -0500)]
amd: unify and tune the attribute ring size for gfx11
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
Marek Olšák [Wed, 25 Jan 2023 07:48:44 +0000 (02:48 -0500)]
radeonsi: never set INTERPOLATE_COMP_Z
based on PAL
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
Marek Olšák [Wed, 25 Jan 2023 06:19:27 +0000 (01:19 -0500)]
radeonsi: determine alpha_to_coverage robustly in si_update_framebuffer_blend_rasterizer
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
Marek Olšák [Wed, 25 Jan 2023 06:10:41 +0000 (01:10 -0500)]
radeonsi: merge si_ps_key_update_framebuffer_blend & .._update_blend_rasterizer
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
Marek Olšák [Tue, 24 Jan 2023 23:29:28 +0000 (18:29 -0500)]
radeonsi/gfx11: always set MSAA_NUM_SAMPLES=0 for DCC_DECOMPRESS
hw requirement
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
Marek Olšák [Tue, 24 Jan 2023 22:06:50 +0000 (17:06 -0500)]
radeonsi: deduplicate VS/TES/GS update code
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
Marek Olšák [Tue, 24 Jan 2023 11:10:12 +0000 (06:10 -0500)]
radeonsi/gfx11: use new packet EVENT_WRITE_ZPASS
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
Marek Olšák [Tue, 24 Jan 2023 11:02:15 +0000 (06:02 -0500)]
radeonsi/gfx11: move the PIXEL_PIPE_STAT_CONTROL event into the GFX preambles
Both the normal and shadowing preamable should do this.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
Marek Olšák [Tue, 24 Jan 2023 05:21:47 +0000 (00:21 -0500)]
radeonsi/gfx11: fix blend->cb_target_mask dependency for shader keys
Shader keys only use cb_target_enabled_4bit. This may cause shaders to be
updated less often, but otherwise no change in behavior.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>š
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
Marek Olšák [Tue, 24 Jan 2023 05:05:11 +0000 (00:05 -0500)]
radeonsi/gfx11: adjust ACCUM_* fields for tessellation
based on PAL
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
Marek Olšák [Tue, 24 Jan 2023 04:40:36 +0000 (23:40 -0500)]
radeonsi/gfx11: add a comment why we use PRIM_GRP_SIZE <= 252
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
Marek Olšák [Tue, 24 Jan 2023 02:29:37 +0000 (21:29 -0500)]
radeonsi/gfx11: remove the INST_PREF_SIZE workaround
The hw does the right thing automatically. (i.e. enables or disables
the feature)
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
Marek Olšák [Tue, 24 Jan 2023 06:08:33 +0000 (01:08 -0500)]
radeonsi: implement RB+ depth-only rendering for better perf
The explanation is in the last change of this commit.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
Marek Olšák [Tue, 24 Jan 2023 10:48:33 +0000 (05:48 -0500)]
amd: improve RB+ blending precision
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
Marek Olšák [Tue, 24 Jan 2023 02:27:34 +0000 (21:27 -0500)]
amd: update shadowed register tables for gfx11
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
Marek Olšák [Tue, 24 Jan 2023 10:47:38 +0000 (05:47 -0500)]
amd: update SX_BLEND_OPT_EPSILON.MRT0_EPSILON enum definitions
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
Marek Olšák [Tue, 24 Jan 2023 07:44:48 +0000 (02:44 -0500)]
amd: fix tile_swizzle on gfx11 - should be shifted by 10 bits, not 8
This reverts the radv_adjust_tile_swizzle change to unify the code.
Fixes:
529eb739fc4 - radeonsi/gfx11: add CB deltas
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
Marek Olšák [Tue, 24 Jan 2023 08:00:38 +0000 (03:00 -0500)]
amd: split GFX1103 into GFX1103_R1 and GFX1103_R2
Fixes:
caa09f66ae4 - amd: add chip identification for gfx1100-1103
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
Marek Olšák [Tue, 24 Jan 2023 04:08:36 +0000 (23:08 -0500)]
radeonsi/gfx11: unset SAMPLE_MASK_TRACKER_WATERMARK to fix hangs
Same as PAL.
Fixes:
529eb739fc4 - radeonsi/gfx11: add CB deltas
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
Marek Olšák [Tue, 24 Jan 2023 10:52:17 +0000 (05:52 -0500)]
radeonsi: fix RB+ blending with sRGB formats
The epsilon for 8bpc is for the linear colorspace. There is no epsilon
for sRGB.
Fixes:
17021efc742 - radeonsi: adjust RB+ blend optimization settings
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
Marek Olšák [Thu, 26 Jan 2023 19:37:58 +0000 (14:37 -0500)]
radeonsi/ci: add gfx1100 results
There are also a lot of flakes.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
Marek Olšák [Fri, 27 Jan 2023 04:00:45 +0000 (23:00 -0500)]
radeonsi/ci: update gfx10.3 results
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
Emma Anholt [Wed, 1 Feb 2023 23:23:00 +0000 (15:23 -0800)]
turnip: Make the tiling-impossible case have an impossible tile layout.
This helped me catch inappropriate tiling work being done in this case.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21004>
Emma Anholt [Wed, 1 Feb 2023 23:09:05 +0000 (15:09 -0800)]
tu: Only emit the conditional gmem subpass resolves when gmem is possible.
No sense emitting this work when the subpass deps or attachment size
prevents gmem. Noticed when I had uninit values in the tiling layout.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21004>
Emma Anholt [Tue, 31 Jan 2023 00:25:30 +0000 (16:25 -0800)]
turnip: Optimize tile sizes to reduce the number of bins.
We were aiming for very square tiles, but it's actually better for us to
reduce the number of different bins so you take fewer trips through the
geometry and keep the caches hotter. Example changes to aztec ruins on
angle:
3x3 tiles of 352x352 to 4x2 tiles of 256x512
4x5 tiles of 256x224 to 5x4 tiles of 224x256
17x11 tiles of 160x128 to 14x11 tiles of 192x128
12x7 tiles of 224x224 to 7x11 tiles of 384x128
12x8 tiles of 224x192 to 7x11 tiles of 384x128
11x6 tiles of 256x256 to 12x5 tiles of 224x288
11x7 tiles of 256x224 to 7x9 tiles of 384x160
8x4 tiles of 352x352 to 6x5 tiles of 448x288
and minecraft:
3x3 tiles of 352x352 to 4x2 tiles of 256x512
12x6 tiles of 256x256 to 3x23 tiles of 1024x64
12x7 tiles of 256x224 to 8x9 tiles of 384x160
FPS changes:
VK aztec ruins normal: 1.12478% +/- 0.213393% (n=67)
ANGLE manhattan_31: +1.42813% +/- 0.893332% (n=7).
ANGLE minecraft: no change (n=21)
ANGLE google_maps: +6.80618% +/- 2.40857% (n=4)
ANGLE trex_200: no change (n=11)
ANGLE pubg: no change (n=21)
Fixes: #8160
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21004>
Emma Anholt [Wed, 1 Feb 2023 23:20:14 +0000 (15:20 -0800)]
tu: Mark tiling impossible if we couldn't lay out gmem in the first place.
We were leaving the field undefined, which tripped me up later.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21004>
Sagar Ghuge [Wed, 1 Feb 2023 23:44:48 +0000 (15:44 -0800)]
nir: Handle other variants of image_samples properly while lowering
while lowering image_samples to one, we need to take
nir_intrinsic_image_deref_samples and
nir_intrinsic_bindless_image_samples intrinsic into account.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8211
Fixes:
ab4c2990ed4 ("intel/compiler: use lower_image_samples_to_one")
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21053>
Juston Li [Tue, 31 Jan 2023 23:57:24 +0000 (15:57 -0800)]
anv: check initial cmd_buffer is chainable
Submitting a batch with the first command buffer with the simultaneous
bit set followed by a command buffer without the bit set gets past the
check and triggers this assert attempting to chain them:
../src/intel/vulkan/anv_batch_chain.c:1147: anv_cmd_buffer_chain_command_buffers: Assertion `num_cmd_buffers == 1' failed.
Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21056>
Jesse Natalie [Wed, 1 Feb 2023 20:48:24 +0000 (12:48 -0800)]
wsi/win32: We don't need a window DC for DXGI
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21049>
Jesse Natalie [Wed, 1 Feb 2023 20:48:24 +0000 (12:48 -0800)]
wsi/win32: Don't require buffer blits for software drivers
Lavapipe can directly render to a linear CPU image and then BitBlit
straight from there.
Fixes:
2f462105 ("vulkan/wsi: Hook-up DXGI swapchains and DComp")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8085
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21049>
Erik Faye-Lund [Wed, 1 Feb 2023 15:06:36 +0000 (16:06 +0100)]
anv, hasvk: remove stale TODO-files
This file hasn't really been updated since 2016, apart from a single
search-replace two years ago.
That's an eternity in ANV-land, so let's just remove these.
While we're at it, also remove the duplicate in hasvk.
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21044>
Lucas Stach [Mon, 30 Jan 2023 17:58:30 +0000 (18:58 +0100)]
etnaviv: fix double scanout import of multiplanar resources
etna_resource_from_handle() is called for each plane of a multiplanar
resource, so there is no point in looping over all planes to do the
renderonly scanout import. In fact that will cause us to lose track
of the scanout imports from later planes when the earlier planes are
redoing the import, overwriting the pointer to the allocated
renderonly_scanout struct.
Drop the loop and just do the import for the current plane.
Fixes:
826f95778a4e ("etnaviv: always try to create KMS side handles for imported resources")
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20993>
Emma Anholt [Thu, 2 Feb 2023 01:07:15 +0000 (17:07 -0800)]
ci: Drop the itoral-gl-terrain demo from traces.
There's an app bug in the CSM rendering that causes undefined results.
Fixes: #8212
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21055>
Georg Lehmann [Tue, 3 Jan 2023 21:54:10 +0000 (22:54 +0100)]
aco: Improve wave64 cycle estimates.
Reviewed-By: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20507>
Mike Blumenkrantz [Thu, 2 Feb 2023 16:15:18 +0000 (11:15 -0500)]
Revert "zink: fix zink_mem_type_idx_from_bits()"
This reverts commit
f7796997964bb462bcbfa6b9faca5dcf04b64e1b.
I was doing too much F2F and not enough thinking with this one
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21076>
Rose Hudson [Sat, 21 Jan 2023 22:23:33 +0000 (22:23 +0000)]
asahi: wire up shader disk cache support
Note: I (Alyssa) have squashed in some minor changes squashed in pre merge. The
rest is Rose's work :-)
Closes: #8091
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20835>
Samuel Pitoiset [Thu, 2 Feb 2023 13:24:45 +0000 (14:24 +0100)]
radv: simplify an assertion after considering RADV_FORCE_VRS
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21068>
Samuel Pitoiset [Wed, 1 Feb 2023 18:14:47 +0000 (19:14 +0100)]
radv: skip compilation when possible with GPL fast-linking
When all shader stages have already been imported it's possible to
skip radv_graphics_pipeline_compile() entirely. This makes GPL
fast-linking VERY fast.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21068>
Samuel Pitoiset [Thu, 2 Feb 2023 12:17:37 +0000 (13:17 +0100)]
radv: determine the last VGT API stage earlier
It can be computed right after the active stages are known. While we
are at it, simplify the code.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21068>
Samuel Pitoiset [Thu, 2 Feb 2023 09:12:51 +0000 (10:12 +0100)]
radv: stop using the graphics pipeline key after compilation
Only the blend state was relying on the graphics pipeline key. This
will allow us to skip generating it when there is no compilation at
all (for fast-linking with GPL).
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21068>
Samuel Pitoiset [Thu, 2 Feb 2023 13:15:35 +0000 (14:15 +0100)]
radv: return a boolean value in radv_pipeline_needs_dynamic_ps_epilog()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21068>
Samuel Pitoiset [Thu, 2 Feb 2023 09:56:10 +0000 (10:56 +0100)]
radv: pass the lib flags for generating the pipeline key
No functional change.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21068>
Eric Engestrom [Thu, 2 Feb 2023 14:44:03 +0000 (14:44 +0000)]
v3dv: mark dEQP-VK.api.command_buffers.record_many_draws_secondary_2 as flaky
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21070>
Samuel Pitoiset [Thu, 2 Feb 2023 12:21:43 +0000 (13:21 +0100)]
radv: remove one unused variable in radv_graphics_lib_pipeline_init()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21042>
Samuel Pitoiset [Wed, 1 Feb 2023 13:56:22 +0000 (14:56 +0100)]
radv: allow to create a noop FS in a library with GPL
Otherwise, a noop FS will be always compiled during linking if not
provided by the application and that is too slow for fast-linking.
This should be improved to use a global noop FS but it's really tricky
because NIR linking doesn't do anything when the next stage is unknown,
and hence doesn't remove unused varyings.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21042>
Mike Blumenkrantz [Tue, 31 Jan 2023 16:19:47 +0000 (11:19 -0500)]
zink: rework descriptor buffer templating to use offsets
compute programs can be reused across contexts, which means storing any
pointers directly like this is going to lead to desync and crash
instead, make this like regular descriptor templates and calculate the offset
from the current context to ensure that everything works as it should
fixes #8201
Fixes:
7ab5c5d36d2 ("zink: use EXT_descriptor_buffer with ZINK_DESCRIPTORS=db")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21020>
Asahi Lina [Wed, 11 Jan 2023 11:48:29 +0000 (20:48 +0900)]
asahi: Split off macOS support into its own file
All the ifdef __APPLE__ is getting really silly. Let's split off the
macOS UAPI abstraction into its own file, so we can have parallel
implementations.
Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21058>
Asahi Lina [Wed, 11 Jan 2023 11:57:27 +0000 (20:57 +0900)]
asahi: Split off common BO code into its own file
In preparation for splitting off the macOS backend implementation into
its own file, pull out the shared BO code from agx_device.c into
agx_bo.c.
Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21058>
Alyssa Rosenzweig [Thu, 15 Dec 2022 20:53:56 +0000 (15:53 -0500)]
asahi: Use non-UAPI specific BO create flags
So we're not tied to the macOS or Linux UAPIs and are not translating awkwardly
from one to the other when creating BOs. They're not quite equivalent -- macOS
doesn't include writeback information in this flag field, and Linux doesn't have
a executable flag. (Maybe we should add one, though? Then we can enforce W^X.)
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21058>
Martin Roukala (né Peres) [Wed, 1 Feb 2023 11:49:57 +0000 (13:49 +0200)]
zink/ci: allow running manual jobs again on RADV
Fixes:
f6c06ef2f66a ("ci: Add manual rules variations to disable.")
Reviewed-by: Emma Anholt <emma@anholt.net>
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21036>
Martin Roukala (né Peres) [Wed, 1 Feb 2023 10:56:08 +0000 (12:56 +0200)]
ci/core-manual-rules: enclose the whole condition in quotes
Quoting a condition is apparently an effective way of working around
YAML parsing weirdness. However, the quotes need to surround the whole
expression, not just parts of it.
Fixes:
f6c06ef2f66a ("ci: Add manual rules variations to disable.")
Suggested-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21036>
Alyssa Rosenzweig [Mon, 19 Dec 2022 02:12:19 +0000 (21:12 -0500)]
agx: Centralize texture lowering
Lowering buffer textures will interact with multiple of our existing lowerings,
and it's convenient to have it all in one place. This also keeps the pass
ordering dependencies centralized.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21060>
Erico Nunes [Tue, 31 Jan 2023 20:43:52 +0000 (21:43 +0100)]
Revert "CI: Lima farm is offline"
This reverts commit
0733aafa2271fee6a6724467ec7f2e50754d5a9d.
Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Acked-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21035>
Mike Blumenkrantz [Tue, 31 Jan 2023 21:46:51 +0000 (16:46 -0500)]
zink: fix zink_mem_type_idx_from_bits()
at some point this used to work, but it no longer does what it's supposed
to do, which is return a memtype from a heap+flags
Fixes:
d702a503ad5 ("zink: support multiple heaps per memory type")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21025>
Mike Blumenkrantz [Tue, 31 Jan 2023 21:37:15 +0000 (16:37 -0500)]
zink: only set VkPipelineColorBlendStateCreateInfo::attachmentCount without full ds3
this should be ignored by drivers/layers, but it isn't, and the crashing is immense
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21025>
Mike Blumenkrantz [Wed, 1 Feb 2023 20:04:53 +0000 (15:04 -0500)]
lavapipe: try harder to reuse pipeline layouts during merge
the original code was quite conservative and always created a new layout,
but many times this is unnecessary, and the original layout can just be refcounted
since it doesn't need to be merged
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21051>
Mike Blumenkrantz [Wed, 1 Feb 2023 19:33:16 +0000 (14:33 -0500)]
lavapipe: delete lvp_pipeline::mem_ctx
this is no longer used
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21051>
Mike Blumenkrantz [Wed, 1 Feb 2023 16:03:29 +0000 (11:03 -0500)]
lavapipe: delete unused pipelines immediately
deferring these can cause memory ballooning and oom
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21051>
Mike Blumenkrantz [Wed, 1 Feb 2023 15:46:13 +0000 (10:46 -0500)]
lavapipe: create gfx gallium csos at pipeline bind
this should minimize pipeline creation time and make fast-linking "fast"
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21051>
Mike Blumenkrantz [Wed, 1 Feb 2023 15:45:24 +0000 (10:45 -0500)]
lavapipe: break out (and slightly refactor) gallium shader cso creation
there's also now a(n unused) flag to indicate that the csos have been created
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21051>
Mike Blumenkrantz [Wed, 1 Feb 2023 15:42:59 +0000 (10:42 -0500)]
lavapipe: refcount nir shaders instead of cloning
this is just about ownership, not modification, so refcounting saves time
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21051>
Mike Blumenkrantz [Wed, 1 Feb 2023 15:23:50 +0000 (10:23 -0500)]
lavapipe: add refcounting for shader nir
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21051>
Mike Blumenkrantz [Wed, 1 Feb 2023 14:58:33 +0000 (09:58 -0500)]
lavapipe: move noop fs creation to device
this avoids creating a separate noop fs for every pipeline
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21051>
Chia-I Wu [Tue, 24 Jan 2023 21:49:21 +0000 (13:49 -0800)]
freedreno: support UBWC scanout
On sway+xwayland, both explicit and implicit modifiers are advertised.
While dri3proto says nothing about it, zwp_linux_dmabuf_v1 says
A compositor that sends valid modifiers and DRM_FORMAT_MOD_INVALID for
a given format supports both explicit modifiers and implicit
modifiers.
"glmark2 -b build:model=bunny --fullscreen" goes from 468 to 598fps on
a618 @ 2160x1440.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20892>
Chia-I Wu [Tue, 24 Jan 2023 21:44:17 +0000 (13:44 -0800)]
freedreno: add has_implicit_modifier helper
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20892>
Timur Kristóf [Thu, 26 Jan 2023 13:41:01 +0000 (14:41 +0100)]
nir/opt_algebraic: Add optimization for ieq/ine and right-shift.
Fossil DB stats on GFX11:
Totals from 1343 (1.00% of 134913) affected shaders:
SpillSGPRs: 7145 -> 7137 (-0.11%)
CodeSize:
20737744 ->
20739148 (+0.01%); split: -0.02%, +0.03%
Instrs: 4010443 -> 4008449 (-0.05%); split: -0.05%, +0.00%
Latency:
50021520 ->
50021105 (-0.00%); split: -0.00%, +0.00%
InvThroughput: 6354371 -> 6354112 (-0.00%); split: -0.00%, +0.00%
VClause: 63035 -> 63038 (+0.00%); split: -0.01%, +0.01%
SClause: 121162 -> 121166 (+0.00%)
Copies: 251354 -> 251058 (-0.12%); split: -0.18%, +0.06%
PreSGPRs: 137283 -> 137299 (+0.01%)
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20936>
Kenneth Graunke [Mon, 23 Jan 2023 21:52:30 +0000 (13:52 -0800)]
anv: Perform load_constant address math in 32-bit rather than 64-bit
We lower NIR's load_constant to load_global_constant, which uses A64
bindless messages. As such, we do the following math to produce the
address for each load:
base_lo@32 <- BRW_SHADER_RELOC_CONST_DATA_ADDR_LOW
base_hi@32 <- BRW_SHADER_RELOC_CONST_DATA_ADDR_HIGH
base@64 <- pack_64_2x32_split(base_lo, base_hi)
addr@64 <- iadd(base@64, u2u64(offset@32))
On platforms that emulate 64-bit math, we have to emit additional code
for the 64-bit iadd to handle the possibility of a carry happening and
affecting the top bits.
However, NIR constant data is always uploaded adjacent to the shader
assembly, in the same buffer. These buffers are required to live in a
4GB region of memory starting at Instruction State Base Address. We
always place the base address at a 4GB address. So the constant data
always lives in a buffer entirely contained within a 4GB region, which
means any offsets from the start of the buffer cannot possibly affect
the high bits.
So instead, we can simply do a 32-bit addition between the low bits of
the base and the offset, then pack that with the unchanged high bits.
On anv, INSTRUCTION_STATE_POOL_MIN_ADDRESS is 8GB, so the high bits are
always 0x2. We don't even need to patch that portion of the address and
can just use an immediate value. We do still need to pack, however.
fossil-db on Icelake indicates the following for affected shaders:
Instrs:
10830023 ->
10750080 (-0.74%)
Cycles:
1048521282 ->
1046770379 (-0.17%); split: -0.33%, +0.16%
Subgroup size: 103104 -> 103112 (+0.01%)
Send messages: 570886 -> 570760 (-0.02%)
Loop count: 14428 -> 14429 (+0.01%)
Spill count: 14246 -> 14244 (-0.01%); split: -0.06%, +0.04%
Fill count: 22802 -> 22794 (-0.04%); split: -0.04%, +0.01%
Scratch Memory Size: 654336 -> 662528 (+1.25%)
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20999>
Kenneth Graunke [Mon, 23 Jan 2023 19:57:18 +0000 (11:57 -0800)]
iris: Perform load_constant address math in 32-bit rather than 64-bit
We lower NIR's load_constant to load_global_constant, which uses A64
bindless messages. As such, we do the following math to produce the
address for each load:
base_lo@32 <- BRW_SHADER_RELOC_CONST_DATA_ADDR_LOW
base_hi@32 <- BRW_SHADER_RELOC_CONST_DATA_ADDR_HIGH
base@64 <- pack_64_2x32_split(base_lo, base_hi)
addr@64 <- iadd(base@64, u2u64(offset@32))
On platforms that emulate 64-bit math, we have to emit additional code
for the 64-bit iadd to handle the possibility of a carry happening and
affecting the top bits.
However, NIR constant data is always uploaded adjacent to the shader
assembly, in the same buffer. These buffers are required to live in a
4GB region of memory starting at Instruction State Base Address. We
always place the base address at a 4GB address. So the constant data
always lives in a buffer entirely contained within a 4GB region, which
means any offsets from the start of the buffer cannot possibly affect
the high bits.
So instead, we can simply do a 32-bit addition between the low bits of
the base and the offset, then pack that with the unchanged high bits.
On iris, IRIS_MEMZONE_SHADER is at [0, 4GB) so the high bits are always
zero. We don't even need to patch that portion of the address and can
simply use u2u64 to promote the 32-bit add result to a 64-bit value
where the top bits are 0.
shader-db on Icelake indicates that this:
- Helps instructions: -1.13% in 135 affected programs
- Helps spills/fills: -4.08% / -4.18% in 4 affected programs
- Gains us 1 SIMD16 compute shader instead of SIMD8
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20999>
Timur Kristóf [Tue, 10 Jan 2023 19:34:27 +0000 (20:34 +0100)]
radv: Don't place CS in VRAM when bandwidth is too low.
People who use RADV on eGPU have reported poor performance by default.
They also noted that the "nosam" option helps.
This commit disables placing CS objects in VRAM when the bandwidth is
below that of PCIe 3.0 x8. Note that eGPUs are typically PCIe 3.0 x4.
Contributes-to: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7340
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20842>
Timur Kristóf [Mon, 23 Jan 2023 16:11:36 +0000 (17:11 +0100)]
ac/gpu_info: Add has_pcie_bandwidth_info.
This is so that we can tell whether the current kernel
has the PCIe bandwidth info available or not.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20842>
Jesse Natalie [Thu, 26 Jan 2023 18:05:34 +0000 (10:05 -0800)]
vulkan/wsi/win32: Support tearing (immediate) and VSync (FIFO) present modes
Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20945>
Jesse Natalie [Thu, 26 Jan 2023 18:04:37 +0000 (10:04 -0800)]
vulkan/wsi: Add a wsi_device param to get_present_modes
The Win32 WSI will want to query capabilities of the device to
determine what's available.
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20945>
Sagar Ghuge [Mon, 30 Jan 2023 18:41:37 +0000 (10:41 -0800)]
intel/fs: Always stall between the fences on Gen11+
Be conservative in Gfx11+ and always stall in a fence. Since there are
two different fences, and shader might want to synchronize between them.
This change also brings back the original code block for the stall
between the fence and comment from the commit
b390ff35170fdc2b7f1fb1709a79d81edcd56981.
v2: (Caio)
- Re-arrange code block.
- Adjust comment.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6958
Fixes:
f7262462 ("intel/fs: Rework fence handling in brw_fs_nir.cpp")
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Tested-by: Mark Janes <markjanes@swizzler.org>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20996>
Emma Anholt [Mon, 30 Jan 2023 23:53:31 +0000 (15:53 -0800)]
ci: Fix perf job condition.
We were supposed to be checking that the job had "performance" in the
name, not that the user (which we already checked is marge) has
"performance" in their name.
Fixes:
f6c06ef2f66a ("ci: Add manual rules variations to disable irrelevant driver jobs.")
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21002>
Emma Anholt [Tue, 31 Jan 2023 22:22:24 +0000 (14:22 -0800)]
ci: Fix perf jobs blocking Marge pipelines.
They got accidentally disabled entirely, so they didn't block merge, but
once they re-enable then they'll block us again. The problem was that I
moved allow_failure to a .performance-rules section, but we only ever
inherit the rules from that location, not the rest of yml.
This is basically a revert of
67547a04b602 ("ci: Move the performance
jobs' allow_failure:true to the gl rules."), though I still keep the
allow_failure in a more common location with comments, since perf jobs are
a huge trap.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21002>
Samuel Pitoiset [Wed, 1 Feb 2023 15:35:30 +0000 (16:35 +0100)]
radv: remove radv_pipeline_stage::spirv::sha1
This is no longer used.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21048>
Samuel Pitoiset [Wed, 1 Feb 2023 14:58:01 +0000 (15:58 +0100)]
radv: remove redundant zero initialization of pipeline layout
It's already zeroed in radv_pipeline_layout_init().
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21048>
Samuel Pitoiset [Wed, 1 Feb 2023 14:33:10 +0000 (15:33 +0100)]
radv: optimize radv_pipeline_layout_add_set() slightly
That value is already computed when a descriptor set layout is created.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21048>
Yiwei Zhang [Wed, 1 Feb 2023 01:12:23 +0000 (17:12 -0800)]
venus: log upon device creation
Log the deviceName and driverInfo gated behind VN_DEBUG=log_ctx_info
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21030>