Tomeu Vizoso [Mon, 5 Aug 2019 12:54:23 +0000 (14:54 +0200)]
panfrost: Print errors from kernel
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tomeu Vizoso [Wed, 31 Jul 2019 14:29:25 +0000 (16:29 +0200)]
panfrost: Mark buffers as PANFROST_BO_HEAP
What we call GROWABLE in Mesa corresponds to the HEAP BO flag in the
kernel. These buffers cannot be memory mapped in the CPU side at the
moment, so make sure they are also marked INVISIBLE.
This allows us to allocate a big heap upfront (16MB) without actually
reserving space unless it's needed.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tomeu Vizoso [Wed, 31 Jul 2019 13:00:46 +0000 (15:00 +0200)]
panfrost: Mark BOs as NOEXEC
Unless a BO has the EXECUTABLE flag, mark it as NOEXEC.
v2: - Rework version detection (Alyssa).
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tomeu Vizoso [Thu, 8 Aug 2019 05:10:32 +0000 (07:10 +0200)]
panfrost: Take into account flags when looking up in the BO cache
This will be useful right now so we avoid retrieving a non-executable
buffer when a executable one is needed.
As we support more flags, this logic will need to be extended to
consider the different trade-offs to be made when matching BO
specifications to BOs in the cache.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tomeu Vizoso [Thu, 1 Aug 2019 14:45:50 +0000 (16:45 +0200)]
panfrost: Allocate shaders in their own BOs
Instead of all shaders being stored in a single BO, have each shader in
its own.
This removes the need for a 16MB allocation per context, and allows us
to place transient blend shaders in BOs marked as executable (before
they were allocated in the transient pool, which shouldn't be
executable).
v2: - Store compiled blend shaders in a malloc'ed buffer, to avoid
reading from GPU-accessible memory when patching (Alyssa).
- Free struct panfrost_blend_shader (Alyssa).
- Give the job a reference to regular shaders when emitting
(Alyssa).
v3: - Split out the allocation flags change (Rob).
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tomeu Vizoso [Mon, 5 Aug 2019 09:22:49 +0000 (11:22 +0200)]
util/hash_table: Fix hashing in clears on 32-bit
Some hash functions (eg. key_u64_hash) will attempt to dereference the
key, causing an invalid access when passed DELETED_KEY_VALUE (0x1) or
FREED_KEY_VALUE (0x0).
When in 32-bit arch a 64-bit key value doesn't fit into a pointer, so
hash_table_u64 internally use a pointer to a struct containing the
64-bit key value.
Fix _mesa_hash_table_u64_clear() to handle the 32-bit case by creating a
temporary hash_key_u64 to pass to the hash function.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Suggested-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Cc: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tapani Pälli [Thu, 1 Aug 2019 10:49:34 +0000 (13:49 +0300)]
anv: support GetSwapchainGrallocUsage2ANDROID for Android
New function supports gralloc1 usage flags that get set separately
for producer and consumer. As we still need to support old method too,
let's share common code and use android_convertGralloc0To1Usage helper.
Bump the VK_ANDROID_native_buffer version to indicate support for the
new call.
Changes were tested on Android Celadon P with Basemark GPU and various
Sascha Willems Vulkan demos.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Mark Janes [Wed, 1 May 2019 17:54:43 +0000 (10:54 -0700)]
st/mesa: eliminate unnecessary redirection
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Fri, 19 Jul 2019 09:22:26 +0000 (02:22 -0700)]
intel/perf: fix debug typo
Misspelling was seen with INTEL_DEBUG=perfmon.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Wed, 17 Jul 2019 19:29:00 +0000 (12:29 -0700)]
intel/perf: make gen_perf_query_object private
Encapsulate the details of this structure within the perf implemenation.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Wed, 10 Jul 2019 23:57:16 +0000 (16:57 -0700)]
intel/perf: make perf context private
Encapsulate the details of this data structure.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Wed, 17 Jul 2019 21:36:44 +0000 (14:36 -0700)]
intel/perf: print debug information
INTEL_DEBUG=perfmon will iterate over the perf queries, printing
information about the state of each query. Some of this information
will be private to intel/perf, and needs to a dump routine that can be
called from i965.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Wed, 10 Jul 2019 23:19:31 +0000 (16:19 -0700)]
intel/perf: make internal methods private
Now that all references from i965 have been moved to perf, we can make
internal methods private again.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Wed, 10 Jul 2019 21:25:47 +0000 (14:25 -0700)]
intel/perf: make oa_sample_buffers private
All references to this data structure have been moved inside the perf
subsystem.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Fri, 12 Jul 2019 23:35:27 +0000 (16:35 -0700)]
intel/perf: expose method to create query
By encapsulating this implementation within perf, we can eventually
make struct gen_perf_ctx private.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Sat, 3 Aug 2019 00:17:54 +0000 (17:17 -0700)]
intel/perf: move initialization of pipeline statistics metrics to gen_perf
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Sat, 29 Jun 2019 01:16:07 +0000 (18:16 -0700)]
intel/perf: move get_query_data into gen_perf
This refactor moves several helper functions for get_query_data as
well:
- accumulate_oa_reports
- read_gt_frequency
- get_pipeline_stats_data
- get_oa_counter_data
Functions which are no longer referenced in brw_performance_query.c
have been removed.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Sat, 29 Jun 2019 00:10:22 +0000 (17:10 -0700)]
intel/perf: move delete_query to gen_perf
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Fri, 28 Jun 2019 23:19:32 +0000 (16:19 -0700)]
intel/perf: move is_query_ready to gen_perf
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Fri, 28 Jun 2019 23:12:44 +0000 (16:12 -0700)]
intel/perf: move wait_query to perf
The following methods have duplicate implementation of read_oa_samples_until in
brw_performance_query.c:
- read_oa_samples_for_query
- read_oa_samples_until
They ar still referenced by other methods in the file and will be
removed on the subsequent commit.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Fri, 28 Jun 2019 22:55:37 +0000 (15:55 -0700)]
intel/perf: create a vtable entry for bo_busy
Iris and i965 variants of this method need to be called by perf
routines.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Fri, 28 Jun 2019 22:46:50 +0000 (15:46 -0700)]
intel/perf: create a vtable entry for bo_wait_rendering
Iris and i965 variants of this method need to be called by perf
routines.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Fri, 28 Jun 2019 22:43:03 +0000 (15:43 -0700)]
intel/perf: create a vtable entry for batch_references
Iris and i965 variants of this method need to be called by perf
routines.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Fri, 28 Jun 2019 22:11:20 +0000 (15:11 -0700)]
intel/perf: refactor gen_perf_end_query into gen_perf
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Fri, 28 Jun 2019 21:46:12 +0000 (14:46 -0700)]
intel/perf: refactor gen_perf_begin_query into gen_perf
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Tue, 6 Aug 2019 17:00:16 +0000 (10:00 -0700)]
intel/perf: move perf-related state into gen_perf_context
To move more operations into intel/perf, several state items are
needed. Save references to that state in the perf_ctxt, rather than
passing them in for every operation.
This commit includes an initializer for gen_perf_context, to set those
references and also encapsulate the initialization of the sample
buffer state.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Wed, 26 Jun 2019 19:26:21 +0000 (12:26 -0700)]
intel/perf: create a vtable entries for buffer object map/unmap
These operations are needed to refactor subsequent methods into perf
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Wed, 26 Jun 2019 19:12:20 +0000 (12:12 -0700)]
intel/perf: move client reference counts into perf
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Wed, 26 Jun 2019 18:56:07 +0000 (11:56 -0700)]
intel/perf: move open_perf into perf
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Wed, 26 Jun 2019 18:43:20 +0000 (11:43 -0700)]
intel/perf: move close_perf into perf
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Wed, 26 Jun 2019 18:38:38 +0000 (11:38 -0700)]
intel/perf: create a vtable entry for emit_mi_flush
This method is needed to move subsequent methods into perf.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Wed, 26 Jun 2019 18:01:48 +0000 (11:01 -0700)]
intel/perf: use temporary pointers to simplify access to perf state
Most accesses to perf state were made through repeated dereferences of
brw_context members. Prefering temporary variables of perf_ctx and
perf_cfg has the following advantages:
- more concise implementation
- easier refactor when moving subsequent methods to perf
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Tue, 11 Jun 2019 23:04:02 +0000 (16:04 -0700)]
intel/perf: move snapshot_statistics_registers into perf
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Fri, 7 Jun 2019 19:15:54 +0000 (12:15 -0700)]
intel/perf: move query_object into perf
Query objects can now be encapsulated within the perf subsystem.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Tue, 4 Jun 2019 19:45:01 +0000 (12:45 -0700)]
intel/perf: create a vtable entry for store_register_mem64
This method is needed to move subsequent methods into perf.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Mon, 3 Jun 2019 23:16:40 +0000 (16:16 -0700)]
intel/perf: move free_sample_bufs into perf
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Mon, 3 Jun 2019 23:11:16 +0000 (16:11 -0700)]
intel/perf: move reap_old_sample_buffers into perf
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Fri, 31 May 2019 01:30:25 +0000 (18:30 -0700)]
intel/perf: move get_free_sample_buf into perf
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Fri, 31 May 2019 01:20:27 +0000 (18:20 -0700)]
intel/perf: move the perf context into perf
The "context" that is necessary to submit and process perf commands to
the hardware was previously present in the brw_context.perfquery
struct. This commit moves it into perf and provides a more
understandable name.
The intention is for this struct to be private, when all methods that
access it are migrated into perf.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Fri, 31 May 2019 01:09:02 +0000 (18:09 -0700)]
intel/perf: move get_metric_id to perf
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Wed, 29 May 2019 22:31:58 +0000 (15:31 -0700)]
intel/perf: move oa_sample_buf structure to perf
oa_sample_buf holds the data provided by the kernel that will be
collated into performance metrics. Since this functionality will be
implemented in perf, the struct needs to be defined there.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Wed, 29 May 2019 15:48:35 +0000 (08:48 -0700)]
intel/perf: enumerate query-based metrics in perf
Iris and i965 both need to enumerate the available metrics, so these
routines must be located in perf.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Wed, 29 May 2019 15:43:34 +0000 (08:43 -0700)]
intel/perf: move perf-related constants to common location
The perf subsystem needs several macro definitions that were
duplicated in Iris and i965 headers. Place these macros within perf,
if the perf implementation contains the only references to the values.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Fri, 24 May 2019 22:35:34 +0000 (15:35 -0700)]
intel/perf: create a vtable entry for capture_frequency_stat_register
In preparation for calling both Iris and i965 implementions from perf.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Fri, 24 May 2019 22:35:34 +0000 (15:35 -0700)]
intel/perf: create a vtable entry for batchbuffer_flush
In preparation for calling both Iris and i965 implementions from perf.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Fri, 2 Aug 2019 23:33:25 +0000 (16:33 -0700)]
intel/perf: create a vtable entry for emit_report_count
In preparation for calling both Iris and i965 implementions from perf.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Fri, 24 May 2019 21:31:27 +0000 (14:31 -0700)]
intel/perf: create a vtable entry for bo_unreference
In preparation for calling both Iris and i965 implementions from perf.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Tue, 2 Jul 2019 21:21:57 +0000 (14:21 -0700)]
intel/perf: create a vtable for low-level driver functions
Performance metrics collections requires several actions (eg bo_map())
that have different implementations for Iris and i965. The perf
subsystem needs a vtable for each of these actions, so it can invoke
the corresponding implementation for each driver.
The first call to be added to the table is bo_alloc.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Mon, 5 Aug 2019 21:40:29 +0000 (14:40 -0700)]
intel/perf: use common ioctl wrapper
There were multiple ioctl-wrapper functions, so a common
implementation was put in gen_gem.h. With a common implementation,
perf no longer needs the caller to configure one for it.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Tue, 2 Jul 2019 21:11:04 +0000 (14:11 -0700)]
intel/perf: rename gen_perf to gen_perf_config
This structure contains the configurations of the metrics for the
current platform, and the settings needed for the perf subsystem to
query that configuration from the device. This data is available
without a rendering context, and needed to support MDAPI metrics for
Vulkan.
A gen_perf_context struct will be added later, which holds additional
state from the rendering context necessary for metric data
collection. The gen_perf struct needs a more precise name to reduce
confusion.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Ilia Mirkin [Wed, 7 Aug 2019 03:00:06 +0000 (23:00 -0400)]
nvc0: fix program dumping, use _debug_printf
This debug situation is unforunate. debug_printf only does something
with DEBUG set, but in practice all that needs to be moved to !NDEBUG.
For now, use _debug_printf which always prints. However the whole
function is guarded by !NDEBUG.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Wed, 7 Aug 2019 03:02:53 +0000 (23:02 -0400)]
nvc0: add support for ATOMC_WRAP TGSI operations
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Wed, 7 Aug 2019 01:59:44 +0000 (21:59 -0400)]
gallium: redefine ATOMINC_WRAP to be more hardware-friendly
Both AMD and NVIDIA hardware define it this way. Instead of replicating
the logic everywhere, just fix it up in one place.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Ilia Mirkin [Wed, 7 Aug 2019 02:54:56 +0000 (22:54 -0400)]
st/mesa: relax EXT_shader_image_load_store enable
There's no reason to bring format-less load requirement into this
extension. It requires a size to be provided, and a compatible format is
computed from the size + data type. For example
layout(size1x32) uniform iimage1D image;
becomes
DCL IMAGE[0], 1D, PIPE_FORMAT_R32_SINT, WR
whereas PIPE_CAP_IMAGE_LOAD_FORMATTED is designed to allow
PIPE_FORMAT_NONE to be provided as a format and still enable LOAD
operations to be performed.
So the shader has all the information it needs about the format.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Mark Janes [Sat, 3 Aug 2019 01:19:01 +0000 (18:19 -0700)]
i965/perf: restore mdapi statistics query metrics
Registration of mdapi metrics based on statistics query registers was
inadvertently removed in the commit that checks for OA kernel support.
The statistics queries are not dependent on OA.
Fixes:
96e1c945f2b ("i965: Move device info initialization to common code")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Greg V [Thu, 18 Jan 2018 20:29:14 +0000 (23:29 +0300)]
util: add anon_file.h for all memfd/temp file usage
Move the Weston os_create_anonymous_file code from egl/wayland into util,
add support for Linux memfd and FreeBSD SHM_ANON,
use that code in anv/aubinator instead of explicit memfd calls for portability.
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Pierre-Eric Pelloux-Prayer [Mon, 5 Aug 2019 13:11:41 +0000 (15:11 +0200)]
radeonsi: limit DPBB context_states_per_bin batches when using gfx9 workaround
It seems that using 'context_states_per_bin = 1' for DPBB fixes the reported issue.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110214
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Pierre-Eric Pelloux-Prayer [Fri, 2 Aug 2019 10:06:59 +0000 (12:06 +0200)]
radeonsi: reduce DPBB persistent_states_per_bin value for APUs
Fixes some reported GPU hangs on RAVEN.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111231
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Pierre-Eric Pelloux-Prayer [Fri, 2 Aug 2019 10:05:15 +0000 (12:05 +0200)]
radeonsi: fix typo in DPBB register field
Also only set FLUSH_ON_BINNING_TRANSITION for GPU families that needs it (matches
what si_emit_dpbb_disable is doing).
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Pierre-Eric Pelloux-Prayer [Fri, 2 Aug 2019 10:03:15 +0000 (12:03 +0200)]
radeonsi: fix S_028C48_MAX_ALLOC_COUNT value
This field uses "value minus 1" encoding.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Christian Gmeiner [Tue, 6 Aug 2019 18:15:41 +0000 (20:15 +0200)]
etnaviv: drop struct etna_3d_state
Also drop #if 0 code block.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Philipp Zabel <philipp.zabel@gmail.com>
Yevhenii Kolesnikov [Thu, 1 Aug 2019 13:05:29 +0000 (16:05 +0300)]
mesa: Use _mesa_delete_transform_feedback_object in drivers
Function _mesa_delete_transform_feedback_object called from within
drivers once driver-specific clean-up has been done. Brings into
conformity with how other GL objects are handled.
CC: Eric Anholt <eric@anholt.net>
CC: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Yevhenii Kolesnikov [Thu, 1 Aug 2019 11:11:44 +0000 (14:11 +0300)]
mesa: use _mesa_delete_query in drivers
Now drivers can call _mesa_delete_query once driver-specific
clean-up has been done. Brings into conformity with how other GL
objects are handled.
CC: Eric Anholt <eric@anholt.net>
CC: Kenneth Graunke <kenneth@whitecape.org>
Suggested-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Juan A. Suarez Romero [Wed, 7 Aug 2019 16:51:32 +0000 (18:51 +0200)]
docs: update calendar, add news item and link release notes for 19.1.4
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Juan A. Suarez Romero [Wed, 7 Aug 2019 16:49:02 +0000 (18:49 +0200)]
docs: add sha256 checksums for 19.1.4
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
(cherry picked from commit
7fcb69a33c6c6d1658de3e0fd9c40363584c8c7b)
Juan A. Suarez Romero [Wed, 7 Aug 2019 16:38:23 +0000 (18:38 +0200)]
docs: add release notes for 19.1.4
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
(cherry picked from commit
b84ffa028d09c1bba1add468fd68886ee243d428)
Bas Nieuwenhuizen [Fri, 26 Jul 2019 11:49:59 +0000 (13:49 +0200)]
meson,i965: Link with android deps when building for android.
The DBG marco in brw_blorp.c ends up calling an android log function:
error: undefined reference to '__android_log_print'
v2: On suggestion from Lionel, hang the Android dependency onto a new
libintel_common dependency.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Erik Faye-Lund [Fri, 12 Jul 2019 08:39:46 +0000 (10:39 +0200)]
gallium/dump: add missing query-type to short-list
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Fixes:
3f6b3d9db72 ("gallium: add PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Erik Faye-Lund [Fri, 12 Jul 2019 08:38:20 +0000 (10:38 +0200)]
gallium/dump: add missing query-type to short-list
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Fixes:
a677799e51a ("gallium: add PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE
and corresponding cap")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Eric Engestrom [Sat, 3 Aug 2019 11:31:19 +0000 (12:31 +0100)]
gitlab-ci: don't install autotools deps
These could've been deleted a long time ago, but apparent we forgot.
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Eric Engestrom [Sun, 7 Jul 2019 10:40:04 +0000 (11:40 +0100)]
util: fix mem leak of program path
Fixes:
759b94038987bb983398 ("util: Get program name based on path when possible")
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Eric Engestrom [Sat, 3 Aug 2019 01:33:42 +0000 (02:33 +0100)]
meson: build intel-ui tools as part of `all` tools
Reported-by: Mark Janes <mark.a.janes@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111289
Cc: Dylan Baker <dylan@pnwbakers.com>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Eric Engestrom [Sat, 3 Aug 2019 11:41:06 +0000 (12:41 +0100)]
gitlab-ci: add gtk3 dev files for `-D tools=intel-ui`
We also need to update wayland-protocols and libXrandr (and randrproto),
as they are too old for gdk3 (which gtk3 depends on).
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Jan Vesely [Tue, 6 Aug 2019 16:24:18 +0000 (12:24 -0400)]
clover: Fix build after clang r367864
v2: Drop special case of llvm-9
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Acked-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Aaron Watry <awatry@gmail.com>
Timothy Arceri [Wed, 7 Aug 2019 00:21:43 +0000 (10:21 +1000)]
mesa: remove super old TODOs from shaderapi.c
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
John Stultz [Wed, 24 Jul 2019 23:32:54 +0000 (23:32 +0000)]
mesa: freedreno: Android.registers.mk: Fix up register xml.h file generation
The current Androdi.registers.mk file causes build failures that
look like:
FAILED:
external/mesa3d/src/freedreno/Android.registers.mk:49: error: implicit rules are obsolete: out/target/product/linaro_db845c/gen/STATIC_LIBRARIES/libfreedreno_registers_intermediates/registers/%.xml.h
Caused by the following Android build rule change:
https://android.googlesource.com/platform/build/+/HEAD/Changes.md#implicit_rules
I tried to replace this with something similar to the static
pattern suggested in the URL above, but ended up getting all the
xml.h files generated using only the first a2xx.xml source file.
So I've fallen back to explicitly defining the make rules for
each.
Additionally, we needed to provide the proper
LOCAL_EXPORT_C_INCLUDE_DIRS and add the defined static library
to the components that depend on the register headers.
Acked-by: Eric Anholt <eric@anholt.net>
Signed-off-by: John Stultz <john.stultz@linaro.org>
John Stultz [Wed, 3 Jul 2019 22:37:45 +0000 (22:37 +0000)]
mesa: Add ir3/ir3_nir_imul.c generation to Android.mk
With current master we're seeing build failures with AOSP:
error: undefined symbol: ir3_nir_lower_imul
This is due to the ir3_nir_imul.c file not being generated
in the Android.mk files.
This patch simply adds it to the Android build, after which
thigns build and book ok on db410c.
Cc: Rob Clark <robdclark@chromium.org>
Cc: Emil Velikov <emil.l.velikov@gmail.com>
Cc: Amit Pundir <amit.pundir@linaro.org>
Cc: Sumit Semwal <sumit.semwal@linaro.org>
Cc: Alistair Strachan <astrachan@google.com>
Cc: Greg Hartman <ghartman@google.com>
Cc: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: John Stultz <john.stultz@linaro.org>
Rohan Garg [Wed, 17 Jul 2019 16:50:13 +0000 (18:50 +0200)]
panfrost: Take into account a index_bias for glDrawElementsBaseVertex calls
Midgard does not accept a index_bias directly and relies instead on a
bias correction offset (offset_bias_correction) in order to calculate
the unbiased vertex index.
We need to make sure we adjust offset_start and vertex_count in order to
take into account the index_bias as required by a
glDrawElementsBaseVertex call and then supply a additional
offset_bias_correction to the hardware.
Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Bas Nieuwenhuizen [Sun, 4 Aug 2019 23:39:23 +0000 (01:39 +0200)]
radv/gfx10: Enable DCC for storage images.
v2: Hide it behind a perftest flag.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Sun, 4 Aug 2019 23:38:42 +0000 (01:38 +0200)]
radv: Add device argument for dcc compression check.
Because it is about to be generation dependent.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Sun, 4 Aug 2019 23:19:29 +0000 (01:19 +0200)]
radv: Disable compression for compute DCC decompress store.
Previously we relied on stores not using DCC but that is going to
change, so disable compression explicitly.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Sun, 4 Aug 2019 23:07:04 +0000 (01:07 +0200)]
radv: Add extra struct to image view creation.
For extra args. Unlike image creation, I'm not embedding the vk
struct in there, so all the inline structs can be kept.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Sun, 4 Aug 2019 23:24:45 +0000 (01:24 +0200)]
radv: Do not decompress on LAYOUT_GENERAL.
We handle render loops properly now and STORAGE still disables
DCC/TC-compat HTILE in general.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Sun, 4 Aug 2019 21:48:43 +0000 (23:48 +0200)]
radv: Pass through render loop detection to internal layout decisions.
And do nothing with it yet.
Everything outside a renderpass has no render loop.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Sun, 4 Aug 2019 21:17:20 +0000 (23:17 +0200)]
radv: Add render loop detection in renderpass.
VK spec 7.3:
"Applications must ensure that all accesses to memory that backs
image subresources used as attachments in a given renderpass instance
either happen-before the load operations for those attachments, or
happen-after the store operations for those attachments."
So the only renderloops we can have is with input attachments. Detect
these.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Timothy Arceri [Fri, 2 Aug 2019 05:17:16 +0000 (15:17 +1000)]
drirc: Add vendor workaround for Divinity: Original Sin EE
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93551
Timothy Arceri [Fri, 2 Aug 2019 05:13:59 +0000 (15:13 +1000)]
mesa/gallium: add dric option to allow overriding GL vendor string
Will be used in the following patch.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93551
Marek Olšák [Wed, 7 Aug 2019 00:09:46 +0000 (20:09 -0400)]
relnotes/19.2: document EXT_texture_dhadow_lod
Bas Nieuwenhuizen [Tue, 6 Aug 2019 09:50:37 +0000 (11:50 +0200)]
radv: Fix config reg assert.
Using the wrong bounds
Fixes: "
219d6939df8 radv: add more assertions to make sure packets are correctly emitted"
Reviewed-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Marek Olšák [Fri, 2 Aug 2019 13:22:52 +0000 (15:22 +0200)]
tgsi_to_nir: add a few needed double opcodes
for internal radeonsi shaders
v2 (Connor):
- Split out prep work from adding opcodes, and rewrite the former
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Marek Olšák [Fri, 2 Aug 2019 13:19:00 +0000 (15:19 +0200)]
tgsi_to_nir: implement a few needed 64-bit integer opcodes
for internal radeonsi shaders
v2 (Connor):
- Split this out from the prep work, and rework the former
- Add support for U64SNE
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Connor Abbott [Fri, 2 Aug 2019 13:13:53 +0000 (15:13 +0200)]
ttn: Prepare for 64-bit sources and destinations
v2: Properly handle 32->64 bit conversions
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Connor Abbott [Fri, 2 Aug 2019 13:00:30 +0000 (15:00 +0200)]
ttn: Use 1-bit NIR comparison opcodes
We shouldn't be using the versions that output a 32-bit boolean, since
nir_opt_algebraic won't optimize them as well. Drivers will lower these
to the 32-bit versions after optimizing, if appropriate. Also, this will
make implementing 64-bit comparisons easier.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Connor Abbott [Fri, 2 Aug 2019 12:56:20 +0000 (14:56 +0200)]
nir/builder: Add nir_b2i
Same as nir_b2f but for integers.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Pierre-Eric Pelloux-Prayer [Thu, 1 Aug 2019 08:17:26 +0000 (10:17 +0200)]
radeonsi: enable EXT_shader_image_load_store
This depends on LLVM 10 because this needs https://reviews.llvm.org/D65283
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Pierre-Eric Pelloux-Prayer [Wed, 24 Jul 2019 10:07:50 +0000 (12:07 +0200)]
radeonsi: add support for nir atomic_inc_wrap/atomic_dec_wrap
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Pierre-Eric Pelloux-Prayer [Fri, 12 Jul 2019 13:57:54 +0000 (15:57 +0200)]
radeonsi: add support for tgsi ATOMDEC_WRAP / ATOMINC_WRAP opcodes
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Pierre-Eric Pelloux-Prayer [Wed, 24 Jul 2019 10:09:31 +0000 (12:09 +0200)]
ac: add ac_atomic_inc_wrap / ac_atomic_dec_wrap support
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Pierre-Eric Pelloux-Prayer [Wed, 24 Jul 2019 10:06:34 +0000 (12:06 +0200)]
nir: add atomic_inc_wrap/atomic_dec_wrap image intrinsics
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Pierre-Eric Pelloux-Prayer [Fri, 12 Jul 2019 14:38:44 +0000 (16:38 +0200)]
glsl: add EXT_shader_image_load_store new image functions
This extension has 2 functions that are missing from the ARB versions:
- imageAtomicIncWrap
- imageAtomicDecWrap
Reviewed-by: Marek Olšák <marek.olsak@amd.com>