Greg Kroah-Hartman [Sat, 21 Mar 2020 11:02:20 +0000 (12:02 +0100)]
Merge tag 'phy-for-5.7' of git://git./linux/kernel/git/kishon/linux-phy into usb-next
Kishon writes:
phy: for 5.7
*) Rename and Re-design phy-cadence-dp driver to phy-cadence-torrent driver
*) Add new PHY driver for Qualcomm 28nm Hi-Speed USB PHY
*) Add new PHY driver for Qualcomm Super Speed PHY in QCS404
*) Add support for Qualcomm PCIe QMP/QHP PHY in SDM845 to phy-qcom-qmp driver
*) Add support for Qualcomm UFS PHY in MSM8996 to phy-qcom-qmp driver
*) Add support for an additional reference clock in Mediatek phy-mtk-tphy driver
*) Add support for configuring tuning parameters in Mediatek phy-mtk-tphy driver
*) Add support for GMII PHY in TI K3 AM654x/J721E SoCs to phy-gmii-sel driver
*) Add support for USB2 PHY in Amlogic A1 SoC Family to phy-meson-g12a-usb2
driver
*) Add support for USB3/USB2/PCIe PHY in Socionext Pro5 SoC to
phy-uniphier-usb3ss/phy-uniphier-usb3hs/phy-uniphier-pcie driver respectively
*) Add support for QUSB2 PHY in Qualcomm SC7180 in driver
*) Convert dt-bindings of Cadence DP, Qualcomm QUSB2 to YAML format
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* tag 'phy-for-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy: (52 commits)
phy: qcom-qusb2: Add new overriding tuning parameters in QUSB2 V2 PHY
phy: qcom-qusb2: Add support for overriding tuning parameters in QUSB2 V2 PHY
dt-bindings: phy: qcom-qusb2: Add support for overriding Phy tuning parameters
phy: qcom-qusb2: Add generic QUSB2 V2 PHY support
dt-bindings: phy: qcom,qusb2: Add compatibles for QUSB2 V2 phy and SC7180
dt-bindings: phy: qcom,qusb2: Convert QUSB2 phy bindings to yaml
phy: rk-inno-usb2: Decrease verbosity of repeating log.
phy: amlogic: Add Amlogic A1 USB2 PHY Driver
dt-bindings: phy: Add Amlogic A1 USB2 PHY Bindings
phy: ti: gmii-sel: add support for am654x/j721e soc
dt-bindings: phy: ti: gmii-sel: add support for am654x/j721e soc
phy: qualcomm: usb: Add SuperSpeed PHY driver
dt-bindings: Add Qualcomm USB SuperSpeed PHY bindings
phy: qualcomm: Add Synopsys 28nm Hi-Speed USB PHY driver
dt-bindings: phy: Add Qualcomm Synopsys Hi-Speed USB PHY binding
dt-bindings: phy: remove qcom-dwc3-usb-phy
phy: phy-mtk-tphy: add a new reference clock
phy: phy-mtk-tphy: remove unused u3phya_ref clock
phy: phy-mtk-tphy: make the ref clock optional
phy: phy-mtk-tphy: add a property for internal resistance
...
Sandeep Maheswaram [Mon, 9 Mar 2020 09:53:06 +0000 (15:23 +0530)]
phy: qcom-qusb2: Add new overriding tuning parameters in QUSB2 V2 PHY
Added support for overriding bias-ctrl-value,charge-ctrl-value and
hsdisc-trim-value params for QUSB2 V2 PHY
Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Sandeep Maheswaram [Mon, 9 Mar 2020 09:53:05 +0000 (15:23 +0530)]
phy: qcom-qusb2: Add support for overriding tuning parameters in QUSB2 V2 PHY
Added new structure for overriding tuning parameters in QUSB2 V2 PHY as the
override params are increased due to usage of generic QUSB2 V2 phy table.
Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Sandeep Maheswaram [Mon, 9 Mar 2020 09:53:04 +0000 (15:23 +0530)]
dt-bindings: phy: qcom-qusb2: Add support for overriding Phy tuning parameters
Add support for overriding QUSB2 V2 phy tuning parameters
in device tree bindings.
Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Sandeep Maheswaram [Mon, 9 Mar 2020 09:53:03 +0000 (15:23 +0530)]
phy: qcom-qusb2: Add generic QUSB2 V2 PHY support
Add generic QUSB2 V2 PHY table so the respective phys
can use the same table.
Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Sandeep Maheswaram [Mon, 9 Mar 2020 09:53:02 +0000 (15:23 +0530)]
dt-bindings: phy: qcom,qusb2: Add compatibles for QUSB2 V2 phy and SC7180
Add compatibles for generic QUSB2 V2 phy which can be used for
sdm845 and sc7180.
Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Sandeep Maheswaram [Mon, 9 Mar 2020 09:53:01 +0000 (15:23 +0530)]
dt-bindings: phy: qcom,qusb2: Convert QUSB2 phy bindings to yaml
Convert QUSB2 phy bindings to DT schema format using json-schema.
Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Christoph Muellner [Thu, 19 Mar 2020 14:08:52 +0000 (15:08 +0100)]
phy: rk-inno-usb2: Decrease verbosity of repeating log.
phy-rockchip-inno-usb2 logs the message
"phy-
ff2c0000.syscon:usb2-phy@100.2: charger = INVALID_CHARGER"
constantly with a frequency of about 1 Hz and a verbosity level
of INFO. As this is clearly annoying, this patch decreases
the log level to DEBUG.
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Hanjie Lin [Tue, 18 Feb 2020 01:54:18 +0000 (09:54 +0800)]
phy: amlogic: Add Amlogic A1 USB2 PHY Driver
This adds support for the USB2 PHY found in the Amlogic A1 SoC Family.
It supports host mode only.
Signed-off-by: Yue Wang <yue.wang@amlogic.com>
Signed-off-by: Hanjie Lin <hanjie.lin@amlogic.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Hanjie Lin [Tue, 18 Feb 2020 01:54:17 +0000 (09:54 +0800)]
dt-bindings: phy: Add Amlogic A1 USB2 PHY Bindings
Add the Amlogic A1 Family USB2 PHY Bindings
It supports Host mode only.
Signed-off-by: Yue Wang <yue.wang@amlogic.com>
Signed-off-by: Hanjie Lin <hanjie.lin@amlogic.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Grygorii Strashko [Tue, 3 Mar 2020 16:00:27 +0000 (18:00 +0200)]
phy: ti: gmii-sel: add support for am654x/j721e soc
TI AM654x/J721E SoCs have the same PHY interface selection mechanism for
CPSWx subsystem as TI SoCs (AM3/4/5/DRA7), but registers and bit-fields
placement is different.
This patch adds corresponding support for TI AM654x/J721E SoCs PHY
interface selection.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Grygorii Strashko [Tue, 3 Mar 2020 16:00:26 +0000 (18:00 +0200)]
dt-bindings: phy: ti: gmii-sel: add support for am654x/j721e soc
TI AM654x/J721E SoCs have the same PHY interface selection mechanism for
CPSWx subsystem as TI SoCs (AM3/4/5/DRA7), but registers and bit-fields
placement is different.
This patch adds corresponding compatible strings to enable support for TI
AM654x/J721E SoCs.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Jorge Ramirez-Ortiz [Wed, 11 Mar 2020 19:13:58 +0000 (19:13 +0000)]
phy: qualcomm: usb: Add SuperSpeed PHY driver
Controls Qualcomm's SS PHY 1.0.0 implemented on various SoCs on both the
20nm and 28nm process nodes.
Based on Sriharsha Allenki's <sallenki@codeaurora.org> original code.
[bod: Removed dependency on extcon.
Switched to gpio-usb-conn to handle VBUS On/Off
Switched to usb-role-switch to bind gpio-usb-conn to DWC3]
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Cc: Jorge Ramirez-Ortiz <jorge.ramirez.ortiz@gmail.com>
Cc: Sriharsha Allenki's <sallenki@codeaurora.org>
Cc: Andy Gross <agross@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Jorge Ramirez-Ortiz [Wed, 11 Mar 2020 19:13:57 +0000 (19:13 +0000)]
dt-bindings: Add Qualcomm USB SuperSpeed PHY bindings
Binding description for Qualcomm's Synopsys 1.0.0 SuperSpeed PHY. This PHY
appears in a number of SoCs on various flavors of 20nm and 28nm nodes.
This commit adds information related to the 28nm node only.
Based on Sriharsha Allenki's <sallenki@codeaurora.org> original
definitions.
[bod: converted to yaml format]
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Cc: Jorge Ramirez-Ortiz <jorge.ramirez.ortiz@gmail.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Jorge Ramirez-Ortiz <jorge.ramirez.ortiz@gmail.com>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Rob Herring <robh@kernel.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Shawn Guo [Wed, 11 Mar 2020 19:13:56 +0000 (19:13 +0000)]
phy: qualcomm: Add Synopsys 28nm Hi-Speed USB PHY driver
Adds Qualcomm 28nm Hi-Speed USB PHY driver support. This PHY is usually
paired with Synopsys DWC3 USB controllers on Qualcomm SoCs.
The PHY can come in two flavours femtoPHY or picoPHY. This commit adds
support for the femtoPHY with the possibility of extending to the picoPHY
with additional future commits. Both PHYs are on a 28 nanometer process
node.
[bod: Updated qcom_snps_hsphy_set_mode to match new method signature
Added disjunct on mode > 0
Removed regulator_set_voltage() in favour of setting floor in dts
Removed 'snps' and from driver name
Extended commit log to mention femtoPHY and picoPHY for future
reference.]
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Andy Gross <agross@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: Jorge Ramirez-Ortiz <jorge.ramirez.ortiz@gmail.com>
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Sriharsha Allenki [Wed, 11 Mar 2020 19:13:55 +0000 (19:13 +0000)]
dt-bindings: phy: Add Qualcomm Synopsys Hi-Speed USB PHY binding
Adds bindings for Qualcomm's 28 nm USB PHY supporting Low-Speed, Full-Speed
and Hi-Speed USB connectivity on Qualcomm chipsets.
[bod: Converted to YAML. Changed name dropping snps, 28nm components]
Signed-off-by: Sriharsha Allenki <sallenki@codeaurora.org>
Signed-off-by: Anu Ramanathan <anur@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Andy Gross <agross@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Jorge Ramirez-Ortiz <jorge.ramirez.ortiz@gmail.com>
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Jorge Ramirez-Ortiz [Wed, 11 Mar 2020 19:13:54 +0000 (19:13 +0000)]
dt-bindings: phy: remove qcom-dwc3-usb-phy
This binding is not used by any driver.
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Cc: Jorge Ramirez-Ortiz <jorge.ramirez.ortiz@gmail.com>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Chunfeng Yun [Tue, 11 Feb 2020 03:21:15 +0000 (11:21 +0800)]
phy: phy-mtk-tphy: add a new reference clock
Usually the digital and analog phys use the same reference clock,
but some platforms have two separate reference clocks for each of
them, so add another optional clock to support them.
In order to keep the clock names consistent with PHY IP's, change
the da_ref for analog phy and ref clock for digital phy.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Chunfeng Yun [Tue, 11 Feb 2020 03:21:14 +0000 (11:21 +0800)]
phy: phy-mtk-tphy: remove unused u3phya_ref clock
The u3phya_ref clock is already moved into sub-node, and
renamed as ref clock, no used anymore now, so remove it,
this can avoid confusion when support new platforms
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Chunfeng Yun [Tue, 11 Feb 2020 03:21:13 +0000 (11:21 +0800)]
phy: phy-mtk-tphy: make the ref clock optional
Sometimes the reference clock of USB3 PHY comes from oscillator
directly, and no need refer to a fixed-clock in DTS anymore
if make it optional.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Chunfeng Yun [Tue, 11 Feb 2020 03:21:12 +0000 (11:21 +0800)]
phy: phy-mtk-tphy: add a property for internal resistance
This is used to tune J-K voltage by internal R (resistance), the
range is [0, 31], the resistance value is about 6.9K ohm for 0,
3.8K ohm for 31, and the step is 1K ohm
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Chunfeng Yun [Wed, 8 Jan 2020 01:52:01 +0000 (09:52 +0800)]
phy: phy-mtk-tphy: add a property for disconnect threshold
This is used to tune the threshold of disconnect, the index range
is [0, 15], the threshold voltage is about 400mV for 0, 700mV for
15, and the step is 20mV.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Chunfeng Yun [Tue, 11 Feb 2020 03:21:10 +0000 (11:21 +0800)]
dt-bindings: phy-mtk-tphy: add the properties about address mapping
Add three required properties about the address mapping, including
'#address-cells', '#size-cells' and 'ranges'
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Chunfeng Yun [Tue, 11 Feb 2020 03:21:09 +0000 (11:21 +0800)]
dt-bindings: phy-mtk-tphy: add a new reference clock
Usually the digital and analog phys use the same reference clock,
but on some platforms, they are separated, so add another optional
clock to support it.
In order to keep the clock names consistent with PHY IP's, use
the da_ref for analog phy and ref clock for digital phy.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Chunfeng Yun [Tue, 11 Feb 2020 03:21:08 +0000 (11:21 +0800)]
dt-bindings: phy-mtk-tphy: remove unused u3phya_ref clock
The u3phya_ref clock is already moved into sub-node, and
renamed as ref clock, no used anymore now, so remove it
to avoid confusion
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Chunfeng Yun [Tue, 11 Feb 2020 03:21:07 +0000 (11:21 +0800)]
dt-bindings: phy-mtk-tphy: make the ref clock optional
Make the ref clock optional, then we no need refer to a fixed-clock
in DTS anymore when the clock of USB3 PHY comes from oscillator
directly
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Chunfeng Yun [Tue, 11 Feb 2020 03:21:06 +0000 (11:21 +0800)]
dt-bindings: phy-mtk-tphy: add two optional properties for u2phy
Add two optional properties, one for tuning J-K voltage by INTR,
another for disconnect threshold, both of them are related with
connect detection
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Joe Perches [Wed, 10 Jul 2019 05:04:23 +0000 (22:04 -0700)]
phy: amlogic: G12A: Fix misuse of GENMASK macro
Arguments are supposed to be ordered high then low.
Signed-off-by: Joe Perches <joe@perches.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Bjorn Andersson [Mon, 6 Jan 2020 08:11:42 +0000 (00:11 -0800)]
phy: qcom: qmp: Use power_on/off ops for PCIe
The PCIe PHY initialization requires the attached device to be present,
which is primarily achieved by the PCI controller driver. So move the
logic from init/exit to power_on/power_off.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: John Stultz <john.stultz@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Kunihiko Hayashi [Thu, 30 Jan 2020 06:52:45 +0000 (15:52 +0900)]
phy: uniphier-pcie: Add SoC-dependent phy-mode function support
Since this phy is shared by multiple devices including USB and PCIe,
it is necessary to determine which device use this phy.
This patch adds SoC-dependent functions to determine a device using
this phy.
When there is 'socionext,syscon' property in the pcie-phy node,
the driver calls SoC-dependt function instead of checking .has_syscon
in SoC-dependent data. The function configures the system controller
to use phy for PCIe.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Kunihiko Hayashi [Thu, 30 Jan 2020 06:52:44 +0000 (15:52 +0900)]
phy: uniphier-pcie: Add legacy SoC support for Pro5
Add legacy SoC support that needs to manage gio clock and reset and to skip
setting unimplemented phy parameters. This supports Pro5.
This specifies only 1 port use because Pro5 doesn't set it in the power-on
sequence.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Kunihiko Hayashi [Thu, 30 Jan 2020 06:52:43 +0000 (15:52 +0900)]
phy: uniphier-usb3hs: Change Rx sync mode to avoid communication failure
In case of using default parameters, communication failure might occur
in rare cases. This sets Rx sync mode parameter to avoid the issue.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Kunihiko Hayashi [Thu, 30 Jan 2020 06:52:42 +0000 (15:52 +0900)]
phy: uniphier-usb3hs: Add legacy SoC support for Pro5
Add legacy SoC support that needs to manage gio clock and reset.
This supports Pro5.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Kunihiko Hayashi [Thu, 30 Jan 2020 06:52:41 +0000 (15:52 +0900)]
phy: uniphier-usb3ss: Add Pro5 support
Pro5 SoC has same scheme of USB3 ss-phy as Pro4, so the data for Pro5 is
equivalent to Pro4.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Kunihiko Hayashi [Thu, 30 Jan 2020 06:52:40 +0000 (15:52 +0900)]
dt-bindings: phy: socionext: Add Pro5 support and remove Pro4 from usb3-hsphy
This adds compatible string for Pro5 SoC that needs to manage gio clock
and reset. And Pro4 SoC uses USB2 PHY instead of USB3 HS-PHY, so this
removes Pro4 description from usb3-hsphy.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Kunihiko Hayashi [Thu, 30 Jan 2020 06:52:39 +0000 (15:52 +0900)]
phy: socionext: Use devm_platform_ioremap_resource()
Use devm_platform_ioremap_resource() to simplify the code.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Bjorn Andersson [Sat, 25 Jan 2020 00:08:03 +0000 (16:08 -0800)]
phy: qcom-qmp: Add MSM8996 UFS QMP support
The support for the 14nm MSM8996 UFS PHY is currently handled by the
UFS-specific 14nm QMP driver, due to the earlier need for additional
operations beyond the standard PHY API.
Add support for this PHY to the common QMP driver, to allow us to remove
the old driver.
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Swapnil Jakhade [Thu, 6 Feb 2020 06:11:01 +0000 (07:11 +0100)]
phy: cadence-torrent: Add support for subnode bindings
Implement single link subnode support to the phy driver.
Add reset support including PHY reset and individual lane reset.
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Yuti Amonkar <yamonkar@cadence.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Swapnil Jakhade [Thu, 6 Feb 2020 06:11:00 +0000 (07:11 +0100)]
phy: cadence-torrent: Add platform dependent initialization structure
Add platform dependent initialization data for Torrent PHY used in TI's
J721E SoC.
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Yuti Amonkar <yamonkar@cadence.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Swapnil Jakhade [Thu, 6 Feb 2020 06:10:59 +0000 (07:10 +0100)]
phy: cadence-torrent: Use regmap to read and write DPTX PHY registers
Use regmap to read and write DPTX specific PHY registers.
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Yuti Amonkar <yamonkar@cadence.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Swapnil Jakhade [Thu, 6 Feb 2020 06:10:58 +0000 (07:10 +0100)]
phy: cadence-torrent: Use regmap to read and write Torrent PHY registers
Use regmap for accessing Torrent PHY registers. Modify register offsets
as defined in Torrent PHY user guide. Abstract address calculation
using regmap APIs.
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Yuti Amonkar <yamonkar@cadence.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Swapnil Jakhade [Thu, 6 Feb 2020 06:10:57 +0000 (07:10 +0100)]
phy: cadence-torrent: Implement PHY configure APIs
Add support for PHY configuration APIs. These will mainly reconfigure
link rate, number of lanes, voltage swing and pre-emphasis values.
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Yuti Amonkar <yamonkar@cadence.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Swapnil Jakhade [Thu, 6 Feb 2020 06:10:56 +0000 (07:10 +0100)]
phy: cadence-torrent: Add 19.2 MHz reference clock support
Add configuration functions for 19.2 MHz refclock support.
Add register configurations for SSC support.
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Yuti Amonkar <yamonkar@cadence.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Swapnil Jakhade [Thu, 6 Feb 2020 06:10:55 +0000 (07:10 +0100)]
phy: cadence-torrent: Refactor code for reusability
Add a separate function to set different power state values.
Use uniform polling timeout value. Also check return values
of functions for proper error handling.
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Yuti Amonkar <yamonkar@cadence.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Swapnil Jakhade [Thu, 6 Feb 2020 06:10:54 +0000 (07:10 +0100)]
phy: cadence-torrent: Add wrapper for DPTX register access
Add wrapper functions to read, write DisplayPort specific PHY registers to
improve code readability.
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Yuti Amonkar <yamonkar@cadence.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Swapnil Jakhade [Thu, 6 Feb 2020 06:10:53 +0000 (07:10 +0100)]
phy: cadence-torrent: Add wrapper for PHY register access
Add a wrapper function to write Torrent PHY registers to improve
code readability.
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Yuti Amonkar <yamonkar@cadence.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Swapnil Jakhade [Thu, 6 Feb 2020 06:10:52 +0000 (07:10 +0100)]
phy: cadence-torrent: Adopt Torrent nomenclature
- Change private data struct cdns_dp_phy to cdns_torrent_phy
- Change module description and registration accordingly
- Generic torrent functions have prefix cdns_torrent_phy_*
- Functions specific to Torrent phy for DisplayPort are prefixed as
cdns_torrent_dp_*
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Yuti Amonkar <yamonkar@cadence.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Yuti Amonkar [Thu, 6 Feb 2020 06:10:51 +0000 (07:10 +0100)]
phy: cadence-dp: Rename to phy-cadence-torrent
Rename Cadence DP PHY driver from phy-cadence-dp to phy-cadence-torrent
to make it more generic for future use. Modifiy Makefile and Kconfig
accordingly. Also, change driver compatible from "cdns,dp-phy" to
"cdns,torrent-phy".This will not affect ABI as the driver has never
been functional, and therefore do not exist in any active use case.
Signed-off-by: Yuti Amonkar <yamonkar@cadence.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Yuti Amonkar [Thu, 6 Feb 2020 06:10:50 +0000 (07:10 +0100)]
dt-bindings: phy: Add Cadence MHDP PHY bindings in YAML format.
- Add Cadence MHDP PHY bindings in YAML format.
- Add Torrent PHY reference clock bindings.
- Add sub-node bindings for each group of PHY lanes based on PHY type.
Each sub-node includes properties such as master lane number, link reset,
phy type, number of lanes etc.
- Add reset support including PHY reset and individual lane reset.
- Add a new compatible string used for TI SoCs using Torrent PHY.
This will not affect ABI as the driver has never been functional,
and therefore do not exist in any active use case.
Signed-off-by: Yuti Amonkar <yamonkar@cadence.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Greg Kroah-Hartman [Thu, 19 Mar 2020 15:01:00 +0000 (16:01 +0100)]
Merge tag 'tegra-for-5.7-usb-v2' of git://git./linux/kernel/git/tegra/linux into usb-next
Thierry writes:
usb: tegra: Changes for v5.7-rc1
These changes add USB OTG support for the XUSB host and XUSB device
controllers found on NVIDIA Tegra SoCs.
* tag 'tegra-for-5.7-usb-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
usb: gadget: tegra-xudc: Support multiple device modes
usb: gadget: tegra-xudc: Use phy_set_mode() to set/unset device mode
usb: gadget: tegra-xudc: Add usb-phy support
usb: gadget: tegra-xudc: Remove usb-role-switch support
usb: xhci-tegra: Add OTG support
phy: tegra: Select USB_PHY
phy: tegra: Don't use device-managed API to allocate ports
phy: tegra: Fix regulator leak
phy: tegra: Print -EPROBE_DEFER error message at debug level
phy: tegra: xusb: Don't warn on probe defer
phy: tegra: xusb: Add Tegra194 support
phy: tegra: xusb: Protect Tegra186 soc with config
phy: tegra: xusb: Add set_mode support for UTMI phy on Tegra186
phy: tegra: xusb: Add set_mode support for USB 2 phy on Tegra210
phy: tegra: xusb: Add support to get companion USB 3 port
phy: tegra: xusb: Add usb-phy support
phy: tegra: xusb: Add usb-role-switch support
Colin Ian King [Wed, 18 Mar 2020 16:01:08 +0000 (16:01 +0000)]
usb: cdns3: fix spelling mistake "wrapperr" -> "wrapper"
There is a spelling mistake in the module description. Fix it.
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Link: https://lore.kernel.org/r/20200318160108.267403-1-colin.king@canonical.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Nagarjuna Kristam [Mon, 10 Feb 2020 08:11:38 +0000 (13:41 +0530)]
usb: gadget: tegra-xudc: Support multiple device modes
This change supports limited multiple device modes by:
- At most 4 ports contains OTG/Device capability.
- One port run as device mode at a time.
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Acked-by: Felipe Balbi <balbi@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Nagarjuna Kristam [Mon, 10 Feb 2020 08:11:37 +0000 (13:41 +0530)]
usb: gadget: tegra-xudc: Use phy_set_mode() to set/unset device mode
When device mode is set/unset, VBUS override activity is done via
exported functions from padctl driver. Use phy_set_mode() instead.
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Acked-by: Felipe Balbi <balbi@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Nagarjuna Kristam [Mon, 10 Feb 2020 08:11:36 +0000 (13:41 +0530)]
usb: gadget: tegra-xudc: Add usb-phy support
usb-phy is used to get notified on the USB role changes. Get usb-phy from
the UTMI PHY.
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Acked-by: Felipe Balbi <balbi@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Nagarjuna Kristam [Mon, 10 Feb 2020 08:11:35 +0000 (13:41 +0530)]
usb: gadget: tegra-xudc: Remove usb-role-switch support
Padctl driver will act as a central driver to receive USB role changes via
usb-role-switch. This is updated to corresponding host, device drivers.
Hence remove usb-role-switch from XUDC driver.
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Acked-by: Felipe Balbi <balbi@kernel.org>
[treding@nvidia.com: rebase onto Greg's usb-next branch]
Signed-off-by: Thierry Reding <treding@nvidia.com>
Nagarjuna Kristam [Mon, 10 Feb 2020 08:11:34 +0000 (13:41 +0530)]
usb: xhci-tegra: Add OTG support
Get usb-phy's for availbale USB 2 phys. Register id notifiers for available
usb-phy's to receive role change notifications. Perform PP for the received
role change usb ports.
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
[treding@nvidia.com: rebase onto Greg's usb-next branch]
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Thu, 19 Mar 2020 13:18:32 +0000 (14:18 +0100)]
Merge branch 'for-5.7/phy' into for-5.7/usb
Corentin Labbe [Wed, 18 Mar 2020 15:23:33 +0000 (15:23 +0000)]
phy: tegra: Select USB_PHY
I have hit the following build error:
armv7a-hardfloat-linux-gnueabi-ld: drivers/phy/tegra/xusb.o: in function `tegra_xusb_port_unregister':
xusb.c:(.text+0x2ac): undefined reference to `usb_remove_phy'
armv7a-hardfloat-linux-gnueabi-ld: drivers/phy/tegra/xusb.o: in function `tegra_xusb_setup_ports':
xusb.c:(.text+0xf30): undefined reference to `usb_add_phy_dev'
PHY_TEGRA_XUSB should select USB_PHY because it uses symbols defined in
the code enabled by that.
Fixes:
23babe30fb45d ("phy: tegra: xusb: Add usb-phy support")
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Thu, 19 Mar 2020 10:52:13 +0000 (11:52 +0100)]
phy: tegra: Don't use device-managed API to allocate ports
The device-managed allocation API doesn't work well with the life-cycle
of device objects. Since ports have device objects allocated within, it
can lead to situations where these devices need to stay around until
after their parent pad controller has been unbound from its driver. The
device-managed memory allocated for the port objects will, however, get
freed when the pad controller unbinds from the driver. This can cause
use-after-free errors down the road.
Note that the device is deleted as part of the driver unbind operation,
so there isn't much that can be done with it after that point, but the
memory still needs to stay around to ensure none of the references are
invalidated.
One situation where this arises is when a VBUS supply is associated with
a USB 2 or 3 port. When that supply is released using regulator_put() an
SRCU call will queue the release of the device link connecting the port
and the regulator after a grace period. This means that the regulator is
going to keep on to the last reference of the port device even after the
pad controller driver was unbound (which is when the memory backing the
port device is freed).
Fix this by allocating port objects using non-device-managed memory. Add
release callbacks for these objects so that their memory gets freed when
the last reference goes away. This decouples the port devices' lifetime
from the "active" lifetime of the pad controller (i.e. the time during
which the pad controller driver owns the device).
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Wed, 18 Mar 2020 22:25:54 +0000 (23:25 +0100)]
phy: tegra: Fix regulator leak
Devices are created for each port of the XUSB pad controller. Each USB 2
and USB 3 port can potentially have an associated VBUS power supply that
needs to be removed when the device is removed.
Since port devices never bind to a driver, the driver core will not get
to perform the cleanup of device-managed resources that usually happens
on driver unbind.
Now, the driver core will also perform device-managed resource cleanup
for driver-less devices when they are released. However, when a device
link is created between the regulator and the port device, as part of
regulator_get(), the regulator takes a reference to the port device and
prevents it from being released unless regulator_put() is called, which
will never happen.
Avoid this by using the non-device-managed API and manually releasing
the regulator reference when the port is unregistered.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Wed, 18 Mar 2020 22:25:13 +0000 (23:25 +0100)]
phy: tegra: Print -EPROBE_DEFER error message at debug level
Probe deferral is an expected error condition that will usually be
recovered from. Print such error messages at debug level to make them
available for diagnostic purposes when building with debugging enabled
and hide them otherwise to not spam the kernel log with them.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Jon Hunter [Mon, 24 Feb 2020 14:36:41 +0000 (14:36 +0000)]
phy: tegra: xusb: Don't warn on probe defer
Deferred probe is an expected return value for tegra_fuse_readl().
Given that the driver deals with it properly, there's no need to
output a warning that may potentially confuse users.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
JC Kuo [Wed, 12 Feb 2020 06:11:30 +0000 (14:11 +0800)]
phy: tegra: xusb: Add Tegra194 support
Add support for the XUSB pad controller found on Tegra194 SoCs. It is
mostly similar to the same IP found on Tegra186, but the number of
pads exposed differs, as do the programming sequences. Because most of
the Tegra194 XUSB PADCTL registers definition and programming sequence
are the same as Tegra186, Tegra194 XUSB PADCTL can share the same
driver, xusb-tegra186.c, with Tegra186 XUSB PADCTL.
Tegra194 XUSB PADCTL supports up to USB 3.1 Gen 2 speed, however, it
is possible for some platforms have long signal trace that could not
provide sufficient electrical environment for Gen 2 speed. This patch
adds a "maximum-speed" property to usb3 ports which can be used to
specify the maximum supported speed for any particular USB 3.1 port.
For a port that is not capable of SuperSpeedPlus, "maximum-speed"
property should carry "super-speed".
Signed-off-by: JC Kuo <jckuo@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
JC Kuo [Wed, 12 Feb 2020 06:11:29 +0000 (14:11 +0800)]
phy: tegra: xusb: Protect Tegra186 soc with config
As xusb-tegra186.c will be reused for Tegra194, it would be good to
protect Tegra186 soc data with CONFIG_ARCH_TEGRA_186_SOC. This commit
also reshuffles Tegra186 soc data single CONFIG_ARCH_TEGRA_186_SOC
will be sufficient.
Signed-off-by: JC Kuo <jckuo@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Nagarjuna Kristam [Mon, 10 Feb 2020 08:11:33 +0000 (13:41 +0530)]
phy: tegra: xusb: Add set_mode support for UTMI phy on Tegra186
Add support for set_mode on UTMI phy. This allow XUSB host/device mode
drivers to configure the hardware to corresponding modes.
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Nagarjuna Kristam [Mon, 10 Feb 2020 08:11:32 +0000 (13:41 +0530)]
phy: tegra: xusb: Add set_mode support for USB 2 phy on Tegra210
Add support for set_mode on USB 2 phy. This allow XUSB host/device mode
drivers to configure the hardware to corresponding modes.
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Nagarjuna Kristam [Mon, 10 Feb 2020 08:11:31 +0000 (13:41 +0530)]
phy: tegra: xusb: Add support to get companion USB 3 port
Tegra XUSB host, device mode driver requires the USB 3 companion port
number for corresponding USB 2 port. Add API to retrieve the same.
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: JC Kuo <jckuo@nvidia.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Nagarjuna Kristam [Mon, 10 Feb 2020 08:11:30 +0000 (13:41 +0530)]
phy: tegra: xusb: Add usb-phy support
For USB 2 ports that has usb-role-switch enabled, add usb-phy for
corresponding USB 2 phy. USB role changes from role switch are then
updated to corresponding host and device mode drivers via usb-phy notifier
block.
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
[treding@nvidia.com: rebase onto Greg's usb-next branch]
Signed-off-by: Thierry Reding <treding@nvidia.com>
Nagarjuna Kristam [Mon, 10 Feb 2020 08:11:29 +0000 (13:41 +0530)]
phy: tegra: xusb: Add usb-role-switch support
If usb-role-switch property is present in USB 2 port, register
usb-role-switch to receive usb role changes.
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
[treding@nvidia.com: rebase onto Greg's usb-next branch]
Signed-off-by: Thierry Reding <treding@nvidia.com>
Nishad Kamdar [Sun, 15 Mar 2020 10:40:26 +0000 (16:10 +0530)]
USB: c67x00: Use the correct style for SPDX License Identifier
This patch corrects the SPDX License Identifier style in
header files related to Cypress C67X00 USB Controller.
For C header files Documentation/process/license-rules.rst
mandates C-like comments (opposed to C source files where
C++ style should be used).
Changes made by using a script provided by Joe Perches here:
https://lkml.org/lkml/2019/2/7/46.
Suggested-by: Joe Perches <joe@perches.com>
Signed-off-by: Nishad Kamdar <nishadkamdar@gmail.com>
Link: https://lore.kernel.org/r/20200315104022.GA3998@nishad
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Nishad Kamdar [Sun, 15 Mar 2020 10:28:48 +0000 (15:58 +0530)]
USB: atm: Use the correct style for SPDX License Identifier
This patch corrects the SPDX License Identifier style in
header file related to USB DSL modem support drivers.
For C header files Documentation/process/license-rules.rst
mandates C-like comments (opposed to C source files where
C++ style should be used).
Changes made by using a script provided by Joe Perches here:
https://lkml.org/lkml/2019/2/7/46.
Suggested-by: Joe Perches <joe@perches.com>
Signed-off-by: Nishad Kamdar <nishadkamdar@gmail.com>
Link: https://lore.kernel.org/r/20200315102844.GA3460@nishad
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Macpaul Lin [Mon, 16 Mar 2020 21:11:36 +0000 (16:11 -0500)]
usb: musb: tusb6010: fix a possible missing data type replacement
Replace "unsigned" to "u32" for checkpatch fix to tusb_writeb().
Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
Signed-off-by: Bin Liu <b-liu@ti.com>
Link: https://lore.kernel.org/r/20200316211136.2274-9-b-liu@ti.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Mans Rullgard [Mon, 16 Mar 2020 21:11:35 +0000 (16:11 -0500)]
usb: musb: fix crash with highmen PIO and usbmon
When handling a PIO bulk transfer with highmem buffer, a temporary
mapping is assigned to urb->transfer_buffer. After the transfer is
complete, an invalid address is left behind in this pointer. This is
not ordinarily a problem since nothing touches that buffer before the
urb is released. However, when usbmon is active, usbmon_urb_complete()
calls (indirectly) mon_bin_get_data() which does access the transfer
buffer if it is set. To prevent an invalid memory access here, reset
urb->transfer_buffer to NULL when finished (musb_host_rx()), or do not
set it at all (musb_host_tx()).
Fixes:
8e8a55165469 ("usb: musb: host: Handle highmem in PIO mode")
Signed-off-by: Mans Rullgard <mans@mansr.com>
Cc: stable@vger.kernel.org
Signed-off-by: Bin Liu <b-liu@ti.com>
Link: https://lore.kernel.org/r/20200316211136.2274-8-b-liu@ti.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Paul Cercueil [Mon, 16 Mar 2020 21:11:34 +0000 (16:11 -0500)]
usb: musb: jz4740: Add support for the JZ4770
Add support for probing the jz4740-musb driver on the JZ4770 SoC.
The USB IP in the JZ4770 works the same Inventra IP as for the JZ4740,
but it features more endpoints, and officially supports OTG.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Bin Liu <b-liu@ti.com>
Link: https://lore.kernel.org/r/20200316211136.2274-7-b-liu@ti.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Paul Cercueil [Mon, 16 Mar 2020 21:11:33 +0000 (16:11 -0500)]
usb: musb: jz4740: Unconditionally depend on devicetree
The jz4740-musb driver is unconditionally probed from devicetree, so we
can add a hard dependency on devicetree. This makes the code a bit
cleaner, and is more future-proof as the platform data is now retrieved
using of_device_get_match_data().
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Bin Liu <b-liu@ti.com>
Link: https://lore.kernel.org/r/20200316211136.2274-6-b-liu@ti.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Paul Cercueil [Mon, 16 Mar 2020 21:11:32 +0000 (16:11 -0500)]
usb: musb: jz4740: Register USB role switch
Register a USB role switch, in order to get notified by the connector
driver when the USB role changes. The notification is then transmitted
to the PHY.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Bin Liu <b-liu@ti.com>
Link: https://lore.kernel.org/r/20200316211136.2274-5-b-liu@ti.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Paul Cercueil [Mon, 16 Mar 2020 21:11:31 +0000 (16:11 -0500)]
usb: musb: jz4740: Add support for DMA
Add support for using the DMA channels built into the Inventra IP.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Tested-by: Artur Rojek <contact@artur-rojek.eu>
Signed-off-by: Bin Liu <b-liu@ti.com>
Link: https://lore.kernel.org/r/20200316211136.2274-4-b-liu@ti.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Paul Cercueil [Mon, 16 Mar 2020 21:11:30 +0000 (16:11 -0500)]
dt-bindings: usb: Convert jz4740-musb doc to YAML
Convert ingenic,jz4740-musb.txt to ingenic,musb.yaml, and add the
new ingenic,jz4770-musb and ingenic,jz4725b-musb compatible strings
in the process.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bin Liu <b-liu@ti.com>
Link: https://lore.kernel.org/r/20200316211136.2274-3-b-liu@ti.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Colin Ian King [Mon, 16 Mar 2020 21:11:29 +0000 (16:11 -0500)]
usb: musb: remove redundant assignment to variable ret
Variable ret is being initialized with a value that is never read,
it is assigned a new value later on. The assignment is redundant
and can be removed.
Addresses-Coverity: ("Unused value")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Bin Liu <b-liu@ti.com>
Link: https://lore.kernel.org/r/20200316211136.2274-2-b-liu@ti.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Greg Kroah-Hartman [Tue, 17 Mar 2020 18:53:33 +0000 (19:53 +0100)]
Merge tag 'usb-ci-v5.7-rc1' of git://git./linux/kernel/git/peter.chen/usb into usb-next
Peter writes:
- Improve the runtime pm
- Cover one cover case during suspend/resume
- Some SPDX License changes
The code changes are at my ci-for-usb-next many days,
no issue is reported.
* tag 'usb-ci-v5.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/peter.chen/usb:
USB: chipidea: Use the correct style for SPDX License Identifier
usb: chipidea: otg: handling vbus disconnect event occurred during system suspend
usb: chipidea: udc: using structure ci_hdrc device for runtime PM
Greg Kroah-Hartman [Tue, 17 Mar 2020 18:51:07 +0000 (19:51 +0100)]
Merge tag 'thunderbolt-for-v5.7' of git://git./linux/kernel/git/westeri/thunderbolt into usb-next
Mika writes:
thunderbolt: Changes for v5.7 merge window
- A couple of commits that make the driver to use flexible-array member
instead of zero-length array extension. This allows compiler to issue a
warning if the flexible array is not the last member of a structure.
- Use scnprintf() instead of snprintf() to avoid potential buffer
overflow.
* tag 'thunderbolt-for-v5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/westeri/thunderbolt:
thunderbolt: Use scnprintf() for avoiding potential buffer overflow
thunderbolt: icm: Replace zero-length array with flexible-array member
thunderbolt: eeprom: Replace zero-length array with flexible-array member
Andrey Konovalov [Tue, 17 Mar 2020 14:54:31 +0000 (15:54 +0100)]
usb: raw_gadget: fix compilation warnings in uapi headers
Mark usb_raw_io_flags_valid() and usb_raw_io_flags_zero() as inline to
fix the following warnings:
./usr/include/linux/usb/raw_gadget.h:69:12: warning: unused function 'usb_raw_io_flags_valid' [-Wunused-function]
./usr/include/linux/usb/raw_gadget.h:74:12: warning: unused function 'usb_raw_io_flags_zero' [-Wunused-function]
Reported-by: kernelci.org bot <bot@kernelci.org>
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Andrey Konovalov <andreyknvl@google.com>
Link: https://lore.kernel.org/r/6206b80b3810f95bfe1d452de45596609a07b6ea.1584456779.git.andreyknvl@google.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Masahiro Yamada [Sun, 15 Mar 2020 15:49:48 +0000 (00:49 +0900)]
usb: get rid of 'choice' for legacy gadget drivers
drivers/usb/gadget/legacy/Kconfig creates a 'choice' inside another
'choice'.
The outer choice: line 17 "USB Gadget precomposed configurations"
The inner choice: line 484 "EHCI Debug Device mode"
I wondered why the whole legacy gadget drivers reside in such a big
choice block.
This dates back to 2003, "[PATCH] USB: fix for multiple definition of
`usb_gadget_get_string'". [1]
At that time, the global function, usb_gadget_get_string(), was linked
into multiple drivers. That was why only one driver was able to become
built-in at the same time.
Later, commit
a84d9e5361bc ("usb: gadget: start with libcomposite")
moved usb_gadget_get_string() to a separate module, libcomposite.ko
instead of including usbstring.c from multiple modules.
More and more refactoring was done, and after commit
1bcce939478f
("usb: gadget: multi: convert to new interface of f_mass_storage"),
you can link multiple gadget drivers into vmlinux without causing
multiple definition error.
This is the only user of the nested choice structure ever. Removing
this mess will make some Kconfig cleanups possible.
[1]: https://git.kernel.org/pub/scm/linux/kernel/git/history/history.git/commit/?id=
fee4cf49a81381e072c063571d1aadbb29207408
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Acked-by: Felipe Balbi <balbi@kernel.org>
Link: https://lore.kernel.org/r/20200315154948.26569-1-masahiroy@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Stephen Rothwell [Mon, 16 Mar 2020 03:37:52 +0000 (14:37 +1100)]
usb: dwc3: fix up for role switch API change
After merging the usb-gadget tree, today's linux-next build (arm
multi_v7_defconfig) failed like this:
drivers/usb/dwc3/drd.c: In function 'dwc3_setup_role_switch':
drivers/usb/dwc3/drd.c:551:23: error: assignment to 'usb_role_switch_set_t' {aka 'int (*)(struct usb_role_switch *, enum usb_role)'} from incompatible pointer type 'int (*)(struct device *, enum usb_role)' [-Werror=incompatible-pointer-types]
551 | dwc3_role_switch.set = dwc3_usb_role_switch_set;
| ^
drivers/usb/dwc3/drd.c:552:23: error: assignment to 'usb_role_switch_get_t' {aka 'enum usb_role (*)(struct usb_role_switch *)'} from incompatible pointer type 'enum usb_role (*)(struct device *)' [-Werror=incompatible-pointer-types]
552 | dwc3_role_switch.get = dwc3_usb_role_switch_get;
| ^
Caused by commit
8a0a13799744 ("usb: dwc3: Registering a role switch in the DRD code.")
interacting with commit
bce3052f0c16 ("usb: roles: Provide the switch drivers handle to the switch in the API")
from the usb tree.
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Link: https://lore.kernel.org/r/20200316143752.473f1073@canb.auug.org.au
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Greg Kroah-Hartman [Mon, 16 Mar 2020 07:22:49 +0000 (08:22 +0100)]
Merge tag 'usb-for-v5.7' of git://git./linux/kernel/git/balbi/usb into usb-next
Felipe writes:
USB: changes for v5.7 merge window
Lots of changes on dwc3 this time, most of them from Thinh fixing a
bunch of really old mishaps on the driver.
DWC2 got support for STM32MP15 and a couple RockChip SoCs while DWC3
learned about Amlogic A1 family.
Apart from these, we have a few spelling fixes and other minor
non-critical fixes all over the place.
Signed-off-by: Felipe Balbi <balbi@kernel.org>
* tag 'usb-for-v5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb: (41 commits)
dt-bindings: usb: add documentation for aspeed usb-vhub
ARM: dts: aspeed-g4: add vhub port and endpoint properties
ARM: dts: aspeed-g5: add vhub port and endpoint properties
ARM: dts: aspeed-g6: add usb functions
usb: gadget: aspeed: add ast2600 vhub support
usb: gadget: aspeed: read vhub properties from device tree
usb: gadget: aspeed: support per-vhub usb descriptors
usb: gadget: f_phonet: Replace zero-length array with flexible-array member
usb: gadget: composite: Inform controller driver of self-powered
usb: gadget: amd5536udc: fix spelling mistake "reserverd" -> "reserved"
udc: s3c-hsudc: Silence warning about supplies during deferred probe
usb: dwc2: Silence warning about supplies during deferred probe
dt-bindings: usb: dwc2: add compatible property for rk3368 usb
dt-bindings: usb: dwc2: add compatible property for rk3328 usb
usb: gadget: add raw-gadget interface
usb: dwc2: Implement set_selfpowered()
usb: dwc3: qcom: Replace <linux/clk-provider.h> by <linux/of_clk.h>
usb: dwc3: core: don't do suspend for device mode if already suspended
usb: dwc3: Rework resets initialization to be more flexible
usb: dwc3: Rework clock initialization to be more flexible
...
Nishad Kamdar [Sun, 15 Mar 2020 10:55:07 +0000 (16:25 +0530)]
USB: chipidea: Use the correct style for SPDX License Identifier
This patch corrects the SPDX License Identifier style in
header files related to ChipIdea Highspeed Dual Role Controller.
For C header files Documentation/process/license-rules.rst
mandates C-like comments (opposed to C source files where
C++ style should be used).
Changes made by using a script provided by Joe Perches here:
https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flkml.org%2Flkml%2F2019%2F2%2F7%2F46&data=02%7C01%7CPeter.Chen%40nxp.com%
7Cbea69ff84b574ca6b48e08d7c8cf58cf%
7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%
7C637198665199494622&sdata=bk1n4%2BvnrfRS6ZDrps%2BuXiImdzaxKZ00YskBg6pjtn4%3D&reserved=0.
Suggested-by: Joe Perches <joe@perches.com>
Signed-off-by: Nishad Kamdar <nishadkamdar@gmail.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Peter Chen [Wed, 19 Feb 2020 09:25:48 +0000 (17:25 +0800)]
usb: chipidea: otg: handling vbus disconnect event occurred during system suspend
During system suspend, the role switch may occur, eg, from gadget->host.
In this case, the vbus disconnect event is lost, we add this handling
in role switch routine in this commit.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Peter Chen [Thu, 23 Jan 2020 02:49:19 +0000 (10:49 +0800)]
usb: chipidea: udc: using structure ci_hdrc device for runtime PM
At current code, it doesn't maintain ci->gadget.dev's runtime PM
status well, eg, during the PM operation, the PM counter for
ci->gadget.dev doesn't be changed accordingly.
In this commit, we use ci_hdrc device instead of ci->gadget.dev
for runtime PM APIs at udc driver, in the way, we handle runtime
PM APIs using unify device structure between core and udc driver.
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Tao Ren [Tue, 3 Mar 2020 06:23:36 +0000 (22:23 -0800)]
dt-bindings: usb: add documentation for aspeed usb-vhub
Add device tree binding documentation for the Aspeed USB 2.0 Virtual HUb
Controller.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
Tao Ren [Tue, 3 Mar 2020 06:23:35 +0000 (22:23 -0800)]
ARM: dts: aspeed-g4: add vhub port and endpoint properties
Add "aspeed,vhub-downstream-ports" and "aspeed,vhub-generic-endpoints"
properties to describe supported number of vhub ports and endpoints.
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
Tao Ren [Tue, 3 Mar 2020 06:23:34 +0000 (22:23 -0800)]
ARM: dts: aspeed-g5: add vhub port and endpoint properties
Add "aspeed,vhub-downstream-ports" and "aspeed,vhub-generic-endpoints"
properties to describe supported number of vhub ports and endpoints.
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
Tao Ren [Tue, 3 Mar 2020 06:23:33 +0000 (22:23 -0800)]
ARM: dts: aspeed-g6: add usb functions
Add USB components and according pin groups in aspeed-g6 dtsi.
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
Tao Ren [Tue, 3 Mar 2020 06:23:32 +0000 (22:23 -0800)]
usb: gadget: aspeed: add ast2600 vhub support
Add AST2600 support in aspeed-vhub driver. There are 3 major differences
between AST2500 and AST2600 vhub:
- AST2600 supports 7 downstream ports while AST2500 supports 5.
- AST2600 supports 21 generic endpoints while AST2500 supports 15.
- EP0 data buffer's 8-byte DMA alignment restriction is removed from
AST2600.
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
Tao Ren [Tue, 3 Mar 2020 06:23:31 +0000 (22:23 -0800)]
usb: gadget: aspeed: read vhub properties from device tree
The patch introduces 2 DT properties ("aspeed,vhub-downstream-ports" and
"aspeed,vhub-generic-endpoints") which replaces hardcoded port/endpoint
number. It is to make it more convenient to add support for newer vhub
revisions with different number of ports and endpoints.
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
Tao Ren [Tue, 3 Mar 2020 06:23:30 +0000 (22:23 -0800)]
usb: gadget: aspeed: support per-vhub usb descriptors
This patch store vhub's standard usb descriptors in struct "ast_vhub" so
it's more convenient to customize descriptors and potentially support
multiple vhub instances in the future.
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
Gustavo A. R. Silva [Tue, 11 Feb 2020 23:23:03 +0000 (17:23 -0600)]
usb: gadget: f_phonet: Replace zero-length array with flexible-array member
The current codebase makes use of the zero-length array language
extension to the C90 standard, but the preferred mechanism to declare
variable-length types such as these ones is a flexible array member[1][2],
introduced in C99:
struct foo {
int stuff;
struct boo array[];
};
By making use of the mechanism above, we will get a compiler warning
in case the flexible array does not occur last in the structure, which
will help us prevent some kind of undefined behavior bugs from being
inadvertenly introduced[3] to the codebase from now on.
This issue was found with the help of Coccinelle.
[1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html
[2] https://github.com/KSPP/linux/issues/21
[3] commit
76497732932f ("cxgb3/l2t: Fix undefined behaviour")
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
Thinh Nguyen [Tue, 4 Feb 2020 02:05:32 +0000 (18:05 -0800)]
usb: gadget: composite: Inform controller driver of self-powered
Different configuration/condition may draw different power. Inform the
controller driver of the change so it can respond properly (e.g.
GET_STATUS request). This fixes an issue with setting MaxPower from
configfs. The composite driver doesn't check this value when setting
self-powered.
Cc: stable@vger.kernel.org
Fixes:
88af8bbe4ef7 ("usb: gadget: the start of the configfs interface")
Signed-off-by: Thinh Nguyen <thinhn@synopsys.com>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
Alexandre Belloni [Fri, 14 Feb 2020 14:24:46 +0000 (15:24 +0100)]
usb: gadget: amd5536udc: fix spelling mistake "reserverd" -> "reserved"
The variable is named reserved, the comment should say so.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
Marek Szyprowski [Fri, 28 Feb 2020 09:28:08 +0000 (10:28 +0100)]
udc: s3c-hsudc: Silence warning about supplies during deferred probe
Don't confuse user with meaningless warning about the failure in getting
supplies in case of deferred probe.
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
Marek Szyprowski [Fri, 28 Feb 2020 09:25:57 +0000 (10:25 +0100)]
usb: dwc2: Silence warning about supplies during deferred probe
Don't confuse user with meaningless warning about the failure in getting
supplies in case of deferred probe.
Acked-by: Minas Harutyunyan <hminas@synopsys.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Felipe Balbi <balbi@kernel.org>