Amaury Séchet [Sat, 30 Apr 2022 23:45:28 +0000 (23:45 +0000)]
[DAGCombine] Make sure combined nodes are added back to the worklist in topological order.
Currently, a node and its users are added back to the worklist in reverse topological order after it is combined. This diff changes that order to be topological. This is part of a larger migration to get the DAGCombiner to process nodes in topological order.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D127115
Simon Pilgrim [Mon, 5 Jun 2023 11:08:12 +0000 (12:08 +0100)]
[GlobalISel][X86] Add 128/256/512-bit vector and/or/xor test coverage
Based off the legalize-add-v*.mir tests
Simon Pilgrim [Mon, 5 Jun 2023 10:45:11 +0000 (11:45 +0100)]
[GlobalISel][X86] Add illegal types and 32-bit target scalar and/or/xor test coverage
Based off the legalize-add.mir tests
khei4 [Sun, 4 Jun 2023 14:19:44 +0000 (23:19 +0900)]
[InstCombine] add overflow checking on AddSub `C-(X+C2) --> (C-C2)-X`
Differential Revision: https://reviews.llvm.org/D152068
khei4 [Sun, 4 Jun 2023 04:31:18 +0000 (13:31 +0900)]
[InstCombine] precommit test for D152068(NFC)
Differential Revision: https://reviews.llvm.org/D152091
Mateja Marjanovic [Fri, 2 Jun 2023 13:41:15 +0000 (15:41 +0200)]
[AMDGPU] Trim zero components from buffer and image stores
For image and buffer stores the default behaviour on GFX11 and
older is to set all unset components to zero. So if we pass
only X component it will be the same as X000, or XY same as XY00.
This patch simplifies the passed vector of components in InstCombine
by removing zero components from the end.
For image stores it also trims DMask if necessary.
Reviewed by: arsenm, foad, nhaehnle, piotr
Jay Foad [Mon, 5 Jun 2023 10:18:13 +0000 (11:18 +0100)]
[AMDGPU] Regenerate some GlobalISel checks
Simon Pilgrim [Mon, 5 Jun 2023 10:18:17 +0000 (11:18 +0100)]
[X86] canonicalizeShuffleWithBinOps - ensure a binary shuffle of binops have the same value type
Fixes #63091
Simon Pilgrim [Mon, 5 Jun 2023 09:42:16 +0000 (10:42 +0100)]
[X86] Add test case for Issue #63091
Simon Pilgrim [Mon, 5 Jun 2023 09:14:46 +0000 (10:14 +0100)]
[GlobalISel][X86] Add G_CTTZ_ZERO_UNDEF/G_CTTZ legalization handling
G_CTTZ_ZERO_UNDEF is always legal using the BSF instruction, G_CTTZ requires the BMI1 TZCNT instruction
LLVM GN Syncbot [Mon, 5 Jun 2023 10:08:50 +0000 (10:08 +0000)]
[gn build] Port
90c5fe982222
Dominik Adamski [Mon, 22 May 2023 11:11:53 +0000 (06:11 -0500)]
[OpenMP][bbc][flang] Add _OPENMP macro definition
OpenMP standard (section 3.3 for OpenMP 5.2) requires that _OPENMP macro
contains release date of given OpenMP standard version.
Differential Revision: https://reviews.llvm.org/D151083
Reviewed By: kiranchandramohan
Tom Eccles [Thu, 1 Jun 2023 11:09:45 +0000 (11:09 +0000)]
[flang] Store KindMapping by value in FirOpBuilder
Previously only a constant reference was stored in the FirOpBuilder.
However, a lot of code was merged using
FirOpBuilder builder{rewriter, getKindMapping(mod)};
This is incorrect because the KindMapping returned will go out of scope
as soon as FirOpBuilder's constructor had run. This led to an infinite
loop running some tests using HLFIR (because the stack space containing
the kind mapping was re-used and corrupted).
One solution would have just been to fix the incorrect call sites,
however, as a large number of these had already made it past review, I
decided to instead change FirOpBuilder to store its own copy of the
KindMapping. This is not costly because nearly every time we construct a
KindMapping is exclusively to construct a FirOpBuilder. To make this
common pattern simpler, I added a new constructor to FirOpBuilder which
calls getKindMapping().
Differential Revision: https://reviews.llvm.org/D151881
Tom Eccles [Thu, 1 Jun 2023 19:23:25 +0000 (19:23 +0000)]
[flang] convert stack arrays allocation to match old type
The old fir.allocmem operation returned a !fir.heap<.> type. The new
fir.alloca operation returns a !fir.ref<.> type. This patch inserts a
fir.convert so that the old type is preserved. This prevents verifier
failures when types returned from fir.if statements don't match the
expected type.
Differential Revision: https://reviews.llvm.org/D151921
Johannes Reifferscheid [Mon, 5 Jun 2023 09:45:19 +0000 (11:45 +0200)]
[bazel] Merge BytecodeOpInterface target into IR.
Reviewed By: akuegel
Differential Revision: https://reviews.llvm.org/D152133
Guillaume Chatelet [Mon, 5 Jun 2023 09:50:30 +0000 (09:50 +0000)]
Revert D148717 "[libc] Improve memcmp latency and codegen"
This reverts commit
9ec6ebd3ceabb29482aa18a64b943788b65223dc.
The patch broke RISCV and aarch64 builtbots.
Mikhail Gudim [Mon, 5 Jun 2023 09:43:29 +0000 (11:43 +0200)]
Reapply [SCCP] Constant propagation through freeze instruction
Reapply with extra check for struct types, which caused buildbot
failures last time.
-----
The freeze instruction has not been handled by SCCPInstVisitor.
This patch adds SCCPInstVisitor::visitFreezeInst(FreezeInst &I)
method to handle freeze instructions.
Differential Revision: https://reviews.llvm.org/D151659
Viktoriia Bakalova [Thu, 1 Jun 2023 15:48:14 +0000 (15:48 +0000)]
[include-cleaner] Allow multiple strategies for spelling includes.
Summary:
Reviewers:
Subscribers:
Differential Revision: https://reviews.llvm.org/D150185
Guillaume Chatelet [Wed, 19 Apr 2023 14:57:14 +0000 (14:57 +0000)]
[libc] Improve memcmp latency and codegen
This is based on ideas from @nafi to:
- use a branchless version of 'cmp' for 'uint32_t',
- completely resolve the lexicographic comparison through vector
operations when wide types are available. We also get rid of byte
reloads and serializing '__builtin_ctzll'.
I did not include the suggestion to replace comparisons of 'uint16_t'
with two 'uint8_t' as it did not seem to help the codegen. This can
be revisited in sub-sequent patches.
The code been rewritten to reduce nested function calls, making the
job of the inliner easier and preventing harmful code duplication.
Reviewed By: nafi3000
Differential Revision: https://reviews.llvm.org/D148717
Matthias Springer [Mon, 5 Jun 2023 08:20:24 +0000 (10:20 +0200)]
[mlir][transform] ApplyPatternsOp: Register canonicalization patterns
Also support replacing payload ops with ConstantLike ops in the TrackingListener, even if the replacement op does not have the same name. (Not supported for ops with multiple results, as this would require splitting the handle.)
Differential Revision: https://reviews.llvm.org/D152127
Matthias Springer [Mon, 5 Jun 2023 08:20:09 +0000 (10:20 +0200)]
[mlir][SCF][transform] Register SCF dialect patterns
Differential Revision: https://reviews.llvm.org/D152125
Matthias Springer [Mon, 5 Jun 2023 08:19:55 +0000 (10:19 +0200)]
[mlir][linalg][transform] Register linalg dialect patterns
Differential Revision: https://reviews.llvm.org/D152124
Jay Foad [Mon, 5 Jun 2023 08:53:43 +0000 (09:53 +0100)]
[AMDGPU] Make use of MachineInstr::all_defs and all_uses. NFCI.
David Green [Mon, 5 Jun 2023 09:08:57 +0000 (10:08 +0100)]
[AArch64][SVE] Predicated mla/mls patterns
To go with D149267 and D149967, this adds predicated mla/mls patterns, selected
from select(mask, add(a, mul(b, c)), a) -> mla(a, mask, b, c). The existing
patterns are eventually removed by D149967.
Differential Revision: https://reviews.llvm.org/D149969
Chen Zheng [Mon, 5 Jun 2023 09:02:38 +0000 (05:02 -0400)]
use // instad of ; in c file tests, NFC
Mehdi Amini [Mon, 5 Jun 2023 08:27:02 +0000 (01:27 -0700)]
Adopt Properties in builtin dialect
This was missed when the other dialects adopted it.
Reviewed By: rriddle
Differential Revision: https://reviews.llvm.org/D151410
Qiu Chaofan [Mon, 5 Jun 2023 08:24:02 +0000 (16:24 +0800)]
[PowerPC] Combine fptoint-store under strict cases
Reviewed By: shchenz
Differential Revision: https://reviews.llvm.org/D141249
Chen Zheng [Mon, 5 Jun 2023 07:40:50 +0000 (03:40 -0400)]
fix failures caused by https://reviews.llvm.org/D148490
buildbot: https://lab.llvm.org/buildbot/#/builders/214/builds/7823
Adrian Kuegel [Mon, 5 Jun 2023 07:57:01 +0000 (09:57 +0200)]
Nathan Ridge [Tue, 23 May 2023 08:17:09 +0000 (04:17 -0400)]
[clangd] Do not end inactiveRegions range at position 0 of line
This carries over the fix previously made for semantic highlighting
https://reviews.llvm.org/D92148, to the new inactiveRegions
protocol as well.
In addition, the directives at the beginning and end of an
inactive region are now excluded from the region.
Fixes https://github.com/clangd/clangd/issues/1631
Fixes https://github.com/clangd/clangd/issues/773
Differential Revision: https://reviews.llvm.org/D151190
LLVM GN Syncbot [Mon, 5 Jun 2023 07:38:58 +0000 (07:38 +0000)]
[gn build] Port
bbcd998efdb5
pvanhout [Mon, 5 Jun 2023 07:37:51 +0000 (09:37 +0200)]
Revert "[NFC][RFC][TableGen] Split GlobalISelEmitter.cpp"
This reverts commit
79caedf5f8992ac16313157470f529344972c2ee.
LLVM GN Syncbot [Mon, 5 Jun 2023 07:28:16 +0000 (07:28 +0000)]
[gn build] Port
79caedf5f899
pvanhout [Thu, 25 May 2023 12:19:08 +0000 (14:19 +0200)]
[NFC][RFC][TableGen] Split GlobalISelEmitter.cpp
This patch splits the GlobalISelEmitter.cpp file, which imports DAG ISel patterns for GISel, into separate "GISelMatchTable.h/cpp" files.
The main motive is readability & maintainability. GlobalISelEmitter.cpp was about 6400 lines of mixed code, some bits implementing the match table codegen, some others dedicated to importing DAG patterns.
Now it's down to 2700 + a 2150 header + 2000 impl.
It's a tiny bit more lines overall but that's to be expected - moving
inline definitions to out-of-line, adding comments in the .cpp, etc. all of that takes additional space, but I think the tradeoff is worth it.
I did as little unrelated code changes as possible, I would say the biggest change is the introduction of the `gi` namespace used to prevent name conflicts/ODR violations with type common names such as `Matcher`.
It was previously not an issue because all of the code was in an anonymous namespace.
This moves all of the "match table" code out of the file, so predicates,
rules, and actions are all separated now. I believe this helps separating concerns, now `GlobalISelEmitter.cpp` is more focused on importing DAG patterns into GI, instead of also containing the whole match table internals as well.
Note: the new files have a "GISel" prefix to make them distinct from the other "GI" files in the same folder, which are for the combiner.
Reviewed By: aemerson
Differential Revision: https://reviews.llvm.org/D151432
Mikhail Goncharov [Mon, 5 Jun 2023 07:20:08 +0000 (09:20 +0200)]
[bazel] add missing dep for GPUTransforms
esmeyi [Mon, 5 Jun 2023 06:50:47 +0000 (02:50 -0400)]
Revert "[XCOFF][DWARF] XCOFF64 should be able to select the dwarf format in intergrated-as mode."
This reverts commit
4054c68644dfebbb584bca698a25d18d1d312bae.
Due to AIX system linker requires DWARF64 for XCOFF64.
Matthias Springer [Mon, 5 Jun 2023 06:40:20 +0000 (08:40 +0200)]
[mlir][memref][transform] Register memref dialect patterns
Differential Revision: https://reviews.llvm.org/D151998
Qiu Chaofan [Mon, 5 Jun 2023 06:25:04 +0000 (14:25 +0800)]
[PowerPC] Require FPCVT for store fptoi combination
Serge Pavlov [Mon, 5 Jun 2023 06:09:34 +0000 (13:09 +0700)]
[FPEnv] Intrinsics for access to FP environment
The change implements intrinsics 'get_fpenv', 'set_fpenv' and 'reset_fpenv'.
They are used to read floating-point environment, set it or reset to
some default state. They do the same actions as C library functions
'fegetenv' and 'fesetenv'. By default these intrinsics are lowered to calls
to these functions.
The new intrinsics specify FP environment as a value of integer type, it
is convenient of most targets where the FP state is a content of some
register. Some targets however use long representations. On X86 the size
of FP environment is 256 bits, and even half of this size is not a legal
ibteger type. To facilitate legalization in such cases, two sets of DAG
nodes is used. Nodes GET_FPENV and SET_FPENV are used when FP
environment may be represented by a legal integer type. Nodes
GET_FPENV_MEM and SET_FPENV_MEM consider FP environment as a region in
memory, much like `fesetenv` and `fegetenv` do. They are used when
target has long representation for floationg-point state.
Differential Revision: https://reviews.llvm.org/D71742
Qiu Chaofan [Mon, 5 Jun 2023 05:25:10 +0000 (13:25 +0800)]
Reland "[PowerPC] Simplify fp-to-int store optimization"
The build failure should be fixed by
de681d53. Follow-up refactor will
be done in future patches.
This reverts commit
e7c5ced0b9f0551ea17e1d2b48be86f03a772c59.
Haohai Wen [Mon, 5 Jun 2023 05:41:43 +0000 (13:41 +0800)]
[NFC][COFF] clang-format WinCOFFObjectWriter and MCWinCOFFObjectWriter
Reviewed By: skan
Differential Revision: https://reviews.llvm.org/D152119
Vinayaka Bandishti [Mon, 5 Jun 2023 05:17:42 +0000 (10:47 +0530)]
[Affine-fusion] Fix a bug in mod detection
Fix a bug in detecting unknown ids as mods of known ids that was
preventing certain fusions.
While at this, fix the function signature of `detectAsMod` function to
have output as the last argument.
Reviewed By: bondhugula
Differential Revision: https://reviews.llvm.org/D152055
Vinayaka Bandishti [Mon, 5 Jun 2023 05:02:51 +0000 (10:32 +0530)]
Make optimize llvm common to both gpu-to-hsaco/cubin
Before serializing, optimizations on llvm were only called on path to
hsaco, and not cubin. Define opt-level for `gpu-to-cubin` pass as well,
and move call to optimize llvm to a common place.
Reviewed By: bondhugula
Differential Revision: https://reviews.llvm.org/D151554
Alex Voicu [Mon, 5 Jun 2023 02:06:25 +0000 (03:06 +0100)]
[clang][CodeGen] Account for VTT address space
Correctly account for the fact that certain targets do not use the generic address space for the implicit VTT argument. This entails adjusting `ItaniumCXXABI::buildStructorSignature`, `ItaniumCXXABI::addImplicitStructorParams` and `ItaniumCXXABI::getImplicitConstructorArgs` to use the target's global variable address space. The associated test is temporarily marked `XFAIL` as additional fixes are needed.
Reviewed By: rjmccall
Differential Revision: https://reviews.llvm.org/D150746
Haohai Wen [Mon, 5 Jun 2023 01:33:45 +0000 (09:33 +0800)]
[NFC][COFF] Use COFFSection.MCSection when writeSection
Each COFFSection bind MCSection when created. No need to iterate
throught MCAssembler when writeSection.
Reviewed By: skan
Differential Revision: https://reviews.llvm.org/D151793
Chen Zheng [Mon, 5 Jun 2023 01:36:58 +0000 (21:36 -0400)]
[AIX] use system assembler for assembly files
Change to system assembler to compile assembly files even
-fintegrated-as is specified. We don't have a good Clang as
for now for assembly files on AIX.
Reviewed By: qiucf
Differential Revision: https://reviews.llvm.org/D148490
Jacques Pienaar [Sun, 4 Jun 2023 22:52:37 +0000 (15:52 -0700)]
[mlir][bytecodegen] Add list helper methods.
Previously the SignedVarInt was incorrectly defined. Follow up work
needed for improving Array printing/parsing, but correcting the
definitions for now.
Alexey Lapshin [Sun, 4 Jun 2023 22:04:30 +0000 (00:04 +0200)]
Fix test bot breakage from
36f351098cd50809658493d9b2e22a795874bab0
This addresses the issue found by: https://lab.llvm.org/buildbot/#/builders/192/builds/2309
Jacques Pienaar [Sun, 4 Jun 2023 21:59:50 +0000 (14:59 -0700)]
[mlir][bytecodegen] Add ReservedOrDead marker.
Enables reserving or marking dead in enum list, resulting in skipping in dispatches.
Jacques Pienaar [Sun, 4 Jun 2023 21:19:40 +0000 (14:19 -0700)]
[mlir][bytecodegen] Remove comments (NFC).
Fix missed review comment from https://reviews.llvm.org/D144820
Aiden Grossman [Sun, 4 Jun 2023 20:40:37 +0000 (20:40 +0000)]
[Docs][llvm-mc] Fix location of statement
The comment moved is referring to the --output-asm-syntax flag rather
than the --print-imm-hex flag, but seems to have mistakenly been put
under the definition of that flag due to some misplaced line numbers on
phabricator.
Benjamin Kramer [Sun, 4 Jun 2023 19:39:52 +0000 (21:39 +0200)]
[bazel] Port
36f351098cd5
Florian Hahn [Sun, 4 Jun 2023 19:31:00 +0000 (20:31 +0100)]
[LV] Check if value was already not uniform for previous VF.
If the value was already known to not be uniform for the previous
(smaller VF), it cannot be uniform for the larger VF.
This slightly reduces compile-time, once uniformity checks are becoming
a bit more expensive due to using SCEV rewriting (D148841).
Reviewed By: Ayal
Differential Revision: https://reviews.llvm.org/D151658
Alexey Lapshin [Sun, 4 Jun 2023 18:46:55 +0000 (20:46 +0200)]
LLVM GN Syncbot [Sun, 4 Jun 2023 18:33:22 +0000 (18:33 +0000)]
[gn build] Port
36f351098cd5
Alexey Lapshin [Fri, 31 Mar 2023 22:12:29 +0000 (00:12 +0200)]
[DWARFLinkerParallel][Reland] Add interface files, create a skeleton implementation.
This patch creates skeleton implementation for the DWARFLinkerParallel.
It also integrates DWARFLinkerParallel into dsymutil and llvm-dwarfutil,
so that empty DWARFLinker::link() can be called. To do this new command
line option is added "--linker apple/llvm". Additionally it changes
existing DWARFLinker interfaces/implementations to be compatible:
use Error for error reporting for the DWARFStreamer, make DWARFFile to
owner of referenced resources, other small refactorings.
Differential Revision: https://reviews.llvm.org/D147952
LLVM GN Syncbot [Sun, 4 Jun 2023 17:27:50 +0000 (17:27 +0000)]
[gn build] Port
7e1ee1e10dc0
Danila Kutenin [Sun, 4 Jun 2023 17:24:24 +0000 (19:24 +0200)]
[libcxx] Add strict weak ordering checks to sorting algorithms
This is the implementation of the first proposal of strict weak ordering checks described in https://discourse.llvm.org/t/rfc-strict-weak-ordering-checks-in-the-debug-libc/70217
This targets the most vulnerable algorithms like std::sort
Reviewed By: philnik, #libc
Differential Revision: https://reviews.llvm.org/D150264
Manna, Soumi [Sun, 4 Jun 2023 16:35:29 +0000 (09:35 -0700)]
[NFC][CLANG] [NFC][CLANG] Fix nullptr dereference issue in ConvertQualTypeToKind()
This patch uses castAs instead of getAs which will assert if the type doesn't match in ConvertQualTypeToKind(clang::ASTContext const &, clang::QualType).
Reviewed By: erichkeane
Differential Revision: https://reviews.llvm.org/D151928
Manna, Soumi [Sun, 4 Jun 2023 16:04:49 +0000 (09:04 -0700)]
[NFC][CLANG] Fix Static Code Analyzer Concerns
This patch uses castAs instead of getAs which will assert if the type doesn't match to resolve dereference issue with nullptr FPT when calling getThisType() in clang::CodeGen::CGDebugInfo::CreateType(clang::MemberPointerType const *, llvm::DIFile *).
Reviewed By: erichkeane
Differential Revision: https://reviews.llvm.org/D151947
Simon Pilgrim [Sun, 4 Jun 2023 15:59:23 +0000 (16:59 +0100)]
[GlobalIsel][X86] Move G_ICMP legalization before legacy handling and merge 32-bit/64-bit handling
I've kept the legalForCartesianProduct call, but this requires us to maintain 32-bit/64-bit integer lists - we might want to just use legalIf and perform the type pair set matching manually.
Ben Shi [Sun, 4 Jun 2023 03:22:10 +0000 (11:22 +0800)]
[AVR][NFC][test] Suppement a test of the pseudo instruction RORBRd
Reviewed By: aykevl, Patryk27
Differential Revision: https://reviews.llvm.org/D152087
Sergei Barannikov [Sun, 4 Jun 2023 14:06:53 +0000 (17:06 +0300)]
[MC] Remove unused mc_difflist_iterator constructor (NFC)
The constructor hasn't been used since its introduction.
Simon Pilgrim [Sun, 4 Jun 2023 14:21:42 +0000 (15:21 +0100)]
[GlobalIsel][X86] Move G_PTRTOINT/G_INTTOPTR legalization before legacy handling and merge 32-bit/64-bit handling
I've kept the legalForCartesianProduct call, but this requires us to maintain 32-bit/64-bit integer lists - we might want to just use legalIf and perform the type pair set matching manually.
LLVM GN Syncbot [Sun, 4 Jun 2023 11:36:45 +0000 (11:36 +0000)]
[gn build] Port
66e5678fece3
Sergei Barannikov [Tue, 9 May 2023 07:16:20 +0000 (10:16 +0300)]
[clang][CodeGen] Break up TargetInfo.cpp [6/8]
Make `qualifyWindowsLibrary` and `addStackProbeTargetAttributes`
protected members of `TargetCodeGenInfo`.
These are helper functions used by `getDependentLibraryOption` and
`setTargetAttributes` methods when targeting Windows. The change will
allow these functions to be reused after splitting `TargetInfo.cpp`.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D150178
Simon Pilgrim [Sun, 4 Jun 2023 11:34:05 +0000 (12:34 +0100)]
[GlobalIsel][X86] Remove some unused setLegalizerInfo* methods. NFC.
We're moving away from using per-ISA legalization controls and using LegalIf etc. to handle specific ISAs instead.
Alexey Lapshin [Sun, 4 Jun 2023 11:28:54 +0000 (13:28 +0200)]
Revert "[DWARFLinkerParallel] Add interface files, create a skeleton implementation."
This reverts commit
e0ba9b2ace7ffc20bf8fe2eb533d638f27619b10.
LLVM GN Syncbot [Sun, 4 Jun 2023 11:09:26 +0000 (11:09 +0000)]
[gn build] Port
e0ba9b2ace7f
Alexey Lapshin [Fri, 31 Mar 2023 22:12:29 +0000 (00:12 +0200)]
[DWARFLinkerParallel] Add interface files, create a skeleton implementation.
This patch creates skeleton implementation for the DWARFLinkerParallel.
It also integrates DWARFLinkerParallel into dsymutil and llvm-dwarfutil,
so that empty DWARFLinker::link() can be called. To do this new command
line option is added "--linker apple/llvm". Additionally it changes
existing DWARFLinker interfaces/implementations to be compatible:
use Error for error reporting for the DWARFStreamer, make DWARFFile to
owner of referenced resources, other small refactorings.
Differential Revision: https://reviews.llvm.org/D147952
Sergei Barannikov [Sat, 20 May 2023 18:30:02 +0000 (21:30 +0300)]
[CodeGen] Fix incorrect usage of MCPhysReg for diff list elements
The lists contain differences between register numbers, not the register
numbers themselves. Since a difference can also be negative, this also
changes its type to signed.
Changing the type to signed exposed a "bug". For AMDGPU, which has many
registers, the first element of a sequence could be as big as ~45k.
The value does not fit into int16_t, but fits into uint16_t. The bug
didn't show up because of unsigned wrapping and truncation of the Val
field in the advance() method.
To fix the issue, I changed the way regunit difflists are encoded. The
4-bit 'scale' field of MCRegisterDesc::RegUnit was replaced by 12-bit
number of the first regunit, and the first element of each of the lists
was removed. The higher 20 bits of RegUnit field contain the initial
offset into DiffLists array.
AMDGPU has 1'409 regunits (2^12 = 4'096), and the biggest offset is
80'041 (2^20 = 1'048'576). That is, there is enough room.
Changing the encoding method also resulted in a smaller array size, the
numbers are below (I omitted targets with less than 100 elements).
```
AMDGPU | 80052 | 78741 | -1,6%
RISCV | 6498 | 6297 | -3,1%
ARM | 4181 | 3966 | -5,1%
AArch64 | 2770 | 2592 | -6,4%
PPC | 1578 | 1441 | -8,7%
Hexagon | 994 | 740 | -25,6%
R600 | 508 | 398 | -21,7%
VE | 471 | 459 | -2,5%
Sparc | 381 | 363 | -4,7%
X86 | 326 | 208 | -36,2%
Mips | 253 | 200 | -20,9%
SystemZ | 186 | 162 | -12,9%
```
Reviewed By: foad, arsenm
Differential Revision: https://reviews.llvm.org/D151036
Simon Pilgrim [Sun, 4 Jun 2023 10:44:19 +0000 (11:44 +0100)]
[GlobalIsel][X86] Update legalization of G_AND/G_OR/G_XOR
Replace the legacy G_AND/G_OR/G_XOR legalizer, this handles all scalar promotion and vector clamping (allows AVX1 to handle 256-bit logic ops).
Sergei Barannikov [Thu, 25 May 2023 04:50:54 +0000 (07:50 +0300)]
[Hexagon] Check if register is non-null before calling subregs_inclusive
D151036 adds an assertions that prohibits iterating over sub- and
super-registers of a null register. This is already the case when
iterating over register units of a null register, and worked by
accident for sub- and super-registers.
Reviewed By: kparzysz
Differential Revision: https://reviews.llvm.org/D151406
Amara Emerson [Sun, 4 Jun 2023 07:23:47 +0000 (00:23 -0700)]
[GlobalISel] Fix DIVREM combine from inserting a divrem before its operands' defs.
In some rare corner cases where in between the div/rem pair there's a def of
the second instruction's source (but a different vreg due to the combine's
eqivalence checks), it will place the DIVREM at the first instruction's point,
causing a use-before-def. There wasn't an obvious fix that stood out to me
without doing more involved analysis than a combine should really be doing.
Fixes issue #60516
I'm open to new suggestions on how to approach this, as I'm not too happy
at bailing out here. It's not the first time we run into issues with value liveness
that the DAG world isn't affected by.
Differential Revision: https://reviews.llvm.org/D144336
khei4 [Sat, 3 Jun 2023 09:06:43 +0000 (18:06 +0900)]
[MemCpyOpt] Remove unnecessary bitcast and reuse some variables for ByValOptimization (NFC)
Differential Revision: https://reviews.llvm.org/D152056
Kazu Hirata [Sun, 4 Jun 2023 06:36:54 +0000 (23:36 -0700)]
[MC] Modernize InlineAsmIdentifier (NFC)
Kazu Hirata [Sun, 4 Jun 2023 06:36:53 +0000 (23:36 -0700)]
[IR] Remove unused declaration removeParamUndefImplyingAttrs
The corresponding function definition was removed by:
commit
087a8eea359a4d8ef22c42fddca3b09833928c6a
Author: Nikita Popov <nikita.ppv@gmail.com>
Date: Sun Jul 25 18:21:13 2021 +0200
Kazu Hirata [Sun, 4 Jun 2023 06:36:51 +0000 (23:36 -0700)]
[DWARFLinker] Remove unused declaration keepDIEAndDependencies
The corresponding function definition was removed by:
commit
95a8e8a2557e487be6133475966255661a9f6567
Author: Jonas Devlieghere <jonas@devlieghere.com>
Date: Tue Dec 3 11:10:04 2019 -0800
Kazu Hirata [Sun, 4 Jun 2023 06:36:50 +0000 (23:36 -0700)]
[AST] Remove unused declaration makeDeclVisibleInContextInternal
The corresponding function definition was removed by:
commit
f634c9006977fcbed5f55eaee831852e453fdf76
Author: Richard Smith <richard-llvm@metafoo.co.uk>
Date: Fri Mar 16 06:12:59 2012 +0000
Timm Bäder [Sun, 4 Jun 2023 05:49:43 +0000 (07:49 +0200)]
[clang][NFC] Reformat expandTabs
Use the proper capitalization here as well as a init capture for better
identifiers.
Patryk Wychowaniec [Sun, 4 Jun 2023 03:08:54 +0000 (11:08 +0800)]
[AVR] Fix incorrect operands of pseudo instruction 'ROLBRd'
Fixes https://github.com/llvm/llvm-project/issues/63098
Reviewed by: benshi001
Differential Revision: https://reviews.llvm.org/D152063
Matt Arsenault [Sat, 3 Jun 2023 19:30:45 +0000 (15:30 -0400)]
Attributor: Fix comment typos
Aiden Grossman [Sat, 3 Jun 2023 22:37:21 +0000 (22:37 +0000)]
[libc][CMake] Place archives in build/lib/<target-triple>
This patch moves the location of libllvmlibc.a within the build tree to
within ./lib/<target triple>. This more closely matches the behavior of
other runtime builds and allows for clang in the same build tree to
automatically be able to link against llvmlibc since this path is by
default included by the driver.
Also removes the LIBC_BINARY_DIR CMake flag since it isn't used anywhere
in the tree (based on a quick grep).
Reviewed By: phosek
Differential Revision: https://reviews.llvm.org/D151624
Aiden Grossman [Sat, 3 Jun 2023 22:30:05 +0000 (22:30 +0000)]
[CMake][Fuchsia] Add LLVM_ENABLE_HTTPLIB to Stage 2 build
This patch sets the LLVM_ENABLE_HTTPLIB flag to ON in the stage 2 build
similar to how many of the other dependency flags are already specified.
This is necessary to configure the stage 2 build by itself, otherwise
the CMake configuration crashes.
This is currently causing the MLGO demo to fail since we're only using
stage 2 to avoid having to build stage 1 to save some compile time.
Reviewed By: phosek
Differential Revision: https://reviews.llvm.org/D152057
Aiden Grossman [Sat, 3 Jun 2023 22:26:33 +0000 (22:26 +0000)]
[Docs][CMake] Add LLVM_ENABLE_HTTPLIB to CMake options list
This patch adds LLVM_ENABLE_HTTPLIB to the list of CMake options to make
it more clear exactly what it does and also provide clarity on which
specific project it is referring to/installation.
Reviewed By: phosek
Differential Revision: https://reviews.llvm.org/D152060
Martin Storsjö [Sat, 3 Jun 2023 20:15:51 +0000 (23:15 +0300)]
[clang-tools-extra] Fix linking when built with CLANG_LINK_CLANG_DYLIB=ON
clangIncludeCleaner isn't part of libclang-cpp, so link it with
target_link_libraries instead of clang_target_link_libraries.
This fixes a regression from
c28506ba4b6961950849f8fdecd0cf7e503a14f9.
Fix suggested by Michal Gorny.
Martin Storsjö [Wed, 15 Mar 2023 10:11:28 +0000 (12:11 +0200)]
[libcxx] Fix using std::wcout/wcin on Windows with streams configured in wide mode
On Windows, the underlying file descriptors for stdout/stdin/stderr
can be reconfigured to wide mode. In the default (narrow) mode, the
charset usually isn't utf8 (as libcxx assumes), but normally a locale
specific codepage (where each codepage only can represent a small
subset of unicode characters).
By configuring the stdout file descriptor to wide mode, the user can
output wchar_t based strings without convesion to the narrow charset.
Within libcxx, don't try to use codecvt to convert this to a narrow
character encoding, but output these strings as such with fputwc.
In wide mode, such strings could be output directly with fwrite too,
but if the file descriptor hasn't been configured in wide mode, that
breaks the output (which currently works reasonably). By always
outputting one character at a time with fputwc, it works regardless
of mode of the stdout file descriptor.
For the narrow output stream, std::cout, outputting (via fwrite)
does fail when the file descriptor is set to wide mode. This matches
how it behaves with both MS STL and GNU libstdc++ too, so this is
probably acceptable.
This fixes https://github.com/llvm/llvm-project/issues/46646, and
the downstream bugs https://github.com/mstorsjo/llvm-mingw/issues/145
and https://github.com/mstorsjo/llvm-mingw/issues/222.
Differential Revision: https://reviews.llvm.org/D146398
Owen Pan [Fri, 2 Jun 2023 00:39:39 +0000 (17:39 -0700)]
[clang-format] Fix overlapping replacements before PPDirectives
If the first token of an annotated line is finalized, reuse its
NewlinesBefore value to avoid potential overlapping whitespace
replacements before preprocessor branching directives.
Fixes #62892.
Differential Revision: https://reviews.llvm.org/D151954
Kazu Hirata [Sat, 3 Jun 2023 18:01:18 +0000 (11:01 -0700)]
[MCA] Modernize Stage (NFC)
Kazu Hirata [Sat, 3 Jun 2023 18:01:17 +0000 (11:01 -0700)]
[MCA] Modernize RAWHazard (NFC)
Kazu Hirata [Sat, 3 Jun 2023 18:01:15 +0000 (11:01 -0700)]
[MCA] Modernize MemoryGroup (NFC)
Kazu Hirata [Sat, 3 Jun 2023 17:38:55 +0000 (10:38 -0700)]
[MCA] Modernize StallInfo (NFC)
Kazu Hirata [Sat, 3 Jun 2023 17:38:53 +0000 (10:38 -0700)]
[llvm-mca] Modernize MCACommentConsumer (NFC)
Kazu Hirata [Sat, 3 Jun 2023 17:38:51 +0000 (10:38 -0700)]
[MCA] Modernize IncrementalSourceMgr (NFC)
Simon Pilgrim [Sat, 3 Jun 2023 17:19:46 +0000 (18:19 +0100)]
[GlobalIsel][X86] Update legalization of G_MUL
Replace the legacy G_MUL legalizer, this handles all scalar promotion and vector clamping, however we still need to add custom legalization for many vector multiplies.
eopXD [Sat, 3 Jun 2023 17:07:02 +0000 (10:07 -0700)]
[Clang][RISCV] Avoid generating MaskedPrototype if the intrinsic does not have a masked version. NFC
The function should not be called if an intrinsic does not have a masked version.
Signed-off by: eop Chen <eop.chen@sifive.com>
Kazu Hirata [Sat, 3 Jun 2023 16:37:39 +0000 (09:37 -0700)]
[MCA] Modernize Pipeline (NFC)
Kazu Hirata [Sat, 3 Jun 2023 16:37:37 +0000 (09:37 -0700)]
[Serialization] Remove unused function getKnownModules
The last use was removed by:
commit
603cd869f7cdb0da7a545e86a1786f3175f72475
Author: Douglas Gregor <dgregor@apple.com>
Date: Fri Mar 22 18:50:14 2013 +0000
Kazu Hirata [Sat, 3 Jun 2023 16:37:36 +0000 (09:37 -0700)]
[AST] Use DenseMapBase::lookup (NFC)
Corentin Jabot [Mon, 8 May 2023 15:24:42 +0000 (17:24 +0200)]
[Clang] Fix status of P0960
P0960R3 and P1975R0 were marked not implemented because
of #61145,
This issue has been fixed and backported to LLVM 16,
the status page should reflect that.
Reviewed By: #clang-language-wg, ayzhao, erichkeane
Differential Revision: https://reviews.llvm.org/D150122