ac/llvm: support vec2 on b2i16

Since radeonsi sets the alu_to_scalar callback, frontends like Rusticl
might end up generating vec2 b2i16. Support this just like it's done for
b2f16.

Fixes: d692d433f28 ("radeonsi: use nir_lower_alu_to_scalar correctly")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23551>

radv: disable calibrated timestamps on raven/raven2

amdgpu enables gfxoff by default and the feature resets the RLC clock
counter on idle on raven/raven2.  Querying AMDGPU_INFO_TIMESTAMP does
not work as expected on those platforms.

There was an attempt in amdgpu to read from the TSC register instead,
but it did not work without a firmware update[1].  Another possible
solution is to disable the clock counter reset by clearing
AMD_PG_SUPPORT_RLC_SMU_HS, but that causes a 0.2W increase of power
consumption on idle which is undesirable.

The clock counter reset affects vkCmdWriteTimestamp as well.  The spec
is vague on whether that is allowed or not.  The WG is aware of the
issue[2] but never really addresses it.

[1] https://lists.freedesktop.org/archives/amd-gfx/2023-May/093731.html
[2] https://github.com/KhronosGroup/Vulkan-Docs/issues/216

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23481>

frontends/va: Fix missing unlock

Fix defect reported by Coverity Scan.

Missing unlock (LOCK)
missing_unlock: Returning without unlocking drv->mutex.

Fixes: af695149e96 ("frontends/va: pass in film_grain_target as new output")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23488>

zink/ci: remove spec@nv_shader_atomic_int64@* from the fail lists

Fixes: 56eb83115538 ("aco: run nir_lower_int64 after nir_opt_uniform_atomics")
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23553>

intel: use generated helpers for Wa_1508744258

iris_disable_rhwo_optimization can only apply on gfxver 12.0, and has
a version check to that affect.  Add an assertion to warn us if the
workaround ever applies to another version.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21742>

ci/android: remove the artifact file just as we unpack it

At this point is not needed anymore, remove it.

Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23527>

ci/lava: rename rest local MINIO_ variables to S3_

Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23527>

ci: remove BUILD_PATH, always use S3_ARTIFACT_NAME

Since we use S3 artifacts for LAVA always, keep only one codepath.

Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23527>

ci: replace MINIO_RESULTS_UPLOAD with S3_RESULTS_UPLOAD

Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23527>

ci: rename MINIO_HOST variable to S3_HOST

Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23527>

ci: rename MINIO to S3

We don't use MINIO for a long time. Rename variable accordingly.

Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23527>

ci: rename S3 artifacts according to scheme mesa-$arch-$config-$buildtype

Make the S3 (previously MINIO) artifacts clearly identifiable by glance.

Also now we fail before compilation, if the job doesn't define
the BUILDTYPE variable to prevent confusion.

Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23527>

ci: explicitely state BUILDTYPE

Fail when a job gets introduced without build type.
It should be explicitly stated what job uses.

Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23527>

nir: Rematerialize derefs after opt_dead_cf

Adding `nir_rematerialize_derefs_in_use_blocks_impl`
solves some cases when 'opt_dead_cf()' generates
a phi instruction for the first argument
of the `deref_store` intrinsic.

Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Lionel Landwerlin's avatarLionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6742
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22983>

anv: allow intel_clflush_range only on igpu

fixes: 521c216efcc0d0292ceedb3451c5a0a1ef956083
closes: #9106

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23320>

intel/compiler: Remove unused functions and declarations

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23539>

CODEOWNERS: add r300 driver

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23468>

etnaviv: Add support for conditional rendering

The hardware doesn't support native conditional rendering, so it is
implemented by software.

Code borrowed from Freedreno and Panfrost.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23392>

etnaviv: optimize transfer flushes

Context flushes that are triggered by a pending write to the resource
don't need to realize visibility of the resource changes outside of
the context. Skip implicit resource flushes in those cases.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23549>

aco: Lower divergent bool phis iteratively

Avoids stack overflows with really large programs.

No fossil-db changes.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8760
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8701

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23531>

agx: Fold addressing math into atomics

Like our loads and stores, our global atomics support indexing with a 64-bit
base plus a 32-bit element index, zero- or sign-extended and multiplied by the
word size. Unlike the loads and stores, they do not support additional shifting
(it's not too useful), so that needs an explicit lowering.

Switch to using AGX variants of the atomics, running our address pattern
matching on global atomics in order to delete some ALU.

This cleans up the image atomic lowering nicely, since we get to take full
advantage of the shift + zero-extend + add on the atomic... The shift comes from
multiplying by the bytes per pixel.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23529>

agx: Refactor expressions in agx_nir_lower_address

So we can add more instructions without duplication.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23529>

nir: Add AGX atomic intrinsics

This is a piece of cake with unified atomics :-) This will let us do our
addressing math tricks nice and easily.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23529>

ir2: Drop lower_locals_to_regs call

This is for producing (indirect) array register access. Since we don't handle
that, this is a no-op. Drop the call, it's pointless and misleading.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23529>

lima: Drop lower_locals_to_regs call

This is for producing (indirect) array register access. Since we don't handle
that, this is a no-op. Drop the call, it's pointless and misleading.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23529>

pan/mdg: Drop lower_locals_to_regs call

This is for producing (indirect) array register access. Since we don't handle
that, this is a no-op. Drop the call, it's pointless and misleading.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23529>

amd/ci: add another test to the vkcts-vega10 flake list

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23547>

zink/ci: add more QBO-related fails on RADV

These seem to have been forgotten during the original filing, probably
because more than 25 failures were found, and so deqp-runner limited
itself to 25.

References: #9174
Fixes: dad91dc7c47c ("zink: update some radv qbo fails")
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23547>

aco: run nir_lower_int64 after nir_opt_uniform_atomics

nir_opt_uniform_atomics can create 64-bit ALU instructions which need to
be lowered.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23502>

rusticl/icd: use new proc macros

This drops quite a lot of boilerplate code as this is now all generated
via our proc macros.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed by Nora Allen <blackcatgames@protonmail.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23413>

rusticl/icd: make release return nothing

I don't even know why it was like that...

Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23413>

rusticl: add proc macro module for generating API stubs

Most of the API stubs are very very trivial to generate as the sole
purpose of those are to deconstruct the returned `Result` object.

Sadly we can't use external crates yet, so "syn" and "qoute" can't be used
for this :'(

The code is kinda hacky, but we also don't expose this to other people, so
we can keep this as a big hack until we can use external crates.

I wish there was a better solution here.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23413>

etnaviv: rs: unconditionally flush color and depth cache before using RS

When the RS uses the pixel pipes it seems to destroy/invalidate any
content sitting in the color and depth caches from a previous draw.
Always flush the color and depth cache before using the RS to make
sure that any cache content written by the PE is properly flushed
to memory.

Fixes spec@!opengl 1.0@gl-1.0-drawpixels-depth-test and probably a
few others that are suffering from corruption of PE writes.

CC: mesa-stable
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23530>

etnaviv: rs: flush TS cache before making configuration changes

Move the TS cache flush into the same conditional block where
the TS setup is changed. TS cache always needs to be flushed
before making any changes to the TS setup.

CC: mesa-stable
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23530>

anv/video: move video requirements to outarray.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23519>

ci/b2c: update to mesa-trigger:2023-03-08.1

This should speed up job submission by 3 to 30 seconds depending on
the farm the machine is hosted in, and how busy it is.

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23361>

rusticl: compile r600 driver

To really use the driver it still needs to be enabled with

  export RUSTICL_ENABLE=r600

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20252>

r600/sfn: Handle load_global in 64 to vec2 lowering

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20252>

r600/sfn: Handle store_global when lowering 64 bit ops to vec2

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20252>

r600/sfn: Add experimental support for load/store_global

This is needed for rusticl, but the results may be unexpected.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20252>

intel/nir: switch ray query state tracking to local variables uint16_t

We should be able to use uint8_t but there appears to be a backend
bug.

Q2RTX shader compute shader improvement with ray queries :

Totals:
Instrs: 102221 -> 101499 (-0.71%); split: -0.82%, +0.12%
Cycles: 4451260 -> 4396025 (-1.24%)
Send messages: 3587 -> 3585 (-0.06%)
Spill count: 717 -> 658 (-8.23%)
Fill count: 1248 -> 1214 (-2.72%); split: -3.21%, +0.48%
Scratch Memory Size: 21504 -> 16384 (-23.81%)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19982>

radv/video: fix hevc scaling list order.

pps takes priority.

Fixes: da54b57888cf ("radv/video: fix hevc scaling lists.")
Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23537>

radv/video: report bad profile operation if h264 profile isn't supported.

Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23537>

radeonsi: enable aco support for gs copy shader

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23433>

radeonsi: enable aco for standalone gs

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23433>

ac/llvm,radeonsi: lower nir_load_ring_gsvs_amd in abi

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23433>

radeonsi: add scratch_offset arg for aco gs

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23433>

radeonsi: enable aco support for standalone tes

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23433>

radeonsi: update lds size for tes

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23433>

radeonsi: init tes aco shader info fields

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23433>

radeonsi: add scratch_offset arg for aco tes

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23433>

radeonsi: enable aco support for mono standalone tcs

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23433>

ac/llvm,radeonsi: lower nir_load_ring_tess_offchip_amd in abi

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23433>

radeonsi: lower nir_load_tess_rel_patch_id_amd in abi for aco

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23433>

radeonsi: add scratch_offset arg for aco tcs

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23433>

ac/nir,radv: add 1 dword to ES/GS item size

This reduce LDS bank conflict and align with radeonsi,
so we don't assume LDS access 16 byte aligned for both
driver.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23314>

ac/nir,radv: add 1 dword to LS/HS vertex stride

This reduce LDS bank conflict and align with radeonsi,
so we don't assume LDS access 16 byte aligned for both
driver.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23314>

ci/etnaviv: add asan run

Has more a PoC state that it works and needs some time get stable.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23493>

ci: add debian-arm32-asan

I want to have the possibility to use asan in for etnaviv ci. As lot
devices in the my CI farm are arm32 based lets do some prep work.

I had to skip the mesa:util suite as there are some asan problems
on 32bit platform with the hash_map. Once they got sorted out we can
enable the suite again.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23493>

intel/compiler: Refactor dump_instruction(s)

Delete unnecessary virtual functions, we need just two.  Refactor code
so the 'default behavior' logic (stderr and/or creating file) is not
duplicated.

Rename the virtuals so overrides don't hide the common convenience
functions.  Finally, provide a variant of dump_instructions() with
a `FILE *` parameter.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23457>

spirv: Use vtn_translate_scope for OpReadClockKHR

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23508>

spirv: Refactor and rename scope translation helper

This will make the change from nir_scope to mesa_scope
later less noisy.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23508>

docs: venus: update extension support

Advertise support for the follow extensions:
- VK_EXT_non_seamless_cube_map
- VK_EXT_dynamic_rendering_unused_attachments
- VK_KHR_shader_clock
- VK_EXT_border_color_swizzle
- VK_EXT_fragment_shader_interlock
- VK_EXT_shader_subgroup_ballot
- VK_EXT_color_write_enable

Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23510>

venus: enable VK_EXT_color_write_enable

Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23510>

venus: enable VK_EXT_shader_subgroup_ballot

Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23510>

venus: enable VK_EXT_fragment_shader_interlock

Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23510>

venus: enable VK_EXT_border_color_swizzle

Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23510>

venus: enable VK_KHR_shader_clock

Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23510>

venus: enable VK_EXT_dynamic_rendering_unused_attachments

Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23510>

venus: enable VK_EXT_non_seamless_cube_map

Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23510>

venus: sync protocol for multiple extensions for zink

- VK_EXT_non_seamless_cube_map
- VK_EXT_dynamic_rendering_unused_attachments
- VK_KHR_shader_clock
- VK_EXT_border_color_swizzle
- VK_EXT_fragment_shader_interlock
- VK_EXT_shader_subgroup_ballot
- VK_EXT_color_write_enable

Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23510>

venus: sync to latest protocol header from v1.3.252

Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23510>

util/tests: add gc_alloc_size alignment tests

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23501>

util: fix gc_alloc_size alignment

This was only aligning the gc_block_header. The returned pointer could be
incorrectly aligned.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Fixes: 69a9b343e8d ("util: add freelist allocator with mark/sweep")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9166
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23501>

clc: relax spec constant validation

Multiple values can have multiple spec constants assigned and vtn handles
this just fine. So just drop that assert as we need it to run SyCL
kernels.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9037
Fixes: a699844ffba ("microsoft/clc: Parse SPIR-V specialization consts into metadata")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23512>

rusticl: fix clippy errors on image_slice_pitch change to usize

That field got changed from `unsigned` to `uintptr_t` on the C side, so
now we can drop a bit of code dealing with conversions to `usize`.

Fixes: 68735f4e860 ("treewide: use uint64_t / (u)intptr_t in image address calculations")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23522>

ci: add and use clippy for rusticl

Acked-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23522>

docs: update calendar for 23.1.2

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23525>

docs/relnotes: add sha256sum for 23.1.2

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23525>

docs: add release notes for 23.1.2

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23525>

mesa: fix glBitmap in display lists when width <= 0 || height <= 0

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8904
Fixes: bb860f63 - mesa: create glBitmap textures while creating display lists

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23335>

radv: Clarify gang submit terminology.

This is done to better match the terminology used by the kernel
and also because the follower may not always be ACE in the future.

- Gang: a group of command streams that are submitted to
  more than one HW queue at the same time.
- Leader: the main command stream of a command buffer that works
  on the queue type of the command buffer.
- Follower: a command stream on a different HW queue that doesn't
  have a separate command buffer state and is submitted together
  with its leader.

During submission, a follower must always precede the leader in
the submitted command streams array.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23462>

zink: update some radv qbo fails

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23511>

zink: stop swizzling conditional render during batch flush

conditional render is only supposed to be enabled during renderpasses,
and this ends up doing mismatched start/stop in and out of renderpasses

affects:
GTF-GL46.gtf30.GL3Tests.conditional_render*

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23511>

zink: remove assert for dt in zink_kopper_update

this is a valid (harmless) path that can be hit by in some cases

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23511>

zink: check for cached mem correctly when mapping buffer

bo placement is the mem index, not the mem flags

Fixes: 52f27cda05b ("zink: allow direct memory mapping for any COHERENT+CACHED buffer")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23511>

zink: don't check prog->shaders when creating gfx pipeline

these objects don't technically belong to the pipeline, and checking
them may lead to inconsistent results in some corner cases

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23511>

zink: combine some rast state draw conditionals

no functional changes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23511>

docs/features update opencl extensions add rusticl

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23055>

rusticl: add cl_khr_create_command_queue

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23055>

docs/relnotes/23.1.1: clear "new features"

I should've done this after 23.1.0/before 23.1.1, but I forgot :]

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23521>

aco/tests: test that s_bfe bits is masked

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23464>

aco: mask bits source of s_bfe

The s_bfe instructions use 7 bits, not 5 like the NIR opcode requires.

No fossil-db changes (navi21).

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9162
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23464>

pvr: Add support for sampler border colors

Currently only the six vulkan 1.0 pre-defined formats are supported,
but some basic infrastructure that will be useful for implementing
VK_EXT_custom_border_color (and vulkan 1.1) is included.

Only formats currently listed in the pvr_format_table in pvr_formats.c
are currently supported. Unlike most (all?) other drivers, the PowerVR
hardware requires each entry in the border color table to be encoded
for every hardware format (of which there are 128 available, plus 128
for compressed formats).

Also in this commit:
 - Two new constants in rogue_texstate.xml:
    - IMAGE_WORD0_TEXFORMAT_MAX_SIZE, and
    - SAMPLER_BORDERCOLOR_INDEX_MAX_SIZE; and
 - A new device feature (tpu_border_colour_enhanced)

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21555>

pvr: Declare dependency on idep_mesautil

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21555>

etnaviv: make wider use of DBG_ENABLED(..)

Make the source code more consistent.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23495>

.mailmap: add an alias for Christian Gmeiner

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23498>

pvr: HWRT creation simplifications.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Matt Coster <matt.coster@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20092>

r600/sfn: Don't rewrite TESS_EVAL inner tess level outputs

Fixes: 5cd3e3950 (r600/sfn: Make sure all components are usable when lowering TF inputs)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23518>

r600/sfn: add read instruction for unused but required LDS op results

DS_XCHG_RET and LDS_CMP_XCHG_RET don't have a version that doesn't return
a value in the LDS red queue. so we have to read the value from the queue
and discard it.

Fixes: 79ca456b (r600/sfn: rewrite NIR backend)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23518>