Brian Paul [Wed, 7 Feb 2018 23:12:59 +0000 (16:12 -0700)]
st/mesa: s/unsigned/enum tgsi_semantic/ st_cb_drawpixels.c
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Brian Paul [Wed, 7 Feb 2018 23:12:35 +0000 (16:12 -0700)]
vbo: add a comment on vbo_draw_transform_feedback()
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Brian Paul [Wed, 7 Feb 2018 16:28:16 +0000 (09:28 -0700)]
gallium/util: trivial whitespace/formatting fixes in u_blit.c
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Brian Paul [Tue, 6 Feb 2018 22:35:30 +0000 (15:35 -0700)]
vbo: improve comments on vbo_draw_func()
And rename a parameter name.
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Brian Paul [Tue, 6 Feb 2018 22:33:37 +0000 (15:33 -0700)]
cso: add a couple sanity check assertions in cso_draw_vbo()
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Brian Paul [Wed, 31 Jan 2018 22:01:09 +0000 (15:01 -0700)]
st/mesa: rename some vars related to indirect draw count
'indirect_params' was a bit vague. Use the names that we use in
gallium's pipe_draw_indirect_info.
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Marek Olšák [Thu, 16 Nov 2017 15:01:11 +0000 (16:01 +0100)]
st/mesa: remove out_num_textures from update_textures
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Wed, 15 Nov 2017 23:32:22 +0000 (00:32 +0100)]
st/mesa: don't store non-fragment sampler states and views in st_context
those are unused.
st_context: 10120 -> 3704 bytes
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Lionel Landwerlin [Tue, 6 Feb 2018 23:28:24 +0000 (23:28 +0000)]
i965: perf: cleanup detection of kernel support for loadable configs
The initial revision of the patch adding loadable configs was testing
the feature's availability by adding a new config successfully and
then removing it.
A second version tested the availability just by exercising the
removal. But some unused code remained.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Lionel Landwerlin [Tue, 6 Feb 2018 23:23:22 +0000 (23:23 +0000)]
i965: perf: use drmIoctl() instead of ioctl()
ioctl() might be interrupted, use drmIoctl() instead as it'll retry
automatically.
Fixes:
27ee83eaf7e "i965: perf: add support for userspace configurations"
Cc: "18.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Tested-by: Mark Janes <mark.a.janes@intel.com>
Lionel Landwerlin [Tue, 6 Feb 2018 17:00:58 +0000 (17:00 +0000)]
i965: perf: add debug messages for loaded configs
This helps figuring out potential problems when metrics don't show up
on frameretrace for example.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Dave Airlie [Thu, 8 Feb 2018 02:35:46 +0000 (12:35 +1000)]
r600: implement tg4 integer workaround. (v2)
This ports the texture gather integer workaround from radeonsi.
This fixes:
KHR-GL45.texture_gather.plain-gather-uint/int*
v2: add rect support, fix 2d array shadow
Reviewed-by: Roland Scheidegger <sroland@vmware.com> (on irc)
Signed-off-by: Dave Airlie <airlied@redhat.com>
Glenn Kennard [Tue, 6 Feb 2018 20:24:07 +0000 (06:24 +1000)]
r600: clean up initial shader register setup
This is taken from Glenn Kennards scratch series, but separated
out as a cleanup by me.
Reviewed-By: Gert Wollny <gw.fossdev@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Roland Scheidegger [Sun, 4 Feb 2018 22:54:26 +0000 (23:54 +0100)]
r600: partly fix sampleMaskIn value
The hw gives us coverage for pixel, not for individual fragment shader
invocations, in case execution isn't per pixel (eg, unlike cm, actually
cannot do "real" minSampleShading, it's either per-pixel or per-fragment,
but it doesn't really make a difference here).
Also, with msaa disabled, the hw still gives us a mask corresponding to
the number of samples, where GL requires this to be 1.
Fix this up by masking the sampleMaskIn bits with the bit corresponding to
the sampleID, if we know this shader is always executed at per-sample
granularity. (In case of a per-sample frequency shader and msaa disabled,
the sampleID will always be 0, so this works just fine there.)
Fixing this for the minSampleShading case will need a shader key (radeonsi
uses the prolog part for) (for eg, could get away with a single bit, cm
would need more bits depending on sample/invocation ratio, or read the
bits from a uniform), unless we'd want to always use a sample mask uniform
(which is probably not a good idea, as it would make the ordinary common
msaa case slower for no good reason).
This fixes some parts of piglit arb_sample_shading-samplemask (with fixed
test), in particular those which use a sampleID, still failing others
as expected.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Roland Scheidegger [Sun, 4 Feb 2018 22:38:28 +0000 (23:38 +0100)]
r600: clean up fragment shader input scan code
For some reason, we were iterating through the code twice (first just for
instructions needing barycentrics, then for instructions and input dcls).
Move things around slightly so this is no longer necessary.
There also was a unnedeed enabling of the fixed_pt_position_gpr - this is only
needed if the per-sample interpolation comes from an input, not from an
instruction (just move the assert where it belongs) (since the sample id to
sample from comes from a tgsi src in this case, and isn't sampleID).
Otherwise there should be no functional change.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Roland Scheidegger [Sat, 3 Feb 2018 23:32:05 +0000 (00:32 +0100)]
mesa: (trivial) remove unused ignore_sample_qualifier_parameter
This parameter for _mesa_get_min_incations_per_fragment() was once used
by the intel driver, but it's long gone.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Dave Airlie <airlied@vmware.com>
Roland Scheidegger [Sat, 3 Feb 2018 19:11:35 +0000 (20:11 +0100)]
r600/cm: (trivial) code cleanup for emitting msaa state
No functional change (compile tested only).
Reviewed-by: Dave Airlie <airlied@redhate.com>
Brian Paul [Wed, 7 Feb 2018 05:17:10 +0000 (22:17 -0700)]
tgsi: use tgsi_semantic enum type in ureg code
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Brian Paul [Wed, 7 Feb 2018 05:16:41 +0000 (22:16 -0700)]
st/mesa: use tgsi_semantic enum type
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Brian Paul [Wed, 7 Feb 2018 05:11:41 +0000 (22:11 -0700)]
tgsi: use TGSI enum types in ureg code
v2: fix enum tgsi_interpolate_mode/loc typo.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Brian Paul [Wed, 7 Feb 2018 05:10:59 +0000 (22:10 -0700)]
st/mesa: use TGSI enum types in st_glsl_to_tgsi.cpp
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Brian Paul [Wed, 7 Feb 2018 04:55:10 +0000 (21:55 -0700)]
gallium/util: replace uint with tgsi enum types
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Brian Paul [Wed, 7 Feb 2018 04:54:38 +0000 (21:54 -0700)]
gallium/util: replace unsigned with tgsi enum types
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Fredrik Höglund [Thu, 25 Jan 2018 17:12:14 +0000 (18:12 +0100)]
radv: implement VK_EXT_external_memory_host
Ported from the radeonsi GL_AMD_pinned_memory implementation.
Signed-off-by: Fredrik Höglund <fredrik@kde.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Dave Airlie [Wed, 7 Feb 2018 22:12:36 +0000 (08:12 +1000)]
r600: fix rendering regression on r6/7 gpus
Fixes:
2d5b5d267e (r600: work out target mask at framebuffer bind.)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104989
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Grazvydas Ignotas [Sat, 3 Feb 2018 21:54:28 +0000 (23:54 +0200)]
radeonsi: avoid int-to-pointer-cast warnings on 32bit
I hope the actual dropping of MSB is ok, but that's what's already
happened before this change.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Grazvydas Ignotas [Sat, 3 Feb 2018 21:42:28 +0000 (23:42 +0200)]
gallium/hud: update some query functions
It seems these were missed when struct pipe_context * argument was
added to hud_graph::query_new_value.
Fixes:
3132afdf4c "gallium/hud: pass pipe_context explicitly to most functions"
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Roland Scheidegger [Wed, 7 Feb 2018 22:47:39 +0000 (23:47 +0100)]
Revert "gallium: build ddebug, noop, rbug, trace as part of auxiliary"
This reverts commit
6f82b8d8d0a986aac28e7bec47fc313fb950475c.
This broke scons build, and reportedly clover with autotools/meson too.
Marek Olšák [Mon, 4 Sep 2017 20:36:34 +0000 (22:36 +0200)]
gallium: build ddebug, noop, rbug, trace as part of auxiliary
Building gallium is faster by 7.5 seconds on a 4core/8thread 3GHz CPU.
(gallium build time is reduced by 15% when building only radeonsi)
Non-recursive makefiles are great!
Roland Scheidegger [Wed, 7 Feb 2018 21:02:54 +0000 (22:02 +0100)]
u_blit: (trivial) fix bogus argument order for set_fragment_shader
Amazingly this still worked sometimes, albeit I'm not even sure why...
This fixes
d7bec6f7a6a2a35c80be939db8532011af1e9b67.
Andres Rodriguez [Wed, 7 Feb 2018 19:38:52 +0000 (14:38 -0500)]
mesa: fix incorrect type when allocating arrays
The array members are have type 'struct gl_buffer_object *'
Found by coverity.
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Roland Scheidegger [Wed, 7 Feb 2018 04:18:17 +0000 (05:18 +0100)]
u_blit,u_simple_shaders: add shader to convert from xrbias format
We need this to handle some oddball dx10 format
(DXGI_FORMAT_R10G10B10_XR_BIAS_A2_UNORM). What you can do with this
format is very limited, hence we don't want to add it as a gallium
format (we could not express the properties of this format as
ordinary format properties neither, so like all special formats
it would need specific code for handling it in any case).
While here, also nuke the array for different shaders for different
writemasks, as it was not actually used (always full masks are
passed in for generating shaders).
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Roland Scheidegger [Wed, 7 Feb 2018 04:03:42 +0000 (05:03 +0100)]
u_simple_shaders: fix mask handling in util_make_fragment_tex_shader_writemask
The writemask handling was busted, since writing defaults to output
meant they got overwritten by the tex sampling anyway. Albeit the
affected components were undefined, so maybe with some luck it
still would have worked with some drivers - if not could as well
kill it... (This would have affected u_blitter but not u_blit since
the latter always used xyzw mask.)
Reviewed-by: Brian Paul <brianp@vmware.com>
Bas Nieuwenhuizen [Fri, 2 Feb 2018 15:59:23 +0000 (16:59 +0100)]
autotools: Only build libmesa-st-tests-common.a for tests.
We don't need the library if we don't build tests, and building
it adds a dependency on gtest which adds a dependency on cxxabi.h.
Fixes:
6569b33b6e "mesa/st/tests: unify MockCodeLine* classes"
Reviewed-By: Gert Wollny <gw.fossdev@gmail.com>
Tapani Pälli [Wed, 17 Jan 2018 09:43:59 +0000 (11:43 +0200)]
i965: add __DRI2_BLOB support and set cache functions
v2: adjust to change that moved cache from ctx to screen
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tapani Pälli [Wed, 7 Feb 2018 06:13:00 +0000 (08:13 +0200)]
disk cache: add callback functionality
v2: add disk_cache_has_key, disk_cache_put_key support
using blob cache (Nicolai, Jordan)
v3: rename set_cb as put_cb to match existing naming (Timothy)
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tapani Pälli [Mon, 22 Jan 2018 09:55:06 +0000 (11:55 +0200)]
disk cache: initialize cache path and index only when used
This patch makes disk_cache initialize path and index lazily so
that we can utilize disk_cache without a path using callback
functionality introduced by next patch.
v2: unmap mmap and destroy queue only if index_mmap exists
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tapani Pälli [Thu, 1 Feb 2018 07:08:52 +0000 (09:08 +0200)]
glsl/tests: changes to test_disk_cache_create test
Next patch will allow disk_cache instance to be created without
path set for it, modify some test cases that assume disk_cache
creation to fail with invalid path. Creation should succeed but
simple put/get test fail.
v2: leave tests as is but check that both cache struct exists
and try simple put/get that should fail with invalid path set
(Emil)
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> (v1)
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tapani Pälli [Tue, 30 Jan 2018 09:42:55 +0000 (11:42 +0200)]
glsl/tests: move utility functions in cache_test
Patch moves functions higher so that we can utilize them from
test_disk_cache_create which is modified by next patch.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tapani Pälli [Thu, 28 Dec 2017 08:51:11 +0000 (10:51 +0200)]
egl: add support for EGL_ANDROID_blob_cache
v2: cleanup, move callbacks to _egl_display struct (Emil Velikov)
adapt to earlier ctx->screen changes
v3: remove useless checking, add _eglSetFuncName (Emil Velikov)
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> (v2)
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tapani Pälli [Thu, 28 Dec 2017 07:27:24 +0000 (09:27 +0200)]
dri: add interface for EGL_ANDROID_blob_cache extension
v2: move from __DRIcontext to __DRIscreen (Emil Velikov)
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Samuel Pitoiset [Tue, 6 Feb 2018 21:06:11 +0000 (22:06 +0100)]
ac/nir: use new pknorm_i16/u16 and pk_i16/u16 LLVM intrinsics
Ported from RadeonSI.
Only one F1 2017 shader is affected, code size decreased
from 532 to 488 on both Polaris10 and Vega10.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Thu, 1 Feb 2018 10:35:06 +0000 (11:35 +0100)]
ac/nir: avoid loading unused VS input components
Polaris10:
Totals from affected shaders:
SGPRS: 122840 -> 120984 (-1.51 %)
VGPRS: 78812 -> 78440 (-0.47 %)
Spilled SGPRs: 177 -> 129 (-27.12 %)
Code Size: 2950028 -> 2941276 (-0.30 %) bytes
Max Waves: 17899 -> 17976 (0.43 %)
Vega10:
Totals from affected shaders:
SGPRS: 117144 -> 115776 (-1.17 %)
VGPRS: 77580 -> 77532 (-0.06 %)
Spilled SGPRs: 0 -> 152 (0.00 %)
Code Size: 3352656 -> 3347860 (-0.14 %) bytes
Max Waves: 19756 -> 19866 (0.56 %)
This increases SGPRs spilling a bit with Talos, but I have
some other ideas that might reduce it.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Thu, 1 Feb 2018 10:32:32 +0000 (11:32 +0100)]
ac/shader: scan vertex inputs usage mask
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Iago Toral Quiroga [Thu, 4 Jan 2018 02:55:13 +0000 (03:55 +0100)]
i965: allocate a SGVS element when VertexID or InstanceID are read
Although on gen8+ platforms we can in theory use 3DSTATE_VF_SGVS
to put these beyond the last vertex element it seems that we still
need to allocate the SVGS element, otherwise we have observed cases
where we end up reading garbage. Specifically, the CTS test mentioned
below was flaky with a fail rate of ~1% on some gen9+ platforms caused
by reading garbage for the gl_InstanceID value. The flakyness goes
away as soon as we start allocating the SVGS element.
v2:
- Do this for gen8+, not just gen9+, and pull the boolean
outside the #if block (Jason)
Fixes flaky test:
KHR-GL45.vertex_attrib_64bit.limits_test
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104335
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Dylan Baker [Mon, 20 Nov 2017 22:55:13 +0000 (14:55 -0800)]
glapi: fix check_table test for non-shared glapi with meson
v2: - Add glapitable_h generated source to requirements
Fixes:
3218056e0eb3 ("meson: Build i965 and dri stack")
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com> (v1)
Reviewed-by: Emil Velikov <emil.velikov@collabora.com> (v1)
Dylan Baker [Mon, 20 Nov 2017 22:54:30 +0000 (14:54 -0800)]
glapi: Don't search through subdirs from glapitable.h
Because meson won't put it in that folder.
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Dylan Baker [Mon, 20 Nov 2017 22:53:09 +0000 (14:53 -0800)]
state_tracker: Don't build st-renumerate-test without shared glapi
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Dylan Baker [Mon, 20 Nov 2017 22:39:27 +0000 (14:39 -0800)]
glapi: remove APPLE extensions from test
Fixes:
7009955281260fbb ("mesa: Remove GL_APPLE_vertex_array_object stubs")
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
Dylan Baker [Mon, 20 Nov 2017 18:05:25 +0000 (10:05 -0800)]
glapi/check_table: Remove 'extern "C"' block
Using 'extern "C"' around includes is always incorrect, as the header may
contain C++ symbols (as it does in this case), which means it cannot use
C linkage. In this case the header has a template in it, which obviously
cannot be linked with C linkage rules.
Fixes:
a29ad2b421b75a1727b ("mesa/tests: Add tests for the generated dispatch table")
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Dylan Baker [Wed, 8 Nov 2017 00:00:34 +0000 (16:00 -0800)]
meson: fix test source name for static glapi
fixes:
43a6e84927e3 ("meson: build mesa test.")
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Dylan Baker [Tue, 7 Nov 2017 17:40:06 +0000 (09:40 -0800)]
glapi: don't walk backwards for includes
Instead just set the proper -I flags and include it from a more standard
path. In this case we'll add -Isrc/mesa (which is common), and #include
main/foo.h.
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Brian Paul [Mon, 5 Feb 2018 16:33:58 +0000 (09:33 -0700)]
mesa: rename gl_vertex_array_object::_VertexAttrib -> _VertexArray
Since the type is gl_vertex_array. Update comment to explain that
these arrays are only used by the VBO module.
Also rename some local variables in _mesa_update_vao_derived_arrays().
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Brian Paul [Tue, 6 Feb 2018 22:12:58 +0000 (15:12 -0700)]
mesa: minor whitespace fixes, line wrapping in texcompress.c
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Brian Paul [Tue, 6 Feb 2018 16:55:13 +0000 (09:55 -0700)]
mesa: simplify _mesa_get_compressed_formats()
Instead of testing for formats==NULL everywhere, just point formats at
a dummy array which will be discarded.
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Vlad Golovkin [Tue, 6 Feb 2018 13:48:00 +0000 (06:48 -0700)]
util: remove redundant check for the __clang__ macro
Clang defines __GNUC__ macro, so one doesn't need to check __clang__
macro in this particular case.
v2: added comment as per Brian Paul's suggestion
Reviewed-by: Brian Paul <brianp@vmware.com>
Brian Paul [Fri, 2 Feb 2018 16:21:44 +0000 (09:21 -0700)]
st/mesa: use st_access_flags_to_transfer_flags() helper in more places
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Brian Paul [Fri, 2 Feb 2018 15:54:19 +0000 (08:54 -0700)]
st/mesa: refactor st_bufferobj_map_range()
Use a new helper function, st_access_flags_to_transfer_flags(), to
convert the GL_MAP_x flags to PIPE_TRANSFER_x flags.
We'll be able to use this function in a couple other places.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Brian Paul [Fri, 2 Feb 2018 15:38:50 +0000 (08:38 -0700)]
st/mesa: refactor bufferobj_data()
Split out some of the code into three new helper functions:
buffer_target_to_bind_flags(), storage_flags_to_buffer_flags(),
buffer_usage() to make the code more managable.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Samuel Pitoiset [Mon, 29 Jan 2018 16:19:18 +0000 (17:19 +0100)]
radv: run nir_opt_shrink_load
LLVM can't shrink loads.
Polaris10:
Totals from affected shaders:
SGPRS: 62528 -> 59955 (-4.11 %)
VGPRS: 44708 -> 44616 (-0.21 %)
Spilled SGPRs: 16 -> 8 (-50.00 %)
Code Size: 1355504 -> 1355172 (-0.02 %) bytes
Max Waves: 11710 -> 11670 (-0.34 %)
Vega10:
Totals from affected shaders:
SGPRS: 51448 -> 50371 (-2.09 %)
VGPRS: 39140 -> 39048 (-0.24 %)
Spilled SGPRs: 16 -> 16 (0.00 %)
Code Size: 1307188 -> 1304296 (-0.22 %) bytes
Max Waves: 11312 -> 11292 (-0.18 %)
This reduces SGPRs spilling in MadMax, and it also reduces
number of SGPRs in DOW3 and F12017. The number of waves slightly
decreases in F1 but I don't see any performance changes after
benchmarking it. Talos and Serious Sam are not affected because
they don't use any push constants.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Mon, 29 Jan 2018 16:19:00 +0000 (17:19 +0100)]
nir: add nir_opt_shrink_load pass
This is a very simple pass that just shrinks load_push_constant
intrinsics when some components are unused. For now, it can just
shrink vec4 to vec3, vec3 to vec2 and so on.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Timothy Arceri [Thu, 1 Feb 2018 23:09:47 +0000 (10:09 +1100)]
radeonsi/nir: add nir support for compiling compute shaders
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Timothy Arceri [Fri, 2 Feb 2018 03:33:06 +0000 (14:33 +1100)]
ac/radeonsi: add num_work_groups to the abi
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Timothy Arceri [Fri, 2 Feb 2018 02:55:25 +0000 (13:55 +1100)]
ac: implement nir_intrinsic_shader_clock
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Timothy Arceri [Fri, 2 Feb 2018 02:54:48 +0000 (13:54 +1100)]
ac/radeonsi: create ac_build_shader_clock() helper
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Timothy Arceri [Fri, 2 Feb 2018 02:14:41 +0000 (13:14 +1100)]
ac/radeonsi: add load_local_group_size() to the abi
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Timothy Arceri [Fri, 2 Feb 2018 02:06:02 +0000 (13:06 +1100)]
radeonsi: add get_block_size() helper
This will be reused by the nir backend in a later patch.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Timothy Arceri [Thu, 1 Feb 2018 23:24:16 +0000 (10:24 +1100)]
ac: don't call emit_outputs() for compute
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Timothy Arceri [Thu, 1 Feb 2018 23:23:46 +0000 (10:23 +1100)]
ac/radeonsi: add local_invocation_ids to the abi
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Timothy Arceri [Thu, 1 Feb 2018 23:08:52 +0000 (10:08 +1100)]
ac/radeonsi: add workgroup_ids to the abi
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Timothy Arceri [Thu, 1 Feb 2018 23:07:47 +0000 (10:07 +1100)]
radeonsi/nir: gather some compute info in si_nir_scan_shader()
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Timothy Arceri [Mon, 5 Feb 2018 22:52:47 +0000 (09:52 +1100)]
radeonsi/nir: always set input_usage_mask as using all components
This fixes a regression for now, in the future we should gather
the used components properly.
V2: just set for VS and correctly handle doubles
Fixes:
be973ed21f6e "radeonsi: load the right number of components for VS inputs and TBOs"
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Timothy Arceri [Sun, 4 Feb 2018 22:15:52 +0000 (09:15 +1100)]
i965: remove unused brw_nir_lower_cs_shared()
This has been unused since
8761a04d0d93.
Reviewed-by: Elie Tournier <elie.tournier@collabora.com>
Bas Nieuwenhuizen [Tue, 6 Feb 2018 14:43:36 +0000 (15:43 +0100)]
vulkan/wsi: Fix OOM behavior with prime images.
Fixes:
d50937f137 "vulkan/wsi: Implement prime in a completely generic way"
Reviewed-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Tue, 6 Feb 2018 11:52:43 +0000 (12:52 +0100)]
ac/nir: fix GS load input type.
Fixes:
df1d5174fc "ac/nir: replace SI.buffer.load.dword with amdgcn.buffer.load"
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Mathias Fröhlich [Sat, 3 Feb 2018 19:25:39 +0000 (20:25 +0100)]
mesa: Factor out _mesa_disable_vertex_array_attrib.
And use it in the enable code path.
Move _mesa_update_attribute_map_mode into its only remaining file.
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Brian Paul <brianp@vmware.com>
Mathias Fröhlich [Sat, 16 Dec 2017 09:57:47 +0000 (10:57 +0100)]
vbo: Move vbo_rebase into its only caller module tnl.
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Brian Paul <brianp@vmware.com>
Mathias Fröhlich [Sat, 3 Feb 2018 14:06:16 +0000 (15:06 +0100)]
mesa: Use atomics for buffer objects reference counts.
The mutex is currently used for reference counting and updating
the minmax index cache.
The change uses atomics directly for reference counting and
the mutex for the minmax cache.
This is safe since the reference count is not modified beside
in _mesa_reference_buffer_object where atomics aim to be used.
While using the minmax cache, the calling code holds a reference
to the buffer object. Thus unreferencing or even referencing the
buffer object does not need to be serialized with accessing
the minmax cache.
The change reduces the time _mesa_reference_buffer_object_ takes
by about a factor of two when looking at perf results for some
of my favorite use cases.
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Brian Paul <brianp@vmware.com>
Dave Airlie [Mon, 5 Feb 2018 04:55:07 +0000 (14:55 +1000)]
r600: fixup sparse color exports.
If we have gaps in the shader mask we have to have 0x1 in them
according to a comment in radeonsi, and this is required to fix
the test at least on cayman.
We also need to record the highest one written to write to the
ps exports reg.
This fixes:
KHR-GL45.enhanced_layouts.fragment_data_location_api
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Mon, 5 Feb 2018 03:54:23 +0000 (13:54 +1000)]
r600: work out target mask at framebuffer bind.
If we only get 1,2,3,6 framebuffers we want a sparse target mask.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Mon, 5 Feb 2018 03:46:23 +0000 (13:46 +1000)]
r600: work out shader export mask at shader build time (v1.1)
Since enhanced layouts allows setting specific MRT outputs, we
can get sparse outputs, so we have to calculate the shader
mask earlier.
v1.1: update checks for state update (Roland)
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Mon, 5 Feb 2018 03:09:57 +0000 (13:09 +1000)]
r600: fix xfb stream check.
This fixes:
KHR-GL45.enhanced_layouts.xfb_vertex_streams
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Sun, 4 Feb 2018 23:21:27 +0000 (09:21 +1000)]
r600/compute: add render cond support.
Set render cond and emit atom.
Fixes:
KHR-GL45.compute_shader.conditional-dispatching
Reviewed-by: Roland Scheidegger <sorland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Sun, 4 Feb 2018 23:07:54 +0000 (09:07 +1000)]
r600: fix not-very indirect compute
We need to get the grid sizes earlier to fill in to the const
buffer.
Fixes:
KHR-GL45.compute_shader.built-in-variables
and
KHR-GL45.compute_shader.dispatch-indirect
Reviewed-by: Roland Scheidegger <sorland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Sun, 4 Feb 2018 22:42:52 +0000 (08:42 +1000)]
r600: overhaul buffer resource query.
This cleans up and fixes the previous fix even more.
Buffers from textures start at max const,
buffers from buffers/images come in from the 168 offset.
This fixes a bunch of:
KHR-GL45.shader_storage_buffer_object*
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Sun, 4 Feb 2018 20:31:48 +0000 (06:31 +1000)]
r600/eg: fix buffer sizing.
For buffers we want the size in bytes,
For images we want it in elements.
This fixes:
KHR-GL45.shader_storage_buffer_object.advanced-unsizedArrayLength-cs-std430-vec-pad
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Fri, 2 Feb 2018 07:07:20 +0000 (17:07 +1000)]
r600/images: set offset for compute shaders with number of declared samplers
for frag shaders we get a value in the key, I expect I need
to make compute work better
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Mon, 5 Feb 2018 00:14:19 +0000 (10:14 +1000)]
r600/compute: only mark buffer/image state dirty for fragment shaders
The compute emission path always emits this currently, and emitting
it on the fragment path breaks the blitter.
This fixes gpu hangs in KHR-GL45.compute_shader.resource-texture
Reviewed-by: Roland Scheidegger <sorland@vmware.com>
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Mon, 5 Feb 2018 06:46:06 +0000 (16:46 +1000)]
r600/atomic: fix ATOMCAS instruction.
This has 4 srcs.
This fixes:
KHR-GL45.shader_atomic_counter_ops_tests.ShaderAtomicCounterOpsExchangeTestCase
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Mon, 5 Feb 2018 06:04:18 +0000 (16:04 +1000)]
r600/sb/cayman: fix indirect ubo access on cayman
With sb enabled on cayman, this was overwriting the proper
cf index value with random ones if the dst gpr was 2 or 3,
only save the value for a MOVA instruction.
Fixes:
KHR-GL45.gpu_shader5.uniform_blocks_array_indexing
(on cayman with sb)
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Fri, 2 Feb 2018 05:17:57 +0000 (15:17 +1000)]
r600/eg: use texture target to pick array size not view target (v2)
This fixes a few CTS cases in :
KHR-GL45.texture_view.view_sampling
some multisample cases are still broken, but not sure this is
the same problem.
v2: fix more cases
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Tue, 6 Feb 2018 19:37:48 +0000 (19:37 +0000)]
radv: don't support tc-compat on multisample d32s8 at all.
RX550 fails
dEQP-VK.renderpass.suballocation.multisample.d32_sfloat_s8_uint.samples_2
So increase the range of the workaround.
Fixes:
f4c534ef6 (radv: don't enable tc compat for d32s8 + 4/8 samples (v1.1))
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Michal Navratil [Sun, 4 Feb 2018 19:24:02 +0000 (20:24 +0100)]
winsys/amdgpu: allow non page-aligned size bo creation from pointer
Fix INVALID_OPERATION caused by BufferData with target
EXTERNAL_VIRTUAL_MEMORY_BUFFER_AMD when the buffer size is
not page aligned.
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Cc: 17.3 18.0 <mesa-stable@lists.freedesktop.org>
Jon Turney [Mon, 5 Feb 2018 21:11:12 +0000 (21:11 +0000)]
meson: ensure xmlpool/options.h is generated for libgallium
In file included from ../src/gallium/targets/dri/target.c:1:
In file included from ../src/gallium/auxiliary/target-helpers/drm_helper.h:8:
../src/util/xmlpool.h:103:10: fatal error: 'xmlpool/options.h' file not found
See also
26bde1e3.
Signed-off-by: Jon Turney <jon.turney@dronecode.org.uk>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Andres Gomez [Sun, 28 Jan 2018 23:35:17 +0000 (01:35 +0200)]
vbo: provide 64bits support to print_draw_arrays
Cc: Mathias Fröhlich <mathias.froehlich@web.de>
Cc: Brian Paul <brianp@vmware.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Andres Gomez [Sun, 28 Jan 2018 23:35:16 +0000 (01:35 +0200)]
vbo: take into account the size when printing VAO elements
When using print_draw_arrays for debugging, we were printing an "n"
amount of vertex but that meant not to print all the size in the "n"
vertex, depending on the stride used.
Now we print the whole size in the "n" vertex.
Cc: Mathias Fröhlich <mathias.froehlich@web.de>
Cc: Brian Paul <brianp@vmware.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Andres Gomez [Sun, 28 Jan 2018 23:35:15 +0000 (01:35 +0200)]
vbo: print first element of the VAO when the binding stride is 0
Cc: Mathias Fröhlich <mathias.froehlich@web.de>
Cc: Brian Paul <brianp@vmware.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Iago Toral Quiroga [Mon, 5 Feb 2018 08:49:54 +0000 (09:49 +0100)]
anv/device: initialize the list of enabled extensions properly
The loop goes through the list of enabled extensions marking them as
enabled in the list, but this relies on every other extension being
initialized to false by default.
This bug would make us, for example, advertise certain device extension
entry points as available even when the corresponding extensions had
not been enabled.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Fixes:
abc62282b5c "anv: Add a per-device table of enabled extensions"
Cc: "18.0" <mesa-stable@lists.freedesktop.org>
Iago Toral Quiroga [Tue, 23 Jan 2018 11:20:16 +0000 (12:20 +0100)]
spirv: split constant initializers on in/out structs
The SPIR-V parser splits in/out struct variables and creates
a separate variable for each first-level member of the struct.
When the struct variable has an initializer this means that we also
need to split the initializer.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Iago Toral Quiroga [Fri, 1 Dec 2017 12:46:23 +0000 (13:46 +0100)]
i965/nir: do int64 lowering before optimization
Otherwise loop unrolling will fail to see the actual cost of
the unrolling operations when the loop body contains 64-bit integer
instructions, and very specially when the divmod64 lowering applies,
since its lowering is quite expensive.
Without this change, some in-development CTS tests for int64
get stuck forever trying to register allocate a shader with
over 50K SSA values. The large number of SSA values is the result
of NIR first unrolling multiple seemingly simple loops that involve
int64 instructions, only to then lower these instructions to produce
a massive pile of code (due to the divmod64 lowering in the unrolled
instructions).
With this change, loop unrolling will see the loops with the int64
code already lowered and will realize that it is too expensive to
unroll.
v2: Run nir_algebraic first so we can hopefully get rid of some of
the int64 instructions before we even attempt to lower them.
Reviewed-by: Matt Turner <mattst88@gmail.com>