platform/upstream/llvm.git
3 years ago[ASTMatchers] Fix hasParent while ignoring unwritten nodes
Stephen Kelly [Thu, 4 Feb 2021 20:49:58 +0000 (20:49 +0000)]
[ASTMatchers] Fix hasParent while ignoring unwritten nodes

For example, before this patch we can use has() to get from a
cxxRewrittenBinaryOperator to its operand, but hasParent doesn't get
back to the cxxRewrittenBinaryOperator.  This patch fixes that.

Differential Revision: https://reviews.llvm.org/D96113

3 years ago[SystemZ][ZOS] Guard using declaration for ::fchmodat
Zbigniew Sarbinowski [Thu, 18 Feb 2021 14:49:46 +0000 (14:49 +0000)]
[SystemZ][ZOS] Guard using declaration for ::fchmodat

The use of fchmodat() is beeing guarded but its using declaration is not. Let's use the same guard in both places to avoid compiler errors on platforms where `fchmodat` does not exist.

Reviewed By: #libc, ldionne

Differential Revision: https://reviews.llvm.org/D96303

3 years ago[ARM] Expand the range of allowed post-incs in load/store optimizer
David Green [Thu, 18 Feb 2021 14:59:02 +0000 (14:59 +0000)]
[ARM] Expand the range of allowed post-incs in load/store optimizer

Currently the load/store optimizer will only fold in increments of the
same size as the load/store. This patch expands that to any legal
immediate for the post-inc instruction.

Differential Revision: https://reviews.llvm.org/D95885

3 years ago[lldb] Fix shared library directory computation on windows
Pavel Labath [Mon, 15 Feb 2021 20:51:32 +0000 (21:51 +0100)]
[lldb] Fix shared library directory computation on windows

Our code for locating the shared library directory works via dladdr (or
the windows equivalent) to locate the path of an address known to reside
in liblldb. This works great for C++ programs, but there's a catch.

When (lib)lldb is used from python (like in our test suite), this dladdr
call will return a path to the _lldb.so (or such) file in the python
directory. To compensate for this, we have code which attempts to
resolve this symlink, to ensure we get the canonical location. However,
here's the second catch.

On windows, this file is not a symlink (but a copy), so this logic
fails. Since most of our other paths are derived from the liblldb
location, all of these paths will be wrong, when running the test suite.
One effect of this was the failure to find lldb-server in D96202.

To fix this issue, I add some windows-specific code to locate the
liblldb directory. Since it cannot rely on symlinks, it works by
manually walking the directory tree -- essentially doing the opposite of
what we do when computing the python directory.

To avoid python leaking back into the host code, I implement this with
the help of a callback which can be passed to HostInfo::Initialize in
order to assist with the directory location. The callback lives inside
the python plugin.

I also strenghten the existing path test to ensure the returned path is
the right one.

Differential Revision: https://reviews.llvm.org/D96779

3 years ago[AMDGPU] Tidy up a FIXME fixed by D34973
Jay Foad [Thu, 18 Feb 2021 14:16:28 +0000 (14:16 +0000)]
[AMDGPU] Tidy up a FIXME fixed by D34973

3 years agoRevert "[TableGen] Improve algorithms for processing template arguments"
Paul C. Anagnostopoulos [Thu, 18 Feb 2021 14:25:30 +0000 (09:25 -0500)]
Revert "[TableGen] Improve algorithms for processing template arguments"

This reverts commit e589207d5aaee6cbf1d7c7de8867a17727d14aca.

3 years ago[PowerPC] Exploit the vinsw, vinsd, and vins[wd][lr]x instructions on P10
Baptiste Saleil [Wed, 17 Feb 2021 23:02:30 +0000 (23:02 +0000)]
[PowerPC] Exploit the vinsw, vinsd, and vins[wd][lr]x instructions on P10

This patch generates the vinsw, vinsd, vinsblx, vinshlx, vinswlx, vinsdlx,
vinsbrx, vinshrx, vinswrx and vinsdrx instructions for vector insertion on P10.

Differential Revision: https://reviews.llvm.org/D94454

3 years ago[RISCV] Fix bugs in pseudo instructions for masked segment load.
Hsiangkai Wang [Thu, 18 Feb 2021 06:52:19 +0000 (14:52 +0800)]
[RISCV] Fix bugs in pseudo instructions for masked segment load.

For masked segment load, the destination register should not overlap
with mask register. It could not be V0.

In the original implementation, there is no segment load/store register
class without V0. In this patch, I added these register classes and
modify `GetVRegNoV0` to get the correct one.

Differential Revision: https://reviews.llvm.org/D96937

3 years ago[NFC][RISCV] Use concise way to describe load/store instructions.
Hsiangkai Wang [Thu, 18 Feb 2021 01:33:25 +0000 (09:33 +0800)]
[NFC][RISCV] Use concise way to describe load/store instructions.

Differential Revision: https://reviews.llvm.org/D96923

3 years ago[TableGen] Improve algorithms for processing template arguments
Paul C. Anagnostopoulos [Wed, 20 Jan 2021 18:14:43 +0000 (13:14 -0500)]
[TableGen] Improve algorithms for processing template arguments

Rework template argument checking so that all arguments are type-checked
and cast if necessary.

Add a test.

Differential Revision: https://reviews.llvm.org/D96416

3 years agoadd -use-color option to clang-tidy-diff.py
Jonas Otto [Thu, 18 Feb 2021 14:12:48 +0000 (09:12 -0500)]
add -use-color option to clang-tidy-diff.py

Clang-tidy seems to output color only when printing directly to
terminal, but an option to force color-output has been added in
https://reviews.llvm.org/D7947

3 years ago[ARM] Ensure types provided to getIntrinsicCost are valid
David Green [Thu, 18 Feb 2021 14:00:23 +0000 (14:00 +0000)]
[ARM] Ensure types provided to getIntrinsicCost are valid

It appears that pointer types were causing issues for the min/max cost
code in getIntrinsicInstrCost. This makes sure that when matching
icmp/select to a min/max, we only do that for normal int or float types.

3 years ago[mlir] Add `linalg.tiled_loop` op.
Alexander Belyaev [Thu, 18 Feb 2021 08:41:40 +0000 (09:41 +0100)]
[mlir] Add `linalg.tiled_loop` op.

`subtensor_insert` was used instead of `linalg.subtensor_yield` to make this PR
smaller. Verification will be added in a follow-up PR.

Differential Revision: https://reviews.llvm.org/D96943

3 years ago[PowerPC] Add option for ROP Protection
Stefan Pintilie [Thu, 18 Feb 2021 12:12:53 +0000 (12:12 +0000)]
[PowerPC] Add option for ROP Protection

Added -mrop-protection for Power PC to turn on codegen that provides some
protection from ROP attacks.

The option is off by default and can be turned on for Power 8, Power 9 and
Power 10.

This patch is for the option only. The feature will be implemented by a later
patch.

Reviewed By: amyk

Differential Revision: https://reviews.llvm.org/D96512

3 years ago[clangd] Drop template argument lists from completions followed by <
Kirill Bobyrev [Thu, 18 Feb 2021 12:06:01 +0000 (13:06 +0100)]
[clangd] Drop template argument lists from completions followed by <

Now, given `template <typename T> foo() {}` when user types `fo^<int>()` the
completion snippet will not contain `<int>()`.

Also, when the next token is opening parenthesis (`(`) and completion snippet
contains template argument list, it is still emitted.

This patch complements D81380.

Related issue: https://github.com/clangd/clangd/issues/387

Reviewed By: kadircet

Differential Revision: https://reviews.llvm.org/D89870

3 years agoRevert "[MLIR] Create memref dialect and move several dialect-specific ops from std."
Alexander Belyaev [Thu, 18 Feb 2021 11:49:52 +0000 (12:49 +0100)]
Revert "[MLIR] Create memref dialect and move several dialect-specific ops from std."

This commit introduced a cyclic dependency:
Memref dialect depends on Standard because it used ConstantIndexOp.
Std depends on the MemRef dialect in its EDSC/Intrinsics.h

Working on a fix.

This reverts commit 8aa6c3765b924d86f623d452777eb76b83bf2787.

3 years ago[ARM] Add larger than legal ICmp costs
David Green [Thu, 18 Feb 2021 11:42:17 +0000 (11:42 +0000)]
[ARM] Add larger than legal ICmp costs

A v8i32 compare will produce a v8i1 predicate, but during codegen the
v8i32 will be split into two v4i32, potentially requiring two v4i1
predicates to be merged into a single v8i1. Because this merging of two
v4i1's into a v8i1 is very expensive, we need to make the cost of the
compare equally high.

This patch adds the cost of that to ARMTTIImpl::getCmpSelInstrCost.
Because we don't know whether the user of the predicate can be split,
and the cost model is mostly pre-instruction, we may be pessimistic but
that should only be for larger and legal types. This also adds min/max
detection to the costmodel where it can be detected, to keep those in
line with the cost of simple min/max instructions. Otherwise for the
most part, costs that were already expensive have become more expensive.

Differential Revision: https://reviews.llvm.org/D96692

3 years ago[FuncAttrs] Add tests for willreturn callsite inference.
Florian Hahn [Thu, 18 Feb 2021 11:13:05 +0000 (11:13 +0000)]
[FuncAttrs] Add tests for willreturn callsite inference.

3 years ago[X86][SSE] Add uniform vector shift test coverage for (sra (trunc (sr[al] x, c1)...
Simon Pilgrim [Wed, 17 Feb 2021 18:17:50 +0000 (18:17 +0000)]
[X86][SSE] Add uniform vector shift test coverage for (sra (trunc (sr[al] x, c1)), c2) folds

3 years ago[flang][driver] Add debug dump options
Faris Rehman [Wed, 17 Feb 2021 15:55:56 +0000 (15:55 +0000)]
[flang][driver] Add debug dump options

Add the following options:
* -fdebug-dump-symbols
* -fdebug-dump-parse-tree
* -fdebug-dump-provenance

Summary of changes:
- Add 3 new frontend actions: DebugDumpSymbolsAction, DebugDumpParseTreeAction and DebugDumpProvenanceAction
- Add a unique pointer to the Semantics instance created in PrescanAndSemaAction
- Move fatal semantic error reporting to its own method, FrontendActions#reportFatalSemanticErrors
- Port most tests using `-fdebug-dump-symbols` and `-fdebug-dump-parse-tree` to the new driver if built, otherwise default to f18

Differential Revision: https://reviews.llvm.org/D96716

3 years ago[OpenCL] Move printf declaration to opencl-c-base.h
Sven van Haastregt [Thu, 18 Feb 2021 11:27:19 +0000 (11:27 +0000)]
[OpenCL] Move printf declaration to opencl-c-base.h

Supporting `printf` with `-fdeclare-opencl-builtins` would require
special handling (for e.g. varargs and format attributes) for just
this one function.  Instead, move the `printf` declaration to the
shared base header.

Differential Revision: https://reviews.llvm.org/D96789

3 years ago[ARM] MVE ICmp costing tests. NFC
David Green [Thu, 18 Feb 2021 10:50:34 +0000 (10:50 +0000)]
[ARM] MVE ICmp costing tests. NFC

3 years ago[RISCV] Rewrite assert to not give unused variable warnings in Release builds
Benjamin Kramer [Thu, 18 Feb 2021 10:42:36 +0000 (11:42 +0100)]
[RISCV] Rewrite assert to not give unused variable warnings in Release builds

NFCI

3 years ago[MLIR] Create memref dialect and move several dialect-specific ops from std.
Julian Gross [Wed, 10 Feb 2021 12:53:11 +0000 (13:53 +0100)]
[MLIR] Create memref dialect and move several dialect-specific ops from std.

Create the memref dialect and move several dialect-specific ops without
dependencies to other ops from std dialect to this dialect.

Moved ops:
AllocOp -> MemRef_AllocOp
AllocaOp -> MemRef_AllocaOp
DeallocOp -> MemRef_DeallocOp
MemRefCastOp -> MemRef_CastOp
GetGlobalMemRefOp -> MemRef_GetGlobalOp
GlobalMemRefOp -> MemRef_GlobalOp
PrefetchOp -> MemRef_PrefetchOp
ReshapeOp -> MemRef_ReshapeOp
StoreOp -> MemRef_StoreOp
TransposeOp -> MemRef_TransposeOp
ViewOp -> MemRef_ViewOp

The roadmap to split the memref dialect from std is discussed here:
https://llvm.discourse.group/t/rfc-split-the-memref-dialect-from-std/2667

Differential Revision: https://reviews.llvm.org/D96425

3 years ago[RISCV] Begin to support more subvector inserts/extracts
Fraser Cormack [Wed, 17 Feb 2021 15:57:59 +0000 (15:57 +0000)]
[RISCV] Begin to support more subvector inserts/extracts

This patch adds support for INSERT_SUBVECTOR and EXTRACT_SUBVECTOR
(nominally where both operands are scalable vector types) where the
vector, subvector, and index align sufficiently to allow decomposition
to subregister manipulation:

* For extracts, the extracted subvector must correctly align with the
lower elements of a vector register.
* For inserts, the inserted subvector must be at least one full vector
register, and correctly align as above.

This approach should work for fixed-length vector insertion/extraction
too, but that will come later.

Reviewed By: craig.topper, khchen, arcbbb

Differential Revision: https://reviews.llvm.org/D96873

3 years ago[SVE][CodeGen] Expand SVE MULH[SU] and [SU]MUL_LOHI nodes
Fraser Cormack [Wed, 17 Feb 2021 09:25:58 +0000 (09:25 +0000)]
[SVE][CodeGen] Expand SVE MULH[SU] and [SU]MUL_LOHI nodes

This patch fixes a codegen crash introduced in fde24661718c, where the
DAGCombiner started generating optimized MULH[SU] or [SU]MUL_LOHI nodes
unless the target opted out. The AArch64 backend cannot currently select
any of these nodes, so ensure that they are not generated in the first
place.

This issue was raised by @huihuiz in D94501.

Reviewed By: paulwalker-arm

Differential Revision: https://reviews.llvm.org/D96849

3 years agoRevert "[Debugify] Make the debugify aware of the original (-g) Debug Info"
Djordje Todorovic [Thu, 18 Feb 2021 10:03:18 +0000 (02:03 -0800)]
Revert "[Debugify] Make the debugify aware of the original (-g) Debug Info"

This reverts rG8ee7c7e02953.
One test is failing, I'll reland this as soon as possible.

3 years ago[cmake] Move check for libproc to config-ix.cmake
Alex Hoppen [Thu, 18 Feb 2021 09:50:54 +0000 (10:50 +0100)]
[cmake] Move check for libproc to config-ix.cmake

As suggested by Nico in https://reviews.llvm.org/D96049, move check for libproc
from CMakeLists to config-ix.cmake

Reviewed By: thakis

Differential Revision: https://reviews.llvm.org/D96713

Note: Also removes the CMAKE_REQUIRED_LIBRARIES which doesn't appear to
be necessary.

3 years ago[Debugify] Make the debugify aware of the original (-g) Debug Info
Djordje Todorovic [Wed, 30 Sep 2020 13:06:55 +0000 (06:06 -0700)]
[Debugify] Make the debugify aware of the original (-g) Debug Info

As discussed on the RFC [0], I am sharing the set of patches that
enables checking of original Debug Info metadata preservation in
optimizations. The proof-of-concept/proposal can be found at [1].

The implementation from the [1] was full of duplicated code,
so this set of patches tries to merge this approach into the existing
debugify utility.

For example, the utility pass in the original-debuginfo-check
mode could be invoked as follows:

  $ opt -verify-debuginfo-preserve -pass-to-test sample.ll

Since this is very initial stage of the implementation,
there is a space for improvements such as:
  - Add support for the new pass manager
  - Add support for metadata other than DILocations and DISubprograms

[0] https://groups.google.com/forum/#!msg/llvm-dev/QOyF-38YPlE/G213uiuwCAAJ
[1] https://github.com/djolertrk/llvm-di-checker

Differential Revision: https://reviews.llvm.org/D82545

3 years ago[XCOFF][NFC] make StorageMappingClass/SymbolType member optional
Chen Zheng [Thu, 18 Feb 2021 09:41:05 +0000 (04:41 -0500)]
[XCOFF][NFC] make StorageMappingClass/SymbolType member optional

This patch makes StorageMappingClass/SymbolType member optional in
class MCSectionXCOFF.

Non-csect sections like debug sections have no such properties.

Reviewed By: hubert.reinterpretcast

Differential Revision: https://reviews.llvm.org/D96641

3 years ago[Syntax] No crash on OpaqueValueExpr.
Haojian Wu [Thu, 18 Feb 2021 09:09:02 +0000 (10:09 +0100)]
[Syntax] No crash on OpaqueValueExpr.

OpaqueValueExpr doesn't correspond to the concrete syntax, it has
invalid source location, ignore them.

Reviewed By: kbobyrev

Differential Revision: https://reviews.llvm.org/D96112

3 years ago[CSSPGO][llvm-profgen] Fix gcc Wcast-qual warning (NFC)
Yang Fan [Thu, 18 Feb 2021 08:31:40 +0000 (16:31 +0800)]
[CSSPGO][llvm-profgen] Fix gcc Wcast-qual warning (NFC)

GCC warning:
```
[3397/3703] Building CXX object tools/llvm-profgen/CMakeFiles/llvm-profgen.dir/llvm-profgen.cpp.o
In file included from /llvm-project/llvm/include/llvm/ADT/STLExtras.h:19,
                 from /llvm-project/llvm/include/llvm/ADT/StringRef.h:12,
                 from /llvm-project/llvm/include/llvm/ADT/Twine.h:13,
                 from /llvm-project/llvm/tools/llvm-profgen/ErrorHandling.h:12,
                 from /llvm-project/llvm/tools/llvm-profgen/llvm-profgen.cpp:13:
/llvm-project/llvm/include/llvm/ADT/Optional.h: In instantiation of ‘void llvm::optional_detail::OptionalStorage<T, <anonymous> >::emplace(Args&& ...) [with Args = {const std::pair<std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char> >, llvm::sampleprof::LineLocation>}; T = const std::pair<std::__cxx11::basic_string<char>, llvm::sampleprof::LineLocation>; bool <anonymous> = false]’:
/llvm-project/llvm/include/llvm/ADT/Optional.h:79:7:   required from ‘constexpr llvm::optional_detail::OptionalStorage<T, <anonymous> >::OptionalStorage(llvm::optional_detail::OptionalStorage<T, <anonymous> >&&) [with T = const std::pair<std::__cxx11::basic_string<char>, llvm::sampleprof::LineLocation>; bool <anonymous> = false]’
/llvm-project/llvm/include/llvm/ADT/Optional.h:253:13:   required from here
/llvm-project/llvm/include/llvm/ADT/Optional.h:113:12: warning: cast from type ‘const std::pair<std::__cxx11::basic_string<char>, llvm::sampleprof::LineLocation>*’ to type ‘void*’ casts away qualifiers [-Wcast-qual]
  113 |     ::new ((void *)std::addressof(value)) T(std::forward<Args>(args)...);
      |            ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~

[3398/3703] Building CXX object tools/llvm-profgen/CMakeFiles/llvm-profgen.dir/PerfReader.cpp.o
In file included from /llvm-project/llvm/include/llvm/ADT/STLExtras.h:19,
                 from /llvm-project/llvm/include/llvm/ADT/StringRef.h:12,
                 from /llvm-project/llvm/include/llvm/ADT/Twine.h:13,
                 from /llvm-project/llvm/tools/llvm-profgen/ErrorHandling.h:12,
                 from /llvm-project/llvm/tools/llvm-profgen/PerfReader.h:11,
                 from /llvm-project/llvm/tools/llvm-profgen/PerfReader.cpp:8:
/llvm-project/llvm/include/llvm/ADT/Optional.h: In instantiation of ‘void llvm::optional_detail::OptionalStorage<T, <anonymous> >::emplace(Args&& ...) [with Args = {const std::pair<std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char> >, llvm::sampleprof::LineLocation>}; T = const std::pair<std::__cxx11::basic_string<char>, llvm::sampleprof::LineLocation>; bool <anonymous> = false]’:
/llvm-project/llvm/include/llvm/ADT/Optional.h:79:7:   required from ‘constexpr llvm::optional_detail::OptionalStorage<T, <anonymous> >::OptionalStorage(llvm::optional_detail::OptionalStorage<T, <anonymous> >&&) [with T = const std::pair<std::__cxx11::basic_string<char>, llvm::sampleprof::LineLocation>; bool <anonymous> = false]’
/llvm-project/llvm/include/llvm/ADT/Optional.h:253:13:   required from here
/llvm-project/llvm/include/llvm/ADT/Optional.h:113:12: warning: cast from type ‘const std::pair<std::__cxx11::basic_string<char>, llvm::sampleprof::LineLocation>*’ to type ‘void*’ casts away qualifiers [-Wcast-qual]
  113 |     ::new ((void *)std::addressof(value)) T(std::forward<Args>(args)...);
      |            ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~

[3399/3703] Building CXX object tools/llvm-profgen/CMakeFiles/llvm-profgen.dir/ProfiledBinary.cpp.o
In file included from /llvm-project/llvm/include/llvm/ADT/STLExtras.h:19,
                 from /llvm-project/llvm/include/llvm/ADT/ArrayRef.h:15,
                 from /llvm-project/llvm/include/llvm/ADT/DenseMapInfo.h:18,
                 from /llvm-project/llvm/include/llvm/ADT/DenseMap.h:16,
                 from /llvm-project/llvm/include/llvm/ADT/DenseSet.h:16,
                 from /llvm-project/llvm/include/llvm/ProfileData/SampleProf.h:17,
                 from /llvm-project/llvm/tools/llvm-profgen/CallContext.h:12,
                 from /llvm-project/llvm/tools/llvm-profgen/ProfiledBinary.h:12,
                 from /llvm-project/llvm/tools/llvm-profgen/ProfiledBinary.cpp:9:
/llvm-project/llvm/include/llvm/ADT/Optional.h: In instantiation of ‘void llvm::optional_detail::OptionalStorage<T, <anonymous> >::emplace(Args&& ...) [with Args = {const std::pair<std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char> >, llvm::sampleprof::LineLocation>}; T = const std::pair<std::__cxx11::basic_string<char>, llvm::sampleprof::LineLocation>; bool <anonymous> = false]’:
/llvm-project/llvm/include/llvm/ADT/Optional.h:79:7:   required from ‘constexpr llvm::optional_detail::OptionalStorage<T, <anonymous> >::OptionalStorage(llvm::optional_detail::OptionalStorage<T, <anonymous> >&&) [with T = const std::pair<std::__cxx11::basic_string<char>, llvm::sampleprof::LineLocation>; bool <anonymous> = false]’
/llvm-project/llvm/include/llvm/ADT/Optional.h:253:13:   required from here
/llvm-project/llvm/include/llvm/ADT/Optional.h:113:12: warning: cast from type ‘const std::pair<std::__cxx11::basic_string<char>, llvm::sampleprof::LineLocation>*’ to type ‘void*’ casts away qualifiers [-Wcast-qual]
  113 |     ::new ((void *)std::addressof(value)) T(std::forward<Args>(args)...);
      |            ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~

[3404/3703] Building CXX object tools/llvm-profgen/CMakeFiles/llvm-profgen.dir/ProfileGenerator.cpp.o
In file included from /llvm-project/llvm/include/llvm/ADT/STLExtras.h:19,
                 from /llvm-project/llvm/include/llvm/ADT/StringRef.h:12,
                 from /llvm-project/llvm/include/llvm/ADT/Twine.h:13,
                 from /llvm-project/llvm/tools/llvm-profgen/ErrorHandling.h:12,
                 from /llvm-project/llvm/tools/llvm-profgen/ProfileGenerator.h:11,
                 from /llvm-project/llvm/tools/llvm-profgen/ProfileGenerator.cpp:9:
/llvm-project/llvm/include/llvm/ADT/Optional.h: In instantiation of ‘void llvm::optional_detail::OptionalStorage<T, <anonymous> >::emplace(Args&& ...) [with Args = {const std::pair<std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char> >, llvm::sampleprof::LineLocation>}; T = const std::pair<std::__cxx11::basic_string<char>, llvm::sampleprof::LineLocation>; bool <anonymous> = false]’:
/llvm-project/llvm/include/llvm/ADT/Optional.h:79:7:   required from ‘constexpr llvm::optional_detail::OptionalStorage<T, <anonymous> >::OptionalStorage(llvm::optional_detail::OptionalStorage<T, <anonymous> >&&) [with T = const std::pair<std::__cxx11::basic_string<char>, llvm::sampleprof::LineLocation>; bool <anonymous> = false]’
/llvm-project/llvm/include/llvm/ADT/Optional.h:253:13:   required from here
/llvm-project/llvm/include/llvm/ADT/Optional.h:113:12: warning: cast from type ‘const std::pair<std::__cxx11::basic_string<char>, llvm::sampleprof::LineLocation>*’ to type ‘void*’ casts away qualifiers [-Wcast-qual]
  113 |     ::new ((void *)std::addressof(value)) T(std::forward<Args>(args)...);
      |            ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
```

3 years ago[mlir] generate enum translation functions with unused attribute
Alex Zinenko [Wed, 17 Feb 2021 18:36:49 +0000 (19:36 +0100)]
[mlir] generate enum translation functions with unused attribute

The functions translating enums to LLVM IR are generated in a single
file included in many places, not all of which use all translations.
Generate functions with "unused" attribute to silence compiler warnings.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D96880

3 years ago[InstCombine] add tests for simplification of logical and/ors (NFC)
Juneyoung Lee [Thu, 18 Feb 2021 08:34:24 +0000 (17:34 +0900)]
[InstCombine] add tests for simplification of logical and/ors (NFC)

3 years ago[lld][WebAssembly] Fix resolveIndirectFunctionTable for relocatable output
Andy Wingo [Tue, 16 Feb 2021 12:28:44 +0000 (13:28 +0100)]
[lld][WebAssembly] Fix resolveIndirectFunctionTable for relocatable output

For relocatable output that needs the indirect function table, identify
the well-known function table.  This allows us to properly fix the
limits on the imported table, and in a followup will allow the element
section to reference the indirect function table even if it's not
assigned to table number 0.  Adapt tests for import reordering.

Differential Revision: https://reviews.llvm.org/D96770

3 years ago[WebAssembly][lld] --importTable flag only imports table if needed
Andy Wingo [Wed, 17 Feb 2021 16:20:28 +0000 (17:20 +0100)]
[WebAssembly][lld] --importTable flag only imports table if needed

Before, --importTable forced the creation of an indirect function table,
whether it was needed or not.  Now it only imports a table if needed.

Differential Revision: https://reviews.llvm.org/D96872

3 years ago[lldb][NFC] Silence missing case warnings in TypeSystemClang::GetTypeBitAlign due...
Raphael Isemann [Thu, 18 Feb 2021 08:02:52 +0000 (09:02 +0100)]
[lldb][NFC] Silence missing case warnings in TypeSystemClang::GetTypeBitAlign due to new RISC-V V types

Those types were added in D92715. This just silences the warning but doesn't
actually add support for those types to LLDB.

3 years ago[CodeGen] Use range-based for loops (NFC)
Kazu Hirata [Thu, 18 Feb 2021 07:58:46 +0000 (23:58 -0800)]
[CodeGen] Use range-based for loops (NFC)

3 years ago[llvm] Ensure newlines at the end of files (NFC)
Kazu Hirata [Thu, 18 Feb 2021 07:58:44 +0000 (23:58 -0800)]
[llvm] Ensure newlines at the end of files (NFC)

This patch eliminates pesky "No newline at end of file" messages from
git diff.

3 years ago[CodeGen] Use ListSeparator (NFC)
Kazu Hirata [Thu, 18 Feb 2021 07:58:43 +0000 (23:58 -0800)]
[CodeGen] Use ListSeparator (NFC)

3 years agoAdd a new Row setting to mark all un-declared regs as Undefined
Jason Molenda [Thu, 18 Feb 2021 07:44:03 +0000 (23:44 -0800)]
Add a new Row setting to mark all un-declared regs as Undefined

Add a new state for UnwindPlan::Row which indicates that any
register not listed is not defined, and should not be found in
stack frames newer than this one and passed up the stack.  Mostly
intended for use with architectural default unwind plans that are
used for jitted stack frames, where we have no unwind information
or start address.  lldb has no way to tell if registers were
spilled in the jitted frame & overwritten, so passing register
values up the stack is not safe to show the user.

Architectural default unwind plans are also used as a fast unwind
plan on x86_64 in particular, and are used as the fallback unwind
plans when lldb thinks it may be able to work around a problem
which causes the unwinder to stop walking the stack early.

For fast unwind plans, when we don't find a register location in
the arch default unwind plan, we fall back to computing & using
the full unwind plan. One small part of this patch is to know that
a register marked as Undefined in the fast unwind plan is a special
case, and we should continue on to the full unwind plan to find what
the real unwind rule is for this register.

Differential Revision: https://reviews.llvm.org/D96829
<rdar://problem/70398009>

3 years ago[profile] Make {__start_,__stop_}__llvm_prf_* symbols undefined weak
Fangrui Song [Thu, 18 Feb 2021 07:33:13 +0000 (23:33 -0800)]
[profile] Make {__start_,__stop_}__llvm_prf_* symbols undefined weak

To make a kind of metadata section usage work, we want to drop the
`__start_/__stop_ references retain C identifier name sections` rule from LLD (see D96914).

If an application has no `__llvm_prf_data` input section surviving --gc-sections,
LLD will error for undefined hidden `{__start_,__stop_}__llvm_prf_*` from `libclang_rt.profile-*`.
Other `__llvm_prf_*` sections have similar issues.

Making the references weak can address the problem.
This probably enables the opportunity to drop zero size dummy sections in `InstrProfilingPlatformLinux.c`.

Reviewed By: davidxl

Differential Revision: https://reviews.llvm.org/D96936

3 years ago[llvm-objdump] Map STT_TLS to ST_Other (previously ST_Data)
Fangrui Song [Thu, 18 Feb 2021 07:17:20 +0000 (23:17 -0800)]
[llvm-objdump] Map STT_TLS to ST_Other (previously ST_Data)

ST_Data is used to model BFD `BFD_OBJECT`.
A STT_TLS symbol does not have the `BFD_OBJECT` flag in BFD.
This makes sense because a STT_TLS symbol is like in a different address space,
normal data/object properties do not apply on them.

With this change, a STT_TLS symbol will not be displayed as 'O'.
This new behavior matches objdump.

Differential Revision: https://reviews.llvm.org/D96735

3 years ago[libcxx] Implement append and operator/ properly for windows
Martin Storsjö [Wed, 4 Nov 2020 13:59:56 +0000 (15:59 +0200)]
[libcxx] Implement append and operator/ properly for windows

The root_path function has to be changed to return the parsed bit
as-is; otherwise a path like "//net" gets a root path of "//net/", as
the root name, "//net", gets the root directory (an empty string) appended,
forming "//net/". (The same doesn't happen for the root dir "c:" though.)

Differential Revision: https://reviews.llvm.org/D91178

3 years ago[MC][ELF] Fix gcc "enumeral and non-enumeral type in conditional expression" warning...
Yang Fan [Thu, 18 Feb 2021 06:57:45 +0000 (14:57 +0800)]
[MC][ELF] Fix gcc "enumeral and non-enumeral type in conditional expression" warning (NFC)

GCC warning:
```
/llvm-project/llvm/lib/MC/ELFObjectWriter.cpp: In member function ‘uint64_t {anonymous}::ELFWriter::writeObject(llvm::MCAssembler&, const llvm::MCAsmLayout&)’:
/llvm-project/llvm/lib/MC/ELFObjectWriter.cpp:1137:38: warning: enumeral and non-enumeral type in conditional expression [-Wextra]
 1137 |     write(uint32_t(Group->isComdat() ? ELF::GRP_COMDAT : 0));
      |                    ~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~
```

3 years ago[AMDGPU] Temporary remove test
Stanislav Mekhanoshin [Thu, 18 Feb 2021 06:41:04 +0000 (22:41 -0800)]
[AMDGPU] Temporary remove test

Remove hsa-gfx90a-v3.s until D95638. It unexpectedly passes
on s390x.

3 years ago[MC][ELF] Fix unused variable warning (NFC)
Yang Fan [Thu, 18 Feb 2021 06:23:18 +0000 (14:23 +0800)]
[MC][ELF] Fix unused variable warning (NFC)

GCC warning:
```
/llvm-project/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp: In member function ‘virtual llvm::MCSection* llvm::TargetLoweringObjectFileELF::getSectionForLSDA(const llvm::Function&, const llvm::MCSymbol&, const llvm::TargetMachine&) const’:
/llvm-project/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp:871:8: warning: variable ‘IsComdat’ set but not used [-Wunused-but-set-variable]
  871 |   bool IsComdat = false;
      |        ^~~~~~~~
```

3 years ago[NFC] Simplify msan test
Vitaly Buka [Thu, 18 Feb 2021 06:09:46 +0000 (22:09 -0800)]
[NFC] Simplify msan test

3 years ago[X86] Zero AMX config buffer for non AVX512 cases.
Wang, Pengfei [Thu, 18 Feb 2021 03:35:34 +0000 (11:35 +0800)]
[X86] Zero AMX config buffer for non AVX512 cases.

Zero AMX config buffer for non AVX512 cases.

Differential Revision: https://reviews.llvm.org/D96927

3 years ago[GWP-ASan] Change sys/cdefs.h to features.h
Fangrui Song [Thu, 18 Feb 2021 04:03:16 +0000 (20:03 -0800)]
[GWP-ASan] Change sys/cdefs.h to features.h

sys/cdefs.h is a glibc internal header which is not supposed to be included by applications.
(Some libc implementations provide this file for compatibility.)
Android features.h includes sys/cdefs.h, so we can include features.h instead.

This change makes `ninja gwp_asan` build on musl.

3 years ago[Flang] Fix compilation on MinGW-w64
Mehdi Chinoune [Thu, 18 Feb 2021 03:45:29 +0000 (21:45 -0600)]
[Flang] Fix compilation on MinGW-w64

Reviewed By: Meinersbur

Differential Revision: https://reviews.llvm.org/D94707

3 years ago[Driver] Honor "-gdwarf-N" at any position for assembler sources
Igor Kudrin [Wed, 17 Feb 2021 14:17:46 +0000 (21:17 +0700)]
[Driver] Honor "-gdwarf-N" at any position for assembler sources

This fixes an issue when "-gdwarf-N" switch was ignored if it was given
before another debug option.

Differential Revision: https://reviews.llvm.org/D96865

3 years ago[X86] Add AVX2/SSE2 checks for AMX config buffer zeroing. NFC
Wang, Pengfei [Thu, 18 Feb 2021 03:30:12 +0000 (11:30 +0800)]
[X86] Add AVX2/SSE2 checks for AMX config buffer zeroing. NFC

3 years ago[RISCV] Guard LowerINSERT_VECTOR_ELT against fixed vectors.
Craig Topper [Thu, 18 Feb 2021 02:56:11 +0000 (18:56 -0800)]
[RISCV] Guard LowerINSERT_VECTOR_ELT against fixed vectors.

The type legalizer can call this code based on the scalar type so
we need to verify the vector type is a scalable vector.

I think due to how type legalization visits nodes, the vector type
will have already been legalized so we don't have an issue with
using MVT here like we did for EXTRACT_VECTOR_ELT.
I've added a test just in case.

3 years ago[profile] Add __attribute__((used)) to zero size dummy sections
Fangrui Song [Thu, 18 Feb 2021 03:22:25 +0000 (19:22 -0800)]
[profile] Add __attribute__((used)) to zero size dummy sections

D14468 added these dummy sections. This patch adds `__attribute__((used))` so
that when compiled by GCC>=11 or (expected, D96838) Clang>=13 on some ELF platforms,
these sections will get SHF_GNU_RETAIN to make sure they will not be discarded
by ld --gc-sections.

We are trying to get rid of LLD's "__start_/__stop_ references retain C identifier name sections" rule.
If LLD drops the rule in the future (we will retain compatibility for `__llvm_prf_*` for a while),
`__llvm_prf_*` will need to have the SHF_GNU_RETAIN flag, otherwise:

```
// __llvm_prf_cnts/__llvm_prf_data usually exist, but {names,vnds} may not exist.
// Such diagnostics will happen with {cnts,data} as well if no input object file is instrumented.
% clang++ -fprofile-generate a.cc -fuse-ld=lld -Wl,--gc-sections
ld.lld: error: undefined hidden symbol: __start___llvm_prf_names
>>> referenced by InstrProfilingPlatformLinux.c
>>>               InstrProfilingPlatformLinux.c.o:(__llvm_profile_begin_names) in archive /tmp/RelA/lib/clang/13.0.0/lib/linux/libclang_rt.profile-x86_64.a
...
```

Differential Revision: https://reviews.llvm.org/D96902

3 years ago[LV] Add analysis remark for mixed precision conversions
Joseph Huber [Wed, 27 Jan 2021 15:34:01 +0000 (10:34 -0500)]
[LV] Add analysis remark for mixed precision conversions

Floating point conversions inside vectorized loops have performance
implications but are very subtle. The user could specify a floating
point constant, or call a function without realizing that it will
force a change in the vector width. An example of this behaviour is
seen in https://godbolt.org/z/M3nT6c . The vectorizer should indicate
when this happens becuase it is most likely unintended behaviour.

This patch adds a simple check for this behaviour by following floating
point stores in the original loop and checking if a floating point
conversion operation occurs.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D95539

3 years ago[RISCV] Guard the ISD::EXTRACT_VECTOR_ELT handling in ReplaceNodeResults against...
Craig Topper [Thu, 18 Feb 2021 02:19:22 +0000 (18:19 -0800)]
[RISCV] Guard the ISD::EXTRACT_VECTOR_ELT handling in ReplaceNodeResults against fixed vectors and non-MVT types.

The type legalizer is calling this code based on the scalar type so
we need to verify the input type is a scalable vector.

The vector type has also not been legalized yet when this is called
so we need to use EVT for it.

3 years ago[mlir][sparse] generalize sparse storage format to many more types
Aart Bik [Thu, 18 Feb 2021 00:47:33 +0000 (16:47 -0800)]
[mlir][sparse] generalize sparse storage format to many more types

Rationale:
Narrower types for overhead storage yield a smaller memory footprint for
sparse tensors and thus needs to be supported. Also, more value types
need to be supported to deal with all kinds of kernels. Since the
"one-size-fits-all" sparse storage scheme implementation is used
instead of actual codegen, the library needs to be able to support
all combinations of desired types. With some crafty templating and
overloading, the actual code for this is kept reasonably sized though.

Reviewed By: bixia

Differential Revision: https://reviews.llvm.org/D96819

3 years ago[Clang][RISCV] Define RISC-V V builtin types
Hsiangkai Wang [Thu, 4 Feb 2021 04:57:36 +0000 (12:57 +0800)]
[Clang][RISCV] Define RISC-V V builtin types

Add the types for the RISC-V V extension builtins.

These types will be used by the RISC-V V intrinsics which require
types of the form <vscale x 1 x i64>(LMUL=1 element size=64) or
<vscale x 4 x i32>(LMUL=2 element size=32), etc. The vector_size
attribute does not work for us as it doesn't create a scalable
vector type. We want these types to be opaque and have no operators
defined for them. We want them to be sizeless. This makes them
similar to the ARM SVE builtin types. But we will have quite a bit
more types. This patch adds around 60. Later patches will add
another 230 or so types representing tuples of these types similar
to the x2/x3/x4 types in ARM SVE. But with extra complexity that
these types are combined with the LMUL concept that is unique to
RISCV.

For more background see this RFC
http://lists.llvm.org/pipermail/llvm-dev/2020-October/145850.html

Authored-by: Roger Ferrer Ibanez <roger.ferrer@bsc.es>
Co-Authored-by: Hsiangkai Wang <kai.wang@sifive.com>
Differential Revision: https://reviews.llvm.org/D92715

3 years ago[AMDGPU] Fixed msan build
Stanislav Mekhanoshin [Thu, 18 Feb 2021 01:59:24 +0000 (17:59 -0800)]
[AMDGPU] Fixed msan build

LoadStoreOptimizer was using uninitialized SCC value for
instructions where it is unsupported.

3 years ago[flang][fir][NFC] clang-tidy change. Add include.
Eric Schweitz [Wed, 17 Feb 2021 23:34:18 +0000 (15:34 -0800)]
[flang][fir][NFC] clang-tidy change. Add include.

Differential Revision: https://reviews.llvm.org/D96912

3 years ago[XCOFF][NFC] make csect properties optional for getXCOFFSection
Chen Zheng [Thu, 18 Feb 2021 01:42:45 +0000 (20:42 -0500)]
[XCOFF][NFC] make csect properties optional for getXCOFFSection

We are going to support debug sections for XCOFF. So the csect
properties are not necessary. This patch makes these properties
optional.

Reviewed By: hubert.reinterpretcast

Differential Revision: https://reviews.llvm.org/D95931

3 years ago[flang][fir][NFC] Merge tablegen files.
Eric Schweitz [Wed, 17 Feb 2021 23:16:04 +0000 (15:16 -0800)]
[flang][fir][NFC] Merge tablegen files.

Differential Revision: https://reviews.llvm.org/D96908

3 years ago[libunwind] Add support for PC reg column in arm64
Marco Vanotti [Wed, 17 Feb 2021 21:42:40 +0000 (13:42 -0800)]
[libunwind] Add support for PC reg column in arm64

This change adds support for the dwarf PC register column in arm64, allowing
CFI directives to make use of it.

As of the last revision of the DWARF for ARM 64-bit architecture[0], the pc
register has been added as a valir register, with number 32.

This allows libunwinder to restore both pc and lr, which is useful
for stack switches and signal contexts.

[0]:
https://github.com/ARM-software/abi-aa/blob/f52e1ad3f81254497a83578dc102f6aac89e52d0/aadwarf64/aadwarf64.rst

Reviewed By: phosek, #libunwind

Differential Revision: https://reviews.llvm.org/D96901

3 years ago[NetBSD] Use cortex-a8 as default CPU for ARMv7
Joerg Sonnenberger [Thu, 18 Feb 2021 00:53:04 +0000 (01:53 +0100)]
[NetBSD] Use cortex-a8 as default CPU for ARMv7

This matches the platform default for GCC. It primarily matters when the
integrated assembler is not used as there is no default CPU defined for
ARMv7-A and GNU as is upset with -mcpu=generic.

3 years ago[AMDGPU] Mark SMRD atomics
Stanislav Mekhanoshin [Wed, 17 Feb 2021 00:34:24 +0000 (16:34 -0800)]
[AMDGPU] Mark SMRD atomics

We did not have atomic flags on SMRD, did not copy TSFlags
to real instructions, and did not have ret/noret atomic map.

At the moment it is NFC, but needed for D96469.

Differential Revision: https://reviews.llvm.org/D96823

3 years ago[WPD] Add an optional checking mode for debugging devirtualization
Teresa Johnson [Wed, 3 Feb 2021 21:12:40 +0000 (13:12 -0800)]
[WPD] Add an optional checking mode for debugging devirtualization

This adds an internal option -wholeprogramdevirt-check which if enabled
will guard each devirtualization with a runtime check against the
expected target, and an invocation of a debug trap if the check fails.
This is useful for debugging WPD failures involving undefined behavior
(e.g. casting to another class type not in the inheritance chain).

Differential Revision: https://reviews.llvm.org/D95969

3 years ago[gn build] add a comment to the goma_dir arg
Nico Weber [Thu, 18 Feb 2021 00:36:36 +0000 (19:36 -0500)]
[gn build] add a comment to the goma_dir arg

3 years ago[WebAssembly] Remove dependency of reference types from EH
Heejin Ahn [Wed, 17 Feb 2021 22:25:56 +0000 (14:25 -0800)]
[WebAssembly] Remove dependency of reference types from EH

The new spec does not have `exnref` so EH does not have dependency of
the reference types proposal anymore.

Reviewed By: dschuff

Differential Revision: https://reviews.llvm.org/D96903

3 years ago[AMDGPU] gfx90a support
Stanislav Mekhanoshin [Wed, 17 Feb 2021 21:37:46 +0000 (13:37 -0800)]
[AMDGPU] gfx90a support

Differential Revision: https://reviews.llvm.org/D96906

3 years ago[obj2yaml,yaml2obj] Add NumBlocks to the BBAddrMapEntry yaml field.
Rahman Lavaee [Wed, 17 Feb 2021 02:43:56 +0000 (18:43 -0800)]
[obj2yaml,yaml2obj] Add NumBlocks to the BBAddrMapEntry yaml field.

As discussed in D95511, this allows us to encode invalid BBAddrMap
sections to be used in more rigorous testing.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D96831

3 years ago[flang][fir][NFC] clang-tidy change
Eric Schweitz [Wed, 17 Feb 2021 23:27:55 +0000 (15:27 -0800)]
[flang][fir][NFC] clang-tidy change

Differential Revision: https://reviews.llvm.org/D96911

3 years ago[gn build] Port 7397905ab0a0
LLVM GN Syncbot [Wed, 17 Feb 2021 23:33:31 +0000 (23:33 +0000)]
[gn build] Port 7397905ab0a0

3 years ago[SampleFDO] Third Try: Refactor SampleProfile.cpp
Rong Xu [Wed, 17 Feb 2021 22:19:36 +0000 (14:19 -0800)]
[SampleFDO] Third Try: Refactor SampleProfile.cpp

Apply the patch for the third time after fixing buildbot failures.

Refactor SampleProfile.cpp to use the core code in CodeGen.
The main changes are:
(1) Move SampleProfileLoaderBaseImpl class to a header file.
(2) Split SampleCoverageTracker to a head file and a cpp file.
(3) Move the common codes (common options and callsiteIsHot())
to the common cpp file.
(4) Add inline keyword to avoid duplicated symbols -- they will
be removed later when the class is changed to a template.

Differential Revision: https://reviews.llvm.org/D96455

3 years ago[gold] Match lld WPD behavior for shared library symbols and add test
Teresa Johnson [Mon, 15 Feb 2021 17:19:50 +0000 (09:19 -0800)]
[gold] Match lld WPD behavior for shared library symbols and add test

lld already marks shared library defs as ExportDynamic, which prevents
potentially unsafe devirtualization of symbols defined in shared
libraries. Match that behavior in the gold plugin, and add the same
test.

Depends on D96721.

Differential Revision: https://reviews.llvm.org/D96722

3 years ago[OpenMP] fix race condition in test
AndreyChurbanov [Wed, 17 Feb 2021 23:27:49 +0000 (02:27 +0300)]
[OpenMP] fix race condition in test

3 years ago[libomptarget][amdgcn] Remove lookup of .language msgpack field
Jon Chesterfield [Wed, 17 Feb 2021 23:02:16 +0000 (23:02 +0000)]
[libomptarget][amdgcn] Remove lookup of .language msgpack field

3 years ago[MLIR][TOSA] Expand Tosa int types to I8 and I16
Rob Suderman [Wed, 17 Feb 2021 22:01:32 +0000 (14:01 -0800)]
[MLIR][TOSA] Expand Tosa int types to I8 and I16

Tosa integers should include I8 and I16 values.

Differential Revision: https://reviews.llvm.org/D96900

3 years ago[libc++abi] Add builtins to dynamic library link
Patrick Oppenlander [Wed, 17 Feb 2021 22:04:36 +0000 (17:04 -0500)]
[libc++abi] Add builtins to dynamic library link

Otherwise libc++abi.so fails to link on arm with undefined references to
some __aeabi_ builtins.

Differential Revision: https://reviews.llvm.org/D96574

3 years ago[GlobalISel] Implement computeKnownBits for G_ASSERT_SEXT
Jessica Paquette [Wed, 17 Feb 2021 19:54:51 +0000 (11:54 -0800)]
[GlobalISel] Implement computeKnownBits for G_ASSERT_SEXT

Implementation is the same as G_SEXT_INREG.

Differential Revision: https://reviews.llvm.org/D96899

3 years ago[GlobalISel] Implement computeNumSignBits for G_ASSERT_SEXT
Jessica Paquette [Wed, 17 Feb 2021 19:35:46 +0000 (11:35 -0800)]
[GlobalISel] Implement computeNumSignBits for G_ASSERT_SEXT

Same implementation as G_SEXT_INREG.

Add a testcase to combine-sext-inreg for a concrete example, and a testcase
to KnownBitsTest.

Differential Revision: https://reviews.llvm.org/D96897

3 years ago[Driver] Clean up some Separate form options
Fangrui Song [Wed, 17 Feb 2021 21:49:41 +0000 (13:49 -0800)]
[Driver] Clean up some Separate form options

Drop the `Separate` form of `-fmodule-name X`, `-fprofile-remapping-file X`, and `-frewrite-map-file X`.
To the best of my knowledge they are not used. Their conventional Joined forms (`-fFOO=`) should be used instead.

`-fdebug-compilation-dir X` is used in several places, e.g.  chromium/infra/goma.
It is also advertised in http://blog.llvm.org/2019/11/deterministic-builds-with-clang-and-lld.html
So we keep it but make the EQ form canonical and the Separate form an alias.

Differential Revision: https://reviews.llvm.org/D96886

3 years ago[OpenMP][NFC] replaced 'dependencies' with 'dependences' in comments and debug prints
AndreyChurbanov [Wed, 17 Feb 2021 21:38:18 +0000 (00:38 +0300)]
[OpenMP][NFC] replaced 'dependencies' with 'dependences' in comments and debug prints

3 years ago[flang] Warn about useless explicit typing of intrinsics
peter klausler [Wed, 17 Feb 2021 18:24:14 +0000 (10:24 -0800)]
[flang] Warn about useless explicit typing of intrinsics

Fortran 2018 explicitly permits an ignored type declaration
for the result of a generic intrinsic function.  See the comment
added to Semantics/expression.cpp for an explanation of why this
is somewhat dangerous and worthy of a warning.

Differential Revision: https://reviews.llvm.org/D96879

3 years ago[SystemZ] Separate LoZ ELF specifics in tablegen.
Yusra Syeda [Wed, 17 Feb 2021 21:06:02 +0000 (16:06 -0500)]
[SystemZ] Separate LoZ ELF specifics in tablegen.

Separate the LoZ ELF calling convention in tablegen.
This will make it easier to add the z/OS ABI in future patches.

Reviewed By: uweigand

Differential Revision: https://reviews.llvm.org/D96867

3 years ago[GlobalISel] Add G_ASSERT_SEXT
Jessica Paquette [Wed, 17 Feb 2021 18:57:10 +0000 (10:57 -0800)]
[GlobalISel] Add G_ASSERT_SEXT

This adds a G_ASSERT_SEXT opcode, similar to G_ASSERT_ZEXT. This instruction
signifies that an operation was already sign extended from a smaller type.

This is useful for functions with sign-extended parameters.

E.g.

```
define void @foo(i16 signext %x) {
 ...
}
```

This adds verifier, regbankselect, and instruction selection support for
G_ASSERT_SEXT equivalent to G_ASSERT_ZEXT.

Differential Revision: https://reviews.llvm.org/D96890

3 years agoBugfix for collecting features from very small DSOs.
Aaron Green [Wed, 17 Feb 2021 21:00:44 +0000 (13:00 -0800)]
Bugfix for collecting features from very small DSOs.

During unit tests, it was observed that crafting an artificially small DSO could cause OOB memory to be accessed. This change fixes that (but again, the affected DSOs are unlikely to ever occur outside unit tests).

Reviewed By: morehouse, charco

Differential Revision: https://reviews.llvm.org/D94507

3 years ago[WPD][lld] Test handling of vtable definition from shared libraries
Teresa Johnson [Mon, 15 Feb 2021 01:48:34 +0000 (17:48 -0800)]
[WPD][lld] Test handling of vtable definition from shared libraries

Adds a lld test for a case that the handling added for dynamically
exported symbols in 1487747e990ce9f8851f3d92c3006a74134d7518 already
fixes. Because isExportDynamic returns true when the symbol is
SharedKind with default visibility, it will treat as dynamically
exported and block devirtualization when the definition of a vtable
comes from a shared library. This is desireable as it is dangerous to
devirtualize in that case, since there could be hidden overrides in the
shared library. Typically that happens when the shared library header
contains available externally definitions, which applications can
override. An example is std::error_category, which is overridden in LLVM
and causing failures after a self build with WPD enabled, because
libstdc++ contains hidden overrides of the virtual base class methods.

The regular LTO case in the new test already worked, but there are
2 fixes in this patch needed for the index-only case and the hybrid
LTO case. For the index-only case, WPD should not simply ignore
available externally vtables. A follow on fix will be made to clang to
emit type metadata for those vtables, which the new test is modeling.
For the hybrid case, we need to ensure when the module is split that any
llvm.*used globals are cloned to the regular LTO split module so
available externally vtable definitions are not prematurely deleted.

Another follow on fix will add the equivalent gold test, which requires
a small fix to the plugin to treat symbols in dynamic libraries the same
way lld already is.

Differential Revision: https://reviews.llvm.org/D96721

3 years agoBasic block sections should enable not function sections implicitly.
Sriraman Tallam [Wed, 17 Feb 2021 20:34:37 +0000 (12:34 -0800)]
Basic block sections should enable not function sections implicitly.

Basic block sections enables function sections implicitly, this is not needed
and is inefficient with "=list" option.

We had basic block sections enable function sections implicitly in clang. This
is particularly inefficient with "=list" option as it places functions that do
not have any basic block sections in separate sections. This causes unnecessary
object file overhead for large applications.

This patch disables this implicit behavior. It only creates function sections
for those functions that require basic block sections.

This patch is the second of two patches and this patch removes the implicit
enabling of function sections with basic block sections in clang.

Differential Revision: https://reviews.llvm.org/D93876

3 years agofix comment typo to cycle bots
Nico Weber [Wed, 17 Feb 2021 20:29:39 +0000 (15:29 -0500)]
fix comment typo to cycle bots

3 years ago[WebAssemblly] Fix EHPadStack update in fixCallUnwindMismatches
Heejin Ahn [Mon, 15 Feb 2021 15:32:51 +0000 (07:32 -0800)]
[WebAssemblly] Fix EHPadStack update in fixCallUnwindMismatches

Updating `EHPadStack` with respect to `TRY` and `CATCH` instructions
have to be done after checking all other conditions, not before. Because
we did this before checking other conditions, when we encounter `TRY`
and we want to record the current mismatching range, we already have
popped up the entry from `EHPadStack`, which we need to access to record
the range.

The `baz` call in the added test needs try-delegate because the previous
TRY marker placement for `quux` was placed before `baz`, because `baz`'s
return value was stackified in RegStackify. If this wasn't stackified
this try-delegate is not strictly necessary, but at the moment it is not
easy to identify cases like this. I plan to transfer `nounwind`
attributes from the LLVM IR to prevent cases like this. The call in the
test does not have `unwind` attribute in order to test this bug, but in
many cases of this pattern the previous call has `nounwind` attribute.

Reviewed By: tlively

Differential Revision: https://reviews.llvm.org/D96711

3 years ago[NFC][RegAlloc] InlineSpiller::Original is a Register
Mircea Trofin [Wed, 17 Feb 2021 20:07:27 +0000 (12:07 -0800)]
[NFC][RegAlloc] InlineSpiller::Original is a Register

3 years ago[gn build] make WindowsManifestMerger.cpp build fine with sysroot
Nico Weber [Wed, 17 Feb 2021 19:47:02 +0000 (14:47 -0500)]
[gn build] make WindowsManifestMerger.cpp build fine with sysroot

This already works in the cmake build.

Differential Revision: https://reviews.llvm.org/D96889

3 years ago[NFC][clang] Bump up DIAG_SIZE_SEMA for downstream diagnostics
Zixu Wang [Wed, 17 Feb 2021 19:44:43 +0000 (11:44 -0800)]
[NFC][clang] Bump up DIAG_SIZE_SEMA for downstream diagnostics

Bump DIAG_SIZE_SEMA up by 500 to accommodate extra downstream diagnostics

Differential Revision: https://reviews.llvm.org/D96888

3 years ago[RISCV] Localize RISCVZvlssegTable to RISCVISelDAGToDAG.cpp, the only place it is...
Craig Topper [Wed, 17 Feb 2021 19:37:06 +0000 (11:37 -0800)]
[RISCV] Localize RISCVZvlssegTable to RISCVISelDAGToDAG.cpp, the only place it is used.

3 years ago[flang] Ensure that intrinsic procedures are PURE &/or ELEMENTAL
peter klausler [Wed, 17 Feb 2021 18:11:29 +0000 (10:11 -0800)]
[flang] Ensure that intrinsic procedures are PURE &/or ELEMENTAL

The intrinsic procedure table properly classify the various
intrinsics, but the PURE and ELEMENTAL attributes that these
classifications imply don't always make it to the utility
predicates that test symbols for them, leading to spurious
error messages in some contexts.  So set those attribute flags
as appropriate in name resolution, using a new function to
isolate the tests.

An alternate solution, in which the predicates would query
the intrinsic procedure table for these attributes on demand,
was something I also tried, so that this information could
come directly from an authoritative source; but it would have
required references to the intrinsic table to be passed along
on too many seemingly unrelated APIs and ended up looking messy.

Several symbol table tests needed to have their expected outputs
augmented with the PURE and ELEMENTAL flags.  Some bogus messages
that were flagged as such in test/Semantics/doconcurrent01.f90 were
removed, since they are now correctly not emitted.

Differential Revision: https://reviews.llvm.org/D96878

3 years ago[WebAssembly] Do not use EHCatchret symbols with wasm EH
Derek Schuff [Wed, 17 Feb 2021 00:35:27 +0000 (16:35 -0800)]
[WebAssembly] Do not use EHCatchret symbols with wasm EH

D94835 added support for WinEH to export public symbols pointing to
basic blocks which are catchret targets for use with Windows CET.
Wasm currently doesn't support public symbols to non-function code
addresses (they get treated like new functions in asm but then don't
lower to object files correctly).
It created them unconditionally for all catchret targets.

This change disables those symbols unless the exceptionHandlingType
is WinEH (since they aren't used with ExceptionHandling::Wasm)

Differential Revision: https://reviews.llvm.org/D96824

3 years ago[RISCV] Use bits<7> instead of bits<11> for the EEW field size in the RISCVZvlsseg...
Craig Topper [Wed, 17 Feb 2021 19:11:58 +0000 (11:11 -0800)]
[RISCV] Use bits<7> instead of bits<11> for the EEW field size in the RISCVZvlsseg searchable table. NFCI

We only support 8, 16, 32, and 64 for EEW. These only need 7 bits
to represent.

3 years ago[SROA] Amend failing test from D95826
William S. Moses [Wed, 17 Feb 2021 18:54:42 +0000 (13:54 -0500)]
[SROA] Amend failing test from D95826

3 years agosysroot.py: add support for non-darwin platforms
Nico Weber [Wed, 17 Feb 2021 18:48:10 +0000 (13:48 -0500)]
sysroot.py: add support for non-darwin platforms

CMAKE_SYSROOT works fine here, and `sysroot.py make-fake`
borders on trivial here, but I suppose it's still nice
to have a consistent script to set these up across platforms.

And these are the platforms where we can do real sysroot management one
day.

Differential Revision: https://reviews.llvm.org/D96882