Paul Davey [Mon, 5 Nov 2018 05:09:29 +0000 (18:09 +1300)]
fs: ubifs: Fix UBIFS decompression on 64 bit
Add local size_t variable to crypto_comp_decompress as intermediate
storage for destination length to avoid memory corruption and incorrect
results on 64 bit targets.
This is what linux does for the various lz compression implementations.
Signed-off-by: Paul Davey <paul.davey@alliedtelesis.co.nz>
Cc: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
Tom Rini [Tue, 6 Nov 2018 16:12:00 +0000 (11:12 -0500)]
Merge tag 'u-boot-imx-
20181106' of git://git.denx.de/u-boot-imx
Fix coverity issues for i.MX8
Tom Rini [Tue, 6 Nov 2018 15:37:31 +0000 (10:37 -0500)]
Merge git://git.denx.de/u-boot-marvell
Tom Rini [Tue, 6 Nov 2018 13:23:32 +0000 (08:23 -0500)]
Merge git://git.denx.de/u-boot-x86
Stefan Roese [Tue, 23 Oct 2018 10:25:16 +0000 (12:25 +0200)]
arm: mvebu: armada-xp-theadorable.dts: Change CS# for 2nd FPGA
The new board version has the 2nd FPGA connected via CS# 0 instead of
2 on SPI bus 1. Change this setup in the DT accordingly. Please note
that this change does still work on the old board version because the
CS signal is not used on this board.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Tue, 23 Oct 2018 10:25:15 +0000 (12:25 +0200)]
arm: mvebu: armada-xp-theadorable.dts: Add "spi-flash" compatible property
Add the "spi-flash" compatible string so that the generic sf_probe
driver can probe the SPI flash on the theadorable Armada-XP board.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 22 Oct 2018 12:21:17 +0000 (14:21 +0200)]
arm: mvebu: Move PCI(e) MBUS window to end of RAM
With patch
49b23e035d96 (pci: mvebu: Increase size of PCIe default mapping)
the mapping size for each PCI(e) controller was increased from 32MiB to
128MiB. This leads to problems on boards with multiple PCIe slots / ports
which are unable to map all PCIe ports, e.g. the Armada-XP theadorable:
DRAM: 2 GiB (667 MHz, 64-bit, ECC not enabled)
SF: Detected m25p128 with page size 256 Bytes, erase size 256 KiB, total 16 MiB
Cannot add window '4:f8', conflicts with another window
PCIe unable to add mbus window for mem at
f0000000+
08000000
Model: Marvell Armada XP theadorable
This patch moves the base address for the PCI(e) memory spaces from
0xe8000000 to the end of SDRAM (clipped to a max of 0xc0000000 right now).
This gives move room and flexibility for PCI(e) mappings.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: VlaoMao <vlaomao@gmail.com>
Tested-by: VlaoMao <vlaomao at gmail.com>
Peng Fan [Fri, 26 Oct 2018 02:11:42 +0000 (02:11 +0000)]
MAINTAINERS: add NXP linux team maillist as i.MX reviewer
Add NXP linux team upstream maillist as reviewer
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Fabio Estevam [Fri, 26 Oct 2018 00:49:31 +0000 (21:49 -0300)]
ARM: dts: fsl-imx8qxp-mek: Move regulator outside "simple-bus"
Commit
3c28576bb0f0 ("arm: dts: imx8qxp: fix build warining")
fixed the dts warning by removing the unnecessary
#address-cells/#size-cells, but the recommendation for regulators is not
to place them under "simple-bus", so move the reg_usdhc2_vmmc regulator
accordingly.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Fabio Estevam [Fri, 26 Oct 2018 00:23:07 +0000 (21:23 -0300)]
mx8mq_evk: README: Delete file introduced by mistake
board/freescale/mx8mq_evk/README has been introduced by mistake
in commit
d0dd73974c61 ("imx: add i.MX8QXP MEK board support")
Remove it for now as this should be introduced when mx8mq_evk
support is in place.
Reported-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 5 Nov 2018 09:53:31 +0000 (09:53 +0000)]
tools: imx8image: flatten container header only when creating container
If there is no CONTAINER entry, there is no need to flatten container
header.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 5 Nov 2018 09:53:28 +0000 (09:53 +0000)]
tools: imx8image: fix coverity CID 184233
Fix:
CID 184233: (NEGATIVE_RETURNS)
Using variable "container" as an index to array "imx_header.fhdr".
Reported-by: Coverity
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 5 Nov 2018 09:53:25 +0000 (09:53 +0000)]
tools: imx8image: fix coverity CID 184234
Fix:
CID 184234: (TAINTED_SCALAR)
Using tainted variable "header.num_images - 1" as an index into an array "header.img".
Reported-by: Coverity
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 5 Nov 2018 09:53:22 +0000 (09:53 +0000)]
tools: imx8image: check lseek return value
Check lseek return value.
Fix Coverity CID: 184236 184235 184232
Reported-by: Coverity
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Andy Shevchenko [Wed, 31 Oct 2018 17:14:08 +0000 (19:14 +0200)]
x86: acpi: Remove redundant Offset (0x00)
New ACPI assembler issues a warning:
board/intel/edison/dsdt.asl.tmp 13: Offset (0x00),
Remark 2158 - ^ Unnecessary/redundant use of Offset operator
Indeed, in the OperationRegion the offset is 0x00 by default.
Thus, drop unneeded Offset() use as suggested by ACPI assembler.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tom Rini [Sun, 4 Nov 2018 13:12:21 +0000 (08:12 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-sh
Tom Rini [Sat, 3 Nov 2018 12:21:05 +0000 (08:21 -0400)]
Merge tag 'mips-fixes-for-v2018.11' of git://git.denx.de/u-boot-mips
- replace the dynamic size of the relocation table
with a fixed but configurable size
- fixes non-working CONFIG_OF_SEPARATE=y due to invalid _end symbol
Daniel Schwierzeck [Thu, 1 Nov 2018 01:02:21 +0000 (02:02 +0100)]
MIPS: make size of relocation table fixed but configurable
Currently the size of the relocation table will be shrunk
to the actual size needed. Although this gives a maximal
space saving, it messes up the _end symbol. This breaks
features like appended DTBs because the _end symbol doesn't
point to the real end of the U-Boot binary.
Remove the size shrinking and make the size of the relocation
table fixed but configurable. This follows the Linux approach
and the user can adjust the size to his needs.
Also rename the relocation table section from .rel to .data.reloc
to follow the Linux approach and to avoid ambiguities with the
.rel.* sections added by the linker.
Reported-by: Lars Povlsen <lars.povlsen@microsemi.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Marek Vasut [Wed, 13 Jun 2018 06:02:55 +0000 (08:02 +0200)]
mmc: tmio: sdhi: Merge DTCNTL access into single register write
It is perfectly fine to write th DTCNTL TAP count and enable the
SCC sampling clock operation in the same write.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Sun, 28 Oct 2018 18:28:56 +0000 (19:28 +0100)]
mmc: tmio: sdhi: Implement waiting for DAT0 line state
When the bus switches to 1.8V mode of operation, it is necessary to
verify that the card correctly initiated and completed the voltage
switch. This is done by reading out the state of DATA0 line.
This patch implement support for reading out the state of the DATA0
line, so the MMC core code can correctly switch to 1.8V mode.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Wed, 13 Jun 2018 06:02:55 +0000 (08:02 +0200)]
mmc: tmio: sdhi: Clear HS400 settings when resetting SCC
Make sure to clear HS400 configuration when resetting the SCC block.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Sun, 28 Oct 2018 14:30:06 +0000 (15:30 +0100)]
mmc: tmio: sdhi: Touch SCC only when UHS capable
Add check to avoid touching the SCC tuning registers in case the IP
doesn't support them or if the support isn't in place yet.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Wed, 13 Jun 2018 06:02:55 +0000 (08:02 +0200)]
mmc: tmio: Preinitialize regulator to 3.3V
Preinitialize the SD card signals regulator to 3.3V, which is the
default post-reset setting, to be sure the regulator is set to a
valid value.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Wed, 13 Jun 2018 06:02:55 +0000 (08:02 +0200)]
mmc: tmio: Configure clock before any other IOS
Configure the clock settings before reconfiguring any other IO settings.
This is required when the clock must be stopped before changing eg. the
pin configuration or any of the other properties of the bus. Running the
clock configuration first allows the MMC core to do just that.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Tue, 30 Oct 2018 21:05:54 +0000 (22:05 +0100)]
mmc: tmio: Silence transfer errors when tuning
In case the controller performs card tuning, that is, sends MMC
command 19 or 21, silence possible CRC error warning prints. The
warnings are bound to happen, since the tuning will fail for some
settings while searching for the optimal configuration of the bus
and that is perfectly OK.
This patch passes around the MMC command structure and adds check
into tmio_sd_check_error() to avoid printing CRC error warning
when the tuning happens.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Tue, 30 Oct 2018 20:53:29 +0000 (21:53 +0100)]
mmc: tmio: Improve error handling
Properly handle return values and abort operations when they are
non-zero. This is a minor improvement, which fixes two remaining
unchecked return values.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Sun, 28 Oct 2018 12:54:10 +0000 (13:54 +0100)]
mmc: tmio: Simplify pinmux handling
The SD UHS SDR12, SDR25, SDR50, SDR104, DDR50 and MMC HS200, HS400
modes all use 1.8V signaling, while all the legacy modes use 3.3V
signaling. While there are extra modes which use 1.2V signaling,
the existing hardware does not support those.
Simplify the pinmux such that 3.3V signaling implies legacy mode
pinmux and the rest implies UHS mode pinmux. This prevents the
massive case statement from growing further. Moreover, it fixes
an edge case where during SD 1.8V switch, the bus mode is still
set to default while the signaling is already set to 1.8V, which
results in an attempt to communicate with a 1.8V card using pins
in 3.3V mode and thus communication failure.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Wed, 31 Oct 2018 14:06:50 +0000 (15:06 +0100)]
ARM: rmobile: Generate fitting mem_map on Gen3
Patch "ARM: rmobile: Mark 4-64GiB as DRAM on Gen3" marked the entire
64bit DRAM space as cachable. On CortexA57, this might result in odd
side effects, where the CPU tries to prefetch from those areas and if
there is no DRAM backing them, CPU bus hang can happen.
This patch fixes it by generating the mem_map structure based on the
actual memory layout obtained from the DT, thus not marking areas
without any DRAM behind them as cachable.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Fixes:
c1ec34763811d ("ARM: rmobile: Mark 4-64GiB as DRAM on Gen3")
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Wed, 31 Oct 2018 19:34:51 +0000 (20:34 +0100)]
pinctrl: renesas: Add POCCTRL handling to r8a77990
Add definition of the POCCTRL register and bits therein to R8A77990 E3
pincontrol driver. This allows the pincontrol driver to configure SDHI
pin voltage according to power-source DT property.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Wed, 13 Jun 2018 06:02:55 +0000 (08:02 +0200)]
pinctrl: renesas: Fix DRV register offset
Use fixed 4bit size for generating the DRV register element mask,
not the size of the value, which can be smaller.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Tom Rini [Fri, 2 Nov 2018 13:39:18 +0000 (09:39 -0400)]
Merge tag 'arc-for-2018.11' of git://git.denx.de/u-boot-arc
Just 2 non-functinal changes:
1. Rename of EMDK to EMSDP so it matches real marketing name
2. Add essential README for IoTDK
Alexey Brodkin [Wed, 31 Oct 2018 15:44:05 +0000 (18:44 +0300)]
iot_dk: Add README
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Alexey Brodkin [Thu, 18 Oct 2018 06:54:58 +0000 (09:54 +0300)]
emdk->emsdp: Rename board
Real marketing name of the board was recently updated so
to accommodate that change renaming the board and all
related to it.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Sam Protsenko [Tue, 30 Oct 2018 17:57:48 +0000 (19:57 +0200)]
arm: ti: boot: Don't read environment partition
This part should've been remove in commit
88d60db01168 ("arm: ti: boot:
Remove environment partition"), but I missed it somehow. Remove reading
dtb file from environment partition on eMMC, as we don't have it
anymore.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Jens Wiklander [Mon, 29 Oct 2018 10:41:35 +0000 (11:41 +0100)]
test: tee: fix resource leak in dm_test_tee()
Fixes possible resource leak in dm_test_tee() reported by Coverity.
Reported-by: Coverity (CID: 184175)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Patrick Delaunay [Thu, 25 Oct 2018 14:54:42 +0000 (16:54 +0200)]
cmd: remove CONFIG_SOURCE support in Makefile
This line is no more needed and can be removed.
Only CONFIG_CMD_SOURCE is defined in Kconfig and
used in defconfig files.
CONFIG_SOURCE if not defined in source code and
"config SOURCE" is not present in any Kconfig.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Lokesh Vutla [Wed, 24 Oct 2018 15:36:50 +0000 (21:06 +0530)]
power: spl: add SPL_DM_REGULATOR_GPIO in Kconfig
The Makefile already tests for SPL_DM_REGULATOR_GPIO, but Kconfig
does not provide it. This adds SPL_DM_REGULATOR_GPIO to Kconfig.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Keerthy [Wed, 24 Oct 2018 06:17:14 +0000 (11:47 +0530)]
cmd: remoteproc: Fix the base of strtoul for ID conversion from 3 to 10
Currently the base is 3 fix it 10 so that IDs follow decimal system.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvulta@ti.com>
Andrei.Stefanescu@microchip.com [Tue, 23 Oct 2018 08:13:35 +0000 (08:13 +0000)]
configs: sama5d2_ptc_ek: read environment from FAT
On our demo setup for SD card boot, the u-boot environment
is in a FAT partition.
This patch changes the default configuration, specifing that
the u-boot environment is in a FAT partition instead of raw MMC.
Signed-off-by: Andrei Stefanescu <andrei.stefanescu@microchip.com>
Acked-by: Eugen Hristev <eugen.hristev@microchip.com>
Eugen.Hristev@microchip.com [Tue, 23 Oct 2018 07:41:33 +0000 (07:41 +0000)]
configs: at91: at91sam9x5ek: fix bootcmd for NAND flash
The default bootcommand needs to be accurate w.r.t the nand memory map
at http://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91sam9x5ekMainPage#NAND_Flash_demo_Memory_map
Updated to load kernel + dtb at right offsets and boot the zImage.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Martin Fuzzey [Mon, 22 Oct 2018 16:31:08 +0000 (18:31 +0200)]
w1: fix data abort if no one wire bus master present
When the "w1 bus" command is used with no bus master present
a data abort may occur.
This is because uclass_first_device() returns zero, but sets the output
struct udevice pointer to NULL in the no device found case.
Fix w1_get_bus() to account for this and return an error code
as is expected by the callers.
Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
Reviewed-by: Eugen Hristev <eugen.hristev@microchip.com>
Martin Fuzzey [Mon, 22 Oct 2018 16:31:07 +0000 (18:31 +0200)]
w1-eeprom: ds24xxx: fix data abort in ds24xxx_probe()
Data abort was occurring when using "w1 bus" with a DS24B33 present.
The abort occurred in the ds24xxx_probe() because the struct w1_device
pointer was NULL. This is because that structure is allocated by
the parent device uclass (by .per_child_platdata_auto_alloc_size)
and thus the correct accessor is dev_get_parent_platdata() not
dev_get_platdata()
Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
Reviewed-by: Eugen Hristev <eugen.hristev@microchip.com>
Tom Rini [Wed, 31 Oct 2018 21:15:55 +0000 (17:15 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
Simon Goldschmidt [Tue, 30 Oct 2018 19:21:49 +0000 (20:21 +0100)]
arm: socfpga: imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
Using imply for SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION instead of
select ensures we can build without partition support (used to build
a network boot only version of SPL and U-Boot).
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Stefan Roese [Tue, 30 Oct 2018 09:00:22 +0000 (10:00 +0100)]
arm: socfpga: Fix bootcounter located at the end of internal SRAM
Commit
768f23dc8ae3 ("ARM: socfpga: Put stack at the end of SRAM") broke
those socfpga boards that keep the bootcounter at the end of the
internal SRAM as the bootcounter needs 8 bytes by default and thus the
very first SPL call to board_init_f_alloc_reserve overwrites the
bootcounter.
This patch allows to move the initial stack pointer down a bit by
checking if CONFIG_SYS_BOOTCOUNT_ADDR is located in the internal SRAM
area and then using this address as location for the start of the
stack pointer.
No new macros / defines are added by this approach.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Simon Goldschmidt [Mon, 15 Oct 2018 18:35:10 +0000 (20:35 +0200)]
arm: socfpga: fpga: fix type of local variable
The 'status' variable in 'socfpga_load()' for both gen5 and arria10
is of type 'unsigned long' while it is always used as 'int' only.
Change it to 'int'.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tom Rini [Tue, 30 Oct 2018 20:53:42 +0000 (16:53 -0400)]
Merge tag 'mpc85xx-for-v2018.11' of git://git.denx.de/u-boot-mpc85xx
Workaround and bug fix for Freescale PowerPC
Add workaround for Freescale USB erratum A005275.
Correct RCW macros for T1080.
Bin Meng [Mon, 8 Oct 2018 13:55:57 +0000 (06:55 -0700)]
powerpc: t1040: Correct RCW EC2 settings
Per T1040RM (Rev. 1, 08/2015), there are 2 issues with the RCW EC2
settings.
- The value of FSL_CORENET_RCWSR13_EC2_FM1_GPIO is wrong and should
be 0x04000000 (value of 1 in RCW bit [420:421])
- Value of 2/3 are reserved in RCW bit [420:421], hence there is no
macro FSL_CORENET_RCWSR13_EC2_FM1_DTSEC5_MII.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Poonam Aggrwal <poonam.aggrwal@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Bin Meng [Mon, 8 Oct 2018 13:55:56 +0000 (06:55 -0700)]
powerpc: t1040: Correct RCW MAC2_GMII_SEL value
Per T1040RM (Rev. 1, 08/2015), the value of
FSL_CORENET_RCWSR13_MAC2_GMII_SEL_ENET_PORT is wrong
and should be 0x00000080 (bit 440 in the RCW).
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Poonam Aggrwal <poonam.aggrwal@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Chris Packham [Thu, 4 Oct 2018 07:03:53 +0000 (20:03 +1300)]
fsl/usb: Workaround for USB erratum-A005275
Workaround makes FS as default mode on all affected socs.
Add support to check erratum-A005275 validity for an soc. This info is
required to determine whether a given soc is affected by this erratum.
Add quirk for this erratum "has_fsl_erratum_a005275" . This quirk is used
to enable workaround for the errata
Force FS mode as default by:
- making EPS as FS
- setting PFSC bit to disable HS chirping
This workaround can be disabled by mentioning "no_erratum_a005275" in
hwconfig string
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Tom Rini [Mon, 29 Oct 2018 20:04:26 +0000 (16:04 -0400)]
Prepare v2018.11-rc3
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 29 Oct 2018 15:21:00 +0000 (11:21 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-sunxi
Andre Przywara [Thu, 25 Oct 2018 09:23:07 +0000 (17:23 +0800)]
sunxi: store DRAM size in SPL header
At the moment we rely on the infamous get_ram_size() function to learn
the actual DRAM size in U-Boot proper. This function has two issues:
1) It only works if the DRAM size is a power of two. We start to see
boards which have 3GB of (usable) DRAM, so this does not fit anymore.
2) As U-Boot has no notion of reserved memory so far, it will happily
ride through the DRAM, possibly stepping on secure-only memory. This
could be a region of DRAM reserved for OP-TEE or some other secure
payload, for instance. It will most likely crash in that case.
As the SPL DRAM init routine has very accurate knowledge of the actual
DRAM size, lets propagate this wisdom to U-Boot proper.
We re-purpose a currently reserved word in our SPL header for that.
The SPL itself stores the detected DRAM size there, and bumps the SPL
header version number in that case. U-Boot proper checks for a valid
SPL header and a high enough version number, then uses the DRAM size
from there. If the SPL header field is not sufficient, we fall back to
the old DRAM scanning routine.
Part of the DRAM might be present and probed by SPL, but not accessible
by the CPU. They're restricted in the main U-Boot binary, when accessing
the DRAM size from SPL header.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Icenowy Zheng [Thu, 25 Oct 2018 09:23:06 +0000 (17:23 +0800)]
sunxi: add Kconfig option for the maximum accessible DRAM
Allwinner 64-bit SoCs can use 4GiB DRAM chip, however their memory map
has only allocated 3GiB for DRAM, so only 3GiB of the DRAM is
accessible.
Add a Kconfig option for the maximum accessible DRAM.
For A80 it should be a much higher value (8GiB), but as I have no A80
device to test and originally U-Boot only supports 2GiB DRAM on A80, it
currently still falls under the 2GiB situation.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Icenowy Zheng [Thu, 25 Oct 2018 09:23:05 +0000 (17:23 +0800)]
sunxi: map DRAM part with 3G size
All Allwinner 64-bit SoCs now are known to be able to access 3GiB of
external DRAM, however the size of DRAM part in the MMU translation
table is still 2GiB.
Change the size of DRAM part in MMU table to 3GiB.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Andre Przywara [Thu, 25 Oct 2018 09:23:04 +0000 (17:23 +0800)]
sunxi: board.c: refactor SPL header checks
So far we have two users which want to look at the SPL header. We will
get more in the future.
Refactor the existing SPL header checks into a common function, to
simplify reusing the code.
Now that this is easy, add proper version checks to the DT name parsing.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
Andre Przywara [Thu, 25 Oct 2018 09:23:03 +0000 (17:23 +0800)]
sunxi: Extend SPL header versioning
On Allwinner SoCs we use some free bytes at the beginning of the SPL image
to store various information. We have a version byte to allow updates,
but changing this always requires all tools to be updated as well.
Introduce the concept of semantic versioning [1] to the SPL header:
The major part of the version number only changes on incompatible
updates, a minor number bump indicates backward compatibility.
This patch just documents the major/minor split, adds some comments
to the header file and uses the versioning information for the existing
users.
[1] https://semver.org
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
Icenowy Zheng [Thu, 25 Oct 2018 09:23:02 +0000 (17:23 +0800)]
sunxi: disable Pine A64 model detection code on other boards
The Pine A64 Plus/non-Plus model detection code is now built on all
64-bit ARM SoCs, even if the code cannot be triggered when H5/H6 is in
use.
Disable them when the board is Pine A64 by adding a Kconfig option that
is only selected on Pine A64.
On GCC 7.3.1 this makes the size of the function reduces 184 bytes, and
saves a 104 byte strstr() function, then makes SPL on H6 succeed to
build.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tom Rini [Sun, 28 Oct 2018 13:28:26 +0000 (09:28 -0400)]
Merge git://git.denx.de/u-boot-x86
Patrick Delaunay [Fri, 26 Oct 2018 07:02:52 +0000 (09:02 +0200)]
drivers: cosmetic: Convert SPDX license tags to Linux Kernel style
Complete in the drivers directory the work started with
commit
83d290c56fab ("SPDX: Convert all of our single
license tags to Linux Kernel style").
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Bin Meng [Thu, 25 Oct 2018 10:05:37 +0000 (03:05 -0700)]
x86: Fix car_uninit weak symbol definition
Since commit
80df194f0165 ("x86: detect unsupported relocation types"),
an error message is seen on QEMU x86 target during boot:
do_elf_reloc_fixups32: unsupported relocation type 0x1 at
fff841f0, offset = 0xfff00087
do_elf_reloc_fixups32: unsupported relocation type 0x2 at
fff841f8, offset = 0xfff00091
Check offset 0xfff00087 and 0xfff00091 in the u-boot ELF image,
fff00087 000df401 R_386_32
00000000 car_uninit
fff00091 000df402 R_386_PC32
00000000 car_uninit
we see R_386_32 and R_386_PC32 relocation type is generated for
symbol car_uninit, which is declared as a weak symbol in start.S.
However the actual weak symbol implementation ends up nowhere. As
we can see below, it's *UND*.
$ objdump -t u-boot | grep car_uninit
00000000 w *UND*
00000000 car_uninit
With this fix, it is normal now.
$ objdump -t u-boot | grep car_uninit
fff00094 w F .text.start
00000001 car_uninit
Reported-by: Hannes Schmelzer <hannes@schmelzer.or.at>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Stefan Roese [Mon, 22 Oct 2018 12:07:56 +0000 (14:07 +0200)]
x86: theadorable-x86-xxx_defconfig: Move VGA BIOS to make room for U-Boot
The build breaks because its not fitting the U-Boot binary into the ROM
image. So lets move VGA BIOS a bit to make room for the grown U-Boot
binary.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Stefan Roese [Mon, 22 Oct 2018 12:07:55 +0000 (14:07 +0200)]
x86: theadorable-x86: Generate and pass root=PARTUUID instead of /dev/sdaX
To enable the root device selection (kernel cmd-line) via PARTUUID, this
patch enables CMD_PART on all missing theadorable-x86 boards and
changes the default environment to generate the root=PARTUUID string
automatically.
This fixes problems that have been noticed on systems with multiple
SATA/AHCI controller connected via PCIe, where the device name for the
root device / partition (/dev/sdaX) was incorrect.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Stefan Roese [Mon, 22 Oct 2018 12:07:54 +0000 (14:07 +0200)]
x86: theadorable-x86-common: Change pci hotplug cmdline parameters (again)
This is needed for the PCIe hotplug to work correctly on some boards
with the newer Linux kernel versions.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Stefan Roese [Mon, 22 Oct 2018 12:07:53 +0000 (14:07 +0200)]
x86: BayTrail: southcluster.asl: Change PCI 64 bit address range / region
To allow bigger 64 bit prefetchable PCI regions in Linux, this patch
changes the base address and range of the ACPI area passed to Linux.
BayTrail can only physically access 36 bit of PCI address space. So
just chaning the range without changing the base address won't work
here, as 0xf.ffff.ffff is already the maximum address.
With this patch, a maximum of 16 GiB of local DDR is supported. This
should be enough for all BayTrail boards though.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tom Rini [Fri, 26 Oct 2018 12:40:53 +0000 (08:40 -0400)]
vf610twr: Enable thumb2 for builds
To help with size constraints, enable thumb2 when building.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 26 Oct 2018 00:30:05 +0000 (20:30 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-net
Tom Rini [Thu, 25 Oct 2018 14:16:21 +0000 (10:16 -0400)]
Merge tag 'u-boot-imx-
20181025' of git://git.denx.de/u-boot-imx
Merged imx8 architecture, fix build for imx8 + warnings
Peng Fan [Thu, 25 Oct 2018 08:36:49 +0000 (08:36 +0000)]
arm: dts: imx8qxp: fix build warining
Fix below build warning.
arch/arm/dts/fsl-imx8qxp-mek.dtb: Warning (avoid_unnecessary_addr_size):
/regulators: unnecessary #address-cells/#size-cells without "ranges"
or child "reg" property
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Thu, 25 Oct 2018 08:32:40 +0000 (08:32 +0000)]
imx: mkimage: avoid stop CI when required files not exists
Introduce a new script to check whether file exists and
use that check in Makefile to avoid break CI system.
The script return 1 when the required files not exists, return 0
when files exists. The script will ignore check to u-boot-dtb.bin,
because if there is something wrong to generate u-boot-dtb.bin,
there must be some code error.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Anatolij Gustschin [Thu, 18 Oct 2018 14:15:11 +0000 (16:15 +0200)]
net: fec_mxc: add support for i.MX8X
Add compatible property and enable the FEC ipg clock when probing
on i.MX8X. Add specific function for reading FEC clock rate via
clock driver when configuring MII speed register. Allow FEC_MXC
selection for i.MX8.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Baruch Siach [Mon, 15 Oct 2018 10:16:48 +0000 (13:16 +0300)]
net: mvpp2: increase PHY reset pulse
The default Linux PHY reset delay is 10ms. This is also the requirement
for Marvell 88E151x PHYs, which are likely to be used with this Ethernet
MAC.
Cc: Stefan Chulski <stefanc@marvell.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Baruch Siach [Mon, 15 Oct 2018 10:16:47 +0000 (13:16 +0300)]
net: mvpp2: fix polarity of PHY reset signal
The dm_gpio_set_value() call sets the logical level of the GPIO signal.
That is, it takes the GPIO_ACTIVE_{LOW,HIGH} property into account. The
driver needs to assert the reset, and then deassert it. Not the other
way around.
Cc: Stefan Chulski <stefanc@marvell.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Priyanka Jain [Thu, 11 Oct 2018 04:47:05 +0000 (04:47 +0000)]
net/phy: Add phy-id for IN112525_S03
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Martin Fuzzey [Thu, 4 Oct 2018 17:59:21 +0000 (19:59 +0200)]
net: dm: fec: Obtain the transceiver type from the DT
The DT property "phy-mode" already provides the transceiver type.
Use it so that we do not have to also set CONFIG_FEC_XCV_TYPE
Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Martin Fuzzey [Thu, 4 Oct 2018 17:59:20 +0000 (19:59 +0200)]
net: dm: fec: Support the phy-supply binding
Configure the phy regulator if defined by the "phy-supply" DT phandle.
Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Martin Fuzzey [Thu, 4 Oct 2018 17:59:19 +0000 (19:59 +0200)]
net: dm: fec: Fix phy-reset-duration clamping and defaults
The DT binding says:
- phy-reset-duration : Reset duration in milliseconds. Should present
only if property "phy-reset-gpios" is available. Missing the property
will have the duration be 1 millisecond. Numbers greater than 1000 are
invalid and 1 millisecond will be used instead.
However the current code:
- clamps values greater than 1000ms to 1000ms rather than 1.
- does not initialize the delay if the property does not exist
(else clause mismatch)
- returns an error if phy-reset-gpios is not defined
Fix all this and simplify by using dev_read_u32_default()
Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Martin Fuzzey [Thu, 4 Oct 2018 17:59:18 +0000 (19:59 +0200)]
net: dm: fec: Fix time unit error in phy-reset-duration
The DT binding says that phy-reset-duration is in ms, but the driver
currently uses udelay().
Switch to mdelay() to fix this.
Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Jeremy Gebben [Tue, 18 Sep 2018 21:49:37 +0000 (15:49 -0600)]
net: phy: aquantia: autodetect if firmware needs to be loaded
If the phy reports a valid firmware version and doesn't indicate
a fault, skip loading the firmware. This allows the same image
to be used on boards that have firmware storage and those that do not.
Signed-off-by: Jeremy Gebben <jgebben@sweptlaser.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Jeremy Gebben [Tue, 18 Sep 2018 21:49:36 +0000 (15:49 -0600)]
net: phy: aquantia: add firmware loading support
Aquantia phys have firmware that can be loaded automatically
from storage directly attached to the phy or via MDIO commands.
Add support for loading firmware from either a file or a
raw location on an MMC device.
Signed-off-by: Jeremy Gebben <jgebben@sweptlaser.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Jeremy Gebben [Tue, 18 Sep 2018 21:49:35 +0000 (15:49 -0600)]
configs: migrate CONFIG_PHY_AQUANTIA to Kconfig
The aquantia driver requires both CONFIG_PHY_GIGE and CONFIG_PHYLIB_10G.
Signed-off-by: Jeremy Gebben <jgebben@sweptlaser.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Pankaj Bansal [Tue, 18 Sep 2018 10:16:48 +0000 (15:46 +0530)]
miiphy: Add function to retrieve MDIO bus list head
In upcoming freescale board LX2160AQDS, the MDIO bus is muxed.
i.e. same MDIO bus can be routed to eight different slots depending
on mux register settings.
To support this mdio mux behavior, we add each MDIO bus mux as a
separate MDIO bus.
Now, various phy devices can be attached to each of these slots(mux).
The information about these devices is passed to OS via device tree.
To do the fdt fixups related to MDIO bus, its necessary that MDIO bus
list is accessed.Therefore, add a function to retrieve the list head.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Hector Palacios [Fri, 17 Aug 2018 11:06:40 +0000 (13:06 +0200)]
cmd: mii: don't check address for 'device' subcommand
All mii operations require a valid PHY address except the 'device'
command, which expects the PHY name rather than the address.
Signed-off-by: Hector Palacios <hector.palacios@digi.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Priit Laes [Tue, 23 Oct 2018 17:20:31 +0000 (20:20 +0300)]
sunxi: display: Mark sunxi_rgb2yuv_coef array as const
sunxi_rgb2yuv_coef is readonly and never modified.
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Priit Laes [Tue, 23 Oct 2018 17:20:30 +0000 (20:20 +0300)]
sunxi: docs: Mention CONFIG_NAND requirement
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Priit Laes [Tue, 23 Oct 2018 17:20:28 +0000 (20:20 +0300)]
sunxi: Fix typos of spelling Allwinner
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Vasily Khoruzhick [Wed, 17 Oct 2018 04:56:35 +0000 (21:56 -0700)]
pwm: sunxi: choose best prescaler to improve PWM resolution
Choose best prescaler to improve PWM resolution. Without this change
driver chooses first prescaler that gives us period value within
range, but it could be not the best one.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Vasily Khoruzhick [Wed, 17 Oct 2018 04:56:34 +0000 (21:56 -0700)]
pwm: sunxi: use new prescaler when configuring PWM
Looks like old prescaler was used when configuring PWM, fix it.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Vasily Khoruzhick [Wed, 17 Oct 2018 04:56:33 +0000 (21:56 -0700)]
pwm: sunxi: fix off-by-one that prevented PWM to use prescaler bypass
Fix off-by-one that prevented PWM driver to use prescaler bypass.
Without this change prescaler is always enabled.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Fabio Estevam [Tue, 23 Oct 2018 15:38:18 +0000 (12:38 -0300)]
warp7: MAINTAINERS: Add an entry for warp7_bl33_defconfig
Add an entry for the warp7_bl33_defconfig target.
This fixes the following warnings:
WARNING: no status info for 'warp7_bl33'
WARNING: no maintainers for 'warp7_bl33'
Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tom Rini [Wed, 24 Oct 2018 01:13:32 +0000 (21:13 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-samsung
Tom Rini [Tue, 23 Oct 2018 15:58:44 +0000 (11:58 -0400)]
travis: Rework Freescale ARM jobs a bit
- Split the AArch64 LS10xx and LS20xx builds into their own jobs, and
then exclude only ls1/ls2 from the catch-all. This moves the S32V234
job (and future i.MX8*) to the catch-all.
- Split spear out from arm926ejs and exclude freescale, not mx from that
job. The older Freescale i.MX boards are caught by the catch-all job
for Freescale but now we build the non-Freescale older i.MX platforms.
Signed-off-by: Tom Rini <trini@konsulko.com>
Dirk Meul [Sun, 14 Oct 2018 15:14:17 +0000 (17:14 +0200)]
ARM: Samsung: Add Exynos5422-based Odroid HC2 support
Odroid HC2 board is based on Odroid XU4 board, like the Odroid HC1.
The linux kernel does not provide a hc2 DTB so the hc1 DTB is also used
for the Odroid HC2.
Resend because MUA changed whitespace.
Signed-off-by: Dirk Meul <dirk.meul@rwth-aachen.de>
Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Simon Glass [Mon, 1 Oct 2018 18:22:31 +0000 (12:22 -0600)]
binman: Add a test for Intel reference code
Unfortunately the test was not included in the original implementation.
Add one.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Tom Rini [Mon, 22 Oct 2018 17:56:10 +0000 (13:56 -0400)]
Merge git://git.denx.de/u-boot-x86
Bernhard Messerklinger [Mon, 3 Sep 2018 08:17:35 +0000 (10:17 +0200)]
serial: mxc: Add match string for i.mx6 quad/dual lite serial
Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Reviewed-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Tested-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Sam Protsenko [Thu, 18 Oct 2018 19:47:17 +0000 (22:47 +0300)]
arm: ti: boot: Remove environment partition
Remove "environment" partition and do not read it when booting Android
from eMMC. We don't use this partition anymore, so this is just an
unintentional leftover.
Earlier we were reading dtb file from "environment" partition to feed it
further to kernel. Now we are using dtb from FIT image ("boot" partition
contains boot_fit.img image), which can be seen from this command:
bootm ${loadaddr}#${fdtfile}
where "#" character means we have FIT image in ${loadaddr} RAM address.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Acked-by: Praneeth Bajjuri <praneeth@ti.com>
Cédric Le Goater [Tue, 16 Oct 2018 11:57:11 +0000 (13:57 +0200)]
watchdog: aspeed: restore default value of reset_mask
This is required for the current Linux kernel to reboot. It should also
probably be fixed in Linux.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Adam Ford [Sun, 14 Oct 2018 20:53:17 +0000 (15:53 -0500)]
ARM: omap3_logic: Add NOR Flash Support for SOM-LV
The DM37 and OMAP35 SOM-LV SOM-LV products both support a NOR
flash part connected to CS2 in addition to the NAND part on CS0.
This patch setups the GPMC timings for the MT28 NOR Flash and
enables the CFI-Flash driver now that the CFI stuff is in Kconfig
Signed-off-by: Adam Ford <aford173@gmail.com>
Meul, Dirk [Sat, 13 Oct 2018 12:54:01 +0000 (12:54 +0000)]
arm: udoo: Convert to distro config
Instead of keeping a custom environment, use a more generic approach
by switching to distro config.
Signed-off-by: Dirk Meul <dirk.meul@rwth-aachen.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>