Marek Olšák [Wed, 21 Oct 2020 22:17:48 +0000 (18:17 -0400)]
amd: correct typos in gfx10-rsrc.json
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7264>
Marek Olšák [Tue, 20 Oct 2020 21:17:18 +0000 (17:17 -0400)]
amd: regenerate gfx103.json from kernel headers
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7264>
Vinson Lee [Tue, 20 Oct 2020 22:28:56 +0000 (15:28 -0700)]
scons/windows: Support build with LLVM 11.
Added LLVMFrontendOpenMP.
Removed LLVMX86Utils.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7242>
Marijn Suijten [Tue, 20 Oct 2020 22:26:46 +0000 (00:26 +0200)]
scons: gallium/auxiliary: Unconditionally compile NIR regardless of LLVM
NIR sources are not depending on LLVM (anymore?) as can be seen in the
equivalent unconditional inclusion of nir/ source files in meson.build.
Symbols in these files are necessary to compile softpipe:
Linking build/linux-x86_64-debug/gallium/targets/libgl-xlib/libGL.so.1.5 ...
/usr/bin/ld: build/linux-x86_64-debug/gallium/drivers/softpipe/libsoftpipe.a(sp_state_shader.os): in function `softpipe_create_shader_state':
src/gallium/drivers/softpipe/sp_state_shader.c:146: undefined reference to `nir_to_tgsi'
/usr/bin/ld: build/linux-x86_64-debug/gallium/drivers/softpipe/libsoftpipe.a(sp_state_shader.os): in function `softpipe_create_compute_state':
src/gallium/drivers/softpipe/sp_state_shader.c:435: undefined reference to `nir_to_tgsi'
Fixes:
fa483d8cd1b ("android: gallium/auxiliary: Deduplicate nir_to_tgsi.c inclusion")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3669
Tested-by: Vinson Lee <vlee@freedesktop.org>
Acked-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7250>
Jason Ekstrand [Fri, 23 Oct 2020 16:24:51 +0000 (11:24 -0500)]
spirv: Fix OpCopyMemorySized
I have no idea how we are passing CTS tests with that bug in there. I
guess by luck?
Fixes:
8323c03bbfd45 "spirv: Add support for OpCopyMemorySized"
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7294>
Leo Liu [Tue, 20 Oct 2020 22:51:23 +0000 (18:51 -0400)]
frontends/omx/h265: Check the pps set before the scaling data
Certain clip has no scaling list data in the pps set
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7240>
Leo Liu [Tue, 20 Oct 2020 21:44:13 +0000 (17:44 -0400)]
frontends/omx/dec: Use the known codec profile when allocating buffers
We should use it since the profile has been known already,
otherwise it will get incorrect buffers in some cases.
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7240>
Alyssa Rosenzweig [Thu, 22 Oct 2020 14:58:04 +0000 (10:58 -0400)]
pan/bi: Account for bool32 ld_ubo reads
Fixes crash in sway.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Alyssa Rosenzweig [Thu, 22 Oct 2020 14:57:39 +0000 (10:57 -0400)]
panfrost: Don't advertise MSAA on Bifrost
Not yet supported and rather broken.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Alyssa Rosenzweig [Thu, 22 Oct 2020 14:56:54 +0000 (10:56 -0400)]
panfrost: Drop PIPE_CAP_GLSL_FEATURE_LEVEL for Bifrost
We don't want derivative instructions sneaking in from desktop GL before
we support them.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Alyssa Rosenzweig [Wed, 21 Oct 2020 19:23:16 +0000 (15:23 -0400)]
panfrost: Implement BGRA textures
Stopgap before the full format rework.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Alyssa Rosenzweig [Wed, 21 Oct 2020 21:36:52 +0000 (17:36 -0400)]
panfrost: Fix component order XML
For v7. This should be complete and correct now.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes:
8389976b7c0 ("panfrost: XML-ify the blend descriptors")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Alyssa Rosenzweig [Thu, 15 Oct 2020 14:30:36 +0000 (10:30 -0400)]
panfrost: Calculate thread count on Bifrost
Since the register is missing in practice we need to apply the
per-architecture default.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Alyssa Rosenzweig [Wed, 21 Oct 2020 21:20:27 +0000 (17:20 -0400)]
panfrost: Don't export queries
They should be cached onto the device anyway.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Alyssa Rosenzweig [Wed, 21 Oct 2020 21:17:41 +0000 (17:17 -0400)]
panfrost: Record architecture major version
This tends to be easier to work with than the raw GPU ID and needs some
special casing for Midgard vs Bifrost/Valhall.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Alyssa Rosenzweig [Thu, 15 Oct 2020 12:47:40 +0000 (08:47 -0400)]
pan/bi: Use nir_undef_to_zero
We don't handle undefs explicitly in NIR->BIR which means if they aren't
optimized out they won't be RA'd to anything and then backend RA will
crash (as occurs in a glamor shader seen in MATE).
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Alyssa Rosenzweig [Thu, 15 Oct 2020 12:45:24 +0000 (08:45 -0400)]
panfrost: Move nir_undef_to_zero to common util/
Will use for Bifrost as well.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Alyssa Rosenzweig [Thu, 15 Oct 2020 00:48:08 +0000 (20:48 -0400)]
pan/bi: Pipe through tls_size
So we have stack memory allocated.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Alyssa Rosenzweig [Thu, 15 Oct 2020 00:45:19 +0000 (20:45 -0400)]
pan/bi: Implement spilling
Now that all the helpers are in place, we can wire it up.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Alyssa Rosenzweig [Thu, 15 Oct 2020 00:44:35 +0000 (20:44 -0400)]
pan/bi: Pack LOAD/STORE
LOAD is the same as LOAD_UNIFORM (same instruction, I need to
deduplicate the IR), STORE is basically the same as LOAD.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Alyssa Rosenzweig [Thu, 15 Oct 2020 00:38:33 +0000 (20:38 -0400)]
pan/bi: Add bi_foreach_clause_in_block_safe helper
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Alyssa Rosenzweig [Thu, 15 Oct 2020 00:38:13 +0000 (20:38 -0400)]
pan/bi: Factor out singleton construction from scheduler
We'll reuse the logic in spilling.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Alyssa Rosenzweig [Thu, 15 Oct 2020 00:37:45 +0000 (20:37 -0400)]
pan/bi: Implement bi_spill_register
Given a node to spill, insert the appropriate loads and stores to spill
it.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Alyssa Rosenzweig [Thu, 15 Oct 2020 00:36:21 +0000 (20:36 -0400)]
pan/bi: Add helpers for working with singletons
Clauses with exactly one instruction (not canonical terminology to my
knowledge, but the notation is suggestive). Since these are isomorphic
to the instructions themselves, we want helpers to go between the forms.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Alyssa Rosenzweig [Thu, 15 Oct 2020 00:35:59 +0000 (20:35 -0400)]
pan/bi: Add bi_rewrite_index_src_single helper
Ported from Midgard.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Alyssa Rosenzweig [Wed, 14 Oct 2020 23:27:47 +0000 (19:27 -0400)]
pan/bi: Add bi_fill
Likewise generates LOAD from tls.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Alyssa Rosenzweig [Wed, 14 Oct 2020 23:26:58 +0000 (19:26 -0400)]
pan/bi: Add bi_spill helper
Generates STORE to TLS.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Alyssa Rosenzweig [Wed, 14 Oct 2020 23:14:43 +0000 (19:14 -0400)]
pan/bi: Add spills/fills parameters
For future shader-db integration.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Alyssa Rosenzweig [Wed, 14 Oct 2020 22:59:33 +0000 (18:59 -0400)]
pan/bi: Implement bi_choose_spill_node
Simplified from Midgard.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Alyssa Rosenzweig [Wed, 14 Oct 2020 22:57:20 +0000 (18:57 -0400)]
pan/bi: Add no_spill flag to IR
Will be used to prevent double spills.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Alyssa Rosenzweig [Wed, 14 Oct 2020 22:53:59 +0000 (18:53 -0400)]
pan/bi: Stub spilling
Like Midgard.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Alyssa Rosenzweig [Thu, 15 Oct 2020 01:23:00 +0000 (21:23 -0400)]
pan/bi: Fix handling of small constants in bi_lookup_constant
Streamline the logic and the bug goes away.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Alyssa Rosenzweig [Thu, 15 Oct 2020 01:16:10 +0000 (21:16 -0400)]
pan/bi: Drop 64-bit constant support
We don't support 64-bit clauses and don't intend to (v6 only, v7 doesn't
support them) so this is irrelevant.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Alyssa Rosenzweig [Thu, 15 Oct 2020 00:38:43 +0000 (20:38 -0400)]
pan/mdg: Cleanup mir_rewrite_index_src_single
Use idiomatic iterator.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Alyssa Rosenzweig [Thu, 15 Oct 2020 01:27:40 +0000 (21:27 -0400)]
panfrost: Drop panfrost_vt_emit_shared_memory
Let's reuse the same routines across Midgard/Bifrost so we get proper
handling of spilling.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Alyssa Rosenzweig [Thu, 15 Oct 2020 01:09:48 +0000 (21:09 -0400)]
panfrost: Use canonical characterization of tls_size
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Boris Brezillon [Sun, 18 Oct 2020 08:53:57 +0000 (10:53 +0200)]
panfrost: Get rid of the non-native wallpering bits
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Boris Brezillon [Sun, 18 Oct 2020 08:38:52 +0000 (10:38 +0200)]
panfrost: Use native wallpapering on Bifrost
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Boris Brezillon [Sun, 18 Oct 2020 08:37:13 +0000 (10:37 +0200)]
panfrost: Add support for native wallpapering on Bifrost
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Boris Brezillon [Sun, 18 Oct 2020 08:34:28 +0000 (10:34 +0200)]
panfrost: Split panfrost_load_midg()
It makes it easier to read and will allow re-using common bits for
the bifrost reload logic.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Boris Brezillon [Sun, 18 Oct 2020 08:27:48 +0000 (10:27 +0200)]
panfrost: Pass the texture payload through a panfrost_ptr
We want to be able to pass a payload allocated from the pool, so let's
change the function prototype to allow that.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Alyssa Rosenzweig [Wed, 21 Oct 2020 20:00:54 +0000 (16:00 -0400)]
panfrost: Rename gtransfer to transfer
Now that panfrost_transfer is renamed to panfrost_ptr.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Boris Brezillon [Sun, 18 Oct 2020 08:13:18 +0000 (10:13 +0200)]
panfrost: Rename panfrost_transfer to panfrost_ptr
And use it in panfrost_bo to store a GPU/CPU pointer tuple.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Boris Brezillon [Sun, 18 Oct 2020 07:47:45 +0000 (09:47 +0200)]
panfrost: Use real name for attribute's unknown field
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Boris Brezillon [Sat, 17 Oct 2020 12:02:50 +0000 (14:02 +0200)]
panfrost: Build blit shaders on Bifrost too
Now that the compiler has been patched to support all the instructions
used by blit shaders we can compile them unconditionally.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Boris Brezillon [Sat, 17 Oct 2020 10:08:17 +0000 (12:08 +0200)]
panfrost: Make {midgard,bifrost}_compile_shader_nir() return a program object
Letting the caller zero-initialize the program object is error prone,
not to mention that resources attached to the program might not be freed
by the caller. Let's simplify that by letting the compiler allocate the
panfrost_program object. Those objects should be freed with ralloc_free().
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Boris Brezillon [Sat, 17 Oct 2020 09:32:41 +0000 (11:32 +0200)]
pan/bi: Add basic support for txf_ms
We currently don't support txf_ms instructions specifying a texel offset
src.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Boris Brezillon [Sat, 17 Oct 2020 09:30:05 +0000 (11:30 +0200)]
pan/bi: Support the case where TEXC needs 0 or 1 staging reg
No need to add a COMBINE instruction if TEXC only needs zero or one
staging reg.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Boris Brezillon [Sat, 17 Oct 2020 09:24:17 +0000 (11:24 +0200)]
pan/bi: Add support for load_sample_id
Sample ID is preloaded in r61.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Boris Brezillon [Sat, 17 Oct 2020 09:22:56 +0000 (11:22 +0200)]
pan/bi: Print blend descriptor source properly
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Boris Brezillon [Sat, 17 Oct 2020 09:19:42 +0000 (11:19 +0200)]
pan/bi: Make sure we don't print special index as a register
index can have both a SPECIAL flag and PAN_IS_REG (bit 0) set, but we
shouln't treat the index as a register in that case. Let's bail out
early in bi_print_dest_index() when we're passed a special index
that's not a register.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Boris Brezillon [Sat, 17 Oct 2020 09:13:44 +0000 (11:13 +0200)]
panfrost: Replace unkown renderer state fields by their real names
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Boris Brezillon [Sat, 17 Oct 2020 09:02:12 +0000 (11:02 +0200)]
panfrost: Add specialized preload descriptors
It's just easier to identify the different layouts this way.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Boris Brezillon [Sat, 17 Oct 2020 08:55:09 +0000 (10:55 +0200)]
panfrost: Add the bifrost tiler internal state field
The internal state is updated every time a tiler job is executed, and
pandecode complains that unused bits are not zero-ed when that happens.
Define the internal state (not meant to be set by the driver) to remove
those spurious errors.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Boris Brezillon [Sat, 17 Oct 2020 08:51:24 +0000 (10:51 +0200)]
panfrost: Fix tiler job injection
When injecting a tiler job, we shouln't make it depend on the last tiler
job, but instead make the first tiler job depend on it.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Boris Brezillon [Tue, 13 Oct 2020 16:32:14 +0000 (18:32 +0200)]
panfrost: Adjust the renderer state definition
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
Connor Abbott [Wed, 30 Sep 2020 09:02:35 +0000 (11:02 +0200)]
freedreno/a6xx: Implement user clip/cull distances
Also, plumb things through ir3 so that we don't lower clip planes to
discard anymore.
This seems to fix some artifacts in the neverball trace.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6959>
Connor Abbott [Thu, 24 Sep 2020 14:04:18 +0000 (16:04 +0200)]
tu: Implement clip/cull distances
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6959>
Connor Abbott [Thu, 24 Sep 2020 14:01:54 +0000 (16:01 +0200)]
ir3: Handle clip+cull distances
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6959>
Connor Abbott [Thu, 24 Sep 2020 14:24:55 +0000 (16:24 +0200)]
ir3: Switch tess lowering to use location
Clip & cull distances, which are compact arrays, exposed a lot of holes
because they can take up multiple slots and partially overlap.
I wanted to eliminate our dependence on knowing the layout of the
variables, as this can get complicated with things like partially
overlapping arrays, which can happen with ARB_enhanced_layouts or with
clip/cull distance arrays. This means no longer changing the layout
based on whether the i/o is part of an array or not, and no longer
matching producer <-> consumer based on the variables. At the end of the
day we have to match things based on the user-specified location, so for
simplicity this switches the entire i/o handling to be based off the
user location rather than the driver location. This means that the
primitive map may be a little bigger, but it reduces the complexity
because we never have to build a table mapping user location to driver
location, and it reduces the amount of work done at link time in the SSO
case. It also brings us closer to what the other drivers do.
While here, I also fixed the handling of component qualifiers, which was
another thing broken with clip/cull distances.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6959>
Connor Abbott [Thu, 24 Sep 2020 13:23:58 +0000 (15:23 +0200)]
nir/lower_clip_cull: Store array size for FS inputs
I think the rationale for not setting the size for inputs is that
when passed between geometry stages the clip and cull distances are
supposed to be treated like any other varying. However, this isn't 100%
the case for the FS, since when it's read by the FS it's also used by
the fixed-function stage. In freedreno we setup varying locations when
compiling the FS, and then tack on VS-only outputs like gl_Position at
the end. Furthermore there's code to compact input locations based on
what's actually read. But this compaction can't happen for clip and cull
distances, because then we won't have space for components that are only
read by the clipper. So, we need to know the original number of
components for both arrays. Modify this pass so that we don't have to go
digging around for it ourselves.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6959>
Tapani Pälli [Fri, 23 Oct 2020 10:25:39 +0000 (13:25 +0300)]
iris: fix the order of src and dst for fence memcpy
This fixes random failures with "deqp-egl --deqp-case=*multithread*":
iris: Failed to submit batchbuffer: No such file or directory
Fixes:
6b1a56b908e ("iris: Drop stale syncobj references in fence_server_sync")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7289>
Andrii Simiklit [Mon, 31 Aug 2020 12:09:43 +0000 (15:09 +0300)]
nir: get rid of OOB dereferences in nir_lower_io_arrays_to_elements
This patch fixes mesa compiler crash in i965 on shaders like the following one:
```
in VS_OUTPUT {
mat4 data;
} vs_output;
out vec4 fs_output;
vec4 convert(in float val) {
return vec4(val);
}
void main()
{
fs_output = vec4(0.0);
for (int a = -1; a < 5; a++) {
for (int b = -1; b < 5; b++) {
fs_output += convert(vs_output.data[b][a]);
}
}
}
```
Section 5.11 (Out-of-Bounds Accesses) of the GLSL 4.60 spec says:
In the subsections described above for array, vector, matrix and
structure accesses, any out-of-bounds access produced undefined
behavior....
Out-of-bounds reads return undefined values, which
include values from other variables of the active program or zero.
Out-of-bounds writes may be discarded or overwrite
other variables of the active program.
GL_KHR_robustness and GL_ARB_robustness encourage us to return zero
for reads.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6560>
Samuel Pitoiset [Mon, 19 Oct 2020 16:37:26 +0000 (18:37 +0200)]
radv: replace RADV_TRACE_FILE by RADV_DEBUG=hang
The trace file will be dumped as part of the hang report into
$HOME/radv_dumps_<pid>/trace.log if a GPU hang is detected.
The old and famous RADV_TRACE_FILE envvar is now deprecated.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7233>
Samuel Pitoiset [Tue, 20 Oct 2020 09:40:09 +0000 (11:40 +0200)]
radv: re-order GPU hang report dumps by usefulness
In case the GPU recover, it's probably better to dump useful info
first.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7233>
Samuel Pitoiset [Mon, 19 Oct 2020 15:56:14 +0000 (17:56 +0200)]
radv: dump GPU hang report logs into $HOME/radv_dumps_<pid>
This creates a directory and save various logs (dmesg, umr,
pipeline, gpu info, etc) instead of printing stuff to stdout/stderr.
This dumps the following files when a GPU hang is detected:
- dmesg.log
- gpu_info.lo
- options.log
- pipeline.log (shaders including SPIR-V if spirv-dis found)
- registers.log
- trace.log
- vm_fault (if a VM fault is detected)
- umr_ring.log (if UMR found)
- umr_waves.log (if UMR found)
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7233>
Samuel Pitoiset [Mon, 19 Oct 2020 14:38:26 +0000 (16:38 +0200)]
radv: dump UMR ring and waves into the hang report
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3620
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7233>
Samuel Pitoiset [Mon, 19 Oct 2020 14:38:13 +0000 (16:38 +0200)]
radv: add radv_dump_cmd() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7233>
Samuel Pitoiset [Mon, 19 Oct 2020 14:11:25 +0000 (16:11 +0200)]
ac: add an option to dump GPU info to a file
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7233>
Iago Toral Quiroga [Thu, 22 Oct 2020 08:58:16 +0000 (10:58 +0200)]
v3dv: properly describe swap_color_rb
This key field is only used for V3D versions before 4.1, so it
should not be set for v3dv. Also, it is a mask not a boolean.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7271>
Iago Toral Quiroga [Thu, 22 Oct 2020 08:48:22 +0000 (10:48 +0200)]
v3dv: compute swap_rb flag after applying all swizzles
We were computing this too early based on the view's format alone
which is not correct, since we need to consider the view's swizzle
as well.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7271>
Iago Toral Quiroga [Thu, 22 Oct 2020 08:40:57 +0000 (10:40 +0200)]
v3d/compiler: fix BGRA vertex attributes for vec2/float size.
We don't natively support BGRA format, instead we handle these
as RGBA and we lower the loads to swap components R and B.
However, the driver emits VPM loads based on the size of the
input variables so when we have a vec2 or float BGRA input,
it would only emit VPM loads for components 0 and 1, which is
not correct since we emit a load of component 2 to swap with
component 0.
v2: handle GL legacy vertex inputs gracefully.
Fixes:
dEQP-VK.draw.output_location.array.b8g8r8a8-unorm-highp-output-vec2
dEQP-VK.draw.output_location.array.b8g8r8a8-unorm-mediump-output-vec2
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7271>
Iago Toral Quiroga [Thu, 22 Oct 2020 08:37:15 +0000 (10:37 +0200)]
broadcom/cle: fix vec size dump when set to 0
There are two bits for the vector size of a vertex input, with the
value 0 meaning 4 components. The CLE decoder seems to try and dump
"4" instead of "0" is to be a bit more user friendly, but it had an
off-by-one error that would cause it to dump "2" instead.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7271>
Vinson Lee [Wed, 21 Oct 2020 00:25:44 +0000 (17:25 -0700)]
glsl: Initialize lower_shared_reference_visitor members.
Fix defects reported by Coverity Scan.
Uninitialized scalar field (UNINIT_CTOR)
uninit_member: Non-static class member buffer_access_type is not
initialized in this constructor nor in any functions that it
calls.
uninit_member: Non-static class member progress is not initialized
in this constructor nor in any functions that it calls.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7243>
Thong Thai [Thu, 22 Oct 2020 01:54:57 +0000 (21:54 -0400)]
frontends/va: Return P010/P016 as possible surface formats when encoding
When gstreamer's vaapih265enc queries for possible surface formats, it
only queries using VA_RT_FORMAT_YUV420, so add P010 and P016 as possible
surface formats to enable 10-bit/16-bit encoding.
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7268>
Aníbal Limón [Wed, 14 Oct 2020 19:45:20 +0000 (14:45 -0500)]
src/util/disk_cache_os.c: Add missing headers for open/fcntl
Fixes, strict musl build [1],
...
17:25:31 ../git/src/util/disk_cache_os.c: In function 'disk_cache_load_item':
17:25:31 ../git/src/util/disk_cache_os.c:526:9: error: implicit declaration of function 'open'; did you mean 'popen'? [-Werror=implicit-function-declaration]
17:25:31 526 | fd = open(filename, O_RDONLY | O_CLOEXEC);
17:25:31 | ^~~~
17:25:31 | popen
17:25:31 ../git/src/util/disk_cache_os.c:526:24: error: 'O_RDONLY' undeclared (first use in this function)
17:25:31 526 | fd = open(filename, O_RDONLY | O_CLOEXEC);
17:25:31 | ^~~~~~~~
17:25:31 ../git/src/util/disk_cache_os.c:526:24: note: each undeclared identifier is reported only once for each function it appears in
17:25:31 ../git/src/util/disk_cache_os.c:526:35: error: 'O_CLOEXEC' undeclared (first use in this function); did you mean 'MFD_CLOEXEC'?
17:25:31 526 | fd = open(filename, O_RDONLY | O_CLOEXEC);
17:25:31 | ^~~~~~~~~
17:25:31 | MFD_CLOEXEC
17:25:31 ../git/src/util/disk_cache_os.c: In function 'disk_cache_write_item_to_disk':
17:25:31 ../git/src/util/disk_cache_os.c:666:28: error: 'O_WRONLY' undeclared (first use in this function)
17:25:31 666 | fd = open(filename_tmp, O_WRONLY | O_CLOEXEC | O_CREAT, 0644);
17:25:31 | ^~~~~~~~
17:25:31 ../git/src/util/disk_cache_os.c:666:39: error: 'O_CLOEXEC' undeclared (first use in this function); did you mean 'MFD_CLOEXEC'?
17:25:31 666 | fd = open(filename_tmp, O_WRONLY | O_CLOEXEC | O_CREAT, 0644);
17:25:31 | ^~~~~~~~~
17:25:31 | MFD_CLOEXEC
17:25:31 ../git/src/util/disk_cache_os.c:666:51: error: 'O_CREAT' undeclared (first use in this function)
17:25:31 666 | fd = open(filename_tmp, O_WRONLY | O_CLOEXEC | O_CREAT, 0644);
17:25:31 | ^~~~~~~
17:25:31 ../git/src/util/disk_cache_os.c:705:30: error: 'O_RDONLY' undeclared (first use in this function)
17:25:31 705 | fd_final = open(filename, O_RDONLY | O_CLOEXEC);
17:25:31 | ^~~~~~~~
17:25:31 ../git/src/util/disk_cache_os.c: In function 'disk_cache_mmap_cache_index':
17:25:31 ../git/src/util/disk_cache_os.c:902:20: error: 'O_RDWR' undeclared (first use in this function)
17:25:31 902 | fd = open(path, O_RDWR | O_CREAT | O_CLOEXEC, 0644);
17:25:31 | ^~~~~~
17:25:31 ../git/src/util/disk_cache_os.c:902:29: error: 'O_CREAT' undeclared (first use in this function)
17:25:31 902 | fd = open(path, O_RDWR | O_CREAT | O_CLOEXEC, 0644);
17:25:31 | ^~~~~~~
17:25:31 ../git/src/util/disk_cache_os.c:902:39: error: 'O_CLOEXEC' undeclared (first use in this function); did you mean 'MFD_CLOEXEC'?
17:25:31 902 | fd = open(path, O_RDWR | O_CREAT | O_CLOEXEC, 0644);
17:25:31 | ^~~~~~~~~
17:25:31 | MFD_CLOEXEC
17:25:31 cc1: some warnings being treated as errors
...
[1] https://ci.linaro.org/job/lt-qcom-openembedded-meta-qcom-master-premerge/MACHINE=qrb5165-rb5,TCLIBC=musl,label=docker-buster-amd64/87/console
Signed-off-by: Aníbal Limón <anibal.limon@linaro.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7146>
Sagar Ghuge [Fri, 24 Apr 2020 17:41:42 +0000 (10:41 -0700)]
anv: Enable stencil buffer compression on Gen12+
v2: (Nanley Chery)
- Fix condition check.
- Move aux_usage assignment after add_aux_state_tracking_buffer method.
v3: (Nanley Chery)
- Move stencil condition close to depth block.
v4: (Nanley Chery)
- Add DEBUG_NO_RBC condition.
v5: (Nanley Chery)
- Don't add CCS plane explicitly.
- Use isl_surf_supports_ccs.
v6:
- Simplify condition (Nanley Chery)
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2942>
Sagar Ghuge [Wed, 18 Mar 2020 23:10:39 +0000 (16:10 -0700)]
anv: Pass correct stencil aux usage during MSAA resolve
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2942>
Sagar Ghuge [Fri, 24 Apr 2020 17:33:27 +0000 (10:33 -0700)]
anv: Return optimal aux state for stencil buffer compression
v2:
- Assert on aux_supported. (Nanley Chery)
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2942>
Sagar Ghuge [Mon, 18 Nov 2019 20:47:10 +0000 (12:47 -0800)]
anv: Don't track clear bo for stencil buffer compression
On Gen12+, stencil buffer compression does not support fast clear so we
don't have to track clear address for it.
v2:
- Use isl_aux_usage_has_fast_clears (Nanley Chery)
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2942>
Sagar Ghuge [Fri, 24 Apr 2020 17:09:45 +0000 (10:09 -0700)]
anv: Get aux usage from plane while clearing stencil buffer
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2942>
Sagar Ghuge [Mon, 18 Nov 2019 20:41:13 +0000 (12:41 -0800)]
anv: Set stencil_aux_usage flag
v2: Use image aux usage (Nanley Chery)
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2942>
Sagar Ghuge [Mon, 18 Nov 2019 19:21:14 +0000 (11:21 -0800)]
anv: Handle compressed stencil buffer transition on Gen12+
Handle compressed stencil buffer transition from one layout to another
on gen12+.
When stencil compression is enabled, we have to initialize buffer via
stencil clear (HZ_OP) before any renderpass.
v2:
- Pass predicate bit false to anv_image_ccs_op (Nanley Chery)
v3:
- update aspect assertion (Nanley Chery)
v4:
- Make state decision based on anv_layout_to_aux_state instated of
anv_layout_to_aux_usage (Sagar Ghuge)
v5:
- No need to handle stencil CCS resolve case (Jason Ekstrand)
- Initialize buffer using HZ_OP (Nanley Chery)
v6: (Nanley Chery)
- Pass correct layer/level count.
- Remove local variable.
v7:
- Skip stencil initialization with HZ_OP packet if followed by fast
clear. (Nanley Chery)
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2942>
Sagar Ghuge [Tue, 13 Oct 2020 02:12:39 +0000 (19:12 -0700)]
anv: Return number of layers/levels attached to anv_image
Don't check the auxiliary surface's ISL surf in order to return the
surface levels/layers instead we can return the anv_image parameter.
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2942>
Ian Romanick [Sat, 20 Jun 2020 21:33:57 +0000 (14:33 -0700)]
nir: Rename replicated-result dot-product instructions
All these instructions replicate the result of a N-component dot-product
to a vec4. Naming them fdot_replicatedN gives the impression that are
some sort of abstract dot-product that replicates the result to a vecN.
They also deviate from fdph_replicated... which nobody would reasonably
consider naming fdot_replicatedh.
Naming these opcodes fdotN_replicated more closely matches what they
are, and it matches the pattern of fdph_replicated.
I believe that the only reason these opcodes were named this way was
because it simplified the implementation of the binop_reduce function in
nir_opcodes.py. I made some fairly simple changes to that function, and
I think the end result is ok.
The bulk of the changes come from the sed rename:
sed --in-place -e 's/fdot_replicated\([234]\)/fdot\1_replicated/g' \
$(grep -r 'fdot_replicated[234]' src/)
v2: Use a named parameter to binop_reduce instead of using
isinstance(name, str). Suggested by Jason.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5725>
Jan Beich [Wed, 21 Oct 2020 17:32:02 +0000 (17:32 +0000)]
spirv: switch to util_bswap32 to improve portability
`bswap_32` and `<byteswap.h>` aren't available on BSDs. Instead the
same function is spelled slightly different and is provided by
different header file. However, Mesa provides `util_bswap32` to avoid
complicated conditionals.
Fixes:
fb6b243c113a ("spirv: Support big-endian strings")
Tested-by: Piotr Kubaj <pkubaj@FreeBSD.org>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7257>
Eric Anholt [Thu, 22 Oct 2020 16:29:18 +0000 (09:29 -0700)]
ci: Add the new timeout-prone softpipe-gl test to the skips list.
The NIR path does a whole lot more work on this testcase and we often time
out, even after the NIR validation speedup.
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7279>
Eric Anholt [Wed, 21 Oct 2020 18:47:45 +0000 (11:47 -0700)]
docs: Fix "Hosted by" link and drop duplicate.
We had two links to planet.fdo, with "Hosted by" incorrectly pointing to
it instead of the top-level "what is fdo".
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7258>
Eric Anholt [Wed, 21 Oct 2020 17:13:32 +0000 (10:13 -0700)]
docs: Add a link to the linux kernel DRM docs under "Developer Topics"
It's a great source of documentation and replaces a lot of the stale
content on the DRI wiki.
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7258>
Eric Anholt [Wed, 21 Oct 2020 16:50:48 +0000 (09:50 -0700)]
docs: Drop extra link to old DRI wiki in the "Help" section.
It's at the bottom under "Links" still, but if you're looking for help
this old wiki is probably not going to help you.
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7258>
Michel Dänzer [Fri, 2 Oct 2020 13:55:05 +0000 (15:55 +0200)]
loader/dri3: Allocate up to 4 back buffers for page flips
With swap interval 0, i.e. sync-to-vblank disabled.
This can be necessary for unthrottled drawing with Xwayland:
1) One buffer can be scanned out
2) One buffer can be pending in the kernel for a page flip
3) One buffer can be pending in the Wayland compositor
Therefore, with 3 buffers, the frame-rate could be capped much lower
than the throughput the GPU is capable of, in the worst case at the
Wayland compositor refresh rate.
(The native Wayland EGL backend always uses up to 4 buffers)
Leave the maximum number of buffers at 3 for swap interval != 0, it's
sufficient in that case to always be able to queue one frame ahead of
time.
https://gitlab.gnome.org/GNOME/mutter/-/issues/1455
https://gitlab.gnome.org/GNOME/mutter/-/issues/1462
Cc: mesa-stable
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7033>
Michel Dänzer [Tue, 6 Oct 2020 15:52:08 +0000 (17:52 +0200)]
loader/dri3: Keep current number of back buffers if frame was skipped
We'd previously take the copy path. If we were actually flipping (in
which case skipped frames are more likely to occur), we'd ping-pong
between a smaller and larger number of back buffers, and frame-rate
could vary / take a dip due to the buffer management overhead.
While I'm not sure this is actually possible to hit at this point, it
definitely will be with the next change.
Cc: mesa-stable
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7033>
Michel Dänzer [Fri, 2 Oct 2020 13:20:17 +0000 (15:20 +0200)]
loader/dri3: Only allocate additional buffers if needed
Previously, we would always allocate 3 buffers for page flipping. But 2
buffers can suffice for clients which always wait for buffer swaps to
complete before starting a new frame.
Therefore, keep track of the maximum number of buffers separately from
the current number, and only bump the latter if both current buffers are
busy.
Cc: mesa-stable
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7033>
Lionel Landwerlin [Tue, 29 Sep 2020 07:55:35 +0000 (10:55 +0300)]
anv: fix source/destination layers for 3D blits
When blitting from source depth range [0-3] into destination depth
range [0-2], we'll have to use a source layer that is in between 2
layers of the 3D source image.
Other than having an incorrect formula, we're also using integer which
prevent us from using the right source layer.
v2: Drop + 0.5 on application offsets
v3: Reuse num_layers (Jason)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3458
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6909>
Lionel Landwerlin [Tue, 15 Sep 2020 18:40:51 +0000 (21:40 +0300)]
blorp: allow blits with floating point source layers
The current blorp API only allows source layers for 3D images to be
integers. That is causing problems with the Vulkan API where we need
to be able to use a 3D layer that could be in between 2 layers.
This change allows a floating point value to be passed for blits and
internally sets up the input parameters to pass floating point values
to kernels.
v2: Use tex op to determinate what types are the coordinates (Jason)
Drop setting params->z (Lionel)
v3: Fix nir_texop_txf_ms_mcs op not considered as having integer coords (Lionel)
v4: Fix incorrect test on nir_texop_txf_ms_mcs (Ivan)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3458
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6909>
Lionel Landwerlin [Tue, 29 Sep 2020 07:54:07 +0000 (10:54 +0300)]
blorp: identify copy kernels in NIR
This was useful in identifying blit vs copy kernels.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6909>
Samuel Pitoiset [Wed, 14 Oct 2020 08:01:58 +0000 (10:01 +0200)]
ac/nir: abort when an unknown intrinsic is reached
This would have catched this NIR GS lowering regression earlier.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7127>
Samuel Pitoiset [Thu, 22 Oct 2020 06:50:23 +0000 (08:50 +0200)]
ac/nir: ignore set_vertex_and_primitive_count intrinsic
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7269>
Gert Wollny [Wed, 21 Oct 2020 22:36:13 +0000 (00:36 +0200)]
compile/nir: Correct printing dest_type
Fixes:
0aa08ae2f673a36709c5485679d4c89a747ec0e9
nir: Split NIR_INTRINSIC_TYPE into separate src/dest indices
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7261>
Samuel Pitoiset [Wed, 21 Oct 2020 16:25:56 +0000 (18:25 +0200)]
aco: fix determining if LOD is zero for nir_texop_txf/nir_texop_txs
txf/txs expects LOD to be a 32-bit unsigned integer while other
texture operations expects a float.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3668
Fixes:
93c8ebfa780 ("aco: Initial commit of independent AMD compiler")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7256>
projects / platform / upstream / mesa.git / log