Simon Goldschmidt [Mon, 21 Jan 2019 09:07:55 +0000 (10:07 +0100)]
tests: dtoc: adapt tests to changed dtoc output
The dtoc tests need to be adapted to dtoc being changed to output platdata
structs as const, which has been introduced in commit
7d05d3a8e35f ("dtoc:
make generated platdata structs const").
Fixes:
7d05d3a8e35f ("dtoc: make generated platdata structs const")
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Greg Czerniak [Mon, 21 Jan 2019 04:51:26 +0000 (23:51 -0500)]
atmel: add CMD_FS_GENERIC to SAMA5D3 for EFI boot
I'm working on getting OpenBSD to run on the Atmel SAMA5D3 Xplained.
OpenBSD uses an EFI bootloader, which requires the "load" command to
work, since "fatload" doesn't initialize the EFI memory addresses
properly. To get "load" on the SAMA5D3 version of U-Boot, I propose
adding the CONFIG_CMD_FS_GENERIC option.
Signed-off-by: Greg Czerniak <greg@czerniak.info>
Angelo Dureghello [Sat, 19 Jan 2019 09:40:38 +0000 (10:40 +0100)]
drivers: esdhc: add support for ColdFire mcf5441x family
This patch has been tested on the mcf54415-based stmark2
board. The eSDHC driver works reliably using DMA mode.
Signed-off-by: Angelo Dureghello <angelo@sysam.it>
Sam Protsenko [Fri, 18 Jan 2019 19:19:04 +0000 (21:19 +0200)]
env: Fix saving environment to "bad CRC" location
In case when the environment on some location is malformed (CRC isn't
matching), there is a chance we won't be able to save the environment to
that location. For example, consider the case when we only have the
environment on eMMC, but it's zeroed out. In that case, we won't be able
to "env save" to it, because of "bad CRC" error. That's happening
because in env_load() function we consider malformed environment as
incorrect one, and defaulting to the location with highest (0)
priority, which can be different from one we are dealing with right now
(e.g., highest priority can be ENV_FAT on SD card, which is not
inserted, but we want to use ENV_MMC on eMMC, where we were booted
from).
This issue began to reproduce after commit
d30ba2315ae3 ("u-boot: remove
driver lookup loop from env_save()") on BeagleBone Black, but that
commit didn't introduce the wrong logic, it just changed the behavior
for default location to use, merely revealing this issue.
To fix that, let's implement next logic in env_load():
1. Try to find out correct environment; if found -- use it
2. If working environment wasn't found, but we found malformed one
(with bad CRC), let's use it for further "env save". But make sure
to use malformed environment location with highest priority.
3. If neither correct nor malformed environment was found, let's
default to environment location with highest priority (0)
Steps to reproduce mentioned issue on BeagleBone Black (fixed in this
patch):
1. Boot from SD card and erase eMMC in U-Boot shell:
=> mmc dev 1
=> mmc erase 0 100000
=> gpt write mmc 1 $partitions
2. Write new SPL and U-Boot to eMMC; the rest of eMMC will stay filled
with zeroes
3. Boot from eMMC; try to do:
=> env save
4. Observe the error (incorrect behavior). Correct behavior: environment
should be stored correctly on eMMC, in spite of it has "bad CRC"
Fixes:
d30ba2315ae3 ("u-boot: remove driver lookup loop from env_save()")
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Sam Protsenko [Fri, 18 Jan 2019 19:19:03 +0000 (21:19 +0200)]
env: common: Return specific error code on bad CRC
Callers of env_import*() functions might want to check the case when we
have incorrect environment (with bad CRC). For example, when environment
location is being defined in env_load(), call chain may look like this:
env_load() -> drv->load() = env_mmc_load() -> env_import()
Return code will be passed from env_import() all way up to env_load().
Right now both env_mmc_load() and env_import() return -EIO error code,
so env_load() can't differentiate between two cases:
1. Driver reports the error, because device is not accessible
2. Device is actually accessible, but environment is broken
Let's return -ENOMSG in env_import(), so we can distinguish two cases
mentioned above. It will make it possible to continue working with "bad
CRC" environment (like doing "env save"), instead of considering it not
functional (implemented in subsequent patch).
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Marcin Niestroj [Fri, 18 Jan 2019 16:35:42 +0000 (17:35 +0100)]
ARM: chiliboard: enable DM_SPI
Add DM_SPI to suppress build warning about dm conversion.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Robert P. J. Day [Fri, 18 Jan 2019 13:41:23 +0000 (08:41 -0500)]
Makefile: have "make distclean" remove CHANGELOG
Ensure that "make distclean" deletes an existing CHANGELOG file.
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Andrew F. Davis [Thu, 17 Jan 2019 19:43:05 +0000 (13:43 -0600)]
ARM: mach-omap2: Kconfig: Allow OMAP5 devices to set entry point
Like AM33xx and AM43xx, DRA7xx and AM57xx devices may need to
have an non-standard boot address in memory. This may be due
to the device being a high security variant, which place the
Initial SoftWare (ISW) after certificates and secure software.
Allow these devices to set this from Kconfig.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Andrew F. Davis [Thu, 17 Jan 2019 19:43:04 +0000 (13:43 -0600)]
dfu: Remove dependency on HUSH parser in SPL
CLI support with the HUSH parser is not currently SPL safe due to it's
use of realloc. That function is not defined for SPLs that use
SYS_MALLOC_SIMPLE. CLI support can be built in to SPL and some functions
do work, but use of some like run_command() will cause build to fail.
When no SPL code calls this function build works as the compiler removes
this unreachable code so the unresolved symbols are ignored.
If DFU support is enabled in SPL then MMU DFU support may get brought in
also, this code does make a call to run_command() causing build to fail
if the HUSH parser is not built-in. To break this odd and unneeded
dependency chain we use CONFIG_IS_ENABLED where appropriate to prevent
calls into HUSH code from SPL. This also removes our need to pull in the
rather unrelated source file when SPL_DFU is defined.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Andrew F. Davis [Thu, 17 Jan 2019 19:43:03 +0000 (13:43 -0600)]
dfu: Make DFU support more SPL friendly
Do this by using $(SPL_) in Makefiles and CONFIG_IS_ENABLED in C code.
This ensures the files and features are only built into the right build
for which they are enabled. Using the macros to simplify this patch was
made possible by the config symbol rename done in the last patch.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
Andrew F. Davis [Thu, 17 Jan 2019 19:43:02 +0000 (13:43 -0600)]
spl: Kconfig: Drop the _SUPPORT postfix from SPL_DFU
The symbol CONFIG_SPL_DFU_SUPPORT in SPL build has the same
meaning as CONFIG_DFU in regular U-Boot. Drop the _SUPPORT
to allow for cleaner use in code.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
Fabien Parent [Thu, 17 Jan 2019 17:06:01 +0000 (18:06 +0100)]
mmc: mtk-sd: fix SPL compilation when GPIO=y and SPL_GPIO=n
It is not possible to link the SPL image when CONFIG_GPIO is enabled
but CONFIG_SPL_GPIO is not. Use the IS_ENABLED macro instead to
correctly check whether CONFIG_{SPL_}GPIO is enabled.
This commit fixes the following errors:
* undefined reference to `dm_gpio_get_value
* undefined reference to `gpio_request_by_name'
Signed-off-by: Fabien Parent <fparent@baylibre.com>
[trini: Move guard to fix warning in msdc_ops_get_wp()]
Signed-off-by: Tom Rini <trini@konsulko.com>
Fabien Parent [Thu, 17 Jan 2019 17:06:00 +0000 (18:06 +0100)]
mmc: mtk-sd: fix possible incomplete read ops
The code is checking for incomplete read when it see the INT_XFER_COMPL
flag, but it forget to first check whether there is anything left in the
FIFO to copy to the RX buffer. This means that sometimes we will get
errors because of erroneous incomplete read operation.
This commit fixes the driver re-ordering the code so that we first
check for data inside the RX fifo and only after check the status
of the INT_XFER_COMPL flag.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Igor Opaniuk [Thu, 17 Jan 2019 14:37:40 +0000 (16:37 +0200)]
arm64: dt: poplar: add optee node
As Poplar supports running TF-A with OP-TEE as BL32
payload, add op-tee node in DT, which enables usage of
OP-TEE driver (which provides an interface for requesting services
from OP-TEE).
Signed-off-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Shawn Guo [Thu, 17 Jan 2019 04:09:52 +0000 (12:09 +0800)]
poplar: clean up board level mmc initialization code
We have converted mmc to driver model on Poplar. So let's clean up
board level mmc initialization code.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Shawn Guo [Thu, 17 Jan 2019 04:09:51 +0000 (12:09 +0800)]
mmc: hi6220_dw_mmc: add compatible for Poplar support
It adds compatible "hisilicon,hi3798cv200-dw-mshc" for Poplar SoC
Hi3798CV200 to probe this mmc driver.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Shawn Guo [Thu, 17 Jan 2019 04:09:50 +0000 (12:09 +0800)]
poplar: sync up device tree with kernel 4.20
It adds missing pinctrl headers, updates clock header and sync up Poplar
device tree with kernel 4.20 release.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Ramon Fried [Sat, 12 Jan 2019 09:47:28 +0000 (11:47 +0200)]
dts: 820c: Add pinctrl node and uart mux
* Add pinctrl node for TLMM and add mux request for uart node.
* Rename uart to the actual board uart port.
* Fix indentendation of sdhc2 node.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Ramon Fried [Sat, 12 Jan 2019 09:47:27 +0000 (11:47 +0200)]
arm: mach-snapdragon: pinctrl: clarify gpio disable bit
The TLMM_GPIO_ENABLE bit is actually use to disable
the GPIO. change it to TLMM_GPIO_DISABLE so it's clearer.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Ramon Fried [Sat, 12 Jan 2019 09:47:26 +0000 (11:47 +0200)]
configs: dragonboard820c: Enable pinctrl/mux config
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Ramon Fried [Sat, 12 Jan 2019 09:47:25 +0000 (11:47 +0200)]
arm: mach-snapdragon: add pinctrl driver for db820c
Add pinctrl driver for Dragonboard820c, currently with only
one mux func to initialize pins for serial console.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Ramon Fried [Sat, 12 Jan 2019 09:47:24 +0000 (11:47 +0200)]
arm: mach-snapdragon: db820c: Actually init PLL for serial
The PLL for the UART was not set, and relied on previous
initializtion made by LK. add the appropriate initialization.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Stefan Theil [Mon, 7 Jan 2019 09:25:52 +0000 (10:25 +0100)]
cmd: ximg: Invert check for fit image compression
The imgextract command runs a number of checks of
the specified fit. Where it checks for a load address
for compressed images the logic in the expression
is inverted as fit_image_check_comp returns 1 on
success and not 0.
Sean Nyekjær [Fri, 4 Jan 2019 11:37:24 +0000 (11:37 +0000)]
arm: stm32mp1: deploy spl in root folder
Deploy u-boot-spl.stm32 binary in u-boot root folder like
the rest of the boards.
This makes it more streamlined when building in Yocto, Buildroot etc..
Signed-off-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
Tom Rini [Fri, 25 Jan 2019 17:03:31 +0000 (12:03 -0500)]
configs: Migrate CONFIG_DFU_MMC again
A few platforms recently added in CONFIG_DFU_MMC under include/configs
rather than via the defconfig, update them.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 24 Jan 2019 20:30:48 +0000 (15:30 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-sunxi
Tom Rini [Thu, 24 Jan 2019 20:30:06 +0000 (15:30 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-net
Tom Rini [Thu, 24 Jan 2019 20:29:45 +0000 (15:29 -0500)]
Merge tag 'mpc85xx-for-v2019.04-rc1' of git://git.denx.de/u-boot-mpc85xx
mpc85xx config.mk: Add support for -msingle-pic-base
Valentin-catalin Neacsu [Tue, 6 Nov 2018 12:16:54 +0000 (12:16 +0000)]
net: phy: aquantia: Print information on config
Print information about Aquantia system interface and firmware loaded
on the phy.
Signed-off-by: Valentin Catalin Neacsu <valentin-catalin.neacsu@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Valentin-catalin Neacsu [Tue, 30 Oct 2018 09:54:46 +0000 (09:54 +0000)]
net: phy: aquantia: Enable autoneg when on USXGMII
If System Interface protocol is USXGMII then enable USXGMII autoneg
Signed-off-by: Valentin Catalin Neacsu <valentin-catalin.neacsu@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Chris Packham [Mon, 26 Nov 2018 08:00:29 +0000 (21:00 +1300)]
net: remove CONFIG_MCAST_TFTP
No mainline board enables CONFIG_MCAST_TFTP and there have been
compilation issues with the code for some time. Additionally, it has a
potential buffer underrun issue (reported as a side note in
CVE-2018-18439).
Remove the multicast TFTP code but keep the driver API for the future
addition of IPv6.
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Chris Packham [Mon, 26 Nov 2018 08:00:28 +0000 (21:00 +1300)]
net: move ether_crc to tsec driver
ether_crc was added to the core net code in commit
53a5c424bf86
("multicast tftp: RFC2090") so that other drivers could use it. However
the only current user of it is tsec.c so move it there.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Carlo Caione [Wed, 16 Jan 2019 11:34:50 +0000 (11:34 +0000)]
net: phy: realtek: Add functions to read PHY's extended registers
According to the datasheet to access the extended registers we have to:
1. Write Register 31 Data = 0x0XYZ (Page 0xXYZ)
2. Read/Write the target Register Data
3. Write Register 31 Data = 0x0000 or 0xa42 (switch back to IEEE
Standard Registers)
Hook the missing functions so that we can use the `mdio rx/wx` command to
easily access the extended registers.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Ramon Fried [Thu, 27 Dec 2018 17:58:42 +0000 (19:58 +0200)]
net: macb: fix mapping of registers
Some architectures (MIPS) needs mapping to access IOMEM.
Fix that.
Fixes:
f1dcc19b213d ("net: macb: Convert to driver model")
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Aditya Prayoga [Tue, 4 Dec 2018 16:39:23 +0000 (00:39 +0800)]
net: mvneta: Add GPIO configuration support
This patch add GPIO configuration support in mvneta driver.
Driver will handle PHY reset. GPIO pins should be set in device tree.
Ported from mvpp2x
[https://patchwork.ozlabs.org/patch/799654/]
Initial discussion to port the changes into mvneta
[https://patchwork.ozlabs.org/patch/1005765/]
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
Tested-by: Dennis Gilmore <dgilmore@redhat.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Chris Packham [Tue, 4 Dec 2018 06:54:30 +0000 (19:54 +1300)]
net: mvgbe: fallback phy-mode to GMII
Some existing device trees don't specify a phy-mode so fallback to GMII
when a phy-mode is not provided.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Andreas Pretzsch [Thu, 29 Nov 2018 19:04:53 +0000 (20:04 +0100)]
net: phy: micrel: fix KSZ9031 clock skew for values greater 0ps
For KSZ9021, all skew register fields are 4-bit wide.
For KSZ9031, the clock skew register fields are 5-bit wide.
The common code in ksz90x1_of_config_group calculating the combined
register value checks if the requested value is above the maximum
and uses this maximum if so. The calculation of this maximum uses
the register width, but the check itself does not. It uses a hardcoded
value of 0xf, which is too low in case of the 5-bit clock (0x1f).
This detail was probably lost during driver unification.
Effect (only for KSZ9031 clock skews): For values greater 900 (== 0ps),
this silently results in 1860 (== +960ps) instead of the requested one.
Fix the check by using the bit width instead of hardcoded value(s).
Signed-off-by: Andreas Pretzsch <apr@cn-eng.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Simon Goldschmidt [Thu, 22 Nov 2018 16:06:39 +0000 (17:06 +0100)]
net: fix env flags for eth10addr and above
With CONFIG_REGEX enabled, ETHADDR_WILDCARD is set up for up to 10
interfaces (0..9) as the number can only have one digit.
On boards with more than 10 interfaces, this leads to the protection
and format checks being absent for eth10addr and above.
Fix this by changing ETHADDR_WILDCARD from "\\d?" to "\\d*" to allow
more than one digit.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Simon Goldschmidt [Thu, 22 Nov 2018 15:58:32 +0000 (16:58 +0100)]
net: remove duplicate definition of ETHADDR_WILDCARD
ETHADDR_WILDCARD is defined as the same value in both env_flags.h
and env_callback.h
As env_callback.h includes env_flags.h, remove the duplicate definition
from env_callback.h
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Thomas RIENOESSL [Wed, 21 Nov 2018 14:56:07 +0000 (15:56 +0100)]
net: explicitly assign errno to return code in case of network failure
When dealing with two ethernet ports and having "netretry" set
to "once", it could occur that the connection (e.g. an ARP
request) failed, hence the status of the netloop was
"NETLOOP_FAIL". Due to the setting of "netretry", the network
logic would then switch to the other network interface,
assigning "ret" with the return value of "net_start_again()".
If this call succeeded we would return 0 (i.e. success) to
the caller when in reality the network action failed.
Signed-off-by: Thomas RIENOESSL <thomas.rienoessl@bachmann.info>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Baruch Siach [Wed, 21 Nov 2018 11:05:34 +0000 (13:05 +0200)]
net: mvpp2: mdio device per port
Current code forces all ports on a given Ethernet device to use the same
mdio device. In practice different ports might be wired to separate mdio
devices. Move the mdio device from the container struct mvpp2 to the per
port struct mvpp2_port.
Cc: Ken Ma <make@marvell.com>
Cc: Stefan Chulski <stefanc@marvell.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Baruch Siach [Wed, 21 Nov 2018 11:05:33 +0000 (13:05 +0200)]
net: mvpp2: fix lookup of mdio registers base address
Current mdio base lookup code relies on a 'reg' property at the upper CP
node. There is no 'reg' property there in current DT files of Armada
CP110. Use ofnode_get_addr() instead since it provides proper DT address
translation.
Cc: Ken Ma <make@marvell.com>
Cc: Stefan Chulski <stefanc@marvell.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Simon Goldschmidt [Sat, 17 Nov 2018 09:24:42 +0000 (10:24 +0100)]
net: designware: clear padding bytes
Short frames are padded to the minimum allowed size of 60 bytes.
However, the designware driver sends old data in these padding bytes.
It is common practice to zero out these padding bytes ro prevent
leaking memory contents to other hosts.
Fix the padding code to zero out the padded bytes at the end.
Tested on socfpga gen5.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Simon Goldschmidt [Sat, 17 Nov 2018 09:24:41 +0000 (10:24 +0100)]
net: designware: fix tx packet length
The designware driver has a bug in setting the tx length into the dma
descriptor: it always or's the length into the descriptor without
zeroing out the length mask before.
This results in occasional packets being transmitted with a length
greater than they should be (trailer). Due to the nature of Ethernet
allowing such a trailer, most packets seem to be parsed fine by remote
hosts, which is probably why this hasn't been noticed.
Fix this by correctly clearing the size mask before setting the new
length.
Tested on socfpga gen5.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Pankaj Bansal [Fri, 16 Nov 2018 06:26:18 +0000 (06:26 +0000)]
net: phy: Add clause 45 identifier to phy_device
The phy devices can be accessed via clause 22 or via clause 45.
This information can be deduced when we read phy id. if the phy id
is read without giving any MDIO Manageable Device Address (MMD), then
it conforms to clause 22. otherwise it conforms to clause 45.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Tom Rini [Thu, 24 Jan 2019 15:47:05 +0000 (10:47 -0500)]
Merge tag 'xilinx-for-v2019.04' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2019.04
tools:
- Fix zynqmpimage generation
zynq:
- Some configs/Kconfig/DT updates
- Enable REMAKE_ELF and OF_SEPARATE
- Topic boards update
- i2c cleanups and conversion to DM_I2C
zynqmp:
- Some configs/Kconfig/DT updates
- Board config cleanup
- Move arch folder to mach-zynqmp
versal:
- Enable DM_I2C, CMD_DM
zynq-gem:
- Fix driver cache handling
i2c:
- Live tree simple update
phy:
- Fixed phy cleanup
travis:
- Wire Versal SoC
Michal Simek [Tue, 22 Jan 2019 14:47:52 +0000 (15:47 +0100)]
ARM: zynq: Convert Topic Miami to DM_I2C
Both boards have only controllers enabled that's why move to DM_I2C is
easy.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 22 Jan 2019 13:04:20 +0000 (14:04 +0100)]
ARM: zynq: Disable i2c for Zybo/Zybo Z7
There is no i2c connected in base DT that's why disable I2C commands.
Also remove zynq_zybo which is not needed now.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 22 Jan 2019 12:15:46 +0000 (13:15 +0100)]
ARM: zynq: Remove unused GEM addresses
With DM in place there is no need to have GEM addresses in headers. None
is using them.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 22 Jan 2019 12:15:01 +0000 (13:15 +0100)]
arm64: zynqmp: Remove unused GEM addresses
With DM in place there is no need to have GEM addresses in headers. None
is using them.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Anton Gerasimov [Mon, 24 Dec 2018 01:29:04 +0000 (02:29 +0100)]
zynq: Kconfig: extend the bootstrap malloc() pool
Most of the memory is being consumed by device binding code,
more space needed for other data structures.
Z-turn board has already hit the limit, others may follow soon.
Measuring only the memory consumed in device_bind_common, I've got
the following results (in decimal):
root_driver: 108
mod_exp_sw: 108
amba: 120
serial@
e0000000 aka uart0: 112
serial@
e0001000 aka uart1: 88
spi@
e000d000 aka qspi: 120
sdhci@
e0100000 aka mmc0: 455
sdhci@
e0100000.blk: 208
slcr@
f8000000: 96
clkc@100: 72
(total) 1487 = 0x5cf of 0x600
Signed-off-by: Anton Gerasimov <tossel@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Mike Looijmans [Fri, 18 Jan 2019 08:02:48 +0000 (09:02 +0100)]
board: topic-miamiplus: Run IO PLL at 1000 MHz
The miamiplus can use GEM0 through MIO pins, which requires a 125 MHz TX
clock to be generated. With the IO PLL at 1200 MHz this isn't possible, so
change it to run at 1000 and adjust the divisors accordingly. Also set the
GEM0 clock source to MIO instead of EMIO.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Mike Looijmans [Fri, 18 Jan 2019 08:02:47 +0000 (09:02 +0100)]
topic-miamiplus: Run CPU at 800MHz for speedgrade-2
The miamiplus contains a speedgrade-2 device, which may run the CPU at 800MHz.
Change the PLL setting to 800MHz, and adapt the setpoints in the devicetree.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 18 Jan 2019 09:43:39 +0000 (10:43 +0100)]
i2c: cdns: Convert to livetree function
Update cadence i2c driver to support livetree
Similar changes were done by:
"net: zynq_gem: convert to use livetree"
(sha1:
26026e695afa794ac018a09e79a48120d322b60d)
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 16 Jan 2019 15:52:19 +0000 (16:52 +0100)]
arm64: versal: Enable dm command
It is useful to have this command enable to see which devices are
bind/probed.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 16 Jan 2019 15:50:17 +0000 (16:50 +0100)]
arm64: versal: Enable i2c cadence controller and i2c command
Enable communication over i2c.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 17 Jan 2019 07:22:43 +0000 (08:22 +0100)]
arm64: zynqmp: Move SoC sources to mach-zynqmp
Similar changes was done for Zynq in past and this patch just follow
this pattern to separate cpu code from SoC code.
Move arch/arm/cpu/armv8/zynqmp/* -> arch/arm/mach-zynqmp/*
And also fix references to these files.
Based on
"ARM: zynq: move SoC sources to mach-zynq"
(sha1:
0107f2403669f764ab726d0d404e35bb9447bbcc)
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 15 Jan 2019 13:02:32 +0000 (14:02 +0100)]
ARM: zynq: Convert all boards to OF_SEPARATE
Build warning was added by:
"fdt: Add warning about CONFIG_OF_EMBED"
(sha1:
841d5fbae4e993476fa87d8933db0cd58d3c2d41)
Zynq mini configurations are not moved yet and it is questionable if
make sense to move them too.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Tue, 22 Jan 2019 09:04:12 +0000 (14:34 +0530)]
arm: zynq: Enable CONFIG_REMAKE_ELF
This patch enables CONFIG_REMAKE_ELF for Zynq platform
so that it generates u-boot.elf from binary which works
for all Zynq boards with OF_SEPARATE option enabled.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 14 Dec 2018 10:13:11 +0000 (11:13 +0100)]
arm64: zynqmp: Convert all reference boards to OF_SEPARATE
Build warning was added by:
"fdt: Add warning about CONFIG_OF_EMBED"
(sha1:
841d5fbae4e993476fa87d8933db0cd58d3c2d41)
ZynqMP mini configurations are not moved yet and it is questionable if
make sense to move them too.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 16 Jan 2019 11:14:00 +0000 (12:14 +0100)]
arm64: zynqmp: Align u-boot-spl.bin for boot.bin creation
Bootrom is not capable to work with non align bootloader partition
that's why it is necessary to align it before boot.bin creation.
The patch is creating new spl/u-boot-spl-align.bin which is used only
for boot.bin.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Michal Simek [Fri, 14 Dec 2018 09:53:54 +0000 (10:53 +0100)]
tools: zynqmpimage: Align image_size/image_stored_size
Bootrom is not capable to work with non aligned bootloader sizes.
SPL with OF_SEPARATE generates non-align images quite often that's
why this change is required before OF_SEPARATE enableding.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 20 Dec 2018 07:40:25 +0000 (08:40 +0100)]
travis: Wire Xilinx Versal Virt platform
Test Xilinx Versal Virt platform running on the v3.1.0 Qemu.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 15 Jan 2019 11:00:52 +0000 (12:00 +0100)]
arm64: zynqmp: Disable MMC for for zc12xx_revA boards
All these boards have no SD enabled.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 15 Jan 2019 10:01:54 +0000 (11:01 +0100)]
arm64: zynqmp: Enable FPGA_LOAD_SECURE command
Enable fpga load secure feature for xilinx platforms.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 15 Jan 2019 09:45:41 +0000 (10:45 +0100)]
arm64: zynqmp: Enable ISSI flash for some platforms
Enable ISSI flash for platforms. Xilinx reference boards are also used
internally with different flash part to increase coverage that's why
enable also ISSI parts for all these boards even if that board is
released only with one part.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 15 Jan 2019 08:30:38 +0000 (09:30 +0100)]
arm64: zynqmp: Enable SPI on several boards
Enable GQSPI driver, SF command and SPL support for some platforms.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 15 Jan 2019 09:50:39 +0000 (10:50 +0100)]
arm64: zynqmp: Setup proper SPI dependency
Select DM_SPI/DM_SPI_FLASH for the whole SoC.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 15 Jan 2019 08:06:46 +0000 (09:06 +0100)]
ARM: zynqmp_r5: Setup DM_ETH/MMC if NET/MMC is enabled
Setup proper ETH/MMC dependency for the whole platform.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Fri, 12 Oct 2018 11:25:37 +0000 (16:55 +0530)]
arm64: zynqmp: Enable net configs for zc1275
This patch enable net configs for zc1275 board.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 15 Jan 2019 07:52:51 +0000 (08:52 +0100)]
arm64: zynqmp: Setup DM_ETH/MMC if NET/MMC is enabled
Setup proper ETH/MMC dependency for the whole platform.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 15 Jan 2019 07:52:46 +0000 (08:52 +0100)]
arm64: versal: Setup DM_ETH/MMC if NET/MMC is enabled
Setup proper ETH/MMC dependency for the whole platform.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Luca Ceresoli [Fri, 11 Jan 2019 16:09:45 +0000 (17:09 +0100)]
fpga: zynqmp: show an error message when FPGA programming fails
When FPGA programming fails, it does so silently, unless debugging
code is enabled. This makes it hard to detect problems in production
environments.
Print the error message unconditionally so the error doesn't go
unnoticed.
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 21 Nov 2018 06:49:18 +0000 (07:49 +0100)]
arm64: zynqmp: Fix tcminit help text alignment
Trivial patch.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Tue, 27 Nov 2018 06:19:10 +0000 (11:49 +0530)]
net: phy: Move fixed link code to separate routine
This patch moves fixed-link functionality code to a separate
routine inorder to make it more modular and cleaner.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Siva Durga Prasad Paladugu [Thu, 3 Jan 2019 10:14:24 +0000 (15:44 +0530)]
arm64: zynqmp: Fix mmc node names to be in sync with kernel
This patches renames sd nodes in dts to be in line with
kernel. This patch also modifies the references for the same
in code.
It checks mmc first to have no time penalty for new DT node names based
on left-to-right expression evaluation.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Stefan Theil [Mon, 17 Dec 2018 08:12:30 +0000 (09:12 +0100)]
zynq-gem: Use appropriate cache flush/invalidate for RX and TX
The cache was only flushed before *transmitting* packets, but not
when receiving them, leading to an issue where new packets were
handed to the receive handler with old contents in cache. This
only happens when a lot of packets are received without sending
packages every now and then. Also flushing the receive buffers
in the transmit function makes no sense and can be removed.
Signed-off-by: Stefan Theil <stefan.theil@mixed-mode.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 20 Dec 2018 08:33:38 +0000 (09:33 +0100)]
arm64: zynqmp: Protect board_late_init function
Function should be compiled only when CONFIG_BOARD_LATE_INIT is defined.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 20 Dec 2018 08:41:12 +0000 (09:41 +0100)]
arm64: zynqmp: Do not protect zynqmp_pmufw_version()
There is hard dependency for CLK_ZYNQMP to have zynqmp_pmufw_version()
but also FPGA code is calling this function which is possible to use
without actual CLK_ZYNQMP firmware driver to be enabled.
This patch enables the case where only fixed-clock CLK setup is used.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 5 Dec 2018 11:40:55 +0000 (12:40 +0100)]
mmc: zynq: Remove unused pwrseq variable
This variable was incorrectly added by:
"mmc: zynq_sdhci: Add support for SD3.0"
(sha1:
d1f4e39d58db32a4fd1a1b4085e0ede498bd773f)
which had nothing to do with MMC power sequence provider.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 3 Dec 2018 15:24:45 +0000 (16:24 +0100)]
arm64: zynqmp: Enable 2 NAND chips for zc1751 dc2
This board contains 2 nand chips that's why enable this feature.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
T Karthik Reddy [Mon, 3 Dec 2018 10:41:58 +0000 (16:11 +0530)]
mtd: nand: arasan_nfc: Add support for nand multi chip select
This patch adds support for nand multi chip select.
Also adding CONFIG_SYS_NAND_MAX_CHIPS to Kconfig to specify maximum number
of nand chips.
Signed-off-by: Tummala Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michael Tretter [Mon, 3 Dec 2018 15:37:53 +0000 (16:37 +0100)]
tools: zynqmpimage: round up partition size
The FSBL copies "Total Partition Word Length" * 4 bytes from the boot.bin,
which implies that the partition size is 4 byte aligned. When writing the
partition, mkimage calculates "Total Partition Word Length" by dividing
the size by 4. This implicitly cuts unaligned bytes at the end of the
added binary.
Instead of rounding down, the size must be round up to 4 bytes and the
binary padded accordingly.
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Reviewed-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Tom Rini [Wed, 23 Jan 2019 22:24:31 +0000 (17:24 -0500)]
Merge tag 'mips-pull-2019-01-23' of git://git.denx.de/u-boot-mips
- MIPS: mscc: ocelot: add ethernet switch and network support
- MIPS: mscc: add support for ServalT SoC family
- MIPS: mscc: add support for Serval SoC family
Joakim Tjernlund [Thu, 6 Dec 2018 16:20:53 +0000 (17:20 +0100)]
mpc85xx: Add support for -msingle-pic-base
-msingle-pic-base is a new gcc(from 4.6) option for ppc and
it reduces the size of my u-boot with about 4-5 KB.
While at it, add -fno-jump-tables too to save a
few more bytes.
e5500 core:
size u-boot.bef
text data bss dec hex filename
473043 23772 307104 803919 c444f u-boot.bef
size u-boot.aft
text data bss dec hex filename
453195 23772 307104 784071 bf6c7 u-boot.aft
e500 core:
size u-boot.bef
text data bss dec hex filename
292998 17868 24968 335834 51fda u-boot.bef
size u-boot.aft
text data bss dec hex filename
288002 17868 24968 330838 50c56 u-boot.aft
Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Horatiu Vultur [Wed, 23 Jan 2019 15:39:45 +0000 (16:39 +0100)]
MSCC: Add board support for Serval SoC family.
Add board support and configuration for Jaguar2 SoC family.
The detection of the board type is based on the phy ids.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Horatiu Vultur [Wed, 23 Jan 2019 15:39:44 +0000 (16:39 +0100)]
MSCC: Add device tree for Serval pcb106 board
Add device tree based on evaluation board pcb106.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Horatiu Vultur [Wed, 23 Jan 2019 15:39:43 +0000 (16:39 +0100)]
MSCC: add device tree for Serval pcb105 board
Add device tree based on evaluation board pcb105.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Horatiu Vultur [Wed, 23 Jan 2019 15:39:42 +0000 (16:39 +0100)]
MSCC: Add support for Serval SoC family.
As Ocelot, Servalt, Luton and Jaguar2, this family of SoCs are
found in Microsemi Switches solution.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Horatiu Vultur [Wed, 23 Jan 2019 15:39:41 +0000 (16:39 +0100)]
pinctrl: mscc: Add gpio and pinctrl for Serval SoC family.
The Serval SoC family has 32 pins. Currently there is no
support for Serval in Linux kernel.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Horatiu Vultur [Thu, 17 Jan 2019 14:33:28 +0000 (15:33 +0100)]
MSCC: Add board support for Servalt SoC family
Add board support, configuration and DTS for Servalt SoC
family. Currently there is one board in this family.
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Horatiu Vultur [Thu, 17 Jan 2019 14:33:27 +0000 (15:33 +0100)]
MSCC: Add support for Servalt SoC family.
As Ocelot, Luton and Jaguar2, this family of SoCs are found
in Microsemi Switches solution.
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Horatiu Vultur [Thu, 17 Jan 2019 14:33:26 +0000 (15:33 +0100)]
pinctrl: mscc: Add gpio and pinctrl for Servalt SoC family.
The Servalt SoC family has 36 pins. Currently there is not support
for Servalt pinctrl in Linux kernel.
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Gregory CLEMENT [Thu, 17 Jan 2019 16:07:15 +0000 (17:07 +0100)]
configs: mscc_ocelot: add network support
Now that network support is added for the ocelot platform, let's add it
in the default configuration.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Gregory CLEMENT [Thu, 17 Jan 2019 16:07:14 +0000 (17:07 +0100)]
MIPS: mscc: ocelot: add switch reset support
On some ocelots platform a workaround is needed in order to be able to
reset the switch without resetting the DDR.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Gregory CLEMENT [Thu, 17 Jan 2019 16:07:13 +0000 (17:07 +0100)]
net: add MSCC Ocelot switch support
This patch adds support for the Microsemi Ethernet switch present on
Ocelot SoCs.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Gregory CLEMENT [Thu, 17 Jan 2019 16:07:12 +0000 (17:07 +0100)]
MIPS: mscc: ocelot: Add ethernet nodes for Ocelot
Import Ethernet related nodes from Linux
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Tom Rini [Wed, 23 Jan 2019 03:00:20 +0000 (22:00 -0500)]
Merge git://git.denx.de/u-boot-nds32
- Support nds32 prebuilt toolchain.
- Fix some compile issues.
- Fix dts mmc node compatible string.
Rick Chen [Tue, 15 Jan 2019 05:30:35 +0000 (13:30 +0800)]
nds32: dts: Fix mmc node compatible string
In the two commits:
cf3922dddc44a968685b535f2af195f1e51f4a7b
mmc: ftsdc010_mci: Sync compatible with DT mmc node
c14e90e8445e7b1c3531b4bdeb778c47bd6570eb
riscv: dts: Sync DT with Linux Kernel
ftsdc010_mci's compatible has been modified as
"andestech,atfsdc010" for RISC-V synchronization.
But ae3xx.dts and ag101p.dts which are used for
nds32 adp-ae3xx and adp-ag101p platforms did not
be modified correctly at that time. It will cause
mmc detection failure. Fix it here.
Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
Rick Chen [Tue, 15 Jan 2019 03:07:54 +0000 (11:07 +0800)]
nds32: Fix boot fail issue when build with elf-mculib.
Add -mcmodel=large can let elf-mculib have
the same default behavior just like linux-glibc.
And it help to pass U-Boot booting sequence.
Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>