Jagan Teki [Fri, 24 Feb 2017 10:02:56 +0000 (15:32 +0530)]
imx6: isiotmx6ul: Add I2C support
Add I2C support for Engicam Is.IoT MX6UL module.
isiotmx6ul> i2c bus
Bus 0: i2c@
021a0000
Bus 1: i2c@
021a4000
isiotmx6ul> i2c dev 0
Setting bus to 0
isiotmx6ul> i2c dev
Current bus is 0
isiotmx6ul> i2c speed 100000
Setting bus speed to 100000 Hz
isiotmx6ul> i2c probe
Valid chip addresses: 00 2C 44 78
isiotmx6ul> i2c md 2C 0xff
00ff: 00 00 00 00 0f f0 01 64 ff ff 00 00 00 00 00 00 .......d........
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Fri, 24 Feb 2017 10:02:55 +0000 (15:32 +0530)]
arm: dts: imx6ul-isiot: Add I2C nodes
Add I2C nodes for Engicam Is.IoT MX6UL module.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Fri, 24 Feb 2017 10:02:54 +0000 (15:32 +0530)]
arm: imx6ul: Add Engicam Is.IoT MX6UL Starter Kit initial support
Boot from MMC:
-------------
U-Boot SPL 2017.01-rc2-gba3c151-dirty (Jan 02 2017 - 16:59:33)
Trying to boot from MMC1
U-Boot 2017.01-rc2-gba3c151-dirty (Jan 02 2017 - 16:59:33 +0100)
CPU: Freescale i.MX6UL rev1.1 528 MHz (running at 396 MHz)
CPU: Industrial temperature grade (-40C to 105C) at 33C
Reset cause: POR
Model: Engicam Is.IoT MX6UL Starterkit
DRAM: 512 MiB
MMC: FSL_SDHC: 0
*** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
Net: CPU Net Initialization Failed
No ethernet found.
Hit any key to stop autoboot: 0
isiotmx6ul>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Fri, 24 Feb 2017 10:02:53 +0000 (15:32 +0530)]
configs: imx6: Don't define USDHC2_BASE_ADDR
USDHC base address will assigned by SPL using fsl_esdhc_initialize
and u-boot with devicetree, hence no remove base address assignment
in config files.
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Peng Fan [Wed, 22 Feb 2017 08:21:57 +0000 (16:21 +0800)]
imx: mx7ulp_evk: enable mmc/regulator support
Enable MMC support.
The fsl sdhc driver needs regulator to enable power, so enable
regulator support.
And bootcmd and more env.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Peng Fan [Wed, 22 Feb 2017 08:21:56 +0000 (16:21 +0800)]
imx: imx7ulp: add EVK board support
Add EVK board support.
Add the evk dts file.
LOG:
U-Boot 2017.03-rc2-00038-gab86c1d (Feb 22 2017 - 15:59:58 +0800)
CPU: Freescale i.MX7ULP rev1.0 at 500 MHz
Reset cause: POR
Boot mode: Dual boot
Model: NXP i.MX7ULP EVK
DRAM: 1 GiB
MMC: FSL_SDHC: 0
In: serial@
402D0000
Out: serial@
402D0000
Err: serial@
402D0000
Net: Net Initialization Skipped
No ethernet found.
Hit any key to stop autoboot: 0
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Peng Fan [Wed, 22 Feb 2017 08:21:55 +0000 (16:21 +0800)]
mmc: fsl_esdhc: support i.MX7ULP
Add compatible property for i.MX7ULP.
Add a weak init_usdhc_clk function, i.MX7ULP use this to init the clock.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by : Stefano Babic <sbabic@denx.de>
Peng Fan [Wed, 22 Feb 2017 08:21:54 +0000 (16:21 +0800)]
arm: dts: add i.MX7ULP dtsi file
Add i.MX7ULP dtsi file.
Add clock and pinfun header files.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Peng Fan [Wed, 22 Feb 2017 08:21:53 +0000 (16:21 +0800)]
mx7ulp: Add HAB boot support
Add CAAM clock functions, SEC_CONFIG[1] fuse checking, and default CSF
size for HAB support boot on mx7ulp.
Users need to uncomment the CONFIG_SECURE_BOOT in mx7ulp_evk.h to build
secure uboot.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by : Stefano Babic <sbabic@denx.de>
Peng Fan [Wed, 22 Feb 2017 08:21:52 +0000 (16:21 +0800)]
serial: lpuart: add i.MX7ULP support
Add i.MX7ULP support.
The buadrate calculation on i.MX7ULP is different,so add a new setbrg
function for i.MX7ULP.
Add a enum lpuart_devtype for runtime check for different platforms.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Shaohui Xie <Shaohui.Xie@nxp.com>
Cc: Alison Wang <b18965@freescale.com>
Peng Fan [Wed, 22 Feb 2017 08:21:51 +0000 (16:21 +0800)]
serial: lpuart: restructure lpuart driver
Drop CONFIG_LPUART_32B_REG.
Move the register structure to a common file include/fsl_lpuart.h
Define lpuart_serial_platdata structure which includes the reg base and flags.
For 32Bit register access, use lpuart_read32/lpuart_write32 which handles
big/little endian.
For 8Bit register access, still use the orignal code.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by : Stefano Babic <sbabic@denx.de>
Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Shaohui Xie <Shaohui.Xie@nxp.com>
Cc: Alison Wang <b18965@freescale.com>
Peng Fan [Fri, 24 Feb 2017 01:54:18 +0000 (09:54 +0800)]
i2c: lpi2c: add lpi2c driver for i.MX7ULP
Add lpi2c driver for i.MX7ULP.
Need to enable the two options to use this driver:
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_IMX_LPI2C=y
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Heiko Schocher <hs@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Peng Fan [Wed, 22 Feb 2017 08:21:49 +0000 (16:21 +0800)]
pinctrl: Add i.MX7ULP pinctrl driver
Add i.MX7ULP pinctrl driver.
Select CONFIG_PINCTRL_IMX7ULP to use this driver.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by : Stefano Babic <sbabic@denx.de>
Ye Li [Wed, 22 Feb 2017 08:21:48 +0000 (16:21 +0800)]
wdog: Add the watchdog driver for MX7ULP.
This driver implements the HW WATCHDOG functions. Which needs
to set CONFIG_HW_WATCHDOG to use them. This is disabled by default for
mx7ulp.
Use watchdog for reset cpu. Implement this in the driver.
Need to define CONFIG_ULP_WATCHDOG to build it.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Ye Li [Wed, 22 Feb 2017 08:21:47 +0000 (16:21 +0800)]
mx7ulp: Add iomux pins header file
Add the iomux pins header file from iomux tool team. Change the IOMUXC0 pins
to add IOMUX_CONFIG_MPORTS flags.
Note: The IOMUXC0 offset provided in this file is from 0xD000, this is not
aligned with IOMUXC0 base address. We have adjusted the IOMUXC0 base address
to aligin with it.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Peng Fan [Wed, 22 Feb 2017 08:21:46 +0000 (16:21 +0800)]
mxc_ocotp: Update driver to support OCOTP controller on i.MX7ULP
Update the mxc_ocotp driver to support i.MX7ULP.
The read/write sequence has some changes due to
PDN and OUT_STATUS registers added and TIME register is
removed. Also update the bank size and number.
Add is_mx7ulp macro in sys_proto.h
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by : Stefano Babic <sbabic@denx.de>
Peng Fan [Wed, 22 Feb 2017 08:21:45 +0000 (16:21 +0800)]
gpio: Add Rapid GPIO2P driver for i.MX7ULP
Add the imx_rgpio2p driver for Rapid GPIO2P controllers on i.MX7ULP.
Have added all ports on RGPIO2P_0 and RGPIO2P_1.
The configurations CONFIG_IMX_RGPIO2P and CONFIG_DM_GPIO must be set
to y to enable the drivers.
To use the GPIO function, the IBE and OBE needs to set in IOMUXC.
We did not set the bits in driver, but leave them to IOMUXC settings
of the GPIO pins. User should use IMX_GPIO_NR to generate the GPIO number
for gpio APIs access.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by : Stefano Babic <sbabic@denx.de>
Ye Li [Wed, 22 Feb 2017 08:21:44 +0000 (16:21 +0800)]
imx: mx7ulp: Implement the clock functions for i2c driver
Implement the i2c clock enable and get function for mx7ulp. These
functions are required by imx_lpi2c driver.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Peng Fan [Wed, 22 Feb 2017 08:21:43 +0000 (16:21 +0800)]
imx: mx7ulp: Add soc level initialization codes and functions
Implement soc level functions to get cpu rev, reset cause, enable cache,
etc. We will disable the wdog and init clocks in s_init at very early u-boot
phase.
Since the we are seeking the way to get chip id for mx7ulp, the get_cpu_rev
is hard coded to a fixed value. This may change in future.
Reuse some code in imx-common.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Peng Fan [Wed, 22 Feb 2017 08:21:42 +0000 (16:21 +0800)]
imx: mx7ulp: Add clock framework and functions
Add a clock framework to support SCG1/PCC2/PCC3 for A7 to support get/set
clock source, divider, clock rate and parent source.
Users need to include pcc.h to use the APIs to for peripherals clock. Each
peripheral clock is defined in enum pcc_clk type.
SCG relevants APIs are defined in scg.h which supports clock rate get, PLL/PFD
enablement and settings, and all SCG clock initialization. User need use enum
scg_clk to access each clock source.
In clock.c, we initialize necessary clocks at u-boot s_init and implement the
clock functions used by driver modules to operate clocks dynamically.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Peng Fan [Wed, 22 Feb 2017 08:21:41 +0000 (16:21 +0800)]
imx: mx7ulp: add iomux driver to support IOMUXC0 and IOMUXC1
Add a new driver under ULP directory to support its IOMUXC
controllers. The ULP has two IOMUXC, the IOMUXC0 is used
for M4 domain, while IOMUXC1 is for A7. We set IOMUXC1 as
the default IOMUX in this driver. Any pins in IOMUXC0 needs
to configure with IOMUX_CONFIG_MPORTS in its mux_mode field.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by : Stefano Babic <sbabic@denx.de>
Peng Fan [Wed, 22 Feb 2017 08:21:40 +0000 (16:21 +0800)]
imx: mx7ulp: add registers header file
Add imx-regs.h for i.MX7ULP registers addresses definitions and some
registers structures.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by : Stefano Babic <sbabic@denx.de>
Peng Fan [Wed, 22 Feb 2017 08:21:39 +0000 (16:21 +0800)]
imx: mx7ulp: Add mx7ulp to Kconfig
i.MX7ULP is a new series SoC which has different architecture
from previous i.MX platforms. Create a new cpu folder for it,
and add it to Kconfig.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by : Stefano Babic <sbabic@denx.de>
Masahiro Yamada [Thu, 9 Mar 2017 07:28:25 +0000 (16:28 +0900)]
arm64: booti: allow to place kernel image anywhere in physical memory
At first, the ARM64 Linux booting requirement recommended that the
kernel image be placed text_offset bytes from 2MB aligned base near
the start of usable system RAM because memory below that base address
was unusable at that time.
This requirement was relaxed by Linux commit
a7f8de168ace ("arm64:
allow kernel Image to be loaded anywhere in physical memory").
Since then, the bit 3 of the flags field indicates the tolerance
of the kernel physical placement. If this bit is set, the 2MB
aligned base may be anywhere in physical memory. For details, see
Documentation/arm64/booting.txt of Linux.
The booti command should be also relaxed. If the bit 3 is set,
images->ep is respected, and the image is placed at the nearest
bootable location. Otherwise, it is relocated to the start of the
system RAM to keep the original behavior.
Another wrinkle we need to take care of is the unknown endianness of
text_offset for a kernel older than commit
a2c1d73b94ed (i.e. v3.16).
We can detect this based on the image_size field. If the field is
zero, just use a fixed offset 0x80000.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Mon, 13 Mar 2017 08:43:16 +0000 (17:43 +0900)]
tools: fix cross-compiling tools when HOSTCC is overridden
Richard reported U-Boot tools issues in OpenEmbedded/Yocto project.
OE needs to be able to change the default compiler. If we pass in
HOSTCC through the make command, it overwrites all HOSTCC instances,
including ones in tools/Makefile and tools/env/Makefile, which breaks
"make cross_tools" and "make env", respectively.
Add "override" directives to avoid overriding HOSTCC instances that
really need to point to the cross-compiler.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reported-by: Richard Purdie <richard.purdie@linuxfoundation.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Sun, 12 Feb 2017 09:08:43 +0000 (18:08 +0900)]
tiny-printf: add static to locally used functions
These two functions are only used in lib/tiny-printf.c .
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tested-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Ladislav Michl [Sat, 18 Feb 2017 23:24:49 +0000 (00:24 +0100)]
igep00x0: fixup FDT according to detected flash type
Leave only detected flash type enabled in FTD as otherwise GPMC CS is
claimed (and never freed) by Linux, causing 'concurent' flash type
not to be probed.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Ladislav Michl [Sat, 18 Feb 2017 23:23:39 +0000 (00:23 +0100)]
igep00x0: disable environment
ISEE's U-Boot and Linux are using 1bit ECC scheme, while we
switched to 8bit ECC to fullfill flash specification requirements.
However when trying to run U-Boot on board with 1bit ECC'd data
on flash, UBI code takes several minutes to pass scan as reading
of every block ends with ecc error (which is also printed on
console).
So, until proper solution is developed, disable environment
alltogether.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Patrice Chotard [Tue, 21 Feb 2017 12:37:12 +0000 (13:37 +0100)]
board: Add STMicroelectronics STiH410-B2260 support
This is a 96Board compliant board based on STiH410 SoC:
- 1GB DDR
- On-Board USB combo WiFi/Bluetooth RTL8723BU
with PCB soldered antenna
- Ethernet 1000-BaseT
- SATA
- HDMI
- 2 x USB2.0 type A
- 1 x USB2.0 type micro-AB
- SD card slot
- High speed connector (SD/I2C/USB interfaces)
- Low speed connector (UART/I2C/GPIO/SPI/PCM interfaces)
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrice Chotard [Tue, 21 Feb 2017 12:37:11 +0000 (13:37 +0100)]
STiH410-B2260: Add device tree
This device tree has been extracted from v4.9 kernel
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrice Chotard [Tue, 21 Feb 2017 12:37:10 +0000 (13:37 +0100)]
STiH410: Add STi pinctrl driver
Add STMicroelectronics STiH410 pinctrl driver
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrice Chotard [Tue, 21 Feb 2017 12:37:09 +0000 (13:37 +0100)]
STiH410: Add STi SDHCI driver
Add SDHCI host controller found on STMicroelectronics SoCs
On some ST SoCs, i.e. STiH407/STiH410, the MMC devices can live
inside a dedicated flashSS sub-system that provides an extend subset
of registers that can be used to configure the Arasan MMC/SD Host
Controller.
This means, that the SDHCI Arasan Controller can be configured to be
eMMC4.5 or 4.3 spec compliant.
W/o these settings the SDHCI will configure and use the MMC/SD
controller with limited features e.g. PIO mode, no DMA, no HS etc.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Patrice Chotard [Tue, 21 Feb 2017 12:37:08 +0000 (13:37 +0100)]
gpio: do not include <asm/arch/gpio.h> for ARCH_STI
As no gpio.h is defined in arch/arm/include/asm/arch-stih410,
to avoid compilation failure, do not include asm/arch/gpio.h.
This is needed for example when including sdhci.h, which include
asm/gpio.h>.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrice Chotard [Tue, 21 Feb 2017 12:37:07 +0000 (13:37 +0100)]
STiH410: Add STi serial driver
This patch adds support to ASC (asynchronous serial controller)
driver, which is basically a standard serial driver. This IP
is common across other STMicroelectronics SoCs
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrice Chotard [Tue, 21 Feb 2017 12:37:06 +0000 (13:37 +0100)]
STiH410: Add STi sysreset driver
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrice Chotard [Tue, 21 Feb 2017 12:37:05 +0000 (13:37 +0100)]
STiH410: Add STi timer driver
Add ARM global timer based timer
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrice Chotard [Tue, 21 Feb 2017 12:37:04 +0000 (13:37 +0100)]
arm: Add support for STMicroelectronics STiH410 soc
The STiH410 is an advanced multi-HD AVC processor with 3D
graphics acceleration and 1.5-GHz ARM Cortex-A9 SMP CPU
part of the STiH407 family.
It has wide connectivity including USB 3.0, PCI-e, SATA
and gigabit ethernet.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Phil Edworthy [Fri, 17 Feb 2017 08:22:17 +0000 (08:22 +0000)]
armv7m: Add SysTick timer driver
The SysTick is a 24-bit down counter that is found on all ARM Cortex
M3, M4, M7 devices and is always located at a fixed address.
The number of reference clock ticks that correspond to 10ms is normally
defined in the SysTick Calibration register's TENMS field. However, on some
devices this is wrong, so this driver allows the clock rate to be defined
using CONFIG_SYS_HZ_CLOCK.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Vikas MANOCHA <vikas.manocha@st.com>
Lokesh Vutla [Wed, 15 Feb 2017 13:12:54 +0000 (18:42 +0530)]
tools: omapimage: Fix size in header
The size field in GP header that is expected by ROM is size of the
image + size of the header. But omapimage generates a gp header
only with size of the image as size field. Fix it
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Siarhei Siamashka [Mon, 6 Mar 2017 01:16:53 +0000 (03:16 +0200)]
arm: omap3: Bring back ARM errata workaround 725233
The workaround for ARM errata 725233 had been lost since
commit
45bf05854bc94e (armv7: adapt omap3 to the new cache
maintenance framework). Bring it back in order to avoid
very difficult to reproduce, but actually encountered in
the wild CPU deadlocks when running software rendered
X11 desktop on OMAP3530 hardware.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Migrate to Kconfig]
Signed-off-by: Tom Rini <trini@konsulko.com>
Siarhei Siamashka [Mon, 6 Mar 2017 01:16:52 +0000 (03:16 +0200)]
arm: omap3: Compile clock.c with -marm option to unbreak OMAP3530
Boards with OMAP3530 SoC fail to boot since commit
bd2c4522c26d5
("ti: armv7: enable EXT support in SPL (using ti_armv7_common.h)")
because it enabled the use of Thumb2 for the SPL.
Experiments have shown that the deadlock happens in the
prcm_init() function from 'arch/arm/mach-omap2/omap3/clock.c'.
This patch enforces the compilation of clock.c source file in
ARM mode and makes the deadlock disappear. We are yet to figure
out the root cause of the problem. Still this is somewhat
better than having non-bootable boards for years.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 10 Mar 2017 19:16:54 +0000 (14:16 -0500)]
omap3_overo: Reduce SPL size
Borrowing from omap3_logic, switch to SPL_SYS_MALLOC_SIMPLE and moving
the stack to DDR as soon as we're able.
Signed-off-by: Tom Rini <trini@konsulko.com>
Masahiro Yamada [Sun, 12 Mar 2017 15:16:41 +0000 (00:16 +0900)]
ARM: dts: uniphier: more re-sync DT with Linux
For better maintainability.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Sun, 12 Mar 2017 15:16:40 +0000 (00:16 +0900)]
ARM: dts: uniphier: fix no unit name warnings
Fix warnings reported when built with W=1, by DTC 1.4.2 or later:
Node /memory has a reg or ranges property, but no unit name
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Sun, 12 Mar 2017 15:16:39 +0000 (00:16 +0900)]
ARM: dts: uniphier: remove skeleton.dtsi inclusion
Linux Commit
9c0da3cc61f1 ("ARM: dts: explicitly mark skeleton.dtsi
as deprecated") declared that skeleton.dtsi was deprecated.
Move the memory node below to suppress warnings of FDTGREP.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Mon, 6 Mar 2017 20:28:25 +0000 (05:28 +0900)]
ARM: uniphier: set DRAM_SPARSE flag for LD21 boards
Commit
04cd4e7215d3 ("ARM: uniphier: remove DRAM base address from
board parameters") accidentally unset the DRAM_SPARSE flag, and
changed the physical map of the DRAM channels. Revive the original
behavior.
Fixes:
04cd4e7215d3 ("ARM: uniphier: remove DRAM base address from board parameters")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reported-by: Shunji Sato <sato.shunji@socionext.com>
Tom Rini [Mon, 13 Mar 2017 17:54:16 +0000 (13:54 -0400)]
Prepare v2017.03
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 13 Mar 2017 17:50:17 +0000 (13:50 -0400)]
scripts/config_whitelist.txt: Regenerate
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 13 Mar 2017 17:48:42 +0000 (13:48 -0400)]
configs: Re-sync
Signed-off-by: Tom Rini <trini@konsulko.com>
Matthijs van Duin [Tue, 7 Mar 2017 02:42:24 +0000 (03:42 +0100)]
arm: omap-common: Fix typo in CONFIG_OMAP54XX guard
Some initialization was unintentionally being skipped on omap5.
Fixes:
f5af0827f276 ("arm: omap-common: Guard some parts of the code with CONFIG_OMAP44XX/OMAP54XX")
Signed-off-by: Matthijs van Duin <matthijsvanduin@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Jörg Krause [Mon, 6 Mar 2017 20:07:11 +0000 (21:07 +0100)]
tools: binman: change shebang from python into python2
This tool does not work with Python 3. Change the shebang to make sure the
script is run by a Python 2 interpreter.
Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
Ladislav Michl [Mon, 6 Mar 2017 12:54:30 +0000 (13:54 +0100)]
arm: OMAP2+: nandecc: propagate error to command return status
Currently nandecc returns zero even if underlaying
omap_nand_switch_ecc function fails. Fix that by
propagating error returned to command return value.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 10 Mar 2017 00:52:57 +0000 (19:52 -0500)]
Merge branch 'pmic' of git://git.denx.de/u-boot-mmc
Tom Rini [Tue, 7 Mar 2017 12:13:42 +0000 (07:13 -0500)]
ARM: Migrate errata to Kconfig
This moves all of the current ARM errata from various header files and in to
Kconfig. This allows for a minor amount of cleanup as we had some instances
where both a general common header file was enabling errata as well as the
board config. We now just select these once at the higher level in Kconfig
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 3 Mar 2017 20:33:33 +0000 (15:33 -0500)]
omap4: Migrate to using imply
Move the default y options under arch/arm/mach-omap2/omap4/Kconfig to be
using imply instead in arch/arm/Kconfig
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 3 Mar 2017 20:33:32 +0000 (15:33 -0500)]
omap3: Migrate to using imply
Move the default y options under arch/arm/mach-omap2/omap3/Kconfig to be
using imply instead in arch/arm/Kconfig
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 3 Mar 2017 20:33:31 +0000 (15:33 -0500)]
TI: Migrate board/ti/common/Kconfig to imply
The option that we had set in board/ti/common/Kconfig as default y are
best done with imply under the appropriate main Kconfig option instead.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 3 Mar 2017 20:33:30 +0000 (15:33 -0500)]
am335x_evm: Switch to using imply keyword
These particular SPL options are part of what the ROM provides, but for
compatibility with how we have previously used them, move them to being
implied by the board being selected.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 3 Mar 2017 20:33:29 +0000 (15:33 -0500)]
kconfiglib.py: Kludge in 'imply' support
Currently upstream does not yet understand the imply keyword. For what
we use kconfiglib.py for today, this is OK. We only need to be able to
evaluate in order to make boards.cfg and none of those choices will
depend on how imply evaluates out.
Signed-off-by: Tom Rini <trini@konsulko.com>
Ryan Harkin [Thu, 2 Mar 2017 17:45:16 +0000 (17:45 +0000)]
do_smhload: fix return code
do_smhload was using a ulong to store the return value from
smh_load_file. That returns an int, where -1 indicates an error. As a
ulong will never be negative, smh_load_file errors were not detected and
so_smhload always returned zero.
Also, when errors were spotted, do_smhload was returning 1, rather than
the enumeration CMD_RET_FAILURE (which is also 1).
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Tom Rini [Wed, 1 Mar 2017 21:51:58 +0000 (16:51 -0500)]
Freescale/NXP: Migrate CONFIG_FSL_CAAM to defconfigs
In some cases this is absolutely required, so select this for some secure
features. This also requires migration of RSA_FREESCALE_EXP
Cc: Ruchika Gupta <ruchika.gupta@nxp.com>
Cc: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Cc: Naveen Burmi <NaveenBurmi@freescale.com>
Cc: Po Liu <po.liu@freescale.com>
Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Cc: Priyanka Jain <Priyanka.Jain@freescale.com>
Cc: Sumit Garg <sumit.garg@nxp.com>
Cc: Shaohui Xie <Shaohui.Xie@freescale.com>
Cc: Chunhe Lan <Chunhe.Lan@freescale.com>
Cc: Feng Li <feng.li_2@nxp.com>
Cc: Alison Wang <alison.wang@freescale.com>
Cc: Mingkai Hu <Mingkai.Hu@freescale.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Saksham Jain <saksham.jain@nxp.freescale.com>
Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Patrick Delaunay [Tue, 28 Feb 2017 18:29:11 +0000 (19:29 +0100)]
tools: Remove CONFIG_SYS_TEXT_BASE in Makefile
This define is not used in tools sources and can be removed
to avoid unnecessary link between tools and defconfig
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Mon, 27 Feb 2017 06:24:45 +0000 (15:24 +0900)]
kbuild: turn of dtc unit address warnings by default
DTC 1.4.2 or later checks DT unit-address without reg property and
vice-versa, and generates lots of warnings. Fixing DT files will
take for a while. Until then, let's turn off the check unless
building with W=*.
Introduce a new helper dtc-option to check if the option is supported
in order to suppress warnings on older versions.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Rask Ingemann Lambertsen [Wed, 18 Jan 2017 20:53:40 +0000 (21:53 +0100)]
sunxi: power: axp809.c: Fix aldo1-2 being disabled for mvolt != 0
The execution flow is currently like this for aldo_num == 1 or 2:
int axp_set_aldo(int aldo_num, unsigned int mvolt)
{
...
if (mvolt == 0)
return pmic_bus_clrbits(AXP809_OUTPUT_CTRL1,
AXP809_OUTPUT_CTRL1_ALDO1_EN << (aldo_num - 1));
...
return pmic_bus_clrbits(AXP809_OUTPUT_CTRL1,
AXP809_OUTPUT_CTRL1_ALDO1_EN << (aldo_num - 1));
}
I.e. aldo1 and aldo2 will always be disabled. This patch fixes it by
setting (rather than clearing) the enable bit when mvolt != 0.
Signed-off-by: Rask Ingemann Lambertsen <rask@formelder.dk>
Fixes:
795857df413a ("sunxi: power: add AXP809 support")
Tom Rini [Wed, 8 Mar 2017 12:14:21 +0000 (07:14 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-video
Tom Rini [Wed, 8 Mar 2017 12:14:18 +0000 (07:14 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-net
Adam Ford [Wed, 8 Mar 2017 03:27:52 +0000 (21:27 -0600)]
omap3_logic: Move SPL Stack into SDRAM
A previous patch broke the board. This patch will add missing part
from the previous patch and also move the SPL Stack into SDRAM at
0x82000000.
Tested with GCC 4.8.2 and GCC 6.2
Fixes:
0959649dc6d9 ("omap3_logic: Switch to simple malloco in SPL")
Signed-off-by: Adam Ford <aford173@gmail.com>
Changes in V2:
- Keep CONFIG_SPL_SYS_MALLOC_SIMPLE
- Add CONFIG_SYS_MALLOC_F_LEN=0x2000 (8 MB)
Andre Przywara [Mon, 6 Mar 2017 01:13:38 +0000 (01:13 +0000)]
video: cfb_console: fix 32-bit display on 64-bit architectures
"unsigned long" is a lousy data type when it comes to match peripheral
hardware registers with a fixed size.
Just do the obvious and match a 32-bit display format with an "u32"
data type for casting.
This fixes the logo display on 64-bit architectures, which produced
a black line on the right side of the logo with non-black backgrounds.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Nathan Rossi [Sun, 5 Mar 2017 14:36:23 +0000 (00:36 +1000)]
net: zynq_gem: Fix masking of supported phydev features
When the zynq_gem driver initializes the phy it sets the supported
features that the phy can support and advertise. However instead of
masking the supported features such that it limits the available
features it sets the phy to have the exact supported features of the
zynq_gem. This is problematic as it will enable features that a phy does
not have or cannot advertise.
Specifically this appears as an issue when using a phy that is only
capable of 10/100, but the zynq_gem driver will override this and try to
enable and advertise 10/100/1000.
Reported-by: Arno Steffens <star@gmx.li>
Fixes:
80243528ef ("net: gem: Fix gem driver on 1Gbps LAN")
Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Tested-by: Arno Steffens <star@gmx.li>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Wenyou Yang [Tue, 14 Feb 2017 08:24:40 +0000 (16:24 +0800)]
net: macb: Fix ETH not found when clock not support
For the boards such as smartweb on which the clock driver isn't
supported, the ethernet fail to be found when booting up with
the below log.
---8<---
Net: No ethernet found.
--->8---
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Philipp Tomsich [Wed, 1 Mar 2017 20:04:15 +0000 (21:04 +0100)]
armv8: spl: Call spl_relocate_stack_gd for ARMv8
As part of the startup process for boards using the SPL, we need to
call spl_relocate_stack_gd. This is needed to set up malloc with its
DRAM buffer.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Albert ARIBAUD [Mon, 27 Feb 2017 19:19:07 +0000 (20:19 +0100)]
armv5te: make 'ret lr' produce iinterworking 'bx lr'
Current ARM assembler helper for the 'return to caller' pseudo-instruction
turns 'ret lr' into 'mov pc, lr' for ARMv5TE. This causes the core to remain
in its current ARM state even when the routine doing the 'ret' was called
from Thumb-1 state, triggering an undefined instruction exception.
This causes early run-time failures in all boards compiled using the Thumb-1
instruction set (for instance the Open-RD family).
ARMv5TE supports 'bx lr' which properly implements interworking and thus
correctly returns to Thumb-1 state from ARM state.
This change makes 'ret lr' turn into 'bx lr' for ARMv5TE.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Tom Rini [Mon, 27 Feb 2017 22:36:21 +0000 (17:36 -0500)]
Prepare v2017-rc3
Signed-off-by: Tom Rini <trini@konsulko.com>
Andrew F. Davis [Wed, 22 Feb 2017 23:46:39 +0000 (17:46 -0600)]
arm: mach-omap2: Flush cache after FIT post-processing image
After we authenticate/decrypt an image we need to flush the caches
as they may still contain bits of the encrypted image. This will
cause failures if we attempt to jump to this image.
Reported-by: Yogesh Siraswar<yogeshs@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 20 Feb 2017 14:38:03 +0000 (09:38 -0500)]
drivers/net/Kconfig: Correct use of apostrophe
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 27 Feb 2017 17:10:05 +0000 (12:10 -0500)]
Merge branch 'master' of git://denx.de/git/u-boot-imx
Nickey Yang Nickey Yang [Mon, 27 Feb 2017 09:04:21 +0000 (17:04 +0800)]
rockchip: video: fix
83500000 clock mistake in rockchip HDMI
There is one "0" too many in
83500000 mpixelclock in rockchip_mpll_cfg[].
fix it.
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
Jonathan Golder [Fri, 24 Feb 2017 16:46:10 +0000 (17:46 +0100)]
splash: Prevent splash_load_fs from writing to 0x0
Passing NULL to fs_read() for actread value results in hanging U-Boot
at least on our ARM plattform (TI AM335x). Since fs_read() and
following functions do not catch nullpointers, writing to 0x0 occurs.
Passing a local dummy var instead of NULL solves this issue.
Signed-off-by: Jonathan Golder <jonathan.golder@kurz-elektronik.de>
Cc: Anatolij Gustschin <agust@denx.de>
Tom Rini [Sun, 26 Feb 2017 20:23:18 +0000 (15:23 -0500)]
travis-ci: Temporarily disable using a newer device tree compiler
For a long while dtc has warned about various constructs. This is now
leading to log file size being exceeded in travis, and as the majority
of these errors need to be fixed in the kernel, switch to using the
stock device-tree-compiler package.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sun, 26 Feb 2017 16:56:54 +0000 (11:56 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-usb
Felipe Balbi [Wed, 22 Feb 2017 09:22:38 +0000 (11:22 +0200)]
usb: gadget: f_dfu: set serial number if serial# is valid
With this patch, USB Command Verifier is happy with our DFU
implementation on Chapter 9 tests.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Felipe Balbi [Wed, 22 Feb 2017 09:22:37 +0000 (11:22 +0200)]
usb: gadget: g_dnl: fix g_dnl_set_serialnumber()
instead of only copying if strlen(s) is less than 32 characters, let's
just copy at most 31 characters regardless of the size of
serial#. This will guarantee that we always have a serial number if
serial# environment variable is set to anything.
Note that without a proper serial number, USB Command Verifier fails
our test of Device Descriptor since we will claim to have a serial
number without really providing one when requested.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Felipe Balbi [Fri, 10 Feb 2017 16:32:31 +0000 (19:32 +0300)]
usb: gadget: f_dfu: write req->actual bytes
If last packet is short, we shouldn't write req->length bytes to
non-volatile media, we should write only what's available to us, which
is held in req->actual.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Patrick Delaunay [Fri, 16 Dec 2016 17:41:32 +0000 (18:41 +0100)]
usb: gadget: dfu: add result for handle_getstatus()
harmonize result with other handle_XXX() functions: return int for size
remove the define RET_STAT_LEN : no more necessary
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
Patrick Delaunay [Fri, 16 Dec 2016 17:41:31 +0000 (18:41 +0100)]
usb: gadget: dfu: correct size for USB_REQ_DFU_GETSTATE result
return the correct size for DFU_GETSTATE result (1 byte in DFU 1.1 spec)
to avoid issue in USB protocol and the variable "value" is propagated
to req->lenght as all the in the other request with answer
- DFU_GETSTATUS
- DFU_DNLOAD
- DFU_UPLOAD
Then the buffer is correctly treated in USB driver
NB: it was the only request witch directly change "req->actual"
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
Patrick Delaunay [Thu, 8 Dec 2016 17:10:49 +0000 (18:10 +0100)]
usb: gadget: dfu: add functional descriptor in descriptor set
The "DFU descriptor set" must contain the "DFU functional descriptor"
but it is missing today in U-Boot code
(cf: DFU spec 1.1, chapter 4.2 DFU Mode Descriptor Set)
This patch only allocate buffer and copy DFU functional descriptor
after interfaces.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
Vincent Tinelli [Tue, 14 Feb 2017 14:16:25 +0000 (17:16 +0300)]
usb: dwc3: gadget: Remove unused header inclusion
Remove sys_proto.h inclusion which is not used by the driver.
Signed-off-by: Vincent Tinelli <vincent.tinelli@intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Tom Rini [Thu, 23 Feb 2017 15:12:41 +0000 (10:12 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-uniphier
- Fix regressions caused by the previous reworks
- Add pin configuration support
- Re-work SPL code
- Update DRAM and PLL setup code
- Enable needed configs, disable unneeded configs
Masahiro Yamada [Tue, 21 Feb 2017 14:00:35 +0000 (23:00 +0900)]
ARM: uniphier: set up charge pump current for MPLL of LD11 SoC
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Mon, 20 Feb 2017 09:34:20 +0000 (18:34 +0900)]
ARM: uniphier: add simple eMMC load APIs instead of ROM API
Re-use of routines embedded in the Boot ROM requires a function
pointer table for each SoC. This is not nice in terms of the
maintainability in a long run.
Implement simple eMMC load APIs that are commonly used for LD11,
LD20, and hopefully future SoCs.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Tue, 21 Feb 2017 06:09:11 +0000 (15:09 +0900)]
ARM: uniphier: enable CONFIG_CMD_CONFIG
This command is useful to see which config options are enabled on
the running U-Boot image.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 17 Feb 2017 07:17:55 +0000 (16:17 +0900)]
ARM: uniphier: enable CONFIG_CMD_GPT
Enable CONFIG_CMD_GPT, keeping CONFIG_SPL_EFI_PARTITION because the
SPL for UniPhier platform does not recognize any partitions.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 17 Feb 2017 07:17:39 +0000 (16:17 +0900)]
ARM: uniphier: disable CONFIG_SPL_DOS_PARTITION
The SPL for UniPhier platform does not recognize any partitions.
Do not compile unneeded features.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 17 Feb 2017 07:17:22 +0000 (16:17 +0900)]
ARM: uniphier: deassert RST_n of eMMC device for LD11/LD20
For LD11 and LD20 SoCs, the RST_n pin is asserted by default. If
the EXT_CSD[162], bit[1:0] (RST_n_ENABLE) is fused, the eMMC device
would stay in the reset state until its RST_n pin is deasserted by
software.
Currently, this is cared by an ad-hoc way because the eMMC hardware
reset provider is not supported in U-Boot for now. This code should
be re-written once the "mmc-pwrseq-emmc" binding is supported.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Kotaro Hayashi [Tue, 14 Feb 2017 02:39:14 +0000 (11:39 +0900)]
ARM: uniphier: add DRAM PHY clock duty adjustment for LD20 SoC
If the DRAM clock duty does not meet the allowable tolerance,
it is marked in an efuse register. If the register is fused,
the boot code should compensate for the DRAM clock duty error.
Signed-off-by: Kotaro Hayashi <hayashi.kotaro@socionext.com>
[masahiro: simplify code, add git-log]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 16 Feb 2017 06:59:32 +0000 (15:59 +0900)]
ARM: uniphier: remove dram_nr_ch from board parameters
This parameter is redundant because we can know the number of
channels by checking if dram_ch[2].size is zero.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Mon, 13 Feb 2017 16:24:26 +0000 (01:24 +0900)]
ARM: uniphier: rework spl_boot_device() and related code
The current implementation has ugly switch statements here and there,
and duplicates similar code. Rework it using table lookups for SoC
data and reduce code duplication.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Mon, 13 Feb 2017 16:24:25 +0000 (01:24 +0900)]
ARM: uniphier: move spl_boot_mode() to a separate file
The spl_boot_mode() is unrelated to the other code in this file.
Besides, this function is only called from common/spl/spl_mmc.c,
so it is reasonable to guard with CONFIG_SPL_MMC_SUPPORT.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Mon, 13 Feb 2017 16:24:24 +0000 (01:24 +0900)]
ARM: uniphier: move MMC code to a separate file
Currently, arch/arm/mach-uniphier/boot-mode/boot-mode.c is messed up
with unrelated code; there is no reason why the "mmcsetn" command
must be placed in this file.
Split out the MMC code into arch/arm/mach-uniphier/mmc-first-dev.c.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Mon, 13 Feb 2017 01:29:55 +0000 (10:29 +0900)]
ARM: uniphier: disable CONFIG_MTD_NOR_FLASH
This feature is seldom used these days on UniPhier boards.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>