Juan A. Suarez Romero [Wed, 13 Apr 2022 18:08:45 +0000 (20:08 +0200)]
v3d: define our own canonical supported formats
Some of the canonical formats defined by Gallium are not TLB compatible,
so we need to provide an alternative.
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15693>
Juan A. Suarez Romero [Wed, 13 Apr 2022 18:06:21 +0000 (20:06 +0200)]
gallium: add hook on getting canonical format
On swizzled copies canonical formats are used to reduce the formats to a
simpler subset.
Nevertheless, it is possible that some of the canonical formats defined
in Gallium are actually not supported by the drivers themselves.
This provides a driver-defined hook that can be used to provide an
alternative canonical format in case the canonical one defined by
Gallium is not supported by the driver.
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15693>
Juan A. Suarez Romero [Wed, 13 Apr 2022 17:42:37 +0000 (19:42 +0200)]
v3d: use surface format defined on pipe_blit
When trying to perform a TLB-based blit, we need to create a surface out
of the src and dst resources. But instead of using the same formats as
the resources, we need to use the format that is passed through
pipe_blit_info.
This was making some cases to use the render-based blit instead of the
TLB-based blit, which is more performant.
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15693>
Juan A. Suarez Romero [Tue, 29 Mar 2022 11:53:27 +0000 (13:53 +0200)]
v3d: do not tile 1D textures
Hardware already support 1D untiled textures, so no need to convert them
to tile for render-based blit.
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15693>
Juan A. Suarez Romero [Wed, 13 Apr 2022 12:32:19 +0000 (14:32 +0200)]
v3d: report the correct unsupported blit format
We were reporting the resource format instead of the surface format for
unsupported render blit formats.
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15693>
Lionel Landwerlin [Tue, 22 Feb 2022 08:38:05 +0000 (10:38 +0200)]
anv: implement DEBUG_SYNC
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15950>
Lionel Landwerlin [Tue, 22 Feb 2022 08:37:07 +0000 (10:37 +0200)]
anv/intel: add a new debug flag for stalling after every draw/dispatch
Useful for hang debugging. Previously Anv incorrectly used DEBUG_SYNC
for this.
v2: Update documentations for sync/stall (Jordan)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15950>
Lionel Landwerlin [Fri, 22 Oct 2021 13:10:01 +0000 (16:10 +0300)]
anv: improve INTEL_DEBUG for submit
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15950>
Erik Faye-Lund [Thu, 24 Mar 2022 09:36:06 +0000 (10:36 +0100)]
nir: introduce and use nir_component_mask
The BITFIELD_MASK() macro is intended for using with actual bitfields,
not with nir_component_mask_t. This means we do some extra work to
handle values that are invalid for nir_component_mask_t in the first
place.
This eliminates some warnings on Clang, where the compiler complains
about casting UINT32_MAX to UINT16_MAX.
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15547>
Erik Faye-Lund [Thu, 24 Mar 2022 09:34:41 +0000 (10:34 +0100)]
meson: turn on -Wno-unused-function project-wide
We generate a lot of functions without knowing if they end up being used
or not. So we can't easily avoid these warnings.
This fixes a bunch of warnings for me when building with Clang.
Acked-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15547>
Erik Faye-Lund [Thu, 24 Mar 2022 08:57:10 +0000 (09:57 +0100)]
vulkan: explicitly cast object-type enum
VkObjectType and VkDebugReportObjectTypeEXT has the same enum-values.
Why the Vulkan WG thought this was a good idea, beats me. But it's what
we have to live with now.
Anyway, instead of having a statement that implicitly casts two
different values from the former to the latter, let's fully relsove the
type as the former, and cast the value when using it instead.
Fixes:
41318a58196 ("vulkan: Use vk_object_base::type for debug_report")
Acked-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15547>
Samuel Pitoiset [Mon, 18 Apr 2022 13:38:00 +0000 (15:38 +0200)]
radv: do not support UNIFORM_TEXEL_BUFFER with SRGB
Looks like it can't be supported. Also disabled by PRO/AMDVLK.
Fixes new CTS dEQP-VK.texture.texel_buffer.uniform.srgb.*.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16010>
Samuel Pitoiset [Thu, 14 Apr 2022 13:09:03 +0000 (15:09 +0200)]
radv: initialize the vertex input interface state in only one place
Instead of copying states from these structures at many different
places, do it only once. Will help VK_EXT_graphics_pipeline_library.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15967>
Samuel Pitoiset [Thu, 14 Apr 2022 12:32:17 +0000 (14:32 +0200)]
radv: use the hardware primitive topology everywhere
Instead of mixing the VK type vs HW type everywhere.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15967>
Samuel Pitoiset [Fri, 15 Apr 2022 06:10:36 +0000 (08:10 +0200)]
radv: mark all active stages earlier in the pipeline creation path
Few pCreateInfo structs have to be ignored based on the active stages
and this will be used to make a union of stages from graphics libraries.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15967>
Mike Blumenkrantz [Mon, 18 Apr 2022 20:00:35 +0000 (16:00 -0400)]
zink: selectively disable dynamic vertex stride
if the vertex state doesn't meet the requirements to use this feature,
fall back to fully-baked pipelines instead of violating spec
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16018>
Mike Blumenkrantz [Mon, 18 Apr 2022 19:48:56 +0000 (15:48 -0400)]
zink: store min required stride values on the vertex state
this will be useful shortly
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16018>
Mike Blumenkrantz [Mon, 18 Apr 2022 19:06:58 +0000 (15:06 -0400)]
zink: always bind gfx pipeline at the top of draw
at one point I thought it'd be cool to try and async compile a pipeline
between shader bind and draw emit, but this is an unrealistic pipe dream
that just makes things more complicated
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16018>
Mike Blumenkrantz [Mon, 18 Apr 2022 22:25:55 +0000 (18:25 -0400)]
zink: rework zink_kopper_update() assert
the dt might have been killed, so just assert that it's a display target
fixes #6317
Fixes:
8ade5588e39 ("zink: add kopper api")
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16017>
Mike Blumenkrantz [Mon, 18 Apr 2022 18:39:24 +0000 (14:39 -0400)]
zink: make a kopper debug print into an error
Fixes:
8ade5588e39 ("zink: add kopper api")
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16017>
Mike Blumenkrantz [Mon, 18 Apr 2022 21:33:35 +0000 (17:33 -0400)]
zink: remove ZINK_NO_TIMELINES
Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15904>
Mike Blumenkrantz [Tue, 12 Apr 2022 19:03:39 +0000 (15:03 -0400)]
zink: remove the worst part of basic framebuffer support
this was one of the most complex interactions in zink, and now it's
finally gone
thanks to @jekstrand for licensing his patented Delete The Code methodology
for this project
Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15904>
Mike Blumenkrantz [Tue, 12 Apr 2022 19:01:31 +0000 (15:01 -0400)]
zink: rename imageless framebuffer functions
Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15904>
Mike Blumenkrantz [Tue, 12 Apr 2022 19:00:38 +0000 (15:00 -0400)]
zink: remove framebuffer indirection
Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15904>
Mike Blumenkrantz [Tue, 12 Apr 2022 18:59:16 +0000 (14:59 -0400)]
zink: delete all non-imageless framebuffer code
hooray it's finally gone
Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15904>
Mike Blumenkrantz [Tue, 12 Apr 2022 18:55:37 +0000 (14:55 -0400)]
zink: require KHR_imageless_framebuffer
this allows for deleting tons of code
Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15904>
Mike Blumenkrantz [Tue, 12 Apr 2022 18:50:21 +0000 (14:50 -0400)]
zink: require renderpass2
drivers should be able to support this, and it allows for deleting
a lot of untested code
Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15904>
Mike Blumenkrantz [Tue, 12 Apr 2022 18:53:09 +0000 (14:53 -0400)]
zink: only use VK_DEPENDENCY_BY_REGION_BIT if sync2 is available
this breaks texture barriers since non-sync2 barriers don't have this
available
Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15904>
Mike Blumenkrantz [Tue, 12 Apr 2022 18:48:52 +0000 (14:48 -0400)]
zink: hook up VK_KHR_create_renderpass2
Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15904>
Mike Blumenkrantz [Tue, 12 Apr 2022 19:07:29 +0000 (15:07 -0400)]
zink: remove driver-based max_fences throttling
there are no more fence objects, so there's no need to do driver-specific
clamping on them
the mechanism remains intact to handle ETOOMANYSUBMITS
Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15904>
Mike Blumenkrantz [Fri, 25 Mar 2022 16:21:58 +0000 (12:21 -0400)]
zink: rename zink_query::batch_id
this conflicts with zink_fence::batch_id and is confusing in grep
Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15904>
Mike Blumenkrantz [Fri, 25 Mar 2022 16:20:41 +0000 (12:20 -0400)]
zink: remove batch lock
this is no longer needed and allows deleting some awful code
Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15904>
Mike Blumenkrantz [Fri, 25 Mar 2022 16:18:42 +0000 (12:18 -0400)]
zink: require timeline semaphores
this allows the removal of tons of awful code
Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15904>
Mike Blumenkrantz [Fri, 25 Mar 2022 16:09:50 +0000 (12:09 -0400)]
zink: do not create fences at all if timeline semaphores are supported
there's no point in doing this, as it's just extra objects that don't need
to ever be used
Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15904>
Mike Blumenkrantz [Fri, 15 Apr 2022 16:59:03 +0000 (12:59 -0400)]
zink: fix extended restart prim types without dynamic state2
these are all allowed with the ext
cc: mesa-stable
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15978>
Mike Blumenkrantz [Fri, 15 Apr 2022 16:57:25 +0000 (12:57 -0400)]
zink: support restart with PIPE_PRIM_LINES_ADJACENCY if ext is available
cc: mesa-stable
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15978>
Mike Blumenkrantz [Thu, 14 Apr 2022 20:18:10 +0000 (16:18 -0400)]
zink: unconditionally set line width on rasterizer state change
the pipe cap is used for gating wideline support, so this will always
be 1.0 when not supported
furthermore, the previous code wasn't accurately checking line width
for tess shaders, breaking tests
cc: mesa-stable
fixes (nv):
KHR-GL46.tessellation_shader.tessellation_control_to_tessellation_evaluation.gl_PatchVerticesIn
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15960>
Mike Blumenkrantz [Thu, 14 Apr 2022 13:02:28 +0000 (09:02 -0400)]
zink: use mixed zs renderpass for depth read/write
this is triggered by u_blitter when doing src==dst blits
Fixes:
7781a75229d ("zink: add a renderpass flag for mixed zs layout")
affects:
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality*
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15960>
Mike Blumenkrantz [Wed, 13 Apr 2022 18:19:58 +0000 (14:19 -0400)]
zink: reject resource creation if format features don't match attachment
if a rendertarget-specified image can't be a rendertarget or a blit dst
then it can't be used for the designated functionality and must be rejected
cc: mesa-stable
fixes hangs on various nv driver versions:
dEQP-GLES2.functional.texture.mipmap.2d.generate.rgba5551_fastest
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15960>
Mike Blumenkrantz [Mon, 18 Apr 2022 14:54:17 +0000 (10:54 -0400)]
zink: add baseline for amdpro
got some work to do here
Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15980>
Mike Blumenkrantz [Fri, 15 Apr 2022 17:54:59 +0000 (13:54 -0400)]
zink: disable EXT_extended_dynamic_state2 on AMDPRO
this is broken beyond space and time in 22.10-1395274
Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15980>
Mike Blumenkrantz [Fri, 15 Apr 2022 15:18:07 +0000 (11:18 -0400)]
zink: remove tcs patch slot map
this is illegal, and we'll just have to eat some piglit fails
until indirects are handled
Fixes:
f7ade1f1885 ("zink: simplify shader i/o assignment")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15976>
Erik Faye-Lund [Wed, 13 Apr 2022 10:46:55 +0000 (12:46 +0200)]
gallium: rename ldexp shader-cap
This is no longer TGSI specific, so let's rename it to reflect
reality.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15922>
Erik Faye-Lund [Wed, 13 Apr 2022 10:46:55 +0000 (12:46 +0200)]
gallium: rename dfracexp/dldexp shader-cap
This is no longer TGSI specific, so let's rename it to reflect
reality.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15922>
Erik Faye-Lund [Wed, 13 Apr 2022 10:46:55 +0000 (12:46 +0200)]
gallium: rename dround shader-cap
This is no longer TGSI specific, so let's rename it to reflect
reality.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15922>
Erik Faye-Lund [Wed, 13 Apr 2022 10:46:55 +0000 (12:46 +0200)]
gallium: rename continue shader-cap
This is no longer TGSI specific, so let's rename it to reflect
reality.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15922>
Mike Blumenkrantz [Sat, 16 Apr 2022 16:16:14 +0000 (12:16 -0400)]
zink: clamp max shader images to 32
NO MATTER WHAT.
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16013>
Konstantin Seurer [Mon, 18 Apr 2022 08:42:14 +0000 (10:42 +0200)]
radv: Fix ray queries with !15854
Fixes: b62e90a ("radv: use nir_op_imm helpers")
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16004>
Georg Lehmann [Mon, 18 Apr 2022 11:11:56 +0000 (13:11 +0200)]
aco: Remove some old comments in aco_opcodes.py.
s_cmovk_i32 isn't GFX8_GFX9 only and s_version doesn't need a comment to say
it's GFX10+ exclusive. The encoding list is enough to provide this information,
as for other GFX10+ instructions.
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16006>
Sviatoslav Peleshko [Tue, 12 Apr 2022 09:52:27 +0000 (12:52 +0300)]
mesa: flush bitmap caches when changing scissors or window rects state
If we change the sate without flushing the bitmap cache, the cache might be
rendered with the new scissor, which excludes some parts that should've
been rendered with the old state, and vice versa.
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6233
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15881>
Juan A. Suarez Romero [Mon, 18 Apr 2022 09:11:48 +0000 (11:11 +0200)]
ci/v3dv: remove fixed test
`dEQP-VK.api.external.semaphore.opaque_fd.info_timeline` is already
fixed.
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16005>
Timothy Arceri [Mon, 18 Apr 2022 03:53:21 +0000 (13:53 +1000)]
nir: fix setting varying from uniform as flat
Here we just make sure we match the interpolation type on both
sides of the shader interface. Drivers like d3d12 are expecting
this.
Fixes:
9401990e6f7a ("nir/linker: set varying from uniform as flat")
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16003>
illiliti [Fri, 1 Apr 2022 15:57:13 +0000 (18:57 +0300)]
Use proper types for meson objects
Fix invalid usage of meson objects which violates official meson
specification and thus breaks muon, an implementation of meson
written in C.
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15715>
Samuel Pitoiset [Thu, 14 Apr 2022 15:31:51 +0000 (17:31 +0200)]
radv: fix initializing pipeline_key::topology for GFX9 and older
This is used to determine the geometry shader info on GFX9, and it
looks like it was broken for topologies that use adjacency.
This is also used to remove PSIZ from shaders that don't need it.
Found by inspection.
fossils-db (Polaris10):
Totals from 140 (0.10% of 135960) affected shaders:
SGPRs: 10448 -> 9696 (-7.20%)
VGPRs: 4376 -> 4264 (-2.56%)
CodeSize: 164316 -> 161028 (-2.00%)
Instrs: 26449 -> 25767 (-2.58%)
Latency: 184448 -> 180468 (-2.16%)
InvThroughput: 80772 -> 79092 (-2.08%)
VClause: 337 -> 328 (-2.67%); split: -2.97%, +0.30%
SClause: 859 -> 813 (-5.36%); split: -5.70%, +0.35%
Copies: 1027 -> 790 (-23.08%)
PreSGPRs: 2751 -> 2331 (-15.27%)
PreVGPRs: 3887 -> 3836 (-1.31%)
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15948>
Timothy Arceri [Thu, 14 Apr 2022 03:35:57 +0000 (13:35 +1000)]
glsl/st: vectorise interfaces of SSO shader programs
For example the SSO program may consist of just tcs -> gs or even
just a vs. In these cases we want to vectorise the externally
facing shader interfaces just like we would in non SSO programs.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15941>
Lionel Landwerlin [Tue, 29 Mar 2022 08:47:23 +0000 (11:47 +0300)]
intel/fs: require memory fence commit bit on Gfx9
Fixes a hang on Gfx9 GT1 : dEQP-VK.compute.zero_initialize_workgroup_memory.max_workgroup_memory.128
Tested-by: Mark Janes <markjanes@swizzler.org>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15596>
Lionel Landwerlin [Sat, 26 Mar 2022 21:59:26 +0000 (23:59 +0200)]
intel: fix URB programming for GT1s
We're missing a programming restriction.
Hopefully fixing
dEQP-VK.spirv_assembly.instruction.graphics.float16.arithmetic_1.* on
Gfx9atoms
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6216
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>.
Tested-by: Mark Janes <markjanes@swizzler.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15596>
Josh Billingsley [Sun, 17 Apr 2022 18:36:14 +0000 (18:36 +0000)]
driconf: add SD Gundam G Generation Cross Rays
Required to avoid blank white screen on game launch
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15998>
Gert Wollny [Sun, 17 Apr 2022 07:47:28 +0000 (09:47 +0200)]
r600/sfn: Fix store_shared_r600 write masks
The error was caught by the new nir_validation code.
Fixes:
73ef225fc277cd7ccc996a0306cc3e9a30c46fa3
nir: validate write_mask for all intrinsics that have it
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15994>
Marek Olšák [Tue, 12 Apr 2022 23:11:11 +0000 (19:11 -0400)]
gallium/winsys: move {amdgpu,radeon_drm}_public.h contents into radeon_winsys.h
header file simplification
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15907>
Marek Olšák [Tue, 12 Apr 2022 23:06:24 +0000 (19:06 -0400)]
gallium: move radeon_winsys.h into gallium/include/winsys/
it's used by 3 different drivers, so it shouldn't be in radeonsi
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15907>
Marek Olšák [Tue, 12 Apr 2022 22:30:46 +0000 (18:30 -0400)]
gallium: move drivers/radeon/* into drivers/radeonsi/
this is only used by radeonsi
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15907>
Emma Anholt [Tue, 12 Apr 2022 00:27:13 +0000 (17:27 -0700)]
nir: Avoid generating extra ftruncs for array handling.
It's quite likely that the source of the f2i32 was already an integer, in
which case we can skip the ftrunc (particularly useful on the int-to-float
class of hardware that's unlikely to just have a native trunc opcode!).
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15870>
Emma Anholt [Tue, 12 Apr 2022 00:33:58 +0000 (17:33 -0700)]
nir: Skip fround_even on already-integral values.
Just like the other make-the-float-an-integer opcodes. Noticed in a
gallium nine shader run through TGSI-to-NIR, where the array index had
been floored by the user, but got implicitly rounded by DX9 array
indexing.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15870>
Emma Anholt [Mon, 11 Apr 2022 23:28:05 +0000 (16:28 -0700)]
nir: Add lowering for fround_even on r300.
When we put NIR in the compiler stack for r300, indirect addressing broke
for gallium nine. DX's array indirects round the float value, so the DX
shader gets mapped to a TGSI "ARR ADDR[0] src.x" instruction. Translating
that to NIR maps to r0[f2i32(fround(src.x))]. While we might hope that in
translation back using nir-to-tgsi after optimization we would recognize
the construct and emit ARR again, that's going to be error prone (think
"what if src.x is in a NIR register?") so we need a fallback plan. r300
will be able to handle this lowering, so get it in place first to fix the
regression.
Fixes: #6297
Fixes:
7d2ea9b0edef ("r300: Request NIR shaders from mesa/st and use NIR-to-TGSI.")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15870>
Leandro Ribeiro [Mon, 11 Apr 2022 01:54:36 +0000 (22:54 -0300)]
Revert "egl/wayland: deprecate drm_handle_format() and drm_handle_capabilities()"
Commit
af1ee8e010441f8f2ed8c77065b159652a4ac9fe dropped support to
wl_drm, as we thought that most compositors from active projects were
already supporting zwp_linux_dmabuf_v1.
But that's not true, so revert this commit in order to give these
projects a longer transition period.
Note that we didn't add back the support to GEM name API, and that was
on purpose.
Signed-off-by: Leandro Ribeiro <leandro.ribeiro@collabora.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15822>
Icecream95 [Fri, 15 Apr 2022 11:50:33 +0000 (23:50 +1200)]
panfrost: Stop overallocating compressed textures
The line stride uses the number of bytes in the entire block, so both
the width and height need to be reduced for compressed textures so
that the surface stride is calculated correctly.
Fixes:
051d62cf041 ("panfrost: Add a pan_image_layout_init() helper")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6286
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15989>
Alyssa Rosenzweig [Wed, 13 Apr 2022 17:46:17 +0000 (13:46 -0400)]
docs/panfrost: Document drm-shim usage
Document how to build and use Panfrost's drm-shim implementation. I hope by
documenting this process, other Mesa developers are better able to test
Panfrost. In particular, this allows developers without Mali hardware to run
shader-db for any Mali target, which may be useful for debugging regressions
from common NIR changes.
drm-shim is not a substitute for testing against real hardware.
Special thanks to Emma Anholt and Icecream95 for building this infrastructure.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15930>
Alyssa Rosenzweig [Thu, 14 Apr 2022 15:23:48 +0000 (11:23 -0400)]
panfrost: Rework PAN_GPU_ID mechanism
Originally, PAN_GPU_ID was checked in the driver itself. I added the mechanism
to run Bifrost shader-db on my Midgard laptop. There was no drm-shim support at
this point, and this was a reasonable stop gap at the time.
Nowadays, we have a competent drm-shim implementation, which wholly replaces
this use case. So PAN_GPU_ID is only useful for drm-shim. Let's pull the code
into drm-shim and get it out of the driver. This allows NDEBUG drm-shim builds
to work properly.
While we're at it, the default emulated GPU is changed from Mali-T860 to
Mali-G52. This reflects our shifting development priorities.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Suggested-by: Icecream95 <ixn@disroot.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15930>
Alyssa Rosenzweig [Thu, 14 Apr 2022 20:31:48 +0000 (16:31 -0400)]
panfrost: Dirty track batch masks
Since
5d187e9cade ("panfrost: Add helpers to set batch masks"), we have common
helpers to set the colour and depth/stencil batch masks. Rather than set the
masks in various Midgard/Bifrost specific paths, set them generically based on
the finer dirty tracking. This lets us share the logic with Valhall.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15956>
Alyssa Rosenzweig [Thu, 14 Apr 2022 20:12:01 +0000 (16:12 -0400)]
panfrost: Rework dirty tracking for Valhall
Midgard aggregates a large amount of state into its renderer state descriptor.
Our current dirty tracking reflects this, with a single RENDERER dirty flag.
That won't work well on Valhall, which splits out orthogonal state into
independent descriptors (a blend descriptor, a depth/stencil descriptor, and so
on). To prepare for Valhall support, this patch moves the driver to finer dirty
tracking.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15956>
Alyssa Rosenzweig [Thu, 14 Apr 2022 14:53:08 +0000 (10:53 -0400)]
docs/panfrost: Document u-interleaved tiling
The optimized routine documented the tiling format together with the software
algorithm. The reference implementation wants the tiling format alone
documented. Let's break out the high level documentation into somewhere
centrally accessible, and refocus the comments in the optimized file on the
optimization.
This documentation is linked bidirectionally with both implementations, so it
should be easy to find.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15803>
Alyssa Rosenzweig [Fri, 8 Apr 2022 20:26:14 +0000 (16:26 -0400)]
panfrost: Unit test u-interleaved tiling routines
These are complex and not used in all dEQP paths. They're also easy to unit
test, so add some tests to prevent regressions.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15803>
Alyssa Rosenzweig [Thu, 14 Apr 2022 15:48:41 +0000 (11:48 -0400)]
panfrost: Document arguments to tiling routines
The exact semantics of these routines are subtle, although they match what
Gallium wants. We're about to add unit tests. Add some comments that make it
obvious what it is we expect these routines to do. (In particular, it's not a
general region-of-interest copy, it's a region-of-interest of the tiled image
and the entire linear staging image.)
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15803>
Alyssa Rosenzweig [Thu, 14 Apr 2022 14:34:51 +0000 (10:34 -0400)]
panfrost: Assert alignment in tiling routine
We depend on this invariant implicitly. Make that dependence explicit so we
don't get confused and add broken unit tests.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15803>
Alyssa Rosenzweig [Thu, 7 Apr 2022 18:48:48 +0000 (14:48 -0400)]
panfrost: Allow tiling all texture targets
Now that tiled access to 3D textures works, we can enable tiling on all texture
targets. In particular, this adds tiling support for cube maps, arrays, and 3D
textures. Previously, these would usually fall back to linear, which is hard on
the caches.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15803>
Alyssa Rosenzweig [Sat, 9 Apr 2022 22:24:33 +0000 (18:24 -0400)]
panfrost: Only tile for 2D dimensions
1D textures (Nx1 or 1xN) do not benefit from tiling. Don't try, it's a waste.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Suggested-by: Icecream95 <ixn@disroot.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15803>
Alyssa Rosenzweig [Thu, 7 Apr 2022 18:48:05 +0000 (14:48 -0400)]
panfrost: Implement tiled 3D resource access
We need to access each layer separately. This is a simple generalization of the
existing tiled 2D resource access code.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15803>
Alyssa Rosenzweig [Thu, 7 Apr 2022 18:46:55 +0000 (14:46 -0400)]
panfrost: Only handle 2D in should_linear_convert
The tiled->linear conversion mechanism is meant for 2D and doesn't handle tiled
+ 3D. This use case is not expected application behaviour, it's not worth the
complexity to try to handle.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15803>
Alyssa Rosenzweig [Thu, 7 Apr 2022 18:02:53 +0000 (14:02 -0400)]
panfrost: Remove bpp check for tiling
All pixel formats are now tileable.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15803>
Alyssa Rosenzweig [Thu, 7 Apr 2022 17:58:36 +0000 (13:58 -0400)]
panfrost: Add 48-bit and 96-bit tiling routines
Thanks to our macros and some type trickery, our generic tiling routines are
type-generic. So we just need to add 48-bit and 96-bit texel types to tile. Note
we only support power-of-two bit sizes in the specialized tile routines for the
sake of replacing a multiplication with a shift.
With this change, all pixel formats supported in Panfrost are tileable.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15803>
Rhys Perry [Fri, 8 Apr 2022 18:29:22 +0000 (19:29 +0100)]
radv: always use nir_lower_io_lower_64bit_to_32
Our I/O lowering doesn't handle 64-bit TCS stores and TES loads which use
several slots. Because of the large stride between slots, we have to split
the load so that there's a single load_buffer_amd/store_buffer_amd
intrinsic for each slot.
Our I/O lowering also sometimes creates nir_op_pack_64_2x32 after
nir_lower_alu_to_scalar.
Fixes KHR-GL45.gpu_shader_fp64.fp64.varyings with Zink
(https://gitlab.freedesktop.org/mesa/mesa/-/issues/6276)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15863>
Rhys Perry [Mon, 11 Apr 2022 18:45:57 +0000 (19:45 +0100)]
ac/nir: fix 64-bit NGG GS output stores
I don't know why this was here. The DIV_ROUND_UP ensures that it's always
at least 1 and the MIN2 ensures that it's never greater than 1.
Fixes some KHR-Single-GL46.enhanced_layouts.varying_* tests with zink:
https://gitlab.freedesktop.org/mesa/mesa/-/issues/6301
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15863>
Michel Zou [Sun, 10 Apr 2022 07:51:52 +0000 (09:51 +0200)]
gallium: fix unused symbols warnings
fixes:
d760a915
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15840>
Jason Ekstrand [Fri, 15 Apr 2022 20:20:17 +0000 (15:20 -0500)]
nir/opcodes: fisfinite32 should return bool32
Otherwise constant-folding will fold it to 0/1 instead of 0/~0.
Fixes:
330e28155f79 ("nir: add 32-bit bool of fisfinite")
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15984>
Jason Ekstrand [Fri, 15 Apr 2022 20:06:40 +0000 (15:06 -0500)]
nir,microsoft: Move scale_fdiv into a common NIR pass
While we're at it, convert to nir_shader_instructions_pass() to get rid
of some boilerplate and get metadata correct.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15983>
Jason Ekstrand [Fri, 15 Apr 2022 20:24:11 +0000 (15:24 -0500)]
intel/compiler: Set lower_fisnormal
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15985>
Rhys Perry [Fri, 25 Mar 2022 19:55:30 +0000 (19:55 +0000)]
radv: use inot(a) instead of ine(a, true)/ieq(a, false)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15854>
Rhys Perry [Fri, 25 Mar 2022 19:53:38 +0000 (19:53 +0000)]
radv: use nir_op_imm helpers
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15854>
Rhys Perry [Wed, 30 Mar 2022 10:56:01 +0000 (11:56 +0100)]
radv: use radv_meta_build_nir_vs_generate_vertices() more
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15854>
Rhys Perry [Wed, 30 Mar 2022 10:52:58 +0000 (11:52 +0100)]
radv: initialize meta shader options earlier
We might need this for NIR builders.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15854>
Rhys Perry [Tue, 29 Mar 2022 19:16:01 +0000 (20:16 +0100)]
radv: remove unnecessary align_mul/offset initialization
Since
af51efe195b, these builders fill these in with scalar alignment if
not provided.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15854>
Rhys Perry [Tue, 29 Mar 2022 19:16:54 +0000 (20:16 +0100)]
nir/builder: add nir_{ine,ibfe,ubfe}_imm() helper
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15854>
Rhys Perry [Thu, 14 Apr 2022 18:20:40 +0000 (19:20 +0100)]
nir/gather_info: fix system_value_read for rt/mesh system values
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes:
c7eaf030687 ("radv: use shader_info::system_values_read")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15952>
Rhys Perry [Thu, 14 Apr 2022 17:57:51 +0000 (18:57 +0100)]
ac/nir: properly handle large global access constant offsets
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Fixes:
61ac5acca3b ("radv,ac/nir: lower global access to _amd global access intrinsics")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6321
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15951>
Lionel Landwerlin [Wed, 1 Sep 2021 10:01:11 +0000 (13:01 +0300)]
anv: use shadow surface for stencil input attachment on gfx7
This fixes a number of tests like :
dEQP-VK.renderpass*.suballocation.multisample.s8_uint.*
dEQP-VK.renderpass*.suballocation.multisample.separate_stencil_usage.d24_unorm_s8_uint.*.test_stencil
dEQP-VK.renderpass*.suballocation.multisample.d24_unorm_s8_uint.*
dEQP-VK.renderpass*.suballocation.multisample.d32_sfloat_s8_uint.*
Because the driver asserts when generating RENDER_SURFACE_STATE with a
8 Valign value for stencil buffer (only 2 & 4 are supported).
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12670>
Samuel Pitoiset [Wed, 13 Apr 2022 14:37:09 +0000 (16:37 +0200)]
radv: add support for VkShaderModuleCreateInfo as pNext
With VK_EXT_graphics_pipeline_library, modules can be passed via the
pNext of VkpipelineShaderStageCreateInfo.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15926>
Samuel Pitoiset [Mon, 11 Apr 2022 10:05:48 +0000 (12:05 +0200)]
radv: add support for independent descriptor set layouts
With VK_EXT_graphics_pipeline_library, pipeline layouts created with
VK_PIPELINE_LAYOUT_CREATE_INDEPENDENT_SETS_BIT_EXT might contain NULL
descriptor sets.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15926>
Samuel Pitoiset [Fri, 18 Mar 2022 07:34:26 +0000 (08:34 +0100)]
radv: fix enabling adjust_frag_coord_z and apply per-pipeline
Fossilize always enables all supported extensions, that means that
adjust_frag_coord_z would always be enabled on RDNA2, even if the
application doesn't enable it. The pipeline key would then be different
and precompilation wouldn't work. Move this per-pipeline since we can
know if VRS will be used.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15444>
M Henning [Tue, 8 Feb 2022 06:00:02 +0000 (01:00 -0500)]
nouveau/nir: Allow up to 6 nested joins
This matches what the tgsi path does and doesn't regress any tests. (For
comparison, unlimited join nesting does regress tests in deqp and piglit)
Fixes graphical artifacts from stack overflows in
https://www.shadertoy.com/view/Xds3zN
with nir on kepler
Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15597>
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