platform/kernel/linux-starfive.git
4 years agocrypto: ccp - fix error handling
Pavel Machek [Mon, 21 Sep 2020 11:34:35 +0000 (13:34 +0200)]
crypto: ccp - fix error handling

Fix resource leak in error handling.

Signed-off-by: Pavel Machek (CIP) <pavel@denx.de>
Acked-by: John Allen <john.allen@amd.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: cpt - simplify the return expression of cav_register_algs
Liu Shixin [Mon, 21 Sep 2020 08:24:28 +0000 (16:24 +0800)]
crypto: cpt - simplify the return expression of cav_register_algs

Simplify the return expression.

Signed-off-by: Liu Shixin <liushixin2@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agointegrity: Asymmetric digsig supports SM2-with-SM3 algorithm
Tianjia Zhang [Sun, 20 Sep 2020 16:21:03 +0000 (00:21 +0800)]
integrity: Asymmetric digsig supports SM2-with-SM3 algorithm

Asymmetric digsig supports SM2-with-SM3 algorithm combination,
so that IMA can also verify SM2's signature data.

Signed-off-by: Tianjia Zhang <tianjia.zhang@linux.alibaba.com>
Tested-by: Xufeng Zhang <yunbo.xufeng@linux.alibaba.com>
Reviewed-by: Mimi Zohar <zohar@linux.ibm.com>
Reviewed-by: Vitaly Chikunov <vt@altlinux.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agoX.509: support OSCCA SM2-with-SM3 certificate verification
Tianjia Zhang [Sun, 20 Sep 2020 16:21:02 +0000 (00:21 +0800)]
X.509: support OSCCA SM2-with-SM3 certificate verification

The digital certificate format based on SM2 crypto algorithm as
specified in GM/T 0015-2012. It was published by State Encryption
Management Bureau, China.

The method of generating Other User Information is defined as
ZA=H256(ENTLA || IDA || a || b || xG || yG || xA || yA), it also
specified in https://tools.ietf.org/html/draft-shen-sm2-ecdsa-02.

The x509 certificate supports SM2-with-SM3 type certificate
verification.  Because certificate verification requires ZA
in addition to tbs data, ZA also depends on elliptic curve
parameters and public key data, so you need to access tbs in sig
and calculate ZA. Finally calculate the digest of the
signature and complete the verification work. The calculation
process of ZA is declared in specifications GM/T 0009-2012
and GM/T 0003.2-2012.

Signed-off-by: Tianjia Zhang <tianjia.zhang@linux.alibaba.com>
Tested-by: Xufeng Zhang <yunbo.xufeng@linux.alibaba.com>
Reviewed-by: Gilad Ben-Yossef <gilad@benyossef.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agoX.509: support OSCCA certificate parse
Tianjia Zhang [Sun, 20 Sep 2020 16:21:01 +0000 (00:21 +0800)]
X.509: support OSCCA certificate parse

The digital certificate format based on SM2 crypto algorithm as
specified in GM/T 0015-2012. It was published by State Encryption
Management Bureau, China.

This patch adds the OID object identifier defined by OSCCA. The
x509 certificate supports SM2-with-SM3 type certificate parsing.
It uses the standard elliptic curve public key, and the sm2
algorithm signs the hash generated by sm3.

Signed-off-by: Tianjia Zhang <tianjia.zhang@linux.alibaba.com>
Tested-by: Xufeng Zhang <yunbo.xufeng@linux.alibaba.com>
Reviewed-by: Vitaly Chikunov <vt@altlinux.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: sm2 - add SM2 test vectors to testmgr
Tianjia Zhang [Sun, 20 Sep 2020 16:21:00 +0000 (00:21 +0800)]
crypto: sm2 - add SM2 test vectors to testmgr

Add testmgr test vectors for SM2 algorithm. These vectors come
from `openssl pkeyutl -sign` and libgcrypt.

Signed-off-by: Tianjia Zhang <tianjia.zhang@linux.alibaba.com>
Tested-by: Xufeng Zhang <yunbo.xufeng@linux.alibaba.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: testmgr - Fix potential memory leak in test_akcipher_one()
Tianjia Zhang [Sun, 20 Sep 2020 16:20:59 +0000 (00:20 +0800)]
crypto: testmgr - Fix potential memory leak in test_akcipher_one()

When the 'key' allocation fails, the 'req' will not be released,
which will cause memory leakage on this path. This patch adds a
'free_req' tag used to solve this problem, and two new err values
are added to reflect the real reason of the error.

Signed-off-by: Tianjia Zhang <tianjia.zhang@linux.alibaba.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: testmgr - support test with different ciphertext per encryption
Tianjia Zhang [Sun, 20 Sep 2020 16:20:58 +0000 (00:20 +0800)]
crypto: testmgr - support test with different ciphertext per encryption

Some asymmetric algorithms will get different ciphertext after
each encryption, such as SM2, and let testmgr support the testing
of such algorithms.

In struct akcipher_testvec, set c and c_size to be empty, skip
the comparison of the ciphertext, and compare the decrypted
plaintext with m to achieve the test purpose.

Signed-off-by: Tianjia Zhang <tianjia.zhang@linux.alibaba.com>
Tested-by: Xufeng Zhang <yunbo.xufeng@linux.alibaba.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: sm2 - introduce OSCCA SM2 asymmetric cipher algorithm
Tianjia Zhang [Sun, 20 Sep 2020 16:20:57 +0000 (00:20 +0800)]
crypto: sm2 - introduce OSCCA SM2 asymmetric cipher algorithm

This new module implement the SM2 public key algorithm. It was
published by State Encryption Management Bureau, China.
List of specifications for SM2 elliptic curve public key cryptography:

* GM/T 0003.1-2012
* GM/T 0003.2-2012
* GM/T 0003.3-2012
* GM/T 0003.4-2012
* GM/T 0003.5-2012

IETF: https://tools.ietf.org/html/draft-shen-sm2-ecdsa-02
oscca: http://www.oscca.gov.cn/sca/xxgk/2010-12/17/content_1002386.shtml
scctc: http://www.gmbz.org.cn/main/bzlb.html

Signed-off-by: Tianjia Zhang <tianjia.zhang@linux.alibaba.com>
Tested-by: Xufeng Zhang <yunbo.xufeng@linux.alibaba.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agolib/mpi: Introduce ec implementation to MPI library
Tianjia Zhang [Sun, 20 Sep 2020 16:20:56 +0000 (00:20 +0800)]
lib/mpi: Introduce ec implementation to MPI library

The implementation of EC is introduced from libgcrypt as the
basic algorithm of elliptic curve, which can be more perfectly
integrated with MPI implementation.
Some other algorithms will be developed based on mpi ecc, such as SM2.

Signed-off-by: Tianjia Zhang <tianjia.zhang@linux.alibaba.com>
Tested-by: Xufeng Zhang <yunbo.xufeng@linux.alibaba.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agolib/mpi: Extend the MPI library
Tianjia Zhang [Sun, 20 Sep 2020 16:20:55 +0000 (00:20 +0800)]
lib/mpi: Extend the MPI library

Expand the mpi library based on libgcrypt, and the ECC algorithm of
mpi based on libgcrypt requires these functions.
Some other algorithms will be developed based on mpi ecc, such as SM2.

Signed-off-by: Tianjia Zhang <tianjia.zhang@linux.alibaba.com>
Tested-by: Xufeng Zhang <yunbo.xufeng@linux.alibaba.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: sm3 - export crypto_sm3_final function
Tianjia Zhang [Sun, 20 Sep 2020 16:20:54 +0000 (00:20 +0800)]
crypto: sm3 - export crypto_sm3_final function

Both crypto_sm3_update and crypto_sm3_finup have been
exported, exporting crypto_sm3_final, to avoid having to
use crypto_sm3_finup(desc, NULL, 0, dgst) to calculate
the hash in some cases.

Signed-off-by: Tianjia Zhang <tianjia.zhang@linux.alibaba.com>
Tested-by: Xufeng Zhang <yunbo.xufeng@linux.alibaba.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: hisilicon/qm - remove the update of flags
Weili Qian [Sat, 19 Sep 2020 11:01:36 +0000 (19:01 +0800)]
crypto: hisilicon/qm - remove the update of flags

'qm_init_qp_status' is just a help function to initiate some 'QP' status.
'QP' status should be updated separately.
This patch removes the updating flags in 'QP' status.

Signed-off-by: Weili Qian <qianweili@huawei.com>
Reviewed-by: Zhou Wang <wangzhou1@hisilicon.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: hisilicon/qm - fix wrong return type of 'pci_get_drvdata'
Yang Shen [Sat, 19 Sep 2020 11:01:35 +0000 (19:01 +0800)]
crypto: hisilicon/qm - fix wrong return type of 'pci_get_drvdata'

The parameter type of 'pci_set_drvdata' is 'struct hisi_qm',
so here the return type of 'pci_get_drvdata' should be 'struct hisi_qm'
too.

Signed-off-by: Yang Shen <shenyang39@huawei.com>
Signed-off-by: Weili Qian <qianweili@huawei.com>
Reviewed-by: Zhou Wang <wangzhou1@hisilicon.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: hisilicon/hpre - fix a bug in dh algorithm
Meng Yu [Sat, 19 Sep 2020 03:13:52 +0000 (11:13 +0800)]
crypto: hisilicon/hpre - fix a bug in dh algorithm

Using 'g' not equal to 2 in dh algorithm may cause an error like this:

arm-smmu-v3 arm-smmu-v3.1.auto: event 0x10 received:
dh: Party A: generate public key test failed. err -22
11375.065672] dh alg: dh: test failed on vector 1, err=-22
arm-smmu-v3 arm-smmu-v3.1.auto:  0x0000790000000010
arm-smmu-v3 arm-smmu-v3.1.auto:  0x0000120800000080
hpre-dh self test failed
arm-smmu-v3 arm-smmu-v3.1.auto:  0x0000000000000000
arm-smmu-v3 arm-smmu-v3.1.auto:  0x0000000000000000
arm-smmu-v3 arm-smmu-v3.1.auto: event 0x10 received:
arm-smmu-v3 arm-smmu-v3.1.auto:  0x0000790000000010
arm-smmu-v3 arm-smmu-v3.1.auto:  0x0000120800000083
arm-smmu-v3 arm-smmu-v3.1.auto:  0x00000000000000c0
arm-smmu-v3 arm-smmu-v3.1.auto:  0x0000000000000000
arm-smmu-v3 arm-smmu-v3.1.auto: event 0x10 received:
arm-smmu-v3 arm-smmu-v3.1.auto:  0x0000790000000010
arm-smmu-v3 arm-smmu-v3.1.auto:  0x0000120800000081
arm-smmu-v3 arm-smmu-v3.1.auto:  0x0000000000000040
arm-smmu-v3 arm-smmu-v3.1.auto:  0x0000000000000000
arm-smmu-v3 arm-smmu-v3.1.auto: event 0x10 received:
arm-smmu-v3 arm-smmu-v3.1.auto:  0x0000790000000010
arm-smmu-v3 arm-smmu-v3.1.auto:  0x0000120800000082
arm-smmu-v3 arm-smmu-v3.1.auto:  0x0000000000000080
arm-smmu-v3 arm-smmu-v3.1.auto:  0x0000000000000000
hisi_hpre 0000:79:00.0: dat_rd_poison_int_set [error status=0x8] found
hisi_hpre 0000:79:00.0: ooo_rdrsp_err_int_set [error status=0xfc00] found
hisi_hpre 0000:79:00.0: Controller resetting...
hisi_hpre 0000:79:00.0: Controller reset complete
{2}[Hardware Error]: Hardware error from APEI Generic Hardware Error Source: 0
{2}[Hardware Error]: event severity: recoverable
{2}[Hardware Error]: Error 0, type: recoverable
{2}[Hardware Error]: section type: unknown, c8b328a8-9917-4af6-9a13-2e08ab2e7586
{2}[Hardware Error]: section length: 0x4c

as we missed initiating 'msg->in'.

Fixes: c8b4b477079d("crypto: hisilicon - add HiSilicon HPRE accelerator")
Signed-off-by: Meng Yu <yumeng18@huawei.com>
Reviewed-by: Zaibo Xu <xuzaibo@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: hisilicon/hpre - adjust some coding style
Meng Yu [Sat, 19 Sep 2020 03:13:51 +0000 (11:13 +0800)]
crypto: hisilicon/hpre - adjust some coding style

Adjust some coding style to make code aligned.

Signed-off-by: Meng Yu <yumeng18@huawei.com>
Reviewed-by: Zaibo Xu <xuzaibo@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: hisilicon/hpre - remove useless code
Meng Yu [Sat, 19 Sep 2020 03:13:50 +0000 (11:13 +0800)]
crypto: hisilicon/hpre - remove useless code

1. Remove unused member 'debug_root' in 'struct hpre_debug';
2. The u64 cast is redundant in 'cpu_to_le64'.

Fixes: 848974151618("crypto: hisilicon - Add debugfs for HPRE")
Fixes: dadbe4c11753("crypto: hisilicon/hpre - update debugfs ...")
Signed-off-by: Meng Yu <yumeng18@huawei.com>
Reviewed-by: Zaibo Xu <xuzaibo@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: chelsio - fix minor indentation issue
Colin Ian King [Fri, 18 Sep 2020 21:56:59 +0000 (22:56 +0100)]
crypto: chelsio - fix minor indentation issue

There is a statement that is indented by one whitespace too deeply,
fix this by removing the whitespace.

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: af_alg - add extra parameters for DRBG interface
Elena Petrova [Fri, 18 Sep 2020 15:42:16 +0000 (16:42 +0100)]
crypto: af_alg - add extra parameters for DRBG interface

Extend the user-space RNG interface:
  1. Add entropy input via ALG_SET_DRBG_ENTROPY setsockopt option;
  2. Add additional data input via sendmsg syscall.

This allows DRBG to be tested with test vectors, for example for the
purpose of CAVP testing, which otherwise isn't possible.

To prevent erroneous use of entropy input, it is hidden under
CRYPTO_USER_API_RNG_CAVP config option and requires CAP_SYS_ADMIN to
succeed.

Signed-off-by: Elena Petrova <lenaptr@google.com>
Acked-by: Stephan Müller <smueller@chronox.de>
Reviewed-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: sun8i-ss - fix comparison of integer expressions of different signedness
Corentin Labbe [Fri, 18 Sep 2020 07:23:15 +0000 (07:23 +0000)]
crypto: sun8i-ss - fix comparison of integer expressions of different signedness

This patch fixes the warning:
warning: comparison of integer expressions of different signedness: 'int' and 'long unsigned int' [-Wsign-compare]

Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: sun8i-ce - fix comparison of integer expressions of different signedness
Corentin Labbe [Fri, 18 Sep 2020 07:23:14 +0000 (07:23 +0000)]
crypto: sun8i-ce - fix comparison of integer expressions of different signedness

This patch fixes the warning:
warning: comparison of integer expressions of different signedness: 'int' and 'long unsigned int' [-Wsign-compare]

Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: sun8i-ce - Add support for the TRNG
Corentin Labbe [Fri, 18 Sep 2020 07:23:13 +0000 (07:23 +0000)]
crypto: sun8i-ce - Add support for the TRNG

This patch had support for the TRNG present in the CE.
Note that according to the algorithm ID, 2 version of the TRNG exists,
the first present in H3/H5/R40/A64 and the second present in H6.
This patch adds support for both, but only the second is working
reliabily according to rngtest.

Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: sun8i-ce - Add support for the PRNG
Corentin Labbe [Fri, 18 Sep 2020 07:23:12 +0000 (07:23 +0000)]
crypto: sun8i-ce - Add support for the PRNG

This patch had support for the PRNG present in the CE.
The output was tested with rngtest without any failure.

Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: sun8i-ce - Add stat_bytes debugfs
Corentin Labbe [Fri, 18 Sep 2020 07:23:11 +0000 (07:23 +0000)]
crypto: sun8i-ce - Add stat_bytes debugfs

This patch adds a new stat_bytes counter in the sun8i-ce debugfs.

Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: sun8i-ce - support hash algorithms
Corentin Labbe [Fri, 18 Sep 2020 07:23:10 +0000 (07:23 +0000)]
crypto: sun8i-ce - support hash algorithms

The CE support multiples hash algorithms, this patch adds support for
MD5, SHA1, SHA224, SHA256, SHA384 and SHA512.

Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: sun8i-ce - rename has_t_dlen_in_bytes to cipher_t_dlen_in_bytes
Corentin Labbe [Fri, 18 Sep 2020 07:23:09 +0000 (07:23 +0000)]
crypto: sun8i-ce - rename has_t_dlen_in_bytes to cipher_t_dlen_in_bytes

Hash algorithms will need also a spetial t_dlen handling, but since the
meaning will be different, rename the current flag to specify it apply
only on ciphers algorithms.

Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: sun8i-ce - handle different error registers
Corentin Labbe [Fri, 18 Sep 2020 07:23:08 +0000 (07:23 +0000)]
crypto: sun8i-ce - handle different error registers

Error registers are different across SoCs.
This patch handle those difference.

Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: sun8i-ce - split into prepare/run/unprepare
Corentin Labbe [Fri, 18 Sep 2020 07:23:07 +0000 (07:23 +0000)]
crypto: sun8i-ce - split into prepare/run/unprepare

This patch split the do_one_request into three.
Prepare will handle all DMA mapping and initialisation of the task
structure.
Unprepare will clean all DMA mapping.
And the do_one_request will be limited to just executing the task.

Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: sun8i-ce - move iv data to request context
Corentin Labbe [Fri, 18 Sep 2020 07:23:06 +0000 (07:23 +0000)]
crypto: sun8i-ce - move iv data to request context

Instead of storing IV data in the channel context, store them in the
request context.
Storing them in the channel structure was conceptualy wrong since they
are per request related.

Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: sun8i-ce - handle endianness of t_common_ctl
Corentin Labbe [Fri, 18 Sep 2020 07:23:05 +0000 (07:23 +0000)]
crypto: sun8i-ce - handle endianness of t_common_ctl

t_common_ctl is LE32 so we need to convert its value before using it.
This value is only used on H6 (ignored on other SoCs) and not handling
the endianness cause failure on xRNG/hashes operations on H6 when running BE.

Fixes: 06f751b61329 ("crypto: allwinner - Add sun8i-ce Crypto Engine")
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: sun8i-ss - better debug printing
Corentin Labbe [Fri, 18 Sep 2020 07:23:04 +0000 (07:23 +0000)]
crypto: sun8i-ss - better debug printing

This patch reworks the way debug info are printed.
Instead of printing raw numbers, let's add a bit of context.

Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: sun8i-ss - Add more comment on some structures
Corentin Labbe [Fri, 18 Sep 2020 07:23:03 +0000 (07:23 +0000)]
crypto: sun8i-ss - Add more comment on some structures

This patch adds some comment on structures used by sun8i-ss.

Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: sun8i-ss - fix a trivial typo
Corentin Labbe [Fri, 18 Sep 2020 07:23:02 +0000 (07:23 +0000)]
crypto: sun8i-ss - fix a trivial typo

This fixes a trivial typo.

Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: sun8i-ss - support hash algorithms
Corentin Labbe [Fri, 18 Sep 2020 07:23:01 +0000 (07:23 +0000)]
crypto: sun8i-ss - support hash algorithms

The SS support multiples hash algorithms, this patch adds support for
MD5, SHA1, SHA224 and SHA256.

Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: sun8i-ss - Add support for the PRNG
Corentin Labbe [Fri, 18 Sep 2020 07:23:00 +0000 (07:23 +0000)]
crypto: sun8i-ss - Add support for the PRNG

This patch had support for the PRNG present in the SS.
The output was tested with rngtest without any failure.

Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: sun8i-ss - Add SS_START define
Corentin Labbe [Fri, 18 Sep 2020 07:22:59 +0000 (07:22 +0000)]
crypto: sun8i-ss - Add SS_START define

Instead of using an hardcoded value, let's use a defined value for
SS_START.

Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: hisilicon/qm - Convert to DEFINE_SHOW_ATTRIBUTE
Qinglang Miao [Fri, 18 Sep 2020 01:31:13 +0000 (09:31 +0800)]
crypto: hisilicon/qm - Convert to DEFINE_SHOW_ATTRIBUTE

Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code.

Signed-off-by: Qinglang Miao <miaoqinglang@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: cavium/zip - Convert to DEFINE_SHOW_ATTRIBUTE
Qinglang Miao [Fri, 18 Sep 2020 01:31:12 +0000 (09:31 +0800)]
crypto: cavium/zip - Convert to DEFINE_SHOW_ATTRIBUTE

Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code.

Signed-off-by: Qinglang Miao <miaoqinglang@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: caam - Convert to DEFINE_SHOW_ATTRIBUTE
Qinglang Miao [Fri, 18 Sep 2020 01:31:11 +0000 (09:31 +0800)]
crypto: caam - Convert to DEFINE_SHOW_ATTRIBUTE

Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code.

Signed-off-by: Qinglang Miao <miaoqinglang@huawei.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: amlogic - Convert to DEFINE_SHOW_ATTRIBUTE
Qinglang Miao [Fri, 18 Sep 2020 01:31:10 +0000 (09:31 +0800)]
crypto: amlogic - Convert to DEFINE_SHOW_ATTRIBUTE

Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code.

Signed-off-by: Qinglang Miao <miaoqinglang@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: allwinner - Convert to DEFINE_SHOW_ATTRIBUTE
Qinglang Miao [Fri, 18 Sep 2020 01:31:08 +0000 (09:31 +0800)]
crypto: allwinner - Convert to DEFINE_SHOW_ATTRIBUTE

Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code.

Signed-off-by: Qinglang Miao <miaoqinglang@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: proc - Removing some useless only space lines
Corentin Labbe [Thu, 17 Sep 2020 18:59:36 +0000 (18:59 +0000)]
crypto: proc - Removing some useless only space lines

Some line got only spaces, remove them

Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: marvell/cesa - use devm_platform_ioremap_resource_byname
Zhang Qilong [Thu, 17 Sep 2020 07:42:34 +0000 (15:42 +0800)]
crypto: marvell/cesa - use devm_platform_ioremap_resource_byname

Use the devm_platform_ioremap_resource_byname() helper instead of
calling platform_get_resource_byname() and devm_ioremap_resource()
separately.

Signed-off-by: Zhang Qilong <zhangqilong3@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: arm/aes-neonbs - use typed init/exit routines for XTS
Ard Biesheuvel [Wed, 16 Sep 2020 12:36:42 +0000 (15:36 +0300)]
crypto: arm/aes-neonbs - use typed init/exit routines for XTS

Use the typed skcipher init/exit routines instead of the generic
cra_init/_exit routines when instantiating/releasing the XTS
skciphers.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: arm/aes-neonbs - avoid loading reorder argument on encryption
Ard Biesheuvel [Wed, 16 Sep 2020 12:36:41 +0000 (15:36 +0300)]
crypto: arm/aes-neonbs - avoid loading reorder argument on encryption

Reordering the tweak is never necessary for encryption, so avoid the
argument load on the encryption path.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: arm/aes-neonbs - avoid hacks to prevent Thumb2 mode switches
Ard Biesheuvel [Wed, 16 Sep 2020 12:36:40 +0000 (15:36 +0300)]
crypto: arm/aes-neonbs - avoid hacks to prevent Thumb2 mode switches

Instead of using a homegrown macrofied version of the adr instruction
that sets the Thumb bit in the output value, only to ensure that any
bx instructions consuming that value will not switch out of Thumb mode
when branching, use non-interworking mov (to PC) instructions, which
achieve the same thing.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: stm32/crc32 - Avoid lock if hardware is already used
Nicolas Toromanoff [Wed, 16 Sep 2020 06:33:44 +0000 (08:33 +0200)]
crypto: stm32/crc32 - Avoid lock if hardware is already used

If STM32 CRC device is already in use, calculate CRC by software.

This will release CPU constraint for a concurrent access to the
hardware, and avoid masking irqs during the whole block processing.

Fixes: 7795c0baf5ac ("crypto: stm32/crc32 - protect from concurrent accesses")

Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: qat - remove unnecessary mutex_init()
Qinglang Miao [Wed, 16 Sep 2020 06:21:21 +0000 (14:21 +0800)]
crypto: qat - remove unnecessary mutex_init()

The mutex adf_ctl_lock is initialized statically. It is
unnecessary to initialize by mutex_init().

Signed-off-by: Qinglang Miao <miaoqinglang@huawei.com>
Acked-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: arm/sha512-neon - avoid ADRL pseudo instruction
Ard Biesheuvel [Wed, 16 Sep 2020 06:14:18 +0000 (09:14 +0300)]
crypto: arm/sha512-neon - avoid ADRL pseudo instruction

The ADRL pseudo instruction is not an architectural construct, but a
convenience macro that was supported by the ARM proprietary assembler
and adopted by binutils GAS as well, but only when assembling in 32-bit
ARM mode. Therefore, it can only be used in assembler code that is known
to assemble in ARM mode only, but as it turns out, the Clang assembler
does not implement ADRL at all, and so it is better to get rid of it
entirely.

So replace the ADRL instruction with a ADR instruction that refers to
a nearer symbol, and apply the delta explicitly using an additional
instruction.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: arm/sha256-neon - avoid ADRL pseudo instruction
Ard Biesheuvel [Wed, 16 Sep 2020 06:14:17 +0000 (09:14 +0300)]
crypto: arm/sha256-neon - avoid ADRL pseudo instruction

The ADRL pseudo instruction is not an architectural construct, but a
convenience macro that was supported by the ARM proprietary assembler
and adopted by binutils GAS as well, but only when assembling in 32-bit
ARM mode. Therefore, it can only be used in assembler code that is known
to assemble in ARM mode only, but as it turns out, the Clang assembler
does not implement ADRL at all, and so it is better to get rid of it
entirely.

So replace the ADRL instruction with a ADR instruction that refers to
a nearer symbol, and apply the delta explicitly using an additional
instruction.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: qat - convert to use DEFINE_SEQ_ATTRIBUTE macro
Liu Shixin [Wed, 16 Sep 2020 02:50:17 +0000 (10:50 +0800)]
crypto: qat - convert to use DEFINE_SEQ_ATTRIBUTE macro

Use DEFINE_SEQ_ATTRIBUTE macro to simplify the code.

Signed-off-by: Liu Shixin <liushixin2@huawei.com>
Acked-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: lib/chacha20poly1305 - Set SG_MITER_ATOMIC unconditionally
Herbert Xu [Tue, 15 Sep 2020 03:30:24 +0000 (13:30 +1000)]
crypto: lib/chacha20poly1305 - Set SG_MITER_ATOMIC unconditionally

There is no reason for the chacha20poly1305 SG miter code to use
kmap instead of kmap_atomic as the critical section doesn't sleep
anyway.  So we can simply get rid of the preemptible check and
set SG_MITER_ATOMIC unconditionally.

Even if we need to reenable preemption to lower latency we should
be doing that by interrupting the SG miter walk rather than using
kmap.

Reported-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: inside-secure - Reuse code in safexcel_hmac_alg_setkey
Herbert Xu [Mon, 14 Sep 2020 04:22:16 +0000 (14:22 +1000)]
crypto: inside-secure - Reuse code in safexcel_hmac_alg_setkey

The code in the current implementation of safexcel_hmac_alg_setkey
can be reused by safexcel_cipher.  This patch does just that by
renaming the previous safexcel_hmac_setkey to __safexcel_hmac_setkey.
The now-shared safexcel_hmac_alg_setkey becomes safexcel_hmac_setkey
and a new safexcel_hmac_alg_setkey has been added for use by ahash
transforms.

As a result safexcel_aead_setkey's stack frame has been reduced by
about half in size, or about 512 bytes.

Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: inside-secure - Move ipad/opad into safexcel_context
Herbert Xu [Mon, 14 Sep 2020 04:22:14 +0000 (14:22 +1000)]
crypto: inside-secure - Move ipad/opad into safexcel_context

As both safexcel_ahash_ctx and safexcel_cipher_ctx contain ipad
and opad buffers this patch moves them into the common struct
safexcel_context.  It also adds a union so that they can be accessed
in the appropriate endian without crazy casts.

Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: inside-secure - Move priv pointer into safexcel_context
Herbert Xu [Mon, 14 Sep 2020 04:22:11 +0000 (14:22 +1000)]
crypto: inside-secure - Move priv pointer into safexcel_context

This patch moves the priv pointer into struct safexcel_context
because both structs that extend safexcel_context have that pointer
as well.

Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: atmel-aes - convert to use be32_add_cpu()
Liu Shixin [Mon, 14 Sep 2020 04:17:46 +0000 (12:17 +0800)]
crypto: atmel-aes - convert to use be32_add_cpu()

Convert cpu_to_be32(be32_to_cpu(E1) + E2) to use be32_add_cpu().

Signed-off-by: Liu Shixin <liushixin2@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocypto: mediatek - fix leaks in mtk_desc_ring_alloc
Xiaoliang Pang [Mon, 14 Sep 2020 03:00:51 +0000 (11:00 +0800)]
cypto: mediatek - fix leaks in mtk_desc_ring_alloc

In the init loop, if an error occurs in function 'dma_alloc_coherent',
then goto the err_cleanup section, after run i--,
in the array ring, the struct mtk_ring with index i will not be released,
causing memory leaks

Fixes: 785e5c616c849 ("crypto: mediatek - Add crypto driver support for some MediaTek chips")
Cc: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Xiaoliang Pang <dawning.pang@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agohwrng: ingenic - Add hardware TRNG for Ingenic X1830
周琰杰 (Zhou Yanjie) [Sun, 13 Sep 2020 16:10:21 +0000 (00:10 +0800)]
hwrng: ingenic - Add hardware TRNG for Ingenic X1830

Add X1830 SoC digital true random number generator driver.

Tested-by: 周正 (Zhou Zheng) <sernia.zhou@foxmail.com>
Co-developed-by: 漆鹏振 (Qi Pengzhen) <aric.pzqi@ingenic.com>
Signed-off-by: 漆鹏振 (Qi Pengzhen) <aric.pzqi@ingenic.com>
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agodt-bindings: RNG: Add Ingenic TRNG bindings.
周琰杰 (Zhou Yanjie) [Sun, 13 Sep 2020 16:10:20 +0000 (00:10 +0800)]
dt-bindings: RNG: Add Ingenic TRNG bindings.

Add the TRNG bindings for the X1830 SoC from Ingenic.

Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: Kconfig - mark unused ciphers as obsolete
Ard Biesheuvel [Fri, 11 Sep 2020 14:11:03 +0000 (17:11 +0300)]
crypto: Kconfig - mark unused ciphers as obsolete

We have a few interesting pieces in our cipher museum, which are never
used internally, and were only ever provided as generic C implementations.

Unfortunately, we cannot simply remove this code, as we cannot be sure
that it is not being used via the AF_ALG socket API, however unlikely.

So let's mark the Anubis, Khazad, SEED and TEA algorithms as obsolete,
which means they can only be enabled in the build if the socket API is
enabled in the first place.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: inside-secure - Add support for EIP197 with output classifier
Pascal van Leeuwen [Fri, 11 Sep 2020 07:46:39 +0000 (09:46 +0200)]
crypto: inside-secure - Add support for EIP197 with output classifier

This patch adds support for EIP197 instances that include the output
classifier (OCE) option, as used by one of our biggest customers.
The OCE normally requires initialization and dedicated firmware, but
for the simple operations supported by this driver, we just bypass it
completely for now (using what is formally a debug feature).

Signed-off-by: Pascal van Leeuwen <pvanleeuwen@rambus.com>
Acked-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: n2 - Fix sparse endianness warning
Herbert Xu [Fri, 11 Sep 2020 06:55:05 +0000 (16:55 +1000)]
crypto: n2 - Fix sparse endianness warning

This patch fixes sparse endianness warnings by changing the type
of hash_init to u8 from u32.  There should be no difference in the
generated code.

Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: sun8i - Simplify with dev_err_probe()
Krzysztof Kozlowski [Thu, 10 Sep 2020 19:29:19 +0000 (21:29 +0200)]
crypto: sun8i - Simplify with dev_err_probe()

Common pattern of handling deferred probe can be simplified with
dev_err_probe().  Less code and the error value gets printed.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: stm32-hash - Simplify with dev_err_probe()
Krzysztof Kozlowski [Thu, 10 Sep 2020 19:29:18 +0000 (21:29 +0200)]
crypto: stm32-hash - Simplify with dev_err_probe()

Common pattern of handling deferred probe can be simplified with
dev_err_probe().  Less code and the error value gets printed.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: caam - Simplify with dev_err_probe()
Krzysztof Kozlowski [Thu, 10 Sep 2020 19:29:17 +0000 (21:29 +0200)]
crypto: caam - Simplify with dev_err_probe()

Common pattern of handling deferred probe can be simplified with
dev_err_probe().  Less code and the error value gets printed.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Iuliana Prodan <iuliana.prodan@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: caam - Fix kerneldoc
Krzysztof Kozlowski [Thu, 10 Sep 2020 19:29:16 +0000 (21:29 +0200)]
crypto: caam - Fix kerneldoc

Fix kerneldoc warnings like:

  drivers/crypto/caam/caamalg_qi2.c:73: warning: cannot understand function prototype: 'struct caam_ctx'
  drivers/crypto/caam/caamalg_qi2.c:2962: warning: cannot understand function prototype: 'struct caam_hash_ctx'
  drivers/crypto/caam/ctrl.c:449: warning: Function parameter or member 'ctrl' not described in 'caam_get_era'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Iuliana Prodan <iuliana.prodan@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: hisilicon - fixed memory allocation error
Longfang Liu [Thu, 10 Sep 2020 11:56:43 +0000 (19:56 +0800)]
crypto: hisilicon - fixed memory allocation error

1. Fix the bug of 'mac' memory leak as allocating 'pbuf' failing.
2. Fix the bug of 'qps' leak as allocating 'qp_ctx' failing.

Signed-off-by: Longfang Liu <liulongfang@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: hisilicon - update ZIP module parameter description
Longfang Liu [Thu, 10 Sep 2020 11:56:42 +0000 (19:56 +0800)]
crypto: hisilicon - update ZIP module parameter description

In order to pass kernel CRYPTO test, ZIP module parameter
'pf_q_num' needs to be set as greater than 1.

Signed-off-by: Longfang Liu <liulongfang@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: hisilicon - update SEC module parameter description
Longfang Liu [Thu, 10 Sep 2020 11:56:41 +0000 (19:56 +0800)]
crypto: hisilicon - update SEC module parameter description

In order to pass kernel CRYPTO test, SEC module parameter
'pf_q_num' needs to be set as greater than 1.

Signed-off-by: Longfang Liu <liulongfang@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: hisilicon - update HPRE module parameter description
Longfang Liu [Thu, 10 Sep 2020 11:56:40 +0000 (19:56 +0800)]
crypto: hisilicon - update HPRE module parameter description

In order to pass kernel CRYPTO test, HPRE module parameter
'pf_q_num' needs to be set as greater than 1.

Signed-off-by: Longfang Liu <liulongfang@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: hisilicon - update mininum queue
Longfang Liu [Thu, 10 Sep 2020 11:56:39 +0000 (19:56 +0800)]
crypto: hisilicon - update mininum queue

At present, as HPRE/SEC/ZIP modules' parameter 'pf_q_num' is 1,
kernel CRYPTO test will fail on the algorithms from the modules,
since 'QP' hardware resources are not enough for CRYPTO TFM.
To fix this, the minimum value of 'pf_q_num' should be 2.

Signed-off-by: Longfang Liu <liulongfang@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: qat - use PCI_VDEVICE
Giovanni Cabiddu [Wed, 9 Sep 2020 10:59:40 +0000 (11:59 +0100)]
crypto: qat - use PCI_VDEVICE

Build pci_device_id structure using the PCI_VDEVICE macro.
This removes any references to the ADF_SYSTEM_DEVICE macro.

Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Reviewed-by: Fiona Trahe <fiona.trahe@intel.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: qat - replace device ids defines
Giovanni Cabiddu [Wed, 9 Sep 2020 10:59:39 +0000 (11:59 +0100)]
crypto: qat - replace device ids defines

Replace device ids defined in the QAT drivers with the ones in
include/linux/pci_ids.h.

Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Reviewed-by: Fiona Trahe <fiona.trahe@intel.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: sa2ul - Fix pm_runtime_get_sync() error checking
Dan Carpenter [Wed, 9 Sep 2020 09:45:28 +0000 (12:45 +0300)]
crypto: sa2ul - Fix pm_runtime_get_sync() error checking

The pm_runtime_get_sync() function returns either 0 or 1 on success but
this code treats a return of 1 as a failure.

Fixes: 7694b6ca649f ("crypto: sa2ul - Add crypto driver")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: inside-secure - Prevent missing of processing errors
Pascal van Leeuwen [Tue, 8 Sep 2020 06:10:45 +0000 (08:10 +0200)]
crypto: inside-secure - Prevent missing of processing errors

On systems with coherence issues, packet processed could succeed while
it should have failed, e.g. because of an authentication fail.
This is because the driver would read stale status information that had
all error bits initialised to zero = no error.
Since this is potential a security risk, we want to prevent it from being
a possibility at all. So initialize all error bits to error state, so
that reading stale status information will always result in errors.

Signed-off-by: Pascal van Leeuwen <pvanleeuwen@rambus.com>
Acked-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: sun4i-ss - Fix sparse endianness markers
Herbert Xu [Tue, 8 Sep 2020 05:00:36 +0000 (15:00 +1000)]
crypto: sun4i-ss - Fix sparse endianness markers

This patch also fixes the incorrect endianness markings in the
sun4i-ss driver.  It should have no effect in the genereated code.

Instead of using cpu_to_Xe32 followed by a memcpy, this patch
converts the final hash write to use put_unaligned_X instead.

Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Acked-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: hisilicon/zip - fix some coding styles
Yang Shen [Mon, 7 Sep 2020 08:22:02 +0000 (16:22 +0800)]
crypto: hisilicon/zip - fix some coding styles

1.Unified alignment styles
2.Remove unnecessary goto branch
3.Remove address printf

Signed-off-by: Yang Shen <shenyang39@huawei.com>
Reviewed-by: Zhou Wang <wangzhou1@hisilicon.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: hisilicon/zip - supplement some comments
Yang Shen [Mon, 7 Sep 2020 08:22:01 +0000 (16:22 +0800)]
crypto: hisilicon/zip - supplement some comments

Supplement some comments.

Signed-off-by: Yang Shen <shenyang39@huawei.com>
Reviewed-by: Zhou Wang <wangzhou1@hisilicon.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: hisilicon/zip - move some private macros from 'zip.h' to 'zip_crypto.c'
Yang Shen [Mon, 7 Sep 2020 08:22:00 +0000 (16:22 +0800)]
crypto: hisilicon/zip - move some private macros from 'zip.h' to 'zip_crypto.c'

Some macros which are defined in 'zip.h' are related to the struct
'hisi_zip_sqe' and are only used in 'zip_crypto.c'. So move them from
'zip.h' to 'zip_crypto.c'.

Signed-off-by: Yang Shen <shenyang39@huawei.com>
Reviewed-by: Zhou Wang <wangzhou1@hisilicon.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: hisilicon/zip - fix static check warning
Yang Shen [Mon, 7 Sep 2020 08:21:59 +0000 (16:21 +0800)]
crypto: hisilicon/zip - fix static check warning

Fix some code for PClint warning:
    Warning - Suspicious Cast

Signed-off-by: Yang Shen <shenyang39@huawei.com>
Reviewed-by: Zhou Wang <wangzhou1@hisilicon.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: hisilicon/zip - add print for error branch
Yang Shen [Mon, 7 Sep 2020 08:21:58 +0000 (16:21 +0800)]
crypto: hisilicon/zip - add print for error branch

Add print for some error branches.

Signed-off-by: Yang Shen <shenyang39@huawei.com>
Reviewed-by: Zhou Wang <wangzhou1@hisilicon.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: hisilicon/zip - use a enum parameter instead of some macros
Yang Shen [Mon, 7 Sep 2020 08:21:57 +0000 (16:21 +0800)]
crypto: hisilicon/zip - use a enum parameter instead of some macros

Macros 'QPC_COMP', 'QPC_DECOMP' and 'HZIP_CTX_Q_NUM' are relative and
incremental. So, use an enum instead.

Signed-off-by: Yang Shen <shenyang39@huawei.com>
Reviewed-by: Zhou Wang <wangzhou1@hisilicon.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: hisilicon/zip - replace 'sprintf' with 'scnprintf'
Yang Shen [Mon, 7 Sep 2020 08:21:56 +0000 (16:21 +0800)]
crypto: hisilicon/zip - replace 'sprintf' with 'scnprintf'

Replace 'sprintf' with 'scnprintf' to avoid overrun.

Signed-off-by: Yang Shen <shenyang39@huawei.com>
Reviewed-by: Zhou Wang <wangzhou1@hisilicon.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: hisilicon/zip - modify debugfs interface parameters
Shukun Tan [Mon, 7 Sep 2020 08:21:55 +0000 (16:21 +0800)]
crypto: hisilicon/zip - modify debugfs interface parameters

Update debugfs interface parameters

Signed-off-by: Shukun Tan <tanshukun1@huawei.com>
Signed-off-by: Yang Shen <shenyang39@huawei.com>
Reviewed-by: Zhou Wang <wangzhou1@hisilicon.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: hisilicon/zip - unify naming style for functions and macros
Yang Shen [Mon, 7 Sep 2020 08:21:54 +0000 (16:21 +0800)]
crypto: hisilicon/zip - unify naming style for functions and macros

1.Add prefix 'HZIP' for some macros
2.Add prefix 'hisi_zip' for some functions

Signed-off-by: Yang Shen <shenyang39@huawei.com>
Reviewed-by: Zhou Wang <wangzhou1@hisilicon.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: hisilicon/zip - remove some useless parameters
Yang Shen [Mon, 7 Sep 2020 08:21:53 +0000 (16:21 +0800)]
crypto: hisilicon/zip - remove some useless parameters

1.Remove the macro 'HZIP_VF_NUM'.
2.Remove 'list' of the struct 'hisi_zip'

Signed-off-by: Yang Shen <shenyang39@huawei.com>
Reviewed-by: Zhou Wang <wangzhou1@hisilicon.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: omap-sham - fix digcnt register handling with export/import
Tero Kristo [Mon, 7 Sep 2020 07:56:24 +0000 (10:56 +0300)]
crypto: omap-sham - fix digcnt register handling with export/import

Running export/import for hashes in peculiar order (mostly done by
openssl) can mess up the internal book keeping of the OMAP SHA core.
Fix by forcibly writing the correct DIGCNT back to hardware. This issue
was noticed while transitioning to openssl 1.1 support.

Fixes: 0d373d603202 ("crypto: omap-sham - Add OMAP4/AM33XX SHAM Support")
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: omap-sham - convert to use crypto engine
Tero Kristo [Mon, 7 Sep 2020 07:56:10 +0000 (10:56 +0300)]
crypto: omap-sham - convert to use crypto engine

Convert the omap-sham driver to use crypto engine for queue handling,
instead of using local implementation.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: sa2ul - Select CRYPTO_AUTHENC
Herbert Xu [Mon, 7 Sep 2020 06:22:40 +0000 (16:22 +1000)]
crypto: sa2ul - Select CRYPTO_AUTHENC

The sa2ul driver uses crypto_authenc_extractkeys and therefore
must select CRYPTO_AUTHENC.

Fixes: 7694b6ca649f ("crypto: sa2ul - Add crypto driver")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Reviewed-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: ux500 - Fix sparse endianness warnings
Herbert Xu [Fri, 4 Sep 2020 08:27:05 +0000 (18:27 +1000)]
crypto: ux500 - Fix sparse endianness warnings

This patch fixes a couple of sparse endianness warnings in the
ux500 driver.

Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: qat - include domain in top level debugfs path
Giovanni Cabiddu [Fri, 4 Sep 2020 08:04:15 +0000 (09:04 +0100)]
crypto: qat - include domain in top level debugfs path

Use pci_name() when creating debugfs entries in order to include PCI
domain in the path.

Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: s5p-sss - Pass error from clk_get and reduce verbosity on deferral
Krzysztof Kozlowski [Thu, 3 Sep 2020 18:04:00 +0000 (20:04 +0200)]
crypto: s5p-sss - Pass error from clk_get and reduce verbosity on deferral

Pass the error directly from devm_clk_get() to describe the real reason,
instead of fixed ENOENT.  Do not print error messages on deferred probe.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Kamil Konieczny <k.konieczny@samsung.com>
Acked-by: Kamil Konieczny <k.konieczny@samsung.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: s5p-sss - Add and fix kerneldoc
Krzysztof Kozlowski [Thu, 3 Sep 2020 18:03:59 +0000 (20:03 +0200)]
crypto: s5p-sss - Add and fix kerneldoc

Add missing and fix existing kerneldoc to silence W=1 warnings:

  drivers/crypto/s5p-sss.c:333: warning: Function parameter or member 'pclk' not described in 's5p_aes_dev'
  drivers/crypto/s5p-sss.c:373: warning: Function parameter or member 'sgl' not described in 's5p_hash_reqctx'
  drivers/crypto/s5p-sss.c:373: warning: Function parameter or member 'buffer' not described in 's5p_hash_reqctx'
  drivers/crypto/s5p-sss.c:1143: warning: Function parameter or member 'new_len' not described in 's5p_hash_prepare_sgs'
  drivers/crypto/s5p-sss.c:1143: warning: Excess function parameter 'nbytes' description in 's5p_hash_prepare_sgs'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Kamil Konieczny <k.konieczny@samsung.com>
Acked-by: Kamil Konieczny <k.konieczny@samsung.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: s5p-sss - remove redundant null check
Xu Wang [Thu, 3 Sep 2020 08:37:38 +0000 (08:37 +0000)]
crypto: s5p-sss - remove redundant null check

Because clk_disable_unprepare already checked NULL clock
parameter, so the additional checks are unnecessary, just remove them.

Signed-off-by: Xu Wang <vulab@iscas.ac.cn>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Kamil Konieczny <k.konieczny@samsung.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agohwrng: xiphera-trng: add support for XIP8001B hwrng
Atte Tommiska [Wed, 2 Sep 2020 10:28:17 +0000 (13:28 +0300)]
hwrng: xiphera-trng: add support for XIP8001B hwrng

Xiphera XIP8001B is an FPGA-based True Random Number Generator
Intellectual Property (IP) Core which can be instantiated in
multiple FPGA families. This driver adds Linux support for it through
the hwrng interface.

Signed-off-by: Atte Tommiska <atte.tommiska@xiphera.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agodt-bindings: rng: add bindings for Xiphera XIP8001B hwrng
Atte Tommiska [Wed, 2 Sep 2020 10:28:16 +0000 (13:28 +0300)]
dt-bindings: rng: add bindings for Xiphera XIP8001B hwrng

Document the device tree bindings of Xiphera's XIP8001B-trng IP.

Signed-off-by: Atte Tommiska <atte.tommiska@xiphera.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agodt-bindings: vendor-prefixes: Add Xiphera vendor prefix
Atte Tommiska [Wed, 2 Sep 2020 10:28:15 +0000 (13:28 +0300)]
dt-bindings: vendor-prefixes: Add Xiphera vendor prefix

Xiphera is an FPGA-based cryptographic solutions provider based in
Finland.
Website of the company: https://xiphera.com/

Signed-off-by: Atte Tommiska <atte.tommiska@xiphera.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: cbc - Remove cbc.h
Herbert Xu [Tue, 1 Sep 2020 11:49:11 +0000 (21:49 +1000)]
crypto: cbc - Remove cbc.h

Now that crypto/cbc.h is only used by the generic cbc template,
we can merge it back into the CBC code.

Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: arm/aes-neonbs - Use generic cbc encryption path
Herbert Xu [Tue, 1 Sep 2020 11:48:40 +0000 (21:48 +1000)]
crypto: arm/aes-neonbs - Use generic cbc encryption path

Since commit b56f5cbc7e08ec7d31c42fc41e5247677f20b143 ("crypto:
arm/aes-neonbs - resolve fallback cipher at runtime") the CBC
encryption path in aes-neonbs is now identical to that obtained
through the cbc template.  This means that it can simply call
the generic cbc template instead of doing its own thing.

This patch removes the custom encryption path and simply invokes
the generic cbc template.

Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
4 years agocrypto: arc4 - mark ecb(arc4) skcipher as obsolete
Ard Biesheuvel [Mon, 31 Aug 2020 15:16:49 +0000 (18:16 +0300)]
crypto: arc4 - mark ecb(arc4) skcipher as obsolete

Cryptographic algorithms may have a lifespan that is significantly
shorter than Linux's, and so we need to start phasing out algorithms
that are known to be broken, and are no longer fit for general use.

RC4 (or arc4) is a good example here: there are a few areas where its
use is still somewhat acceptable, e.g., for interoperability with legacy
wifi hardware that can only use WEP or TKIP data encryption, but that
should not imply that, for instance, use of RC4 based EAP-TLS by the WPA
supplicant for negotiating TKIP keys is equally acceptable, or that RC4
should remain available as a general purpose cryptographic transform for
all in-kernel and user space clients.

Now that all in-kernel users that need to retain support have moved to
the arc4 library interface, and the known users of ecb(arc4) via the
socket API (iwd [0] and libell [1][2]) have been updated to switch to a
local implementation, we can take the next step, and mark the ecb(arc4)
skcipher as obsolete, and only provide it if the socket API is enabled in
the first place, as well as provide the option to disable all algorithms
that have been marked as obsolete.

[0] https://git.kernel.org/pub/scm/network/wireless/iwd.git/commit/?id=1db8a85a60c64523
[1] https://git.kernel.org/pub/scm/libs/ell/ell.git/commit/?id=53482ce421b727c2
[2] https://git.kernel.org/pub/scm/libs/ell/ell.git/commit/?id=7f6a137809d42f6b

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>