Jason Ekstrand [Thu, 17 Nov 2022 16:35:49 +0000 (10:35 -0600)]
vulkan: Add state for extraPrimitiveOverestimationSize
Fixes:
13c422e1b2ed ("anv: toggle on EXT_extended_dynamic_state3")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19817>
(cherry picked from commit
b172fd62f51bba16970c413604053a64f7eda244)
Lionel Landwerlin [Sat, 19 Nov 2022 01:35:27 +0000 (03:35 +0200)]
anv: ensure CPS is initialized when KHR_fragment_shading_rate is disabled
We need to set CPS_MODE_NONE when no per coarse pixel dispatch.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes:
231651fd89fb ("anv: implement VK_KHR_fragment_shading_rate")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19867>
(cherry picked from commit
507a86e131d648ecc85dc833f4821da6ac995cfe)
Lionel Landwerlin [Sat, 19 Nov 2022 12:29:43 +0000 (14:29 +0200)]
anv: fix 3d state initialization
We missed a couple of restriction leading to inconsistent 3d pipeline
state. It is mostly noticeable when doing a multiple sample dispatch
as the verify first 3d operation.
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7531
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19867>
(cherry picked from commit
62f12c2dadc2c9eac34a946450b2d4c615f96f75)
Ian Romanick [Mon, 9 Aug 2021 22:05:33 +0000 (15:05 -0700)]
nir/loop_analyze: Fix get_iteration for nir_op_fneu
Consider the loop:
float i = 0.0;
while (true) {
if (i != 0.0)
break;
i = i + 1.0;
}
This loop clearly executes exactly one time.
Some trickery is necessary to handle cases where the initial loop value
is very large and the increment is, by comparison, very small. From the
fenu_once test case,
float i = -
604462909807314587353088.0;
while (true) {
if (i != -
604462909807314587353088.0)
break;
i = i +
36028797018963968.0;
}
This loop should also execute exactly once, but this is much more
challenging to calculate due to precision issues.
Going towards smaller magnitude (i.e., adding a small positive value to
a large negative value) requires a smaller delta to make a difference
than going towards a larger magnitude. For this reason,
-
604462909807314587353088.0 +
36028797018963968.0 !=
-
604462909807314587353088.0, but -
604462909807314587353088.0 +
-
36028797018963968.0 == -
604462909807314587353088.0. Math class is
tough.
No changes in shader-db or fossil-db.
v2: Fix major bug in checking result of the eval_const_binop(nir_op_feq,
...) discovered while developing fneu_once_easy unit test. Fix a typo in
the comment just above that. Add fneu_once_easy test.
v3: Skip the iteration count adjustment tests for nir_op_fenu and
nir_op_ine. Since the iteration count is either 1 or unknown, all this
function can do is add numerical error. Add fenu_once tests.
v4: Change the initial value in the fneu_once test from large positive
to large negative. Change check in get_iteration from nir_op_fsub to
nir_op_fadd. Both changes from discussion with M Henning. Also add some
more explanation in fneu_once.
v5: Rename test cases.
Fixes:
6772a17acc8 ("nir: Add a loop analysis pass")
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19732>
(cherry picked from commit
f75c83c4aae2b01013f3740a7414cf207f60b0ab)
Ian Romanick [Mon, 9 Aug 2021 22:05:33 +0000 (15:05 -0700)]
nir/loop_analyze: Fix get_iteration for nir_op_ine
I discovered this problem because adding an algebraic transformation to
convert some uge and ult to ieq or ine caused a couple loops to stop
unrolling. Consider the loop:
uint i = 0;
while (true) {
if (i >= 1)
break;
i++;
}
This loop clearly executes exactly one time. Note that uge(x, 1) is
equivalent to ine(x, 0). Changing the condition to 'if (i != 0)' will
also execute exactly one time.
In the added test cases, uge_once correctly get an exact loop trip count
of 1. Without the changes to nir_loop_analyze.c, the ine_once case
detects a maximum loop trip count of zero and does not get an exact loop
trip count.
No changes in shader-db or fossil-db.
v2: Move nir_op_fneu changes to a separate commit.
v3: Rename test cases.
Fixes:
6772a17acc8 ("nir: Add a loop analysis pass")
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19732>
(cherry picked from commit
d9f014401bf842bbc0f57987570e34c9ce080cc4)
Karol Herbst [Sat, 19 Nov 2022 20:44:28 +0000 (21:44 +0100)]
rusticl/device: put space at the end of CL_DEVICE_VERSION
Apparently some software relies on that and the spec kind of says it's
there.
Fixes:
20c90fed5a0 ("rusticl: added")
Reported-by: sobkas
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19872>
(cherry picked from commit
b51eb98cf65566f0f177031a34603ba8068521f8)
Gert Wollny [Thu, 10 Nov 2022 17:48:29 +0000 (18:48 +0100)]
virgl: don't a use staging when a resources created with the shared flag
There seems to be a problem with running firefox by using Xwayland that
results in a shared resources being not always tagged as using staging.
As a result one process tries to map the resource that was allocated as
one that uses staging without actually using the staging resource, and
hence the mapped range only accounts for the small region that we have
to allocated because a zero-allocation doesn't work, but the application
mapping the resource assumes that a properly sized range is mapped, and
consequently this results in invalid memory access.
To work around this issue disable creating staging for resources that
are created by using shared binding. It is not clear to me whether this
is the best fix, but it seems to quell the issue.
Fixes:
c9d99b7eec7ec14d6d71d381a424b6280d75a882
virgl: Fix texture transfers by using a staging resource
Related: https://gitlab.freedesktop.org/virgl/virglrenderer/-/issues/291
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19655>
(cherry picked from commit
e496d24cb2d5339566c08c79a8aa7809c240613c)
Lionel Landwerlin [Mon, 14 Nov 2022 13:54:01 +0000 (15:54 +0200)]
intel/fs: put scratch surface in the surface state heap
In
4ceaed7839af we made scratch surface state allocations part of the
internal heap (mapped to STATE_BASE_ADDRESS::SurfaceStateBaseAddress)
so that it doesn't uses slots in the application's expected 1M
descriptors (especially with vkd3d-proton).
But all our compiler code relies on BSS
(STATE_BASE_ADDRESS::BindlessSurfaceStateBaseAddress).
The additional issue is that there is only 26bits of surface offset
available in CS instruction (CFE_STATE, 3DSTATE_VS, etc...) for
scratch surfaces. So we need the drivers to put the scratch surfaces
in the first chunk of STATE_BASE_ADDRESS::SurfaceStateBaseAddress
(hence all the driver changes).
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes:
4ceaed7839af ("anv: split internal surface states from descriptors")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7687
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19727>
(cherry picked from commit
9c1c1888d9895d05246005620953ee307d1a17f1)
Eric Engestrom [Tue, 22 Nov 2022 13:44:15 +0000 (13:44 +0000)]
Rhys Perry [Wed, 16 Nov 2022 15:08:34 +0000 (15:08 +0000)]
aco: ensure MRT0 is written with dual source blending
Fixes crucible test func.shader.dualsrc_mrt0_undef on polaris10.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: 22.3 mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19806>
(cherry picked from commit
3061bc792d3d0252854a38bff956c15c51b06643)
Rhys Perry [Wed, 16 Nov 2022 15:08:34 +0000 (15:08 +0000)]
radv: disable MRT compaction with dual-source blending
Fixes crucible tests func.shader.dualsrc_mrt0_undef on navi21 and
func.shader.dualsrc_mrt1_undef on polaris10.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: 22.3 mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19806>
(cherry picked from commit
ea0ae17fc453401223918b27e0610352fe67e66d)
Bas Nieuwenhuizen [Sat, 19 Nov 2022 02:28:56 +0000 (03:28 +0100)]
radv: Fix custom build id with C90 compilation.
Seems some build configurations have problems with VLAs still.
Fixes:
97641e5c942 ("radv: Add ability to override the build id for the cache.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19869>
(cherry picked from commit
8d37ab6bfa0321674fe74cc4c76c21aa94d36840)
Jose Maria Casanova Crespo [Wed, 9 Nov 2022 11:37:18 +0000 (12:37 +0100)]
v3d: Minor fixes on sand8 blit based on sand30 modifications
* load_uniform for sand8_stride is uint32 instead of int32 and its range
is 4 instead of 1 as it is counted in bytes.
* Now we save and restore constant buffer 1 properly for the ubo used
in the blit. We need to take into account that in V3D the first UBO
with index 0 is stored on constant buffer 1, because gallium uses
internally contant buffer 0 (See for reference commit
c8212731e7d67a7)
* Removed not needed return.
* Added shader information about uniforms, ubos, inputs and outputs.
* Fixed typos in the comments.
Fixes:
95c4f0f91098 "v3d: Enables DRM_FORMAT_MOD_BROADCOM_SAND128 support"
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19639>
(cherry picked from commit
c82775e3c726792ca7b3e98fc7a8b0eeea3c8e8d)
Samuel Pitoiset [Fri, 18 Nov 2022 08:36:46 +0000 (09:36 +0100)]
zink: require extendedDynamicState3ColorBlendEquation for full ds3
Cc: 22.3 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19851>
(cherry picked from commit
e253729e0374af5e5afb97baaac842a9c869eb7e)
Qiang Yu [Fri, 18 Nov 2022 08:37:19 +0000 (16:37 +0800)]
ac/llvm: fix 16bit varying llvm compile error
Found when 16bit vec3 varying with llvm14 (not found
when llvm15), one 32bit vec4 slot is filled like this:
vec3[0] | undef
vec3[1] | undef
vec3[2] | undef
undef | undef
LLVM error is for the elements with undef:
%287 = insertelement float %280, half %279, i64 0
After this change, we get:
%287 = insertelement <2 x half> %280, half %279, i64 0
Fixes:
279eea5bda2 ("amd/llvm: Transition to LLVM "opaque pointers"")
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19848>
(cherry picked from commit
e3b1f26a2b83538eb175be28b2e785bbe626bf5f)
Eric Engestrom [Thu, 10 Nov 2022 12:14:12 +0000 (12:14 +0000)]
v3d(v): account for debug flags when using the cache
Signed-off-by: Eric Engestrom <eric@igalia.com>
Cc: mesa-stable
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19796>
(cherry picked from commit
2b99523a959af726054db29f12281db5c1fde341)
Gert Wollny [Fri, 18 Nov 2022 15:53:34 +0000 (16:53 +0100)]
r600/sfn: sort FS color outputs before all other outputs
The color outputs must be checked against the number of available
color buffers, therefore it is best to sort the color outputs to be
on the driver locations before the other FS outputs.
Fixes:
79ca456b4837b3bc21cf9ef3c03c505c4b4909f6
r600/sfn: rewrite NIR backend
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7530
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19804>
(cherry picked from commit
be570cd32254f1360e5010d091eea142b3990e72)
Lionel Landwerlin [Wed, 16 Nov 2022 13:23:35 +0000 (15:23 +0200)]
Revert "nir/lower_shader_calls: put inserted instructions into a dummy block"
This reverts commit
35d82ecf1ee117bef575731100fa6ae532f225fc.
Cc: mesa-stable
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19820>
(cherry picked from commit
e2dadda35f87af08358f0ea43a12434c1626ea82)
Lionel Landwerlin [Wed, 16 Nov 2022 15:34:08 +0000 (17:34 +0200)]
nir/lower_shader_calls: wrap only jumps rather than entire code blocks
Moving entire chunks of code into a dummy if block is causing issues
in some situations. To work around the issue that we tried to fix in
35d82ecf1e ("nir/lower_shader_calls: put inserted instructions into a
dummy block") which is that we cannot cut and past a block of
instruction that ends with a jump if there are more instruction behind
where we're going to past. We can instead just wraps the jumps into
dummy if blocks.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19820>
(cherry picked from commit
3686d5a31291354eb836ce6ea757bf6fbf41ad5b)
Lionel Landwerlin [Wed, 16 Nov 2022 15:36:19 +0000 (17:36 +0200)]
nir/lower_shader_calls: update metadata before validation
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19820>
(cherry picked from commit
96d84e2a77568e27af6fac90bd0ab81d932eecbd)
Ian Romanick [Thu, 17 Nov 2022 20:47:59 +0000 (12:47 -0800)]
nir/range_analysis: Set higher default maximum for max_workgroup_count
Fixes:
c2a81ebe19f ("nir: Add default unsigned upper bound configuration.")
Closes: #7676
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19835>
(cherry picked from commit
2ba55ec504f8391775622c3753ddb03bdcd85aff)
Lionel Landwerlin [Wed, 16 Nov 2022 13:53:26 +0000 (15:53 +0200)]
nir/lower_explicit_io: fix metadata preserve
This pass can insert if blocks, therefore no dominance/block_index for
you.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19818>
(cherry picked from commit
723b15fb75aac03b95d452ba173383666edcfc67)
Rhys Perry [Wed, 2 Nov 2022 16:45:27 +0000 (16:45 +0000)]
radv: lower 8/16-bit uadd_carry/usub_borrow
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7615
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19473>
(cherry picked from commit
6fc4a760571443fae71a45076255090518daa900)
Rhys Perry [Wed, 2 Nov 2022 16:45:08 +0000 (16:45 +0000)]
nir/lower_bit_size: lower uadd_carry
8/16-bit uadd_carry can exist in SPIR-V.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7615
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19473>
(cherry picked from commit
da30fb5df705d38e6d3aefadf769ec4517b9b20e)
Lionel Landwerlin [Tue, 28 Jun 2022 14:20:02 +0000 (14:20 +0000)]
intel/perf: fix B/C counters accumulation in non query mode
When we're not using queries, all the counters from the
MI_REPORT_PERF_COUNT are available. This is the case when using
perfetto with the global pps datasource that capture global counter
values.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes:
8750f43a9077 ("intel/perf: add performance query layout using MI_SRM")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18893>
(cherry picked from commit
61fef1ed726b69b28ece60fb10bd5a65fcefb296)
Lionel Landwerlin [Thu, 21 Jul 2022 07:46:50 +0000 (07:46 +0000)]
intel/perf: allocate cleared counter infos
This array of structure needs to be initialized to 0 as it contains a
bitset we don't explicitly clear.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes:
3144bc1d3369 ("intel/perf: move query_mask and location out of gen_perf_query_counter")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18893>
(cherry picked from commit
e754bf6be49788e5f6604a15cd36a3324fd94a39)
Lionel Landwerlin [Wed, 16 Nov 2022 18:34:24 +0000 (20:34 +0200)]
anv: get rid of ilog2_round_up
__builtin_clz(value - 1) is undefined for with value=1 (because
__builtin_clz(0) is undefined).
Because we set rt_pipeline->stack_size = 1 when a ray tracing pipeline
doesn't need any stack allocation to differentiate from a dynamic size
(rt_pipeline->stack_size = 0) we can run into this undefinied behavior
issue.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes:
f68d64dac015 ("anv: Add support for vkCmdSetRayTracingPipelineStackSizeKHR")
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19781>
(cherry picked from commit
440da44a84022ec63e87e2c5a55ad03a244697a4)
Michel Dänzer [Thu, 17 Nov 2022 09:12:59 +0000 (10:12 +0100)]
vulkan/wsi/wayland: Set num_modifier_lists = 0 if num_drm_modifiers == 0
This case was missed in
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18826 ,
resulting in native Wayland apps failing with
../src/vulkan/wsi/wsi_common_drm.c:452: wsi_configure_native_image: Assertion `!"Failed to find a supported modifier! This should never " "happen because LINEAR should always be available"' failed.
if the Wayland compositor advertises only the INVALID modifier.
Fixes:
c315e20d6198 ("vulkan/wsi/wayland: Configure images via params passed to wsi_swapchain_init()")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19795>
(cherry picked from commit
8d7aa4279aa26e1a24b76b707caf423ecde1d597)
Konstantin Seurer [Wed, 16 Nov 2022 09:31:20 +0000 (10:31 +0100)]
radv/rra: Fix copying accel structs that were not built yet
In the case that radv_GetEventStatus always returns true, the loop will
never exit.
Fixes: 5749806 ("radv: Add Radeon Raytracing Analyzer trace dumping utilities")
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19772>
(cherry picked from commit
f24bb8194b82052b207b5c5ca1c99f47ab73dce5)
Sil Vilerino [Wed, 16 Nov 2022 17:01:21 +0000 (12:01 -0500)]
d3d12: Video Screen - Do not crash if HEVC not supported, return no support instead
Fixes:
8f654b90 ("d3d12: Fix HEVC wrong caps detection due to bad parenthesis in condition")
Signed-off-by: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19813>
(cherry picked from commit
0c4fdbaa920816c663f8ca5b768a5c3d0d66349a)
Eric Engestrom [Thu, 17 Nov 2022 19:16:19 +0000 (19:16 +0000)]
Eric Engestrom [Thu, 17 Nov 2022 17:18:07 +0000 (17:18 +0000)]
VERSION: bump for 22.3.0-rc3
Eric Engestrom [Fri, 11 Nov 2022 13:49:45 +0000 (13:49 +0000)]
ci: avoid triggering vc4 & v3d tests on v3dv-only MRs
There are a lot of vulkan-only MRs, so we can save a lot of CI resources
by not running GL tests as well.
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19680>
(cherry picked from commit
bc286e8586976013936dea71dd66c4e3a3ff4605)
Samuel Pitoiset [Wed, 16 Nov 2022 14:49:24 +0000 (15:49 +0100)]
radv: suspend/resume XFB queries with NGG for meta operations
XFB queries enable primitives generated queries with NGG and meta
operations shouldn't be counted.
Reproduced on GFX10.3 by forcing NGG streamout.
Cc: 22.3 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19785>
(cherry picked from commit
62356e71f431684008efc7e471bddb1ada9801a3)
Samuel Pitoiset [Wed, 16 Nov 2022 10:35:19 +0000 (10:35 +0000)]
aco: fix FS inputs loads in WQM with 16-bit
p_wqm needs to use the same size.
Fixes:
16d2c7ad557 ("aco/gfx11: perform FS input loads in WQM")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19788>
(cherry picked from commit
50fe37070fb6b35a1468297f48021d58a9c94463)
Michel Dänzer [Fri, 11 Nov 2022 15:33:12 +0000 (16:33 +0100)]
Revert "egl/glx: add fallback for zink loading"
This reverts commit
2569215f43f6ce71fb8eb2181b36c6cf976bce2a.
Conflicts:
src/egl/main/eglapi.c
src/glx/glxext.c
It broke the fallback to swrast in some cases where zink can't work.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7333
Fixes:
2569215f43f6 ("egl/glx: add fallback for zink loading")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19681>
(cherry picked from commit
71a0a386b5df53431f1fbc9a02a78f7af22611a6)
Jonathan Gray [Tue, 15 Nov 2022 04:20:57 +0000 (15:20 +1100)]
util: include sys/time.h for timespec functions
When the futex code moved it removed an include which broke the build
on OpenBSD.
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Fixes:
095dfc6caa2 ("util: Move the implementation of futex_wake and futex_wait from futex.h to futex.c")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19735>
(cherry picked from commit
fe851d7759fca4c61245b142bb90dd561ae818f9)
Samuel Pitoiset [Wed, 16 Nov 2022 14:19:32 +0000 (15:19 +0100)]
aco: fix dual source blending on GFX11
Assembly looks similar to LLVM.
Cc: 22.3 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19643>
(cherry picked from commit
fb781bfb0a5a401b5210d613479bbdfb90e94790)
Samuel Pitoiset [Wed, 16 Nov 2022 14:18:54 +0000 (15:18 +0100)]
aco: add p_dual_src_export_gfx11 for dual source blending on GFX11
Dual source blending must be in strict WQM mode.
Cc: 22.3 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19643>
(cherry picked from commit
bb90d29660bb44326188809da2deec0675c8264a)
Gert Wollny [Tue, 15 Nov 2022 11:50:00 +0000 (12:50 +0100)]
r600/sfn: Fix location for reading cube array image dimensions
Fixes:
79ca456b4837b3bc21cf9ef3c03c505c4b4909f6
r600/sfn: rewrite NIR backend
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19755>
(cherry picked from commit
35d6e290e4119e020e8072ce4ad97bc4e9cd269b)
Gert Wollny [Tue, 15 Nov 2022 10:48:24 +0000 (11:48 +0100)]
r600/sfn: Honor shader key w.r.t. atomic counter layout
Fixes:
79ca456b4837b3bc21cf9ef3c03c505c4b4909f6
r600/sfn: rewrite NIR backend
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19755>
(cherry picked from commit
0ccf7ed7916bee67c8028bf251ca483b1be07d57)
Samuel Pitoiset [Wed, 16 Nov 2022 10:20:22 +0000 (11:20 +0100)]
aco: fix missing SCC for p_interp_gfx11 in emit_interp_mov_instr()
Fixes:
369c9b64252 ("aco: fix p_interp_gfx11 to not overwrite SCC")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19777>
(cherry picked from commit
5a3cc2d453149954923abf3d1455e8fe44e5788a)
Alyssa Rosenzweig [Mon, 31 Oct 2022 01:24:34 +0000 (21:24 -0400)]
panfrost: Use PIPE_CAP_VERTEX_ATTRIB_ELEMENT_ALIGNED_ONLY
..instead of 4BYTE_ALIGNED_ONLY. This is more correct and avoids
needless repacking. Noticed in Firefox, which was hitting the vbuf
translate path.
Fixes:
e03622e50fc ("panfrost: Set STRIDE_4BYTE_ALIGNED_ONLY")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19761>
(cherry picked from commit
c567e5528fd11db461f076fccd63ec1b01b96b36)
Alyssa Rosenzweig [Tue, 15 Nov 2022 16:16:15 +0000 (11:16 -0500)]
panfrost: Fix reference counting with batch->resources
Refactor accesses to batch->resources to happen through safe helpers
that update the appropriate bookkeeping. This makes it obvious that (in
particular) reference counts are updated when they should be.
The functional change is that we are now correctly unreferencing
resources during shadowing, fixing a leak of shadowed resources.
Closes: #7362
Fixes:
2d8f28df731 ("panfrost: Replace resource shadowing flush")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reported-by: Mastodon, apparently
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19753>
(cherry picked from commit
42212a9bfdab8381beb9206b5d2551344c71d584)
José Roberto de Souza [Fri, 11 Nov 2022 19:01:25 +0000 (11:01 -0800)]
iris: Set priority for replaced engine context
The replace_kernel_ctx() code path was not setting back the context
priority.
Fixes:
5c4c8bdc4c54 ("iris/batch: Add support for engines contexts")
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19687>
(cherry picked from commit
cd159c7d6c18d1bbde019fda68cc17922389a767)
Sil Vilerino [Tue, 15 Nov 2022 22:59:30 +0000 (17:59 -0500)]
ci: Add va frontend to windows-build-rules
Fixes:
2d504bc5 ("CI: Add gallium-va and video-codecs in windows-vs2019 and debian-mingw32-x86_64")
Signed-off-by: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19767>
(cherry picked from commit
912c72eda5a4284bf8ef32f93a708c65083f7722)
Yonggang Luo [Sun, 6 Nov 2022 12:34:28 +0000 (20:34 +0800)]
util: Test __PPC64__ for getting PIPE_ARCH_PPC_64 respond to __PPC64__ take effect
Fixes:
e737a99a6fb ("Fix PPC detection on darwin")
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19674>
(cherry picked from commit
7710cc8506be571ce83751c8f7afbe6fac256b36)
Sil Vilerino [Tue, 15 Nov 2022 17:04:19 +0000 (12:04 -0500)]
frontend/va: Fix WIN32 VA_DRIVER_INIT_FUNC declaration. Remove declspec as it uses .def file
Fixes:
b557ceb7 ("frontends/va: Add windows VA frontend support via vl_winsys_win32 and libva-win32")
Closes: #7702
Signed-off-by: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19754>
(cherry picked from commit
d81e40b20c386a79d643fc6c14c3cfb8351daa09)
Samuel Pitoiset [Tue, 15 Nov 2022 05:51:24 +0000 (05:51 +0000)]
aco: fix p_interp_gfx11 to not overwrite SCC
s_wqm_b64 clobbers SCC.
Found this while working on dual source blending.
Fixes:
6113ee650a2 ("aco/gfx11: fix FS input loads in quad-divergent control flow")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19747>
(cherry picked from commit
369c9b642524cb543c59d006ad7e3ce089fa6879)
Yonggang Luo [Thu, 10 Nov 2022 16:45:56 +0000 (00:45 +0800)]
clover: empty soversion when on win32
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7675
Cc: mesa-stable
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Prodea Alexandru-Liviu <liviuprodea@yahoo.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19653>
(cherry picked from commit
14eef1414725692a22fa24e027e8b1fd618d57ed)
Erik Faye-Lund [Tue, 8 Nov 2022 09:37:10 +0000 (10:37 +0100)]
docs: remove stale envvar-reference
This reference was left over when the envvar was removed.
Fixes:
231ccb6100e ("docs: Remove no-longer-accurate text about the xlib driver")
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19593>
(cherry picked from commit
9bfa939a5e6377efe7b610dd9b6846edeb0fdafc)
Erik Faye-Lund [Mon, 14 Nov 2022 10:49:24 +0000 (11:49 +0100)]
docs: do not mention EGL_MESA_drm_display
This extension was removed back in 2016, but it seems we left a mention
of it in the docs.
The entire section with this extension seems kinda pointless now, so
let's drop it entirely.
Fixes:
f3e23ead536 ("egl: remove remnants of MESA_drm_display")
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19719>
(cherry picked from commit
9f2c9e4c3fa57deba3da30dfa8e022c0a49c80f0)
Lucas Stach [Fri, 11 Nov 2022 16:20:41 +0000 (17:20 +0100)]
etnaviv: switch to late Z when linear PE is used
In linear PE mode the early and late depth stage do not only disagree
about the cache layout, but they seem to fundamentally disagree about
the buffer layout. When Z was written via the late stage, early tests
always show spurious zfails, even if they are not in the same draw
call. Cache flushing and pipe stalls don't help in that case.
The only option to get reliable Z tests with linear render targets is
to move all Z handling into the PE stage. Even when early Z writes
are possible, we don't know if any other draw to the same surface
needs late Z handling, so we must never use the early stage.
Fixes:
53445284a427 ("etnaviv: add linear PE support")
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19686>
(cherry picked from commit
7fe91c9f660f3b76e2c08c0824d226417231c822)
Lucas Stach [Mon, 7 Nov 2022 15:12:52 +0000 (16:12 +0100)]
etnaviv: fix shader register control with MSAA
Apparently MSAA doesn't only add another input, but it also increases
required temporaries by one. Simple programs where the register demand
is given by the number of inputs did work fine, while more complex ones,
where register demand is given by the number of temporaries exhibit
rendering issues without this fix.
Cc: 22.3 mesa-stable
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19582>
(cherry picked from commit
e65d266529f1e95252bacd529a830b9d4d50000f)
David Heidelberg [Thu, 3 Nov 2022 16:48:26 +0000 (17:48 +0100)]
ci/update_traces_checksum.py: check if checksum is in the array, not it's value
Fixes:
45eda069531a ("ci: introduce update_traces_checksum.py")
Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19510>
(cherry picked from commit
e1d40d11f5a6083c19582c2e138f453cc2c7d4e4)
Guilherme Gallo [Wed, 16 Nov 2022 04:51:59 +0000 (01:51 -0300)]
freedreno/ci: Skip civilization-v/CivilizationV-trim trace
It is been flaking, the following jobs are expecting the same checksum,
but produced different ones.
- https://mesa.pages.freedesktop.org/-/mesa/-/jobs/
31762457/artifacts/results/summary/results/trace@freedreno-a630@civilization-v@CivilizationV-trim--s705-761-f762-v20201203-v2.trace.html
- https://mesa.pages.freedesktop.org/-/mesa/-/jobs/
31763571/artifacts/results/summary/results/trace@freedreno-a630@civilization-v@CivilizationV-trim--s705-761-f762-v20201203-v2.trace.html
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19734>
David Heidelberg [Thu, 10 Nov 2022 17:23:46 +0000 (18:23 +0100)]
ci/freedreno: disable antichambers trace
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7668
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19627
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
(cherry picked from commit
f562e37c9325cc107d4f02026946acc14c75b323)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19734>
Benjamin Tissoires [Thu, 13 Oct 2022 19:25:38 +0000 (21:25 +0200)]
CI: convert to use the new S3 server instead of the legacy minio
We don't need to login anymore, but we can't use plain minio commands
now. `ci-fairy` got a helper as `s3cp` to keep an almost identical
API.
Solved Conflicts:
.gitlab-ci/common/init-stage2.sh
.gitlab-ci/container/lava_build.sh
.gitlab-ci/prepare-artifacts.sh
src/amd/ci/traces-amd.yml
src/freedreno/ci/traces-freedreno.yml
src/gallium/frontends/lavapipe/ci/traces-lavapipe.yml
Signed-off-by: Benjamin Tissoires <benjamin.tissoires@gmail.com>
(cherry picked from commit
67cee534a88c95a8eb6839f7bcf28a5e6dac8fbf)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19734>
Guilherme Gallo [Thu, 20 Oct 2022 06:03:08 +0000 (03:03 -0300)]
ci: Update ci-fairy in CI, rootfs and containers
ci-fairy is pulverized in possible different versions at Mesa CI. This
commit updates all of them to the version that migrates minio to s3.
Also, trigger the build of base and test containers, as both uses
ci-fairy as well.
Solved Conflicts:
.gitlab-ci/image-tags.yml
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: Benjamin Tissoires <benjamin.tissoires@gmail.com>
(cherry picked from commit
a04ed2f971dccbf8b24f084ac9baaf8b299944a0)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19734>
Guilherme Gallo [Mon, 24 Oct 2022 18:29:09 +0000 (15:29 -0300)]
ci: Update piglit-traces tests expectations
Found some:
- crashes in zink, softpipe
- fails in a630-restricted
- unexpectedpass in broadcom
- fixed by https://gitlab.freedesktop.org/mesa/piglit/-/merge_requests/730
More details in the test expectations files comments.
Solved Conflicts:
src/gallium/drivers/zink/ci/zink-lvp-skips.txt
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
(cherry picked from commit
a108e4f70cc61a6b9119cd766d51c9b596e07c7f)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19734>
Guilherme Gallo [Mon, 31 Oct 2022 10:13:16 +0000 (11:13 +0100)]
ci: Update piglit with s3 support
With new S3 support, we can use JWT-only server interaction via the
removal of `role-session` and `minio-host` arguments from PIGLIT_ARGS in
YAML.
This parameter change will come in a later commit.
Solved Conflicts:
.gitlab-ci/container/build-piglit.sh
.gitlab-ci/image-tags.yml
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: Benjamin Tissoires <benjamin.tissoires@gmail.com>
(cherry picked from commit
70ce1dcacc92a816322082c8695569b6a91a1810)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19734>
Alejandro Piñeiro [Sat, 12 Nov 2022 00:51:00 +0000 (01:51 +0100)]
v3dv/bo: reset bo and then call gem close
After 'v3dv: fix debug dump on BO free' we changed the order, and this
lead to the following test
dEQP-VK.api.object_management.multithreaded_per_thread_resources.device_memory_small
v2: Expanded comment just before the reset, explaining that we need to
do the reset before we free the BO from the kernel (Iago)
Raising this assertion:
deqp-vk: ../src/broadcom/vulkan/v3dv_bo.c:281: v3dv_bo_alloc: Assertion `bo && bo->handle == 0' failed.
Fixes:
2c44597181e2 ('v3dv: fix debug dump on BO free')
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19693>
(cherry picked from commit
ec1cdc13d5cf6026692bf3765be3aeceb511e6d6)
Iago Toral Quiroga [Fri, 11 Nov 2022 11:58:10 +0000 (12:58 +0100)]
v3dv: ignore imported BOs when tracking BO memory usage
Imported BOs are not allocated by the device so we don't
update BO stats when they are imported. Therefore, we should
not be updating them when they are freed either.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19675>
(cherry picked from commit
f14e2ca099cbc1c732020b6e1c30aaff4f652d1b)
Qiang Yu [Thu, 10 Nov 2022 08:44:56 +0000 (16:44 +0800)]
ac/llvm: fix gfx11 fs input load for 16bit varying
Otherwise we get empty output.
Fixes:
b07204d7804 ("radeonsi/gfx11: interp changes for 16bit")
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19637>
(cherry picked from commit
88b1bb326dae2d4cc7e069849f82c08f35c407d5)
Qiang Yu [Mon, 14 Nov 2022 07:28:44 +0000 (15:28 +0800)]
ac/nir/ngg: remove nuw for negative value add
Add negative value is possible to wrap around. I haven't seen this
"nuw" causes any problem yet, but let's remove it for safe.
Fixes:
60ac5dda82e ("ac: Add NIR lowering for NGG GS.")
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19718>
(cherry picked from commit
c21e184cc5cc818285c5590f36b170362defaf27)
Qiang Yu [Mon, 14 Nov 2022 07:01:51 +0000 (15:01 +0800)]
ac/nir/ngg: fix nogs culling with nuw add
We should not use "nuw" here as negative add positive may wrap
around (negative is 0xffffff??).
This problem can be observed with LLVM15 (I can't see when LLVM14):
%.neg = mul nsw i32 %31, -4
%163 = add nuw nsw i32 %.neg, 16
%164 = lshr i32 257, %.neg
%165 = lshr i32 %164, %163
LLVM just assume %.neg is possitive, so pre-shift 0x01010101 by 16.
This get wrong value because we can't get back the shifted bits with
a negative shift right.
Fixes:
75dbb404393 ("ac/nir: Remove byte permute from prefix sum of the repack sequence.")
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19718>
(cherry picked from commit
982b523769a75c99039deac7f832a1e10260e916)
Dave Airlie [Mon, 14 Nov 2022 03:47:02 +0000 (13:47 +1000)]
gallivm: add coro malloc hooks earlier and always.
This fixes GALLIVM_DEBUG=asm for compute shaders, changing
the hooks after dumping causes a segfault because the
memory has already been finalised. Just add the hooks always,
and before dumping anything.
Fixes:
f511d2a55337 ("gallivm: rework coroutine malloc/free callouts.")
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19714>
(cherry picked from commit
fb7de303ba7cbdb4237d2ae93011bc2845114d35)
Caio Oliveira [Mon, 14 Nov 2022 00:19:48 +0000 (16:19 -0800)]
intel/compiler: Fix missing tie-breaker in brw_nir_analyze_ubo_ranges() ordering code
Per Ken suggestion, use ascending order for the start offset.
Fixes:
6d28c6e52cf ("i965: Select ranges of UBO data to be uploaded as push constants.")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19731>
(cherry picked from commit
494e2edb90d06f645e09b10d2c3f6b8d274d4dba)
Caio Oliveira [Mon, 14 Nov 2022 06:30:25 +0000 (22:30 -0800)]
intel/compiler: Fix dynarray usage in intel_clc
The code builds up the dynamic array of objects (spirv_objs) and
collect pointers to each of them into another dynamic
array (spirv_ptr_objs).
If the growth of the first array cause a reallocation, it is
possible that the previous pointers end up invalid.
Fixes:
77e929a5273 ("intel/clc: allow multiple CL files to be compiled together")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19730>
(cherry picked from commit
9fd1d47aa0f19fac30d29e6ae40ed0383c1930ee)
Samuel Pitoiset [Thu, 10 Nov 2022 06:56:16 +0000 (06:56 +0000)]
radv: enable lowering of subgroup shuffle in NIR on GFX11+
VGPR allocation changed on GFX11 and this might have changed how
shared VGPRs work, so it's probably more secure to lower in NIR.
Cc: 22.3 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19679>
(cherry picked from commit
d255bc8f05dd5f85f7154b0a3d7aaf381b47c199)
Jason Ekstrand [Tue, 8 Nov 2022 16:43:37 +0000 (10:43 -0600)]
vulkan: Unconditionally add barriers for missing external subpass deps
This is a very scorched-earth approach which doesn't take into account
whether or not there are any explicitly provided dependencies. We could
take a finer-grained approach in theory but it's unlikely to matter in
practice since you usually stall in Begin/EndRenderPass anyway.
Fixes:
1d726940d288 ("vulkan: Add a common CmdBegin/EndRederPass implementation")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6203
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7650
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19599>
(cherry picked from commit
11b2a063bf1f18b3be9542be8c229427a33c92f0)
Jason Ekstrand [Tue, 8 Nov 2022 16:23:02 +0000 (10:23 -0600)]
vulkan: Handle VK_SUBPASS_EXTERNAL at the end of a subpass
Fixes:
1d726940d288 ("vulkan: Add a common CmdBegin/EndRederPass implementation")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19599>
(cherry picked from commit
4ff5051944e7a7a8bf003c331af1a73ac6c7df61)
Gert Wollny [Sun, 13 Nov 2022 10:28:16 +0000 (11:28 +0100)]
r600/sfn: Fix f2u32 and remove backend lowring of f2u64 and f2i64
The two conversion ops are now handled in nir_lower_int64,
but the fixup for the input to f2u32 has to be handled there
and not in f2u64.
Fixes:
29da9856826fa6a4b5117c43c78b4301a49bc6dd
nir/lower_int64: Enable lowering of 64-bit float to 64-bit integer conversions.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19707>
(cherry picked from commit
fee004215755ee56a427e2ea96a5ab6dfa1ce823)
Gert Wollny [Sun, 13 Nov 2022 11:09:20 +0000 (12:09 +0100)]
r600/sfn: Fix source modifiers for ffract64
Fixes:
79ca456b4837b3bc21cf9ef3c03c505c4b4909f6
r600/sfn: rewrite NIR backend
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19707>
(cherry picked from commit
fd27b18631bff77ce864968238c4e6dbe37606a6)
Lionel Landwerlin [Fri, 11 Nov 2022 09:31:46 +0000 (11:31 +0200)]
anv: bump pool bucket max allocation size
Age of Empire IV generates a shader of ~2.3Mb on DG2 which is above
the limit we currently have.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19669>
(cherry picked from commit
ae76bba34a878dbd299f911bceaa9acdf01eb38a)
Yiwei Zhang [Fri, 11 Nov 2022 16:25:33 +0000 (08:25 -0800)]
venus: handle VK_QUERY_TYPE_PRIMITIVES_GENERATED_EXT
This change adds some docs for the query size, and has been tested with
dEQP-VK.transform_feedback.primitives_generated_query.* on supported
implementations.
Fixes:
8f7b5bf34b4 ("venus: add VK_EXT_primitives_generated_query support")
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19684>
(cherry picked from commit
f7d7e558c958d4057cf88dfa37f80d150d62d87f)
Lucas Stach [Mon, 7 Nov 2022 13:22:21 +0000 (14:22 +0100)]
etnaviv: fix late Z with MSAA active
On RA_WRITE_DEPTH GPUs the RA stage needs to be told that MSAA is active
when the PE Z/S stage is needed. Not sure what it does exactly, but this
fixes broken late Z on those GPUs when performing MSAA rendering.
Cc: 22.3 mesa-stable
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19571>
(cherry picked from commit
2f85d9095e3559597bc1cf0051ab6d7bc18faecd)
Lucas Stach [Mon, 7 Nov 2022 13:03:58 +0000 (14:03 +0100)]
etnaviv: update headers from rnndb
Update to etna_viv commit
6939cfeba30c.
Cc: 22.3 mesa-stable
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19571>
(cherry picked from commit
804bf2eba2af7f3d6446361127cbc5521ae72b15)
Timothy Arceri [Thu, 10 Nov 2022 10:24:48 +0000 (21:24 +1100)]
nir: fix typo in lower_double options handling
Seems the intention was to check that both flags were not enabled
instead we were checking that the floor flag was both set and not
set so the result would always be false.
Fixes:
3749a6ecd282 ("nir: honor lower_double options for ffloor and ffract")
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19642>
(cherry picked from commit
34c52d8cb98e74a9debcd2605b377170c025582a)
Iago Toral Quiroga [Fri, 11 Nov 2022 10:36:29 +0000 (11:36 +0100)]
v3dv: fix debug dump on BO free
We were resetting the BO struct right before dumping its data. Fix
this by moving the reset later.
Fixes:
44fa8304d45 ('v3dv: add a refcount mechanism to BOs')
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19672>
(cherry picked from commit
2c44597181e28b05d4b269ee73d4f3a59bc0a806)
noasakurajin [Tue, 8 Nov 2022 09:16:22 +0000 (09:16 +0000)]
disable zinks shader cache when the needed functions do not exist
Fixes:
4e14da056d6 ("zink: Enable mesa/st frontend shader caching.")
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19592>
(cherry picked from commit
7666988937ee9057b575e61437480e23a254c62a)
Tapani Pälli [Thu, 10 Nov 2022 16:23:21 +0000 (18:23 +0200)]
anv: setup stage bitmask for Wa_22011440098
Fixes:
40b66a44998 ("anv, iris: Add Wa_22011440098 for DG2")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19636>
(cherry picked from commit
ecd4517560f135f64abf6e40acc48807b400ca41)
Tapani Pälli [Thu, 10 Nov 2022 16:22:12 +0000 (18:22 +0200)]
iris: setup stage bitmask for Wa_22011440098
Fixes:
40b66a44998 ("anv, iris: Add Wa_22011440098 for DG2")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19636>
(cherry picked from commit
210d95bdb35c2c172f0a3a9527b181f8988a627f)
Lionel Landwerlin [Mon, 24 Oct 2022 11:12:28 +0000 (14:12 +0300)]
anv: split internal surface states from descriptors
On Intel HW we use the same mechanism for internal operations surfaces
as well as application surfaces (VkDescriptor).
This change splits the surface pool in 2, one part dedicated to
internal allocations, the other to application VkDescriptors.
To do so, the STATE_BASE_ADDRESS::SurfaceStateBaseAddress points to a
4Gb area, with the following layout :
- 1Gb of binding table pool
- 2Gb of internal surface states
- 1Gb of bindless surface states
That way any entry from the binding table can refer to both internal &
bindless surface states but none of the driver allocations interfere
with the allocation of the application.
Based off a change from Sviatoslav Peleshko.
v2: Allocate image view null surface state from bindless heap (Sviatoslav)
Removed debug stuff (Sviatoslav)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7110
Cc: mesa-stable
Tested-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19275>
(cherry picked from commit
4ceaed7839afd724b2a2f10f6879f54199c041ad)
Gert Wollny [Thu, 10 Nov 2022 12:06:08 +0000 (13:06 +0100)]
nir/algeraic_opt: use double options too for lowering ftrunc@64
ftrunc@64 also might need lowering on fp64 only, especially now
that it might be introduced by nir_lower_int64.
Fixes:
29da9856826fa6a4b5117c43c78b4301a49bc6dd
nir/lower_int64: Enable lowering of 64-bit float to 64-bit integer conversions.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19657>
(cherry picked from commit
917d992b320740d548ee0eb442e927c7ac5184fa)
Luis Felipe Strano Moraes [Thu, 10 Nov 2022 23:57:05 +0000 (15:57 -0800)]
meson: only enable intel-clc for x86_64 builds
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19662>
(cherry picked from commit
d983827a62c77713452a9e420fd20ed39c68ef2c)
Samuel Pitoiset [Thu, 10 Nov 2022 14:24:24 +0000 (15:24 +0100)]
radv: re-emit NGG culling settings when conservative rast mode is dynamic
Found by inspection.
Fixes:
fbed3aed4aa ("radv: add support for dynamic conservative rasterization mode")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19651>
(cherry picked from commit
08b346e81ac262578ed0437464148be6500ea4de)
Yonggang Luo [Wed, 9 Nov 2022 03:24:32 +0000 (11:24 +0800)]
meson: Fixes name_prefix for clover on mingw
Cc: mesa-stable
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19610>
(cherry picked from commit
67627c84a71b4c795efa6ddcffa5633ce0239f65)
Yonggang Luo [Tue, 8 Nov 2022 11:07:35 +0000 (19:07 +0800)]
clover: Fixes building with mingw-x86
Cc: mesa-stable
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19610>
(cherry picked from commit
f25d483e1bd493fdf6f0f8148259ed085d705617)
Yonggang Luo [Wed, 9 Nov 2022 02:30:57 +0000 (10:30 +0800)]
clover: Rename *OpenCL.def to *OpenCL.def.in
Cc: mesa-stable
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19610>
(cherry picked from commit
a3b26e2758d7fce890717e2679bd0e25ca1330d2)
Yonggang Luo [Tue, 8 Nov 2022 12:48:30 +0000 (20:48 +0800)]
meson: fixes mingw-clang32 building
Cc: mesa-stable
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19610>
(cherry picked from commit
ab20ec9da76d77ae3942ecf1031366d29a4dff7b)
Yonggang Luo [Tue, 8 Nov 2022 12:32:07 +0000 (20:32 +0800)]
meson: Refactoring shared gen_vs_module_defs_normal_command out
Cc: mesa-stable
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19610>
(cherry picked from commit
f03421702cc35059e4ead86839906ddfcf05bdc7)
Yonggang Luo [Tue, 8 Nov 2022 12:15:10 +0000 (20:15 +0800)]
radv: Fixes prototypes
Cc: mesa-stable
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19610>
(cherry picked from commit
e5656f07c7a65b1d143684671cd8235af099a84c)
Dylan Baker [Tue, 1 Nov 2022 19:49:53 +0000 (12:49 -0700)]
util/glsl2spirv: fix appending extra flags
The variable is called `extra`, but what's written is `extra - flags`,
and `flags` is undefined, so if the variable was ever passed there would
be an uncaught exception.
fixes:
9786d9ef2abb45a4e832cf1347581e3ca3aae9f0
Reviewed-by: Luis Felipe Strano Moraes <luis.strano@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19449>
(cherry picked from commit
4ffa8a9ac010f3db79b1e872f7e664a4470cb981)
Dylan Baker [Tue, 1 Nov 2022 19:40:21 +0000 (12:40 -0700)]
util/glsl2spirv: fix type error in argument handling
args.Olib is set to `store_true`, which means it will always be `True`
or `False`, this means that the we always, unconditionally, add
`--keep-uncalled` to the command line.
fixes:
9786d9ef2abb45a4e832cf1347581e3ca3aae9f0
Reviewed-by: Luis Felipe Strano Moraes <luis.strano@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19449>
(cherry picked from commit
76e3b482be125cc0a2edd75bdeb14d4a6e9232fb)
Emma Anholt [Wed, 9 Nov 2022 20:23:53 +0000 (12:23 -0800)]
ir3/ra: Make sure we don't pick a preferred reg overflowing the file.
If we're in handle_collect()'s dst allocation and are part of a merge set
near the end of the file, our check for reg_elem_size(reg) would let us
use the preferred reg when that would immediately lead to
allocate_dst_fixed() creating an interval extending thruogh reg_size(reg)
that overflows the file.
Avoids a regression on gfxbench5/gl_5_high_off/17.shader_test in the next
commit. No change on shader-db.
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18946>
(cherry picked from commit
a39113b616099a7bcce9e62337731f040c7cad64)
Erik Faye-Lund [Mon, 7 Nov 2022 12:11:13 +0000 (13:11 +0100)]
docs: fixup broken link syntax
Seems I got this slightly wrong when I fixed up the previous syntax
issue. Whoops, let's fix that!
Fixes:
6b3b6333915 ("docs/zink: fix and cleanup rst syntax")
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19574>
(cherry picked from commit
ef05d28aa276aebbcf48400a5bef11de20e8b1c9)
Lionel Landwerlin [Thu, 10 Nov 2022 09:34:50 +0000 (11:34 +0200)]
anv: fixup invalid enum for nir environment
Also switching away from PIPE_
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes:
8c4c4c3ee1a2 ("anv: Add softtp64 workaround")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19638>
(cherry picked from commit
68fd9d28294ee91033690b2288c55480c4125577)
Alyssa Rosenzweig [Mon, 7 Nov 2022 18:49:51 +0000 (13:49 -0500)]
panfrost: Require 64-byte alignment on imports
While Panfrost allocates linear images with strides that are a multiple of 64
bytes, other dma-buf producers on the system may not satisfy this requirement.
However, at least on v7 and newer, any image with a regular format must have a
stride that is a multiple of 64 bytes.
This fixes a real bug in an application that created a linear R8_UNORM image
with stride 480 bytes, imported it as an EGL_image, and then tried to texture
from it with the GPU. Previously, the driver allowed this situation but it
resulted in an imprecise fault from the GPU. This patch corrects the driver to
reject the import as invalid due to the unaligned stride, ensuring we never
attempt to texture from such a resource.
To implement, we add some new layout queries to centralize knowledge about the
stride alignment requirements, and we sprinkle in asserts to show how the
invariant is upheld throughout the lifecycle of image creation to texturing.
Cc: mesa-stable
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19620>
(cherry picked from commit
811f8a19469722bea32f3c539b8cf0939fe3b057)
Karol Herbst [Wed, 26 Oct 2022 14:56:41 +0000 (16:56 +0200)]
glsl: fix buffer texture type
Fixes:
3ace6b968b3 ("compiler/types: Add a texture type")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19381>
(cherry picked from commit
87526f79db68a13ebd448cfd6b1be4b25616c801)