Kenneth Graunke [Thu, 16 May 2013 04:33:01 +0000 (21:33 -0700)]
i965: Rely on hardware contexts for query objects on Gen6+.
Hardware contexts greatly simplify the query object code. The pipeline
statistics counters get saved and restored with the context, which means
that we don't need to worry about other workloads polluting them.
This means that we can simply write a single pair of values (one at
BeginQuery and one at EndQuery) rather than a series of pairs. This
also means we don't need to worry about the BO getting full. We also
don't need to delay BO allocation and starting snapshot until the first
draw.
The generation split here is a little off: technically, Ironlake can also
support hardware contexts. However, the kernel currently doesn't, and
even if it were to do so someday, we'd need to wait a while before
bumping the kernel requirement to take advantage of it.
v2: Incorporate Paul's feedback.
- Clarify which functions are Gen4/5-only via assertions and comments.
- Change how driver hook initialization happens.
- Update comments.
- Squash a bug fix from a later commit here where it belongs.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net> [v1]
Acked-by: Paul Berry <stereotype441@gmail.com>
Kenneth Graunke [Thu, 16 May 2013 17:39:39 +0000 (10:39 -0700)]
i965: Disable pixel statistics in BLORP.
BLORP is used for operations like glClear, glCopyTexImage, and
glBlitFramebuffer which aren't supposed to contribute fragments toward
occlusion queries.
This prevents Piglit tests from breaking in the next commit.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Kenneth Graunke [Thu, 16 May 2013 04:18:28 +0000 (21:18 -0700)]
i965: Require hardware contexts (and thus Kernel 3.6) on Gen6+.
Hardware contexts are necessary to reasonably support OpenGL 3.2.
In particular, we currently maintain software counters for transform
feedback buffer offsets and counters, which relies on knowing the number
of primitives generated. Geometry shaders violate that assumption.
At the time of writing, Debian has moved to Kernel 3.8, which means most
people probably have a newer kernel by now. It's also worth noting that
this patch won't land until Mesa 10 which is currently targeted for
September. By that point, even more people will have a newer kernel.
Also, don't bother trying to allocate contexts on pre-Gen6, as it
currently will always fail, and if this changes in the future, we'll
need to reevaluate our hw_ctx/gen checks.
This patch leaves the code for flagging BRW_NEW_CONTEXT on new
batchbuffers if hw_ctx == NULL since that still occurs pre-Gen6.
Also remove the Gen7+ check for kernel 3.3, since it's now redundant.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Kenneth Graunke [Sat, 6 Apr 2013 17:27:28 +0000 (10:27 -0700)]
i965: Bump kernel requirement to 3.3 on Ivybridge.
Kernel 3.3 introduced the SOL reset execbuf parameter, needed for GL 3.0
on Ivybridge. Bumping the requirement will give an obvious error
message rather than simply reporting GL 2.1.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Vincent Lejeune [Sat, 18 May 2013 21:42:37 +0000 (23:42 +0200)]
r600g/llvm: fix cubemap lod/bias
Vincent Lejeune [Sat, 18 May 2013 20:22:41 +0000 (22:22 +0200)]
r600g/llvm: Fix texelFetchOffset-2D
Vincent Lejeune [Sat, 18 May 2013 20:17:51 +0000 (22:17 +0200)]
r600g/llvm: Fix cubearray textureSize
Vincent Lejeune [Sun, 19 May 2013 13:40:19 +0000 (15:40 +0200)]
r600g/llvm: Factorize code loading from const buffer.
Kenneth Graunke [Fri, 17 May 2013 17:41:27 +0000 (10:41 -0700)]
i965: Add cases for ir_triop_vector_insert that assert.
brw_link_shader() unconditionally calls lower_vector_insert() with true
as the second parameter. This means that both constant and variable
indexed expressions will get lowered, so we should never see this in the
backend.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Kenneth Graunke [Fri, 17 May 2013 17:33:40 +0000 (10:33 -0700)]
i965: Add cases for ir_binop_vector_extract that assert.
do_vec_index_to_swizzle() should remove any vector extract operations
with a constant index. It's unconditionally called from
do_common_optimization().
do_vec_index_to_cond_assign() should remove the rest, and it is
unconditionally called from brw_link_shader(). This means that we
should never see ir_binop_vector_extract in the backend.
Silences compiler warnings.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Roland Scheidegger [Thu, 16 May 2013 16:33:21 +0000 (18:33 +0200)]
llvmpipe: enable z32s8x24 format
Now that we can handle it both for sampling and as depth/stencil enable it.
Passes nearly all additional piglit tests which are now performed, with two
exceptions (one being a framebuffer blit which fails for all other formats
including stencil too as we don't support stencil blits, the other reporting
a unexpected GL error so doesn't look to be llvmpipe's fault).
Roland Scheidegger [Fri, 17 May 2013 22:16:03 +0000 (00:16 +0200)]
llvmpipe: handle z32s8x24 depth/stencil format
We need to split up the depth and stencil values in this case, and there's
some new logic required to handle float depth and stencil simultaneously.
Also make sure we get the 64bit zs clear values and masks propagated
correctly.
Roland Scheidegger [Thu, 16 May 2013 20:58:33 +0000 (22:58 +0200)]
llvmpipe: get rid of unused tiled/linear logic
We do rendering to linear color buffers for quite some time, and since
switching to linear depth buffers all the tiled/linear logic was unused.
So get rid of (most) of it - there's still some LAYOUT_NONE things and
late allocation of resources which probably could be simplified.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Roland Scheidegger [Fri, 17 May 2013 21:19:05 +0000 (23:19 +0200)]
llvmpipe: fix bogus handling of first_layer when setting up texture sampling
The code avoided first_layer parameter in the sampler interface (and needing
to do another calculation at runtime) by fixing up the base texture pointer
instead. Unfortunately, this didn't actually work as we have mip-first
texture layout so fixing up the base ptr by a fixed amount is very wrong if
there are mipmaps present. The wrong offsets caused misrendering and crashes.
Fix this by just adjusting the individual mip level offsets instead.
Spotted by Jose.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Roland Scheidegger [Fri, 17 May 2013 21:13:51 +0000 (23:13 +0200)]
gallivm: handle z32s8x24 format for sampling
Since we can only sample either depth or stencil but not both only load
the required bits which makes things a bit easier (it requires special
handling since the format doesn't fit into 32bit).
The logic for deciding if depth or stencil should be sampled is a bit odd,
but seems to be what other drivers and statetrackers do: if it's a format with
both depth and stencil (or just with depth) then sample depth, for sampling
stencil a sampler view format with only stencil is required.
Also while here fix up stencil sampling for other formats as well, though
this isn't supported by mesa (ARB_stencil_texturing), and while blits would
use it they don't work neither since they'd also need stencil export.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Roland Scheidegger [Wed, 8 May 2013 22:55:22 +0000 (00:55 +0200)]
st/mesa: fix weird UCMP opcode use for bool ubo load
I don't know what this code was trying to do but whatever it was it couldn't
have worked since negation of integer boolean inputs while not specified as
outright illegal (not yet at least) won't do anything since it doesn't affect
the result of comparison with zero at all. In fact it looks like the whole
instruction can just be omitted.
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Eric Anholt [Fri, 10 May 2013 19:17:52 +0000 (12:17 -0700)]
mesa: Make FinishRenderTexture just take the renderbuffer being finished.
Now that the rb has a reference to the teximage, we didn't need anything
else out of the attachment.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Fri, 10 May 2013 18:51:01 +0000 (11:51 -0700)]
mesa: Track the TexImage being rendered to in the gl_renderbuffer.
We keep having to pass the attachments around with our gl_renderbuffers
because that's the only way to find what the gl_renderbuffer actually
refers to. This is a step toward removing that (though drivers still need
the Zoffset as well).
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Fri, 10 May 2013 20:36:04 +0000 (13:36 -0700)]
radeon: Remove dead radeon_wrap_texture().
I should have killed this in my previous cleanup.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Fri, 10 May 2013 19:36:43 +0000 (12:36 -0700)]
mesa: Make gl_renderbuffers backed by EGL images use FinishRenderTexture.
This is the opportunity that radeon and intel drivers rely on for flushing
render targets that may get reused as textures. Before EGL, that only
happened for GL_TEXTURE attachments.
Fixes piglits:
KHR_gl_renderbuffer_image/renderbuffer-texture
OES_EGL_image/renderbuffer-texture
NOTE: This is a candidate for the 9.1 branch.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
José Fonseca [Sun, 21 Apr 2013 21:23:31 +0000 (22:23 +0100)]
gallivm: Eliminate 8.8 fixed point intermediates from AoS sampling path.
This change was meant as a stepping stone to use PMADDUBSW SSSE3
instruction, but actually this refactoring by itself yields a 10%
speedup on texture intensive shaders (e.g, Google Earth's ocean water
w/o S3TC on a Ivy Bridge machine), while giving yielding exactly the
same results, whereas PMADDUBSW only gave an extra 5%, at the expense of
2bits of precision in the interpolation.
I belive that the speedup of this change comes from the reduced register
pressure (as 8.8 fixed point intermediates take twice the space of 8bit
unorm).
Also, not dealing with 8.8 simplifies lp_bld_sample_aos.c code
substantially -- it's no longer necessary to have code duplicated for
low and high register halfs.
Note about lp_build_sample_mipmap(): the path for num_quads > 1 is never
executed (as it is faster on AVX to split the 256bit wide texture
computation into two 128bit chunks, in order to leverage integer
opcodes). This path might be useful in the future, so in order to
verify this change did not break that path I had to apply this change:
@@ -1662,11 +1662,11 @@ lp_build_sample_soa(struct gallivm_state *gallivm,
/*
* we only try 8-wide sampling with soa as it appears to
* be a loss with aos with AVX (but it should work).
* (It should be faster if we'd support avx2)
*/
- if (num_quads == 1 || !use_aos) {
+ if (/* num_quads == 1 || ! */ use_aos) {
if (num_quads > 1) {
if (mip_filter == PIPE_TEX_MIPFILTER_NONE) {
LLVMValueRef index0 = lp_build_const_int32(gallivm, 0);
/*
and then run texfilt mesademo:
LP_NATIVE_VECTOR_WIDTH=256 ./texfilt
Ran whole piglit without regressions.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
José Fonseca [Wed, 17 Apr 2013 17:03:11 +0000 (18:03 +0100)]
gallivm: Add and use lp_build_lerp_3d.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tom Stellard [Tue, 14 May 2013 15:56:25 +0000 (08:56 -0700)]
radeon/llvm: Run standard optimization passes on conpute shader modules
The SROA and function inliner passes are espically important, because
they optimize away unsupported features: functions and indirect
private memory access.
Kenneth Graunke [Thu, 16 May 2013 03:40:33 +0000 (20:40 -0700)]
intel: Don't spam "intelReadPixels: fallback to swrast" in non-PBO case.
When an application is using PBOs, we attempt to use the BLT engine to
perform ReadPixels. If that fails due to some restrictions, it's useful
to raise a performance warning.
In the non-PBO case, we always use a CPU mapping since getting the data
into client memory requires a CPU-side copy. This is a very common case,
so raising a performance warning is annoying. In particular, apitrace's
image dumping code hits this path, causing it to print hundreds of
thousands of performance warnings via ARB_debug_output. This tends to
obscure actual errors or other important messages.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Paul Berry [Thu, 16 May 2013 21:12:15 +0000 (14:12 -0700)]
intel: Do a depth resolve before copying images between miptrees.
When intel_finalize_mipmap_tree() calls intel_miptree_copy_teximage()
to reassemble a depth miptree that has been broken apart into pieces
(to deal with misalignment of levels/layers within the miptree), it
just copies the depth data, not the HiZ data. This is reasonable,
since the alignment restrictions of HiZ are a large part of the reason
why the miptree had to be broken apart in the first place. However,
in order for the depth copy to be sufficient, we need to do a depth
resolve first, to make sure any deferred depth writes that are in the
HiZ buffer get performed.
Fixes https://bugs.freedesktop.org/show_bug.cgi?id=64662 and
https://bugs.freedesktop.org/show_bug.cgi?id=64659.
NOTE: This is a candidate for stable release branches.
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Niels Ole Salscheider [Wed, 15 May 2013 22:09:23 +0000 (00:09 +0200)]
r600g: fixup for MSAA texture support checking
Signed-off-by: Niels Ole Salscheider <niels_ole@salscheider-online.de>
José Fonseca [Thu, 16 May 2013 14:13:51 +0000 (15:13 +0100)]
llvmpipe: Temporary workaround to prevent segfault on array textures.
José Fonseca [Thu, 16 May 2013 12:12:11 +0000 (13:12 +0100)]
gallivm: Support pointers in lp_build_print_value().
Trivial.
Chia-I Wu [Fri, 10 May 2013 07:21:27 +0000 (15:21 +0800)]
ilo: emit 3DSTATE_STENCIL_BUFFER on GEN7+
Whether HiZ is enalbed or not, separate stencil is supported and enforced on
GEN7+. Now that we support separate stencil resources, we know how to emit
3DSTATE_STENCIL_BUFFER.
Chia-I Wu [Wed, 15 May 2013 04:18:13 +0000 (12:18 +0800)]
ilo: add support for stencil resources on GEN7+
For allocations, we need to support stencil-only and separate stencil
resources. For mapping, we need to support software tiling and
packing/unpacking for separate stencil resources.
Chia-I Wu [Fri, 10 May 2013 06:23:33 +0000 (14:23 +0800)]
winsys/intel: test for and expose address swizzling
Without knowing whether addresses are swizzled or not, we cannot manipulate a
tiled surface in CPU.
Marek Olšák [Fri, 10 May 2013 00:03:15 +0000 (02:03 +0200)]
st/mesa: handle texture_from_pixmap and other surface-based textures correctly
There were 2 issues with it:
1) The texture format which should be used for texturing was only set
in gl_texture_image::TexFormat, which wasn't used for sampler views.
2) Textures are sometimes reallocated under some circumstances
in st_finalize_texture, which is unacceptable if the texture comes
from a window system.
The issues are resolved as follows:
1) If surface_based is true (texture_from_pixmap, etc.), store the format
in a new variable st_texture_object::surface_format.
2) Don't reallocate a surface-based texture in st_finalize_texture.
Also don't use st_ChooseTextureFormat is st_context_teximage, because
the format is dictated by the caller.
This fixes the glx-tfp piglit test.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Marek Olšák [Thu, 11 Apr 2013 13:29:41 +0000 (15:29 +0200)]
r600g: cleanup MSAA texture support checking
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Thu, 11 Apr 2013 12:54:40 +0000 (14:54 +0200)]
r600g: rewrite FMASK allocation, fix FMASK texturing with 2 and 4 samples
This fixes and enables texturing with compressed MSAA colorbuffers
on Evergreen and Cayman. For the first time, multisample textures work
on Cayman.
This requires the libdrm flag RADEON_SURF_FMASK.
v2: require libdrm_radeon 2.4.45
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Eric Anholt [Wed, 17 Apr 2013 00:21:23 +0000 (17:21 -0700)]
i965: Fill in brw_format_for_mesa_format for some non-rendering formats.
This should have no change on driver operation, but it means that when you
wonder why some format isn't supported natively, you can just look at the
table above, instead of wondering if maybe there's an appropriate entry in
the surface formats table that is already supported.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Wed, 17 Apr 2013 00:21:22 +0000 (17:21 -0700)]
i965: Use native RGB_FLOAT16 support when available.
Previously we would expand it to RGBA_FLOAT16. This format now comes out
as framebuffer incomplete, but it seems worth the memory savings if that's
what people are asking for (and GL3 does list it under "texture-only"
color formats)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Wed, 17 Apr 2013 00:21:21 +0000 (17:21 -0700)]
intel: Add support for blitting 6 byte-per-pixel formats.
The next commit introduces what is apparently our first one, which tripped
over this in glReadPixels.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Wed, 17 Apr 2013 00:21:20 +0000 (17:21 -0700)]
i965: Use the Mesa surface formats for float RGB surfaces.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Wed, 17 Apr 2013 00:21:19 +0000 (17:21 -0700)]
i965: Use the new XRGB UNORM formats.
This is a step on the way to removing some of our code for forcing alpha
to 1, but I want easy bisecting so I'll add groups of formats separately.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
José Fonseca [Wed, 15 May 2013 15:59:28 +0000 (16:59 +0100)]
draw: More defensive coding in DRAW_GET_IDX.
Doesn't make a difference ATM, but just in case.
José Fonseca [Wed, 15 May 2013 15:57:11 +0000 (16:57 +0100)]
draw: Fix vsplit regression when the ib can be used directly.
`ib` no longer is offseted by `istart`.
Trivial.
Chris Forbes [Mon, 13 May 2013 09:54:36 +0000 (21:54 +1200)]
mesa: Stop clamping stencil reference value at specification time
All drivers now clamp this to the appropriate range for the bound
stencil buffer when emitting stencil state.
NOTE: This is a candidate for stable branches.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Chris Forbes [Mon, 13 May 2013 09:49:30 +0000 (21:49 +1200)]
swrast: Use accessor for stencil reference values
NOTE: This is a candidate for stable branches.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Acked-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Chris Forbes [Mon, 13 May 2013 09:49:11 +0000 (21:49 +1200)]
st: Use accessor for stencil reference values
NOTE: This is a candidate for stable branches.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Acked-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Chris Forbes [Mon, 13 May 2013 09:48:34 +0000 (21:48 +1200)]
radeon: Use accessor for stencil reference values
V2: Drop spurious mask with 0xff.
NOTE: This is a candidate for stable branches.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Acked-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Chris Forbes [Mon, 13 May 2013 09:47:37 +0000 (21:47 +1200)]
nouveau: Use accessor for stencil reference values
NOTE: This is a candidate for stable branches.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Acked-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Chris Forbes [Mon, 13 May 2013 09:46:50 +0000 (21:46 +1200)]
intel: Use accessor for stencil reference values
NOTE: This is a candidate for stable branches.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Chris Forbes [Mon, 13 May 2013 09:46:07 +0000 (21:46 +1200)]
mesa: Use accessor for stencil reference values in glGet
NOTE: This is a candidate for stable branches.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Chris Forbes [Mon, 13 May 2013 09:17:29 +0000 (21:17 +1200)]
mesa: add accessor for effective stencil ref
Clamps the stencil reference value to the range representable in the
currently-bound draw framebuffer's stencil attachment.
V2: Add spec quote.
NOTE: This is a candidate for stable branches.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Chia-I Wu [Wed, 15 May 2013 05:52:14 +0000 (13:52 +0800)]
ilo: clean up transfer format conversion
Map the bo directly, instead of calling transfer_map().
Chia-I Wu [Wed, 15 May 2013 03:24:02 +0000 (11:24 +0800)]
ilo: rework transfer mapping method choosing
Always check if a bo is busy in choose_transfer_method() since we always need
to map it in either map() or unmap(). Also determine how a bo is mapped in
choose_transfer_method().
Chia-I Wu [Wed, 15 May 2013 00:51:16 +0000 (08:51 +0800)]
ilo: refactor transfer mapping
Add tex_get_box_offset() to compute transfer offet from the pipe_box. Add
tex_get_slice_stride() to compute slice stride for a transfer.
Chia-I Wu [Wed, 15 May 2013 00:50:34 +0000 (08:50 +0800)]
ilo: no writeback without PIPE_TRANSFER_WRITE
We should not write staging data back when PIPE_TRANSFER_WRITE is not set.
Chia-I Wu [Wed, 15 May 2013 00:49:22 +0000 (08:49 +0800)]
ilo: minor cleanups for transfers
Rename some functions and reorder some code.
Chia-I Wu [Tue, 14 May 2013 10:47:03 +0000 (18:47 +0800)]
ilo: simplify ilo_texture_get_slice_offset()
Always return a tile-aligned offset. Also fix for W tiling.
Zack Rusin [Tue, 14 May 2013 07:47:36 +0000 (03:47 -0400)]
draw/gs: fix extracting of the clip
The indices are not consecutive when using the geometry shader,
which means we were extracting non existing values. Create
an array of linear indices and always use it instead of the passed
indices. Found by Jose.
Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Kenneth Graunke [Tue, 14 May 2013 19:22:09 +0000 (12:22 -0700)]
docs: Mark a few things as in progress.
Zack Rusin [Tue, 14 May 2013 03:07:14 +0000 (23:07 -0400)]
draw: try to prevent overflows on index buffers
Pass in the size of the index buffer, when available, and use it
to handle out of bounds conditions. The behavior in the case of
an overflow needs to be the same as with other overflows in the
vertex processing pipeline meaning that a vertex should still
be generated but all attributes in it set to zero.
Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Zack Rusin [Tue, 14 May 2013 02:41:25 +0000 (22:41 -0400)]
draw: use the total number of vertices for statistics
the number of vertices to fetch doesn't necessarily equal the
total number of input vertices, e.g. we might want to fetch
a single vertex but then draw it twice. Lets use the correct
number of input vertices in the statistics.
Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Zack Rusin [Thu, 9 May 2013 03:48:20 +0000 (23:48 -0400)]
draw: don't crash on vertex buffer overflow
We would crash when stride was bigger than the size of the buffer.
The correct behavior is to just fetch zero's in this case.
Unfortunatly with user_buffer's there's no way to validate the size
because currently we're just not getting it. Adjust the draw interface
to pass the size along the mapped buffer, which works perfectly
for buffer backed vertex_buffers and, in future, it will allow
us to plumb user_buffer sizes through the same interface.
Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Zack Rusin [Tue, 7 May 2013 19:59:56 +0000 (15:59 -0400)]
gallivm/soa: implement indirect addressing in immediates
The support is analogous to the way we handle indirect addressing
in temporaries, except that we don't have to worry about storing
(after declarations) and thus we'll able to keep using the old
code when indirect addressing isn't used. In other words we're
still using constants directly, unless the instruction has
immediate register with indirect addressing.
Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Zack Rusin [Fri, 3 May 2013 16:22:08 +0000 (12:22 -0400)]
draw/gs: don't bind the tgsi state if we're using llvm paths
Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Vinson Lee [Mon, 13 May 2013 03:37:17 +0000 (20:37 -0700)]
gallivm: Fix build with LLVM >= 3.4 r181680.
Tested-by: Laurent Carlier <lordheavym@gmail.com>
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
José Fonseca [Tue, 14 May 2013 15:55:56 +0000 (16:55 +0100)]
mesa/st: Temporary workaround for fdo bug 64568.
Effectively reverting the problematic hunk of
commit
614ee25077b7ffafeb87b22563d01856824fb4bc
Alex Deucher [Mon, 13 May 2013 20:25:51 +0000 (16:25 -0400)]
radeonsi: add Hainan pci ids
Note: this is a candidate for the 9.1 branch
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Alex Deucher [Mon, 13 May 2013 20:44:40 +0000 (16:44 -0400)]
radeonsi: update r600_get_llvm_processor_name for hainan
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Alex Deucher [Mon, 13 May 2013 20:24:02 +0000 (16:24 -0400)]
radeonsi: add support for hainan chips
Note: this is a candidate for the 9.1 branch
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
José Fonseca [Tue, 14 May 2013 13:18:42 +0000 (14:18 +0100)]
draw: Fix io_ptr/num_prims name in IR.
Trivial.
José Fonseca [Mon, 13 May 2013 14:15:59 +0000 (15:15 +0100)]
graw/tgsi_dump: Fix gdb macro.
The macro was relying on "tokens" local variable to exist.
Vadim Girlin [Tue, 14 May 2013 13:11:38 +0000 (17:11 +0400)]
r600g/sb: add missing cases for ARUBA chips
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Vadim Girlin [Tue, 14 May 2013 13:08:38 +0000 (17:08 +0400)]
r600g/sb: get rid of standard c++ streams
Static initialization of internal libstdc++ data related to iostream
causes segfaults with some apps.
This patch replaces all uses of std::ostream and std::ostringstream in sb
with custom lightweight classes.
Prevents segfaults with ut2004demo and probably some other old apps.
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Vadim Girlin [Sat, 11 May 2013 14:30:30 +0000 (18:30 +0400)]
r600g/sb: separate bytecode decoding and parsing
Parsing and ir construction is required for optimization only,
it's unnecessary if we only need to print shader dump.
This should make new disassembler more tolerant to any new
features in the bytecode.
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Christian König [Wed, 8 May 2013 15:03:01 +0000 (17:03 +0200)]
vl/vdpau: fix PresentationQueueQuerySurfaceStatus
The last queued surface always keeps displaying.
Fixing a problem with XBMC.
Signed-off-by: Christian König <christian.koenig@amd.com>
Chia-I Wu [Mon, 13 May 2013 07:19:55 +0000 (15:19 +0800)]
ilo: rework ilo_texture
Use ilo_buffer for buffer resources and ilo_texture for texture resources. A
major cleanup is necessitated by the separation.
Chia-I Wu [Mon, 13 May 2013 07:10:34 +0000 (15:10 +0800)]
ilo: rename ilo_resource to ilo_texture
In preparation for the introduction of ilo_buffer.
Chia-I Wu [Mon, 13 May 2013 06:29:09 +0000 (14:29 +0800)]
ilo: move transfer-related functions to a new file
Resource mapping is distinct from resource allocation, and is going to get
more and more complex. Move the related functions to a new file to make the
separation clear.
Rodrigo Vivi [Mon, 13 May 2013 20:53:38 +0000 (17:53 -0300)]
i965: Add missing Haswell GT3 Desktop to IS_HSW_GT3 check.
NOTE: This is a candidate for stable branches.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Wed, 17 Apr 2013 23:17:50 +0000 (16:17 -0700)]
i965: write layer if gl_Layer is used in VS
This is enabled by the AMD_vertex_shader_layer extension.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Jordan Justen [Wed, 27 Mar 2013 20:58:04 +0000 (13:58 -0700)]
glsl: add AMD_vertex_shader_layer support
This GLSL extension requires that AMD_vertex_shader_layer be
enabled by the driver.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Jordan Justen [Wed, 27 Mar 2013 20:53:21 +0000 (13:53 -0700)]
extensions: add AMD_vertex_shader_layer
This extension will require driver support, so it must
be enabled by the driver.
http://www.opengl.org/registry/specs/AMD/vertex_shader_layer.txt
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Chad Versace [Wed, 8 May 2013 16:46:21 +0000 (09:46 -0700)]
mesa: Expose GL_OES_texture_npot on GLES1
Mesa's extension table incorrectly lists this GL_OES_texture_npot as
ES2-only. It's also an ES1 extension. This patch adds ES1 to the
extensions API mask.
From the GL_OES_texture_npot spec:
OpenGL ES 1.0 or OpenGL ES 2.0 is required. This extension is
written against OpenGL ES 1.1.12 and OpenGL ES 2.0.25.
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Ian Romanick [Sat, 23 Mar 2013 00:49:27 +0000 (17:49 -0700)]
glsl: Death to array dereferences of vectors!
Now that all the places that used to generate array derefeneces of
vectors have been changed to generate either ir_binop_vector_extract or
ir_triop_vector_insert (or both), remove all support for dealing with
this deprecated construct.
As an added safeguard, modify ir_validate to reject ir_dereference_array
of a vector.
v2: Convert tabs to spaces. Suggested by Eric.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Ian Romanick [Sat, 23 Mar 2013 00:45:52 +0000 (17:45 -0700)]
glsl: Generate correct ir_binop_vector_extract code for out and inout parameters
Like with type conversions on out parameters, some extra copies need to
occur to handle these cases. The fundamental problem is that
ir_binop_vector_extract is not an lvalue, but out and inout parameters
must be lvalues. A previous patch delt with a similar problem in the
LHS of ir_assignment.
v2: Convert tabs to spaces. Suggested by Eric.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Ian Romanick [Sat, 23 Mar 2013 00:42:38 +0000 (17:42 -0700)]
glsl: Use vector-insert and vector-extract on elements of gl_ClipDistanceMESA
Variable indexing into vectors using ir_dereference_array is being
removed, so this lowering pass has to generate something different.
v2: Convert tabs to spaces. Suggested by Eric.
v3: Simplify code slightly by assuming that elements of
gl_ClipDistanceMESA will always be vec4. Suggested by Paul.
v4: Fairly substantial rewrite based on the rewrite of "glsl: Convert
lower_clip_distance_visitor to be an ir_rvalue_visitor"
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Ian Romanick [Wed, 8 May 2013 17:59:47 +0000 (10:59 -0700)]
glsl: Remove some stale comments about ir_call
ir_call was changed long ago to be a statement rather than an
expression. That makes this comment no longer valid.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Ian Romanick [Wed, 8 May 2013 17:48:55 +0000 (10:48 -0700)]
glsl: Convert lower_clip_distance_visitor to be an ir_rvalue_visitor
Right now the lower_clip_distance_visitor lowers variable indexing into
gl_ClipDistance into variable indexing into both the array
gl_ClipDistanceMESA and the vectors of that array. For example,
gl_ClipDistance[i] = f;
becomes
gl_ClipDistanceMESA[i >> 2][i & 3] = f;
However, variable indexing into vectors using ir_dereference_array is
being removed. Instead, ir_expression with ir_triop_vector_insert will
be used. The above code will become
gl_ClipDistanceMESA[i >> 2] =
vector_insert(gl_ClipDistanceMESA[i >> 2], i & 3, f);
In order to do this, an ir_rvalue_visitor will need to be used. This
commit is really just a refactor to get ready for that.
v4: Split the least amount of refactor from the rest of the code
changes.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Ian Romanick [Sat, 16 Mar 2013 01:08:22 +0000 (18:08 -0700)]
glsl: Generate ir_binop_vector_extract for indexing of vectors
Now ir_dereference_array of a vector will never occur in the RHS of an
expression.
v2: Add back the { } around the if-statement body to make it more
readable. Suggested by Eric.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Ian Romanick [Sat, 16 Mar 2013 01:06:11 +0000 (18:06 -0700)]
glsl: Convert ir_binop_vector_extract in the LHS to ir_triop_vector_insert
The ast_array_index code can't know whether to generate an
ir_binop_vector_extract or an ir_triop_vector_insert. Instead it will
always generate ir_binop_vector_extract, and the LHS and RHS have to be
re-written.
v2: Convert tabs to spaces. Suggested by Eric.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Ian Romanick [Mon, 18 Mar 2013 21:45:53 +0000 (14:45 -0700)]
glsl: Add lowering pass for ir_triop_vector_insert
This will eventually replace do_vec_index_to_cond_assign. This lowering
pass is called in all the places where do_vec_index_to_cond_assign or
do_vec_index_to_swizzle is called.
v2: Use WRITEMASK_* instead of integer literals. Use a more concise
method of generating broadcast_index. Both suggested by Eric.
v3: Use a series of scalar compares instead of a single vector compare.
Suggested by Eric and Ken. It still uses 'if (cond) v.x = y;' instead
of conditional assignments because ir_builder doesn't do conditional
assignments, and I'd rather keep the code simple.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Ian Romanick [Tue, 26 Mar 2013 21:22:03 +0000 (14:22 -0700)]
glsl: Lower ir_binop_vector_extract to conditional moves
Lower ir_binop_vector_extract with a non-constant index to a series of
conditional moves. This is exactly like ir_dereference_array of a
vector with a non-constant index.
v2: Convert tabs to spaces. Suggested by Eric.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Ian Romanick [Fri, 15 Mar 2013 21:36:46 +0000 (14:36 -0700)]
glsl: Lower ir_binop_vector_extract to swizzle
Lower ir_binop_vector_extract with a constant index to a swizzle. This
is exactly like ir_dereference_array of a vector with a constant index.
v2: Convert tabs to spaces. Suggested by Eric.
v3: Correctly call convert_vector_extract_to_swizzle in
ir_vec_index_to_swizzle_visitor::visit_enter(ir_call *ir). Suggested by
Ken.
v4: Use CLAMP instead of MIN2(MAX2()). Suggested by Ken.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Ian Romanick [Wed, 6 Mar 2013 01:47:35 +0000 (17:47 -0800)]
glsl: Refactor part of convert_vec_index_to_cond_assign
Use a first function that extract the vector being indexed and the index
from the deref. Call the second function that does the real work.
Coming patches will add a new ir_expression for variable indexing into a
vector. Having the lowering pass split into two functions will make it
much easier to lower the new ir_expression.
v2: Convert tabs to spaces. Suggested by Eric.
v3: Move some bits from a later patch back to this patch so that it
actually compiles. Suggested by Ken.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Ian Romanick [Tue, 12 Mar 2013 19:42:51 +0000 (12:42 -0700)]
glsl: Add ir_triop_vector_insert
The new opcode is used to generate a new vector with a single field from
the source vector replaced. This will eventually replace
ir_dereference_array of vectors in the LHS of assignments.
v2: Convert tabs to spaces. Suggested by Eric.
v3: Add constant expression handling for ir_triop_vector_insert. This
prevents the constant matrix inversion tests from regressing. Duh.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Ian Romanick [Wed, 6 Mar 2013 19:05:14 +0000 (11:05 -0800)]
glsl: Add ir_binop_vector_extract
The new opcode is used to get a single field from a vector. The field
index may not be constant. This will eventually replace
ir_dereference_array of vectors. This is similar to the extractelement
instruction in LLVM IR.
http://llvm.org/docs/LangRef.html#extractelement-instruction
v2: Convert tabs to spaces. Suggested by Eric.
v3: Add array index range checking to ir_binop_vector_extract constant
expression handling. Suggested by Ken.
v4: Use CLAMP instead of MIN2(MAX2()). Suggested by Ken.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Paul Berry [Mon, 13 May 2013 14:52:08 +0000 (07:52 -0700)]
glsl: Fix "make check" breakage after adding options to do_common_optimization.
Commit b765740 (glsl: Pass struct shader_compiler_options into
do_common_optimization.) added a new parameter to
do_common_optimization() but didn't update test_optpass.cpp, causing
"make check" to break.
This patch makes the proper updates to test_optpass.cpp so that the
build succeeds again.
Kenneth Graunke [Thu, 18 Apr 2013 00:30:25 +0000 (17:30 -0700)]
glsl: Add a pass to flip matrix/vector multiplies to use dot products.
This pass flips (matrix * vector) operations to (vector *
matrixTranspose) for certain built-in matrices (currently
gl_ModelViewProjectionMatrix and gl_TextureMatrix).
This is equivalent, but results in dot products rather than multiplies
and adds. On some hardware, this is more efficient.
This pass is conditionalized on ctx->mvp_with_dp4, the flag drivers set
to indicate they prefer dot products.
Improves performance in Lightsmark by 1.01131% +/- 0.162069% (n = 10)
on a Haswell GT2 system. Passes Piglit on Ivybridge.
v2: Use struct gl_shader_compiler_options instead of plumbing through
another boolean flag for this purpose.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Thu, 18 Apr 2013 00:30:24 +0000 (17:30 -0700)]
i965/vs: Set the PreferDP4 shader compiler option.
Doing matrix multiplies with DP4s is fewer instructions than MUL/ADD,
especially since we don't support MAD in the vertex shader.
Not observed to improve performance in any fixed function applications,
but is useful for the next patch.
I've left this unset for the fragment shader because the scalar backend
can't use DP4 and does have MAD support.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Thu, 18 Apr 2013 00:30:23 +0000 (17:30 -0700)]
mesa: Move the mvp_with_dp4 flag to ShaderCompilerOptions.
This flag essentially tells the compiler whether it prefers
dot products or multiply/adds for matrix operations. As such,
ShaderCompilerOptions seems like the right place for it.
This also lets us specify it on a per-stage basis. This patch makes all
existing users set the flag for the Vertex Shader stage only, as it's
currently only used for fixed-function vertex programs. That will
change soon, and I wanted to preserve the existing behavior.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Thu, 18 Apr 2013 00:30:22 +0000 (17:30 -0700)]
glsl: Pass struct shader_compiler_options into do_common_optimization.
do_common_optimization may need to make choices about whether to emit
certain kinds of instructions. gl_context::ShaderCompilerOptions
contains exactly that information, so it makes sense to pass it in.
Rather than passing the whole array, pass the structure for the stage
that's currently being worked on.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Thu, 18 Apr 2013 00:30:21 +0000 (17:30 -0700)]
glsl: Initialize ctx->ShaderCompilerOptions in standalone scaffolding.
This code is copied from _mesa_init_shader_state().
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>