Jun Zhang [Thu, 13 Apr 2023 08:42:10 +0000 (16:42 +0800)]
[InstCombine] icmp(X | OrC, C) --> icmp(X, 0)
We can eliminate the or operation based on the predicate and the
relation between OrC and C.
sge: X | OrC s>= C --> X s>= 0 iff OrC s>= C s>= 0
sgt: X | OrC s> C --> X s>= 0 iff OrC s> C s>= 0
sle: X | OrC s<= C --> X s< 0 iff OrC s> C s>= 0
slt: X | OrC s< C --> X s< 0 iff OrC s>= C s>= 0
Alive2 links:
sge: https://alive2.llvm.org/ce/z/W-6FHE
sgt: https://alive2.llvm.org/ce/z/TKK2yJ
sle: https://alive2.llvm.org/ce/z/vURQGM
slt: https://alive2.llvm.org/ce/z/JAsVfw
Related issue: https://github.com/llvm/llvm-project/issues/61538
Signed-off-by: Jun Zhang <jun@junz.org>
Differential Revision: https://reviews.llvm.org/D147597
Jun Zhang [Thu, 13 Apr 2023 08:42:01 +0000 (16:42 +0800)]
Add baseline tests for D147597
Signed-off-by: Jun Zhang <jun@junz.org>
Alexis Engelke [Wed, 12 Apr 2023 16:53:26 +0000 (18:53 +0200)]
[LegacyPM] Reduce number of calls to getName
Repeatedly calling getName adds some overhead, which can be easily
avoided by querying the name just once per function. The improvements
are rather small (~0.5% back-end time in a compile-time optimized
setting), but also very easy to achieve.
Note that getting the name should be entirely avoidable in the common
case, but would require more substantial changes.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D148145
Richard Sandiford [Wed, 12 Apr 2023 17:42:12 +0000 (18:42 +0100)]
[clang] Bump AS_GNU to 1
Following a suggestion from Erich in https://reviews.llvm.org/D148101,
this patch bumps AS_GNU to 1 so that syntax 0 is invalid. It also
asserts that the syntax is in range.
Differential Revision: https://reviews.llvm.org/D148148
Richard Sandiford [Tue, 11 Apr 2023 17:25:34 +0000 (18:25 +0100)]
[clang] Fix FIXME in isAlignasAttribute()
AttributeCommonInfo::isAlignasAttribute() was used in one place:
isCXX11Attribute(). The intention was for isAlignasAttribute()
to return true for the C++ alignas keyword. However, as a FIXME
noted, the function also returned true for the C _Alignas keyword.
This meant that isCXX11Attribute() returned true for _Alignas as
well as for alignas.
AttributeCommonInfos are now always constructed with an
AttributeCommonInfo::Form. We can use that Form to convey whether
a keyword is alignas or not.
The patch uses 1 bit of an 8-bit hole in the current layout
of AttributeCommonInfo. This might not be the best long-term design,
but it should be easy to adapt the layout if necessary (that is,
if other uses are found for the spare bits).
I don't know of a way of testing this (other than grep -c FIXME)
Differential Revision: https://reviews.llvm.org/D148105
Richard Sandiford [Tue, 11 Apr 2023 16:58:56 +0000 (17:58 +0100)]
[clang] Type safety tweak for AttributeCommonInfo::Form
This patch adds static functions for constructing most
AttributeCommonInfo::Forms. Direct construction is only retained where
all fields (currently the syntax and spelling) are specified explicitly.
This is a wash on its own. The purpose is to allow extra fields
to be added to Form without disrupting all callers. In particular,
it allows extra information to be stored about keywords without
affecting non-keyword uses.
No functional change intended.
Differential Revision: https://reviews.llvm.org/D148104
Richard Sandiford [Tue, 11 Apr 2023 16:39:23 +0000 (17:39 +0100)]
[clang] Allow attributes to be constructed from keyword tokens
This patch adds an extra AttributeCommonInfo::Form constructor
for keywords, represented by their TokenKind. This isn't a
win on its own, but it helps with later patches.
No functional change intended.
Differential Revision: https://reviews.llvm.org/D148103
Richard Sandiford [Tue, 11 Apr 2023 15:11:32 +0000 (16:11 +0100)]
[clang] Specify attribute syntax & spelling with a single argument
When constructing an attribute, the syntactic form was specified
using two arguments: an attribute-independent syntax type and an
attribute-specific spelling index. This patch replaces them with
a single argument.
In most cases, that's done using a new Form class that combines the
syntax and spelling into a single object. This has the minor benefit
of removing a couple of constructors. But the main purpose is to allow
additional information to be stored as well, beyond just the syntax and
spelling enums.
In the case of the attribute-specific Create and CreateImplicit
functions, the patch instead uses the attribute-specific spelling
enum. This helps to ensure that the syntax and spelling are
consistent with each other and with the Attr.td definition.
If a Create or CreateImplicit caller specified a syntax and
a spelling, the patch drops the syntax argument and keeps the
spelling. If the caller instead specified only a syntax
(so that the spelling was SpellingNotCalculated), the patch
simply drops the syntax argument.
There were two cases of the latter: TargetVersion and Weak.
TargetVersionAttrs were created with GNU syntax, which matches
their definition in Attr.td, but which is also the default.
WeakAttrs were created with Pragma syntax, which does not match
their definition in Attr.td. Dropping the argument switches
them to AS_GNU too (to match [GCC<"weak">]).
Differential Revision: https://reviews.llvm.org/D148102
Richard Sandiford [Wed, 5 Apr 2023 15:41:30 +0000 (16:41 +0100)]
[clang] Ensure that Attr::Create(Implicit) chooses a valid syntax
The purpose of this patch and follow-on patches is to ensure that
AttributeCommonInfos always have a syntax that is appropriate for
their kind (i.e. that it matches one of the entries in Attr.td).
The attribute-specific Create and CreateImplicit methods had four
overloads, based on their tail arguments:
(1) no extra arguments
(2) an AttributeCommonInfo
(3) a SourceRange
(4) a SourceRange, a syntax, and (where necessary) a spelling
When (4) had a spelling argument, it defaulted to
SpellingNotCalculated.
One disadvantage of this was that (1) and (3) zero-initialized
the syntax field of the AttributeCommonInfo, which corresponds
to AS_GNU. But AS_GNU isn't always listed as a possibility
in Attr.td.
This patch therefore removes (1) and (3) and instead provides
the same functionality using default arguments on (4) (a bit
like the existing default argument for the spelling).
The default syntax is taken from the attribute's first valid
spelling.
Doing that raises the question: what should happen for attributes
like AlignNatural and CUDAInvalidTarget that are only ever created
implicitly, and so have no source-code manifestation at all?
The patch adds a new AS_Implicit "syntax" for that case.
The patch also removes the syntax argument for these attributes,
since the syntax must always be AS_Implicit.
For similar reasons, the patch removes the syntax argument if
there is exactly one valid spelling.
Doing this means that AttributeCommonInfo no longer needs the
single-argument constructors. It is always given a syntax instead.
Differential Revision: https://reviews.llvm.org/D148101
Martin Storsjö [Thu, 30 Mar 2023 12:46:56 +0000 (15:46 +0300)]
[compiler-rt] [test] [builtins] Pass the right parameters for linking with -nodefaultlibs on mingw targets
The clang-cl/MSVC case is handled above, thus consider win32 && !is_msvc
to be mingw.
This matches the list of libraries passed by e.g. the libcxx build, when
using -nodefaultlibs.
Differential Revision: https://reviews.llvm.org/D147647
Martin Storsjö [Tue, 4 Apr 2023 20:28:49 +0000 (20:28 +0000)]
[libunwind] [SEH] Initialize _msContext with RtlCaptureContext
When we initialize the UnwindCursor (unw_cursor_t) based on
an existing Registers object (unw_context_t), we only initialize
a subset of the class.
Fill the struct properly for the current thread with RtlCaptureContext,
followed by overwriting of the subset of registers that we do have
available in the Registers class.
One might think that it's enough to initialize specifically the
registers that we signal availability for with ContextFlags,
however in practice, that's not enough.
This fixes crashes when restoring the context via RtlRestoreContext
(via UnwindCursor::jumpto), via __unw_resume.
Differential Revision: https://reviews.llvm.org/D147636
Martin Storsjö [Sat, 1 Apr 2023 16:37:59 +0000 (19:37 +0300)]
[libunwind] [SEH] Allow setting/getting the register UNW_X86_64_RIP
This fixes libunwind_01.pass.cpp for x86_64 Windows.
Differential Revision: https://reviews.llvm.org/D147635
Martin Storsjö [Wed, 12 Apr 2023 11:01:19 +0000 (11:01 +0000)]
[compiler-rt] [test] [profile] Skip an MSVC-style linker parameter in mingw mode
This parameter isn't essential for the execution of this test, so just
skip it when running tests in mingw mode.
Differential Revision: https://reviews.llvm.org/D148165
Martin Storsjö [Wed, 12 Apr 2023 11:39:33 +0000 (11:39 +0000)]
[compiler-rt] [test] [profile] Mark the without-libc test as unsupported on mingw
Mingw toolchains always end up referencing the malloc symbol due to
the CRT startup files.
Differential Revision: https://reviews.llvm.org/D148166
Martin Storsjö [Wed, 12 Apr 2023 11:04:22 +0000 (11:04 +0000)]
[compiler-rt] [test] [profile] Mark a Windows test as requiring an MSVC target
This test uses lots of lld-link specific linker options that don't
work as such in mingw command lines.
Differential Revision: https://reviews.llvm.org/D148168
Martin Storsjö [Wed, 12 Apr 2023 08:38:05 +0000 (08:38 +0000)]
[compiler-rt] [ubsan] Fix printing of floats in mingw mode
In mingw mode on x86, long doubles are 80 bit - while MSVC mode uses
long doubles that are equal to regular doubles (on all architectures).
In the case of this formatting function, we're calling a MS CRT
provided printf function which interprets long doubles as 64 bit.
Since the long doubles are equal to regular doubles on all MSVC
platforms, just use regular double formatting. For MSVC environments
there's no difference, but for mingw environments, this avoids the
ambiguity.
Differential Revision: https://reviews.llvm.org/D148133
Martin Storsjö [Wed, 12 Apr 2023 08:03:04 +0000 (08:03 +0000)]
[compiler-rt] [test] Pass the mingw specific option for increasing stack size
This passes the same option that was added for MSVC builds in
fb5a24b4f03a7 in the corresponding mingw form too.
This fixes the BVGraph tests in the sanitizer unit tests.
Differential Revision: https://reviews.llvm.org/D148132
Martin Storsjö [Wed, 12 Apr 2023 07:31:34 +0000 (10:31 +0300)]
[libcxx] Rename the now fully private header __std_stream to std_stream.h
When this header now is a fully regular header within the src tree,
give it a more regular name.
Differential Revision: https://reviews.llvm.org/D148072
Max Kazantsev [Thu, 13 Apr 2023 08:43:24 +0000 (15:43 +0700)]
[IRCE] Relax restrictions on IRCE's latch exit count
It seems that existing logic is too strict about latch block exit count.
It is required to be computable, however it is not used in any computations,
and effectively the only thing it is used for is to get the type of computed
exit count.
Sometimes the exit count for latch block is not known, but the loop is still
finite because of other exits, and safe bounds are still computable. In this case,
we miss an opportunity to apply IRCE.
We could instead use a more relaxed version - max symbolic exit count, which,
if exists, is enough to say that the loop is finite, and its type should be good enough.
There is a subtlety with type: we do not support latch count type wider than range
check type. Because of that, we want to have the narrowest type available. So if it
can be computed from latch block immediately, take it. Otherwise, take whatever whole
loop provides and hope that it's type isn't too wide.
Differential Revision: https://reviews.llvm.org/D147910
Reviewed By: danilaml
Serge Pavlov [Thu, 13 Apr 2023 06:56:12 +0000 (13:56 +0700)]
Revert "[symbolizer] Treat invalid address as addr2line does"
This reverts commit
27c4777f41d2ab204c1cf84ff1cccd5ba41354da.
It created problems for testing on Gentoo, see:
https://reviews.llvm.org/rG27c4777f41d2ab204c1cf84ff1cccd5ba41354da#1190273
Reverted until https://reviews.llvm.org/D147652 has been landed.
Nikita Popov [Thu, 13 Apr 2023 08:48:09 +0000 (10:48 +0200)]
[GVN][SimplifyCFG] Add tests for dereferenceable metadata combining (NFC)
David Spickett [Thu, 13 Apr 2023 08:52:06 +0000 (08:52 +0000)]
[LLDB][docs] Remove outdated list of Buildbots
This was out of date and the link to the lldb tag will always be up to date.
Caroline Concatto [Thu, 13 Apr 2023 08:13:10 +0000 (08:13 +0000)]
[AArch64][CodeGen] Use interleave store for streaming compatible functions
The previous patch, D135564, was too conservative to avoid store interleave
for streaming-compatible functions/mode.
In this patch, we allow using the interleave store but using scalable vector.
Reviewed By: david-arm, sdesmalen
Differential Revision: https://reviews.llvm.org/D147040
Johannes de Fine Licht [Thu, 13 Apr 2023 08:27:21 +0000 (08:27 +0000)]
[MLIR][LLVM] Inline LLVM::StackSaveOp and LLVM::StackRestoreOp.
Support LLVM::StackSaveOp and LLVM::StackRestoreOp in the LLVM dialect
inliner in MLIR.
Inserts new LLVM::StackSaveOp and LLVM::StackRestoreOp intrinsics when
dynamic allocas are detected in the inlined blocks. This may result in
multiple saves/restores in the same block if some are already present in
the caller, which is legal IR, but is cleaned up in LLVM. There is not
yet a canonicalization pattern for this on LLVM dialect in MLIR.
Reviewed By: Dinistro
Differential Revision: https://reviews.llvm.org/D148011
Hans Wennborg [Thu, 13 Apr 2023 08:21:11 +0000 (10:21 +0200)]
Fix warn-unsafe-buffer-usage-fixits-pre-increment.cpp for Windows
long is 32-bits on windows, so the test was failing with:
error: cast from pointer to smaller type 'unsigned long' loses
information
see e.g. https://lab.llvm.org/buildbot/#/builders/123/builds/18361
This is a follow-up to D144304
Bing1 Yu [Thu, 13 Apr 2023 08:19:19 +0000 (16:19 +0800)]
[ReachingDefs] make ReachingDefDefaultVal smaller
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D148198
Nicolas Vasilache [Thu, 13 Apr 2023 08:00:23 +0000 (01:00 -0700)]
[mlir][Linalg] NFC - Extract an IndexingUtils from Linalg/Utils
Differential Revision: https://reviews.llvm.org/D148201
Bjorn Pettersson [Wed, 12 Apr 2023 09:01:55 +0000 (11:01 +0200)]
[Transforms][LTO] Remove some redundant includes. NFC
No need to include CallGraphSCCPass.h from the IPO/Inliner.
Also removed the include of LegacyPassManager.h in a couple of files
that do not really depend on that header file.
Differential Revision: https://reviews.llvm.org/D148083
Bjorn Pettersson [Wed, 12 Apr 2023 08:45:22 +0000 (10:45 +0200)]
[opt] Cleanups related to legacy PM deprecation
Remove dead code related to "FPasses". This was a leftover from
commit
7a5332b9b5584ce.
Do not mention -enable-new-pm in error messages. The option does
not exist any longer.
Remove the addPass helper. Only one use remained, so we can just
"inline" it manually to keep the code related to legacy PM a bit
less spread out.
Differential Revision: https://reviews.llvm.org/D148082
Bjorn Pettersson [Tue, 11 Apr 2023 22:13:17 +0000 (00:13 +0200)]
[opt] Remove the ExternalFunctionsPassedConstants pass
This commit is removing the last pieces of AnalysisWrapper.cpp
(including the ExternalFunctionsPassedConstants pass, aka
print-externalfnconstants).
The pass only existed for the legacy PM, and it was not regression
tested. And since the pass did not force the use of the legacy pass
manager there was no simply way to run the pass nowadays, at least
not by using opt.
Differential Revision: https://reviews.llvm.org/D148081
Bjorn Pettersson [Tue, 11 Apr 2023 22:03:44 +0000 (00:03 +0200)]
[opt] Remove the BreakpointPrinter pass
This removed the option print-breakpoints-for-testing in opt, as well
as the related BreakpointPrinter pass.
The functionality only existed for the legacy PM, but was not verified
to be working by any test cases. And the named "llvm.dbg.sp" metadata
that the pass was looking for is not something that I really can find
any information about (unless perhaps if I dive really deep into the
commit history), so not sure exactly if this functionality has been
relevant for several years.
Differential Revision: https://reviews.llvm.org/D148080
Nikita Popov [Thu, 13 Apr 2023 07:55:35 +0000 (09:55 +0200)]
[FunctionAttrs] Add another nounwind test (NFC)
Hans Wennborg [Thu, 13 Apr 2023 07:53:06 +0000 (09:53 +0200)]
Revert "ASan: move allocator base to avoid conflict with high-entropy ASLR for x86-64 Linux"
This broke lit tests on Mac, see comment on the code review.
> Users have discovered [*] that when CONFIG_ARCH_MMAP_RND_BITS == 32,
> it will frequently conflict with ASan's allocator on x86-64 Linux, because the
> PIE program segment base address of 0x555555555554 plus an ASLR shift of up to
> ((2**32) * 4K == 0x100000000000) will sometimes exceed ASan's hardcoded
> base address of 0x600000000000. We fix this by simply moving the allocator base
> to 0x500000000000, which is below the PIE program segment base address. This is
> cleaner than trying to move it to another location that is sandwiched between
> the PIE program and library segments, because if either of those grow too large,
> it will collide with the allocator region.
>
> Note that we will never need to change this base address again (unless we want to increase
> the size of the allocator), because ASLR cannot be set above 32-bits for x86-64 Linux (the
> PIE program segment and library segments would collide with each other; see also
> ARCH_MMAP_RND_BITS_MAX in https://github.com/torvalds/linux/blob/master/arch/x86/Kconfig).
>
> [*] see https://b.corp.google.com/issues/
276925478
> and https://groups.google.com/a/google.com/g/chrome-os-gardeners/c/BbfzCP3dEeo/m/h3C_vVUxCQAJ
>
> Differential Revision: https://reviews.llvm.org/D147984
This reverts commit
6f42b97a29a5872c115029c615f55f33419a4c1f.
Balázs Kéri [Thu, 13 Apr 2023 06:53:46 +0000 (08:53 +0200)]
[clang][ASTImporter] Fix import of typedef with unnamed structures
Fix crash in ASTImporter related to import of unnamed structures and typedefs
to these maybe with pointer.
There was a series of problems exposed by https://reviews.llvm.org/D133468
(commit
69a6417406a1b0316a1fa6aeb63339d0e1d2abbd) in the ASTImporter breaking
cross-translation unit analysis. This change fixes one of the problems exposed
by that change for importing unnamed structures. The problem was
discovered when running clang static analysis on open source projects
using cross-translation unit analysis.
Simple test command. Produces crash without change, passes all tests
with change.
```
ninja ASTTests && ./tools/clang/unittests/AST/ASTTests
--gtest_filter="*/*ImportAnonymousStruct/0"
```
Formatted crash stack:
```
ASTTests: <root>/clang/lib/AST/ASTContext.cpp:4787:
clang::QualType clang::ASTContext::getTypedefType(const clang::TypedefNameDecl*,
clang::QualType) const: Assertion `hasSameType(Decl->getUnderlyingType(), Underlying)' failed.
...
#9 <addr> clang::ASTContext::getTypedefType(clang::TypedefNameDecl const*, clang::QualType) const
<root>/clang/lib/AST/ASTContext.cpp:4789:26
<root>/clang/lib/AST/ASTImporter.cpp:1374:71
<root>/tools/clang/include/clang/AST/TypeNodes.inc:75:1
<root>/clang/lib/AST/ASTImporter.cpp:8663:8
```
Reviewed By: donat.nagy
Differential Revision: https://reviews.llvm.org/D145868
Chuanqi Xu [Thu, 13 Apr 2023 07:08:21 +0000 (15:08 +0800)]
[C++20] [Modules] Continue parsing after we found reserved module names
Close https://github.com/llvm/llvm-project/issues/62112
In the previous change, we'll stop parsing directly after we found
reserved module names. But this may be too aggressive. This patch
changes this. Note that the parsing will still be stopped if the module
name is `module` or `import`.
Nicolas Vasilache [Wed, 12 Apr 2023 20:24:08 +0000 (13:24 -0700)]
[mlir][Vector] Split transform.vector.lower_mask in 2 ops.
This gives us better control to lower masked operations independently of the create mask operations.
It is often useful to maintain high-level mask information instead of lowering it too early to
too fine-grained form.
Differential Revision: https://reviews.llvm.org/D148162
Hans Wennborg [Thu, 13 Apr 2023 07:03:29 +0000 (09:03 +0200)]
Revert "[tsan] Add debugging interfaces into interface header."
It broke lit tests on Mac, see comments on the code review.
> Reviewed By: vitalybuka, dvyukov
>
> Differential Revision: https://reviews.llvm.org/D147337
This reverts commit
ebb0f1d0639eeca5479fa4bfdc1ebcebf5c21dee and
follow-up commit
3c83aeee6b7d5e9ac5de1e29605ee57c2b800ca1.
serge-sans-paille [Fri, 31 Mar 2023 08:57:10 +0000 (10:57 +0200)]
[clang] Do not require GNUInlineAttr for inline builtins
Fix #61691
Differential Revision: https://reviews.llvm.org/D147307
pvanhout [Wed, 12 Apr 2023 11:04:55 +0000 (13:04 +0200)]
[AMDGPU] Remove CC exception for Promote Alloca Limits
Apparently it was used to work around some issue that has been fixed.
Removing it helps with high scratch usage observed in some cases due to failed alloca promotion.
Reviewed By: rampitec
Differential Revision: https://reviews.llvm.org/D145586
Heejin Ahn [Mon, 27 Mar 2023 03:52:22 +0000 (20:52 -0700)]
[WebAssembly] Handle DebugLoc in DebugValueManager
According to
https://llvm.org/docs/HowToUpdateDebugInfo.html#when-to-preserve-an-instruction-location,
when moving (and in our case cloning) within the same BB, the debug
location is preserved. But when moving / cloning to a different BB, we
preserve the debug location only if the destination BB contains the same
location. Currently we preserve the debug loc unconditionally in all
cases. This CL correctly handles the debug locs in DebugValueManager.
Reviewed By: dschuff
Differential Revision: https://reviews.llvm.org/D148115
Max Kazantsev [Thu, 13 Apr 2023 06:31:17 +0000 (13:31 +0700)]
[IRCE][Test] Add test showing that fake wide exit does not inhibit the transform
Max Kazantsev [Thu, 13 Apr 2023 06:23:32 +0000 (13:23 +0700)]
[Test] Regenerate test checks using auto-updater
Jean Perier [Thu, 13 Apr 2023 06:22:50 +0000 (08:22 +0200)]
[flang] Add TODO for polymorphic array argument in elemental procedure
The current lowering fails to retrieve the shape of polymorphic array
arguments in elemental procedure reference.
Add a TODO because this is supported in the new HLFIR lowering, and
because the current lowering anyway attempts to re-evaluate the
argument to get its shape, which is not correct if the evaluation
has side effects.
Add a test to ensure this is supported with HLFIR.
Reviewed By: PeteSteinfeld
Differential Revision: https://reviews.llvm.org/D148087
Enna1 [Thu, 13 Apr 2023 06:15:01 +0000 (14:15 +0800)]
[hwasan] remove requirment for PIE
The requirement for PIE of hwasan was introduced in https://reviews.llvm.org/D44745, this patch removes requirement for PIE.
Reviewed By: vitalybuka, MaskRay
Differential Revision: https://reviews.llvm.org/D147121
Max Kazantsev [Thu, 13 Apr 2023 06:04:45 +0000 (13:04 +0700)]
[NFC][IRCE] Remove meaningless local variable
Sheng [Sat, 8 Apr 2023 05:53:24 +0000 (13:53 +0800)]
[NFC][m68k] Remove the lingering codebeads-related part in M68kInstrFormats.td
sgokhale [Thu, 13 Apr 2023 05:21:24 +0000 (10:51 +0530)]
Revert "[CodeGen][ShrinkWrap] Split restore point"
This reverts commit
5f0bccc3d1a74111458c71f009817c9995f4bf83.
An issue has been reported here: https://github.com/ClangBuiltLinux/linux/issues/1833
Anshil Gandhi [Thu, 13 Apr 2023 05:20:50 +0000 (23:20 -0600)]
[BranchRelaxation] Correct JumpToFT value
Toggle true/false values of the JumpToFallThrough
parameter to simplify code and make it consistent
with the documentation for the `getFallThrough(..)`
method.
Reviewed By: bcahoon
Differential Revision: https://reviews.llvm.org/D148139
Max Kazantsev [Thu, 13 Apr 2023 05:08:46 +0000 (12:08 +0700)]
[IRCE][NFC] Remove unused variable IsSigned
Patch by Aleksandr Popov!
Differential Revision: https://reviews.llvm.org/D148113
Joshua Cao [Thu, 6 Apr 2023 04:47:59 +0000 (21:47 -0700)]
[mlir][affine] SuperVectorizer only widen ops with valid types
fixes https://github.com/llvm/llvm-project/issues/61309
Differential Revision: https://reviews.llvm.org/D147679
Yashwant Singh [Thu, 13 Apr 2023 04:19:40 +0000 (09:49 +0530)]
[LoopUnroll] Prevent LoopFullUnrollPass to perform partial/runtime unrolling
FullLoopUnroll was performing runtime unrolling in certain cases when
'#pragma unroll' was specified. Patch to fix this by introducing new parameter
to tryToUnrollLoop() to differentiate between LoopUnrollPass and
FullLoopUnrollPass. Based on the discussion here
(https://discourse.llvm.org/t/loop-unroller-fails-to-unroll-loop/69834)
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D148071
Lang Hames [Thu, 13 Apr 2023 03:14:52 +0000 (20:14 -0700)]
[JITLink] Remove a stale comment.
This comment was probably mangled when the generic ELFLinkGraphBuilder was
written from the original x86-64 specific version. Regardless of its origins,
it doesn't make any sense now.
Craig Topper [Thu, 13 Apr 2023 03:13:02 +0000 (20:13 -0700)]
[TableGen] Store CodeGenInstruction reference in EmitNodeMatcherCommon. NFC
Instead of storing a string containing the instruction name, store a
reference to the instruction. We can use that reference to print the
instruction name when we emit the table.
The only slightly annoying part is that we have to find the
CodeGenInstruction for IMPLICIT_DEF. GlobalISel is doing
a similar thing.
Arthur Eubanks [Mon, 13 Mar 2023 19:32:24 +0000 (12:32 -0700)]
[Pipeline] Remove Annotation2Metadata pass in post-link pipelines
The pre-link pipeline already ran the pass and it only needs to be run once.
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D145978
Peiming Liu [Tue, 24 Jan 2023 16:55:29 +0000 (16:55 +0000)]
[mlir][sparse] extend loop emitter to emit slice driven loops
Reviewed By: aartbik
Differential Revision: https://reviews.llvm.org/D142930
Shivam Gupta [Thu, 13 Apr 2023 02:58:57 +0000 (08:28 +0530)]
[Docs] Add GettingStarted.md to index.md
Kai Sasaki [Thu, 13 Apr 2023 01:41:56 +0000 (10:41 +0900)]
[mlir][func] Guard for unranked memref with the bare ptr memref call
Lowering the call op with use-bare-ptr-memref-call crashes due to the unsupported unranked memref type. We can prevent the crash by checking the type of operand in the pass instead of the assertion in the type converter.
Issue: https://github.com/llvm/llvm-project/issues/61872
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D148078
Jason Molenda [Thu, 13 Apr 2023 01:31:11 +0000 (18:31 -0700)]
AArch64 debugserver parse ESR register for watchpoints
Have debugserver parse the watchpoint flags out of the exception
syndrome register when we get a watchpoint mach exception. Relay
those fields up to lldb in the stop reply packet, if the watchpoint
number was reported by the hardware, use the address from that as
the watchpoint address.
Change how watchpoints are reported to lldb from using the mach
exception data, to using the `reason:watchpoint` and `description:asciihex`
method that lldb-server uses, which can relay the actual trap address
as well as the address of a watched memory region responsible for
the trap, so lldb can step past it.
Have debugserver look for the nearest watchpoint that it has set
when it gets a watchpoint trap, so accesses that are reported as
starting before the watched region are associated with the correct
watchpoint to lldb. Add a test case for this specific issue.
Differential Revision: https://reviews.llvm.org/D147820
rdar://
83996471
Fangrui Song [Thu, 13 Apr 2023 01:08:58 +0000 (18:08 -0700)]
[docs] Fix --filter typo in SymbolizerMarkupFormat.rst
Jason Molenda [Thu, 13 Apr 2023 00:53:51 +0000 (17:53 -0700)]
Remove AArch64 out of MIPS watchpoint-skip, doc wp description
Watchpoints from lldb-server are sent in the stop info packet
as a `reason:watchpoint` and `description:asciihex` keys; the
latter's asciihex has one to three integer values. This patch
documents the purpose of those three different numbers, and
clarifies the behavior on MIPS with the third number which is
outside the range of any watched memory range means to silently
skip the watchpoint.
lldb was previously using this silently skip watchpoint behavior
for AArch64 as well, but in the case of AArch64 we see a watchpoint
address outside of a watched memory range when the write BEGINS
before the watched memory range, but extends in to it. We don't
want to silently skip these.
Differential Revision: https://reviews.llvm.org/D147816
rdar://
83996471
Philip Reames [Thu, 13 Apr 2023 00:42:15 +0000 (17:42 -0700)]
[RISCV][TTI] Call improveShuffleKindFromMask like all the other backends
No test diff; noticed via inspection.
Han Zhu [Tue, 14 Feb 2023 01:16:25 +0000 (17:16 -0800)]
[X86 isel] Remove lane requirement from lowerShuffleAsUNPCKAndPermute
`lowerShuffleAsUNPCKAndPermute` requires the shuffle mask element to be
in the same lane in both the input and output vectors. This prevents it from
matching certain patterns for example in [GHI
61964](https://github.com/llvm/llvm-project/issues/61964). Removing the lane
requirement fixes the issue.
The change I'm targeting is in the test llvm/test/CodeGen/X86/pr61964.ll. The
codegen has improved notably with this patch. Otherwise, looks like some
broadcast instructions are replaced with unpck and perm. To check if there's
any other performance change, I ran llvm-test-suite benchmarks from the
SingleSource, MultiSource, and MicroBenchmarks directories:
```
Tests: 2665
Short Running: 2009 (filtered out)
Same hash: 140 (filtered out)
In Blacklist: 513 (filtered out)
Remaining: 3
Metric: exec_time
Program exec_time
lhs rhs diff
test-suite :: MultiSource/Benchmarks/ASCI_Purple/SMG2000/smg2000.test 1.64 1.64 0.1%
test-suite :: SingleSource/Benchmarks/Adobe-C++/loop_unroll.test 1.06 1.06 0.0%
test-suite :: MultiSource/Applications/JM/lencod/lencod.test 5.25 5.25 0.0%
Geomean difference nan nan 0.0%
exec_time
l/r lhs rhs diff
count 3.000000 3.000000 3.000000
mean 2.648300 2.649100 0.000462
std 2.269035 2.268849 0.000415
min 1.055500 1.055900 0.000095
25% 1.349300 1.350250 0.000237
50% 1.643100 1.644600 0.000379
75% 3.444700 3.445700 0.000646
max 5.246300 5.246800 0.000913
```
The patch only hits three cases and the result is neutral. (The 513 blacklisted
benchmarks are the ones under MicroBenchmarks, which `--filter-hash` does
not work and I manually verified their code did not change).
Differential Revision: https://reviews.llvm.org/D147668
Noah Goldstein [Wed, 12 Apr 2023 23:37:01 +0000 (18:37 -0500)]
[LIBC] Fix comments / name of __sched_cpu_count tests
Test was incorrectly named/commented after the sched_{set|get}affinity
functions.
Reviewed By: michaelrj
Differential Revision: https://reviews.llvm.org/D148044
Noah Goldstein [Wed, 12 Apr 2023 23:36:48 +0000 (18:36 -0500)]
[LIBC] Fix `getrandom` success return value
`getrandom` should return the number of bytes successfully set on
success, not `0`.
Reviewed By: sivachandra, michaelrj
Differential Revision: https://reviews.llvm.org/D147981
Noah Goldstein [Wed, 12 Apr 2023 23:41:33 +0000 (18:41 -0500)]
[LIBC] Implement `sched_yield()`
Implements: https://linux.die.net/man/2/sched_yield
Possibly we don't need the return value check / errno as according to
both the manpage (and current linux source) `sched_yield` cannot fail.
Reviewed By: sivachandra, michaelrj
Differential Revision: https://reviews.llvm.org/D147985
Reagan Bohan [Wed, 12 Apr 2023 23:55:15 +0000 (16:55 -0700)]
[crt] Enable sparc and mips targets
This patch enables sparc and mips in compiler-rt CRT, meaning that now every platform supported by compiler-rt builtins (that runs on Linux, i.e. not WebAssembly) will be suported by compiler-rt CRT
Reviewed By: phosek, MaskRay
Differential Revision: https://reviews.llvm.org/D147819
Akira Hatanaka [Wed, 12 Apr 2023 23:45:55 +0000 (16:45 -0700)]
Fix an assertion failure in unwrapSugar
An assertion in Qualifiers::addObjCLifetime fails when the ObjC lifetime
bits are already set.
Instead of calling operator+=, call addConsistentQualifiers, which
allows the lifetime bits to be set again as long the new value doesn't
conflict with the old value.
This fixes https://github.com/llvm/llvm-project/issues/61419.
Differential Revision: https://reviews.llvm.org/D147263
Amara Emerson [Fri, 24 Feb 2023 00:35:39 +0000 (16:35 -0800)]
[GlobalISel][NFC] Add MachineInstr::getFirst[N]{Regs,LLTs}() helpers to extract regs & types.
These reduce the typing and clutter from:
Register Dst = MI.getOperand(0).getReg();
Register Src1 = MI.getOperand(1).getReg();
Register Src2 = MI.getOperand(2).getReg();
Register Src3 = MI.getOperand(3).getReg();
LLT DstTy = MRI.getType(Dst);
... etc etc
To just:
auto [Dst, Src1, Src2, Src3] = MI.getFirst4Regs();
auto [DstTy, Src1Ty, Src2Ty, Src3Ty] = MI.getFirst4LLTs();
Or even more concise:
auto [Dst, DstTy, Src1, Src1Ty, Src2, Src2Ty, Src3, Src3Ty] =
MI.getFirst4RegLLTs();
Differential Revision: https://reviews.llvm.org/D144687
Amara Emerson [Wed, 12 Apr 2023 16:40:59 +0000 (09:40 -0700)]
[GlobalISel] Move the truncstore_merge combine to the LoadStoreOpt pass and add support for an extra case.
If we have set of mergeable stores of shifts, but the original source value being shifted
is wider than the merged size, we should still be able to merge if we truncate first. To do this
however we need to search for stores speculatively up the block, without knowing exactly how
many stores we should see before we stop. The old algorithm has to match an exact number of
stores to fit the wide type, or it dies. The new one will try to set the wide type to however
many stores we found in the upwards block traversal and use later checks to verify if they're
a valid mergeable set.
The reason I need to move this to LoadStoreOpt is because the combiner works going top down
inside a block, which means that we end up doing partial merges because we haven't seen all
the possible stores before we mutate the MIR. In LoadStoreOpt we can go bottom up.
As a side effect of this change, we also end up doing better on an existing test case (missing_store)
since we manage to do a partial merge there.
Craig Topper [Wed, 12 Apr 2023 23:11:03 +0000 (16:11 -0700)]
[LV] Optimize trip count SCEV.
To calculate the trip count we need to add 1 to the backedge
taken count. If we need to widen the backedge count, it's better
to do the add before the widening if we can guarantee it won't
overflow.
The code here is based on similar code I found in
LoopIdiomRecognize.
This is the vectorizer version of this InstCombine patch D142783.
Looking at the IR diffs, this does look like it gets more cases
than the InstCombine patch.
Reviewed By: reames
Differential Revision: https://reviews.llvm.org/D147355
Valentin Clement [Wed, 12 Apr 2023 23:13:29 +0000 (16:13 -0700)]
[mlir][openacc][NFC] Use oilist in assembly format
Use the oilist syntax in assembly format where appropriate.
This makes the dialect format more flexible as an order
is not imposed for the clauses.
Reviewed By: PeteSteinfeld, razvanlupusoru
Differential Revision: https://reviews.llvm.org/D148154
Med Ismail Bennani [Wed, 12 Apr 2023 23:00:07 +0000 (16:00 -0700)]
[lldb] Fix assertion when ScriptedProcess have no pid after launch
This patch should fix an assertion that causes some test failures:
https://ci.swift.org/view/LLDB/job/llvm-org-lldb-release-debuginfo/3587/console
This was caused by the changes introduces in `
88f409194d5a` where we
replaced `DidLaunch` by `DidResume` in the `ScriptedProcess` class.
However, by the time we resume the process, the pid should be already
set. To address this, this patch brings back `DidLaunch` which will
initialize the ScriptedProcess pid with a placeholder value. That value
will be updated in `DidResume` to the final pid.
Note, this 2 stage PID initialization is necessary sometimes, when the
scripted process gets stopped at entry (launch) and gets assigned an
object that contains the PID value. In this case, we need to update the
PID when we resume the process after we've stopped at entry.
This also replaces the default scripted process id to an arbitrary
number (42) since the current value (0) is considered invalid.
Differential Revision: https://reviews.llvm.org/D148153
Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
Vitaly Buka [Wed, 12 Apr 2023 22:38:44 +0000 (15:38 -0700)]
[test][asan] Simplify test
FileCheck is not very useful here.
Michael Jones [Wed, 12 Apr 2023 18:26:18 +0000 (11:26 -0700)]
[libc] Fix strtod exponent overflow bug
String to float has a condition to prevent overflowing the exponent with
the E notation. To do this it checks if adding that exponent to the
exponent found by parsing the number is greater than the maximum
exponent for the given size of float. The if statements had a gap on
exactly the maximum exponent value that caused it to be treated as the
minimum exponent value. This patch fixes those conditions.
Reviewed By: lntue
Differential Revision: https://reviews.llvm.org/D148152
Fangrui Song [Wed, 12 Apr 2023 22:01:04 +0000 (15:01 -0700)]
Revert D146987 "[Assignment Tracking] Enable by default"
This reverts commit
3820e9a2b29a2e268319ed6635da0d59e18d736d.
See https://reviews.llvm.org/D146987 for issues.
Ziqing Luo [Wed, 12 Apr 2023 21:40:14 +0000 (14:40 -0700)]
[-Wunsafe-buffer-usage] Add a Fixable for pointer pre-increment
For a pointer type expression `e` of the form `++DRE`, if `e` is under
an Unspecified Pointer Context (UPC) and `DRE` is suppose to be
transformed to have std:span type, we generate fix-its that transform `e` to
`(DRE = DRE.subspan(1)).data()`.
For reference, `e` is in an UPC if `e` is
- an argument of a function call (except the callee has [[unsafe_buffer_usage]] attribute), or
- the operand of a cast-to-(Integer or Boolean) operation; or
- the operand of a pointer subtraction operation; or
- the operand of a pointer comparison operation;
We may extend the definition of UPC by adding more cases later.
Reviewed by: NoQ (Artem Dergachev)
Differential revision: https://reviews.llvm.org/D144304
varconst [Wed, 12 Apr 2023 21:13:55 +0000 (14:13 -0700)]
[libc++][ranges][NFC] Templatize some of the types in `almost_satisfies_types.h`
Paul Kirth [Mon, 20 Mar 2023 21:16:15 +0000 (21:16 +0000)]
[CodeGen][RISCV] Change Shadow Call Stack Register to X3
ShadowCallStack implementation uses s2 register on RISC-V, but that
choice is problematic for reasons described in:
https://lists.riscv.org/g/sig-toolchains/message/544,
https://github.com/riscv-non-isa/riscv-elf-psabi-doc/issues/370, and
https://github.com/google/android-riscv64/issues/72
The concern over the register choice was also brought up in
https://reviews.llvm.org/D84414.
https://reviews.llvm.org/D84414#2228666 said:
```
"If the register choice is the only concern about this work, then I think
we can probably land it as-is and fixup the register choice if we see
major drawbacks later. Yes, it's an ABI issue, but on the other hand the
shadow call stack is not a standard ABI anyway.""
```
Since we have now found a sufficient reason to fixup the register
choice, we should go ahead and update the implementation. We propose
using x3(gp) which is now the platform register in the RISC-V ABI.
Reviewed By: asb, hiraditya, mcgrathr, craig.topper
Differential Revision: https://reviews.llvm.org/D146463
Craig Topper [Wed, 12 Apr 2023 20:42:35 +0000 (13:42 -0700)]
[LoopIdiomRecognize] Replace getNegativeSCEV(getOne()) with getMinusOne. NFC
Craig Topper [Wed, 12 Apr 2023 20:15:59 +0000 (13:15 -0700)]
[RISCV] Support llvm.lround intrinsics with i32 return type on RV64.
It seems that flang uses this for "nint" and expects this i32
to work. On the C side we think lround should only work for "long"
which is i64 on rv64.
It's easy for us to support i32 when we have native FP instructions.
I fell back to i64 and truncated the result otherwise. The
documentation for lround says it returns an unspecified value if
doesn't fit in the integer type. I have no idea what flang is
expecting. I really only did the libcall to avoid forking a test.
Reviewed By: asb
Differential Revision: https://reviews.llvm.org/D147195
Fangrui Song [Wed, 12 Apr 2023 20:13:38 +0000 (13:13 -0700)]
[ELF] Cap parallel::strategy to 16 threads when --threads= is unspecified
When --threads= is unspecified, we set it to
`parallel::strategy.compute_thread_count()`, which uses
sched_getaffinity (Linux)/cpuset_getaffinity (FreeBSD)/std::thread::hardware_concurrency (others).
With extensive testing on many machines (many configurations from
{aarch64,x86-64} x {Linux,FreeBSD,Windows} x allocators(native,mimalloc,rpmalloc) combinations)
with varying workloads, we discovered that when the concurrency is larger than
16, the linking process is slower than using --threads=16 due to parallelism
overhead outweighs optimizations. This is particularly harmful for machines with
many cores or when the link job competes with other jobs.
Cap parallel::strategy when --threads= is unspecified.
For some workloads changing the concurrency from 8 to 16 has nearly no improvement.
--thinlto-jobs= is unchanged since ThinLTO backend compiles are embarrassingly
parallel.
Link: https://discourse.llvm.org/t/avoidable-overhead-from-threading-by-default/69160
Reviewed By: peter.smith
Differential Revision: https://reviews.llvm.org/D147493
Shubham Sandeep Rastogi [Wed, 12 Apr 2023 19:44:13 +0000 (12:44 -0700)]
Revert "Move DBG_VALUE's that depend on loads to after a"
This reverts commit
0aaf634152f25a805563d552e72d89e8202d84f2.
Reverted this because of build failure https://lab.llvm.org/buildbot#builders/245/builds/7035
/home/tcwg-buildbot/worker/clang-armv8-quick/llvm/llvm/test/DebugInfo/Generic/incorrect-variable-debugloc1.ll:28:12: error: DWARF23: expected string not found in input
; DWARF23: DW_OP_lit13{{$}}
^
<stdin>:1:1: note: scanning from here
-: file format elf32-littlearm
^
<stdin>:19:20: note: possible intended match here
DW_AT_frame_base (DW_OP_reg13 SP)
^
Nicolas Vasilache [Wed, 12 Apr 2023 19:12:46 +0000 (12:12 -0700)]
[mlir][SCF] Make the scf.take_assumed_branch transform only read its target handle
Handles are tracked properly and usage composes better if we don't artificially lose handles.
Differential Revision: https://reviews.llvm.org/D148155
Vitaly Buka [Wed, 12 Apr 2023 19:23:30 +0000 (12:23 -0700)]
[test][tsan] Attempt to fix darwing after D147337
Shubham Sandeep Rastogi [Tue, 7 Feb 2023 19:33:45 +0000 (11:33 -0800)]
Move DBG_VALUE's that depend on loads to after a
load if the load is moved due to the pre register allocation ld/st
optimization pass
The issue here is that there can be a scenario where debug information
is lost because of the pre register allocation load store optimization
pass, where a load who's result describes the debug infomation for a
local variable gets moved below the load and that causes the debug
information for that load to get lost.
Example:
Before the Pre Register Allocation Load Store Pass
inst_a
%2 = ld ...
inst_b
DBG_VALUE %2, "x", ...
%3 = ld ...
After the Pass:
inst_a
inst_b
DBG_VALUE %2, "x", ...
%2 = ld ...
%3 = ld ...
The load has now been moved to after the DBG_VAL that uses its result
and the debug info for "x" has been lost. What we want is:
inst_a
inst_b
%2 = ld ...
DBG_VALUE %2, "x", ...
%3 = ld ...
Which is what this patch addresses
Differential Revision: https://reviews.llvm.org/D145168
Kadir Cetinkaya [Wed, 12 Apr 2023 16:40:43 +0000 (18:40 +0200)]
[clangd] Treat preamble patch as main file for include-cleaner analysis
Since we redefine all macros in preamble-patch, and it's parsed after
consuming the preamble macros, we can get false missing-include diagnostics
while a fresh preamble is being rebuilt.
This patch makes sure preamble-patch is treated same as main file for
include-cleaner purposes.
Differential Revision: https://reviews.llvm.org/D148143
David Green [Wed, 12 Apr 2023 18:44:02 +0000 (19:44 +0100)]
[AArch64][SVE] Extend predicated fadd/fsub patterns to negative zero
This adds -0.0 patterns for fadd and fsub, to go with D147723. The fsub pattern
is only added for completeness but with -0.0 being the neutral element the fadd
case comes up from vectorized reductions.
Differential Revision: https://reviews.llvm.org/D147724
Alexey Bataev [Thu, 6 Apr 2023 21:29:13 +0000 (14:29 -0700)]
[SLP]Improve reduction cost model for scalars.
Instead of abstract cost of the scalar reduction ops, try to use the
cost of actual reduction operation instructions, where possible. Also,
remove the estimation of the vectorized GEPs pointers for reduced loads,
since it is already handled in the tree.
Differential Revision: https://reviews.llvm.org/D148036
Kadir Cetinkaya [Wed, 12 Apr 2023 18:30:13 +0000 (20:30 +0200)]
[icnlude-cleaner] Fix dandling pointers in tests
Alex Langford [Tue, 11 Apr 2023 21:06:06 +0000 (14:06 -0700)]
[lldb] Change formatter helper function parameter list to remove ConstString
All of these functions take a ConstString for the type_name,
but this isn't really needed for two reasons:
1.) This parameter is always constructed from a static c-string
constant.
2.) They are passed along to to `AddTypeSummary` as a StringRef anyway.
Differential Revision: https://reviews.llvm.org/D148050
Shivam Gupta [Wed, 12 Apr 2023 06:54:15 +0000 (12:24 +0530)]
[Flang][Docs] Add a GettingStarted.md for build instructions
This patch fix first point of https://github.com/llvm/llvm-project/issues/60730.
https://flang.llvm.org/docs/ has no build instructions. This doc page is just
a copy of README page so that it can be accessible from website.
Differential Revision: https://reviews.llvm.org/D148070
Paul Kirth [Tue, 11 Apr 2023 16:52:37 +0000 (16:52 +0000)]
[clang][driver][NFC] Add hasShadowCallStack to SanitizerArgs
Currently, we can't check if ShadowCallStack is present in Args the same
way we handle other sanitizers. This is preparatory work for planned
driver changes to how we handle ShadowCallStack.
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D148031
Paul Kirth [Thu, 23 Mar 2023 16:54:15 +0000 (16:54 +0000)]
[support] Provide overload to PrintNumber that use C++ types
This attempts to address an issue with overload resolution for `PrintNumber`
with `size_t` parameters on Darwin, brought up in
https://reviews.llvm.org/D146492.
On Aarch64 Darwin, `uint64_t` has a different typedef than `size_t`
(e.g., `unsigned long long` vs. `unsigned long`), whereas on Linux and
Windows they are the same.
This commit also reverts the static_cast's added in
064e2497e2ebe9ac30ac96923a26a52484300fdf, since they are no longer
needed.
Reviewed By: jhenderson
Differential Revision: https://reviews.llvm.org/D146771
lizhiguang [Wed, 12 Apr 2023 17:47:28 +0000 (10:47 -0700)]
[sanitizer] correct prctl scope
prctl scope is wrong, i think this is typo, we should use:
REAL(prctl)(args...)
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D147760
Vlad Serebrennikov [Wed, 12 Apr 2023 17:45:32 +0000 (20:45 +0300)]
[clang] Make make_cxx_dr_status script runnable from anywhere
This script has hardcoded relative paths to `clang/test/CXX/drs`, `cwg_index.html`, and `cxx_dr_status.html`, which requires running it with `clang/www` CWD. This patch makes those paths relative to path of the script itself, so that it could be run from anywhere.
Reviewed By: #clang-language-wg, cor3ntin
Differential Revision: https://reviews.llvm.org/D148146
Mitch Phillips [Wed, 12 Apr 2023 17:08:40 +0000 (10:08 -0700)]
[MTE] [llvm-readobj] Add globals section parsing to --memtag
Global variables are described in a metadata table called
SHT_AARCH64_MEMTAG_GLOBALS_DYNAMIC. It's basically a ULEB-encoded skip
list with some other fancy encoding tricks to make it smaller. You can
see the ABI at
https://github.com/ARM-software/abi-aa/blob/main/memtagabielf64/memtagabielf64.rst#83encoding-of-sht_aarch64_memtag_globals_dynamic
This extends readelf/readobj to understand these sections.
Reviewed By: pcc, MaskRay, jhenderson
Differential Revision: https://reviews.llvm.org/D145761
Timm Bäder [Tue, 11 Apr 2023 05:26:22 +0000 (07:26 +0200)]
[clang][NFC] Use range-for loop in TextDiagnostic.cpp
Simon Pilgrim [Wed, 12 Apr 2023 16:41:26 +0000 (17:41 +0100)]
[SLP][X86] Add SSE4 test coverage to minmax reduction tests
Improve coverage for D148036
Archibald Elliott [Tue, 4 Apr 2023 09:36:12 +0000 (10:36 +0100)]
[DAGCombiner] Fix (shl (ctlz x) n) for non-power-of-two Data
This DAGCombine is not valid for some combinations of the known bits
of x and non-power-of-two widths of x. As shown in the bug:
- The bitwidth of x is 35 (n=5)
- The unknown bits of x is only the least significant bit
- This gives the result of the ctlz two possible values: 34 or 35, both
of which will give 1 when left-shifted 5 bits.
- So the `eor x, 1` that this optimisation would give is not correct.
A similar instcombine optimisation is only applied when the width of x is
a power-of-two. GlobalISel does not have this bug, as shown by the testcase.
Fixes #61549
Differential Revision: https://reviews.llvm.org/D147518
Archibald Elliott [Tue, 4 Apr 2023 09:34:24 +0000 (10:34 +0100)]
[NFC][AArch64] Add Test for PR61549
Differential Revision: https://reviews.llvm.org/D147517