Dave Liu [Thu, 23 Oct 2008 13:19:13 +0000 (21:19 +0800)]
86xx: remove the unused definition
Signed-off-by: Dave Liu <daveliu@freescale.com>
Dave Liu [Tue, 28 Oct 2008 09:47:49 +0000 (17:47 +0800)]
86xx: remove the redundant r2 global data pointer save
The commit
67256678f00c09b0a7f19e862e5c1847553d31bc add
the another global data pointer save, but in fact the
global data pointer will be initialized in the board_init_r,
so remove it such as the 85xx/83xx family.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Kumar Gala <kumar.gala@freescale.com>
Dave Liu [Tue, 28 Oct 2008 09:47:41 +0000 (17:47 +0800)]
86xx: remove the unused code for 86xx family
I believe these code was copied from 74xx family, but for
86xx, it is unused.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Kumar Gala <kumar.gala@freescale.com>
Dave Liu [Tue, 28 Oct 2008 09:46:35 +0000 (17:46 +0800)]
86xx: remove the second DDR LAW setting for mpc8641hpcn
The DDR1 LAW will precedence the DDR2 LAW, so remove
the second DDR LAW.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Becky Bruce <becky.bruce@freescale.com>
Dave Liu [Tue, 28 Oct 2008 09:46:23 +0000 (17:46 +0800)]
86xx: remove the unused ddr_enable_ecc in the board file
The DDR controller of 86xx processors have the ECC data init
feature, and the new DDR code is using the feature, we don't
need the way with DMA to init memory again.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Kumar Gala <kumar.gala@freescale.com>
Dave Liu [Tue, 28 Oct 2008 09:46:12 +0000 (17:46 +0800)]
86xx: Move the clear_tlbs before MMU turn on
We must invalidate TLBs before MMU turn on, but
currently the code is not, if there are some stale
TLB entry valid in the TLBs, it will cause strange
issue.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Becky Bruce <becky.bruce@freescale.com>
Scott Wood [Mon, 27 Oct 2008 20:57:08 +0000 (15:57 -0500)]
mpc8313erdb: Document NAND boot.
Previously, the documentation claimed that NAND boot is not supported.
This is no longer true.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Scott Wood [Wed, 29 Oct 2008 19:20:26 +0000 (14:20 -0500)]
NAND: Properly create JFFS2 cleanmarkers.
As reported by Ilko Iliev <iliev@ronetix.at>, the "nand erase clean"
command is currently broken, and among other things causes all blocks
to be marked bad.
This implements it properly using MTD_OOB_AUTO, along with some
indentation fixes.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Scott Wood [Wed, 29 Oct 2008 18:42:41 +0000 (13:42 -0500)]
NAND fsl elbc: Set FMR[ECCM] based on page size.
Hardware expects ECCM 0 for small page and ECCM 1 for large page
when booting from NAND, so use those defaults.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Haiying Wang [Wed, 29 Oct 2008 17:32:59 +0000 (13:32 -0400)]
NAND: Add support for MPC8572DS board
This patch defines 1M TLB&LAW size for NAND on MPC8572DS, assigns
0xffa00000 for CONFIG_SYS_NAND_BASE and adds other NAND supports in
config file.
It also moves environment(CONFIG_ENV_ADDR) outside of u-boot image, to
make room for the increased code size with NAND enabled.
Signed-off-by: Jason Jin <Jason.Jin@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Haiying Wang [Wed, 29 Oct 2008 15:05:55 +0000 (11:05 -0400)]
Make Freescale local bus registers available for both 83xx and 85xx.
- Rename lbus83xx_t to fsl_lbus_t and move it to asm/fsl_lbc.h so that it
can be shared by both 83xx and 85xx
- Remove lbus83xx_t and replace it with fsl_lbus_t in all 83xx boards
files which use lbus83xx_t.
- Move FMR, FIR, FCR, FPAR, LTESR from mpc83xx.h to asm/fsl_lbc.h so that
85xx can share them.
Signed-off-by: Jason Jin <Jason.Jin@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Scott Wood [Mon, 27 Oct 2008 20:38:30 +0000 (15:38 -0500)]
NAND: Align right column of the shorthelp with other commands.
I accidentally broke this in when making consistent the partial
alignment of the longhelp.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Karl Beldan [Mon, 15 Sep 2008 14:08:03 +0000 (16:08 +0200)]
NAND: Reset chip on power-up
Some chips require a RESET after power-up (e.g. Micron MT29FxGxxxxx).
The first command sent is NAND_CMD_READID.
Issue a NAND_CMD_RESET in nand_scan_ident before reading the device id.
Tested with an MT29F4G08AAC.
Signed-off-by: Karl Beldan <karl.beldan@gmail.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Scott Wood [Fri, 24 Oct 2008 21:20:43 +0000 (16:20 -0500)]
NAND: sync with 2.6.27
This brings the core NAND code up to date with the Linux kernel.
Since there were several drivers in Linux as of the last update that are
not in u-boot, I'm not bringing over new drivers that have been added
since in the absence of an interested party.
I did not update OneNAND since it was recently synced by Kyungmin Park,
and I'm not sure exactly what the common ancestor is.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Kumar Gala [Tue, 21 Oct 2008 22:25:47 +0000 (17:25 -0500)]
bootm: Added CONFIG_BOOTM_{LINUX, NETBSD, RTEMS}
Added the ability to config out bootm support for Linux, NetBSD, RTEMS
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Tue, 21 Oct 2008 22:25:46 +0000 (17:25 -0500)]
bootm: support subcommands in linux ppc bootm
Add support for 'bdt', 'cmdline', 'prep' to the linux PPC bootm.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Tue, 21 Oct 2008 22:25:45 +0000 (17:25 -0500)]
bootm: Add subcommands
Add the ability to break the steps of the bootm command into several
subcommands: start, loados, ramdisk, fdt, bdt, cmdline, prep, go.
This allows us to do things like manipulate device trees before
they are passed to a booting kernel or setup memory for a secondary
core in multicore situations.
Not all OS types support all subcommands (currently only start, loados,
ramdisk, fdt, and go are supported).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Tue, 21 Oct 2008 22:25:44 +0000 (17:25 -0500)]
bootm: Move to using a function pointer table for the boot os function
This removes a bit of code and makes it easier for the upcoming sub bootm
command support to call into the proper OS specific handler.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Wolfgang Denk [Tue, 28 Oct 2008 07:37:19 +0000 (08:37 +0100)]
Merge branch 'master' of git://git.denx.de/u-boot-video
Graeme Russ [Mon, 29 Sep 2008 13:03:14 +0000 (23:03 +1000)]
i386: Renamed show_boot_progress in assembler code
Renamed show_boot_progress in assembler init phase to
show_boot_progress_asm to avoid link conflicts with C version
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
Andy Fleming [Mon, 27 Oct 2008 22:31:05 +0000 (17:31 -0500)]
Merge branch 'denx'
Peter Tyser [Mon, 27 Oct 2008 21:42:00 +0000 (16:42 -0500)]
85xx: Update MPC85xx_PORDEVSR_IO_SEL mask
The MPC8572 has a 4-bit wide PORDEVSR IO_SEL field. Other MPC85xx
processors have a 3-bit wide IO_SEL field but have the most
significant bit is wired to 0 so this change should not affect
them.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Wolfgang Denk [Mon, 27 Oct 2008 21:31:32 +0000 (22:31 +0100)]
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Becky Bruce [Mon, 27 Oct 2008 21:09:42 +0000 (16:09 -0500)]
powerpc: fix pci window initialization to work with > 4GB DRAM
The existing code has a few errors that need to be fixed in
order to support large RAM sizes. Fix those, and add a
comment to make it clearer.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Mon, 27 Oct 2008 18:16:20 +0000 (13:16 -0500)]
pci/fsl_pci_init: Removed a bunch pointless trailing backslashes.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Haavard Skinnemoen [Mon, 1 Sep 2008 14:21:22 +0000 (16:21 +0200)]
lcd: Let the board code show board-specific info
The information displayed when CONFIG_LCD_INFO is set is inherently
board-specific, so it should be done by the board code. The current code
dealing with this only handles two cases, and is already a horrible mess
of #ifdeffery.
Yes, this duplicates some code, but it also allows boards to print more
board-specific information; this used to be very difficult.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Haavard Skinnemoen [Mon, 1 Sep 2008 14:21:21 +0000 (16:21 +0200)]
lcd: Set lcd_is_enabled before clearing the screen
This allows the logo/info rendering routines to use the regular
lcd_putc/lcd_puts/lcd_printf calls.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Haavard Skinnemoen [Mon, 1 Sep 2008 14:21:20 +0000 (16:21 +0200)]
lcd: Implement lcd_printf()
lcd_printf() has a prototype in include/lcd.h but no implementation. Fix
this by borrowing the lcd_printf() implementation from the cogent board
code (which appears to use its own LCD framework.)
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Haavard Skinnemoen [Mon, 1 Sep 2008 14:21:19 +0000 (16:21 +0200)]
atmel_lcdfb: Straighten out funky vl_sync logic
If the board _didn't_ request INVLINE_INVERTED, we set INVLINE_INVERTED,
otherwise we don't. WTF?
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Haavard Skinnemoen [Mon, 1 Sep 2008 14:21:18 +0000 (16:21 +0200)]
atmel_lcdfb: Eliminate unneeded #include <asm/arch/hardware.h>
atmel_lcdfb doesn't actually need anything from asm/arch/hardware.h. It
includes a file that does, asm/arch/gpio.h, but this file doesn't
include <asm/arch/hardware.h> like it's supposed to.
Add the missing include to asm/arch/gpio.h and remove the workaround
from the atmel_lcdfb driver. This makes the driver compile on avr32.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Kumar Gala [Wed, 22 Oct 2008 19:38:55 +0000 (14:38 -0500)]
86xx: Convert all fsl_pci_init users to new APIs
Converted MPC8610HCPD, MPC8641HPCN, and SBC8641D to use
fsl_pci_setup_inbound_windows() and ft_fsl_pci_setup().
With these changes the board code is a bit smaller and we get dma-ranges
set in the device tree for these boards.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
Kumar Gala [Tue, 21 Oct 2008 13:28:33 +0000 (08:28 -0500)]
85xx: Convert all fsl_pci_init users to new APIs
Converted ATUM8548, MPC8536DS, MPC8544DS, MPC8548CDS, MPC8568MDS,
MPC8572DS, TQM85xx, and SBC8548 to use fsl_pci_setup_inbound_windows()
and ft_fsl_pci_setup().
With these changes the board code is a bit smaller and we get dma-ranges
set in the device tree for these boards.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
Kumar Gala [Thu, 23 Oct 2008 05:01:06 +0000 (00:01 -0500)]
pci/fsl_pci_init: Added fdt helper for setting up bus-ranges & dma-ranges
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
Kumar Gala [Wed, 22 Oct 2008 19:06:24 +0000 (14:06 -0500)]
pci/fsl_pci_init: Add a common PCI inbound setup function
Add a common setup function that determines the pci_region(s) based
on how much memory we have in the system.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
Kumar Gala [Tue, 21 Oct 2008 15:13:14 +0000 (10:13 -0500)]
pci/fsl_pci_init: Enable larger address and setting inbound windows properly
* PCI Inbound window was setup incorrectly. The PCI address and system
address were swapped. The PCI address should be setting piwar/piwbear
and the system address should be setting pitar.
* Removed masking of addresses to allow for system address to support
system address & PCI address >32-bits
* Set PIWBEAR & POTEAR to allow for full 64-bit PCI addresses
* Respect the PCI_REGION_PREFETCH for inbound windows
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
Kumar Gala [Thu, 23 Oct 2008 04:33:56 +0000 (23:33 -0500)]
fdt: Added helper to set PCI dma-ranges property
Added fdt_pci_dma_ranges() that parses the pci_region info from the
struct pci_controller and populates the dma-ranges based on it.
The max # of windws/dma-ranges we support is 3 since on embedded
PowerPC based systems this is the max number of windows.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
Kumar Gala [Thu, 23 Oct 2008 05:05:47 +0000 (00:05 -0500)]
fdt: Add fdt_getprop_u32_default helpers
Add helper functions to return find a node and return it's property
or a default value.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
Kumar Gala [Tue, 21 Oct 2008 23:06:15 +0000 (18:06 -0500)]
86xx: Enable 64-bit PCI resources on all Freescale boards
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
Kumar Gala [Tue, 21 Oct 2008 16:33:58 +0000 (11:33 -0500)]
85xx: Enable 64-bit PCI resources on all Freescale boards
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
Kumar Gala [Tue, 21 Oct 2008 13:36:08 +0000 (08:36 -0500)]
pci: Allow for PCI addresses to be 64-bit
PCI bus is inherently 64-bit. While not all system require access to
the full 64-bit PCI address range some do. This allows those systems
to enable the full PCI address width via CONFIG_SYS_PCI_64BIT.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
Acked-by: Wolfgang Denk <wd@denx.de>
Dave Liu [Thu, 23 Oct 2008 13:18:53 +0000 (21:18 +0800)]
85xx: Fix the incorrect register used for DDR erratum1
The 8572 DDR erratum1:
DDR controller may enter an illegal state when operating
in 32-bit bus mode with 4-beat bursts.
Description:
When operating with a 32-bit bus, it is recommended that
DDR_SDRAM_CFG[8_BE] is cleared when DDR2 memories are used.
This forces the DDR controller to use 4-beat bursts when
communicating to the DRAMs. However, an issue exists that
could lead to data corruption when the DDR controller is
in 32-bit bus mode while using 4-beat bursts.
Projected Impact:
If the DDR controller is operating in 32-bit bus mode with
4-beat bursts, then the controller may enter into a bad state.
All subsequent reads from memory is corrupted.
Four-beat bursts with a 32-bit bus only is used with DDR2 memories.
Therefore, this erratum does not affect DDR3 mode.
Work Arounds:
To work around this issue, software must set DEBUG_1[31] in
DDR memory mapped space (CCSRBAR offset + 0x2f00 for DDR_1
and CCSRBAR offset + 0x6f00 for DDR_2).
Currenlty, the code is using incorrect register DDR_SDRAM_CFG_2
as condition, but it should be DDR_SDRAM_CFG register.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Dave Liu [Thu, 23 Oct 2008 13:17:19 +0000 (21:17 +0800)]
85xx: remove unused config definition
Signed-off-by: Dave Liu <daveliu@freescale.com>
Kumar Gala [Thu, 23 Oct 2008 06:47:38 +0000 (01:47 -0500)]
85xx: Add basic e500mc core support
Introduce CONFIG_E500MC to deal with the minor differences between
e500v2 and e500mc.
* Certain fields of HID0/1 don't exist anymore on e500mc
* Cache line size is 64-bytes on e500mc
* reset value of PIR is different
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Thu, 23 Oct 2008 06:47:37 +0000 (01:47 -0500)]
85xx: Use CONFIG_SYS_CACHELINE_SIZE instead of magic number
Using CONFIG_SYS_CACHELINE_SIZE instead of 31 means we can handle
e500mc's 64-byte cacheline properly when it gets added.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Georg Schardt [Fri, 24 Oct 2008 11:51:52 +0000 (13:51 +0200)]
ppc4xx: New board avnet fx12 minimodul
This patch adds support for the avnet fx12 minimodul.
It needs the "ppc4xx: Generic architecture for xilinx ppc405"
patch from Ricardo.
Signed-off-by: Georg Schardt <schardt@team-ctech.de>
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
Signed-off-by: Stefan Roese <sr@denx.de>
Ricardo Ribalda Delgado [Tue, 21 Oct 2008 16:29:46 +0000 (18:29 +0200)]
ppc4xx: Generic architecture for xilinx ppc405(v3)
As "ppc44x: Unification of virtex5 pp440 boards" did for the xilinx
ppc440 boards, this patch presents a common architecture for all the
xilinx ppc405 boards.
Any custom xilinx ppc405 board can be added very easily with no code
duplicity.
This patch also adds a simple generic board, that can be used on almost
any design with xilinx ppc405 replacing the file ppc405-generic/xparameters.h
This patch is prepared to work with the latest version of EDK (10.1)
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Fri, 24 Oct 2008 06:56:09 +0000 (08:56 +0200)]
ppc4xx: Disable DDR2 autocalibration on Kilauea for now
Since the new autocalibration still has some problems on some Kilauea
boards with 200MHz DDR2 frequency we disable the autocalibration and
use the hardcoded values as done before. This seems to work reliably
on all known DDR2 frequencies.
After the autocalibration issue is fixed we will enable it again.
Signed-off-by: Stefan Roese <sr@denx.de>
Mike Frysinger [Wed, 9 Apr 2008 06:02:07 +0000 (02:02 -0400)]
Blackfin: fix up UART status bit handling
Some Blackfin UARTs are read-to-clear while others are write-to-clear.
This can cause problems when we poll the LSR and then later try and handle
any errors detected.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Sun, 12 Oct 2008 00:42:17 +0000 (20:42 -0400)]
Blackfin: bf561-ezkit: drop redundant code
Common Blackfin code already announces CPU information.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Sun, 12 Oct 2008 00:43:10 +0000 (20:43 -0400)]
Blackfin: bf561-ezkit: drop pointless USB code
The USB/LAN register settings are not actually used/needed in order to
drive things from U-Boot, so drop the code.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Sun, 12 Oct 2008 00:47:58 +0000 (20:47 -0400)]
Blackfin: linker scripts: force start.o and set initcode boundaries
Make sure that the start.o object is always the first object in our linker
script regardless of configuration settings, and add some linker symbols
so the ldr utility can properly locate the initcode when generating a LDR.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Sun, 12 Oct 2008 01:19:39 +0000 (21:19 -0400)]
Blackfin: small cpu init optimization while setting interrupt mask
Use the sti instruction to set the initial interrupt mask rather than
banging on the core IMASK MMR to save both space and time.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Sun, 12 Oct 2008 01:18:10 +0000 (21:18 -0400)]
Blackfin: set initial stack correctly according to Blackfin ABI
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Sun, 20 Apr 2008 07:11:53 +0000 (03:11 -0400)]
Blackfin: make baud calculation more accurate
We should use the algorithm in the Linux kernel so that the UART divisor
calculation is more accurate. It also fixes problems on some picky UARTs
that have sampling anomalies.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Mon, 6 Oct 2008 08:21:41 +0000 (04:21 -0400)]
Blackfin: decode hwerrcause/excause when crashing
Having to decode hwerrcause/excause values is a pain, so automate it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Mon, 6 Oct 2008 08:20:54 +0000 (04:20 -0400)]
Blackfin: fix register dump messages
Make sure we report RETI/IPEND correctly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Mon, 6 Oct 2008 08:19:34 +0000 (04:19 -0400)]
Blackfin: don't bother displaying reboot msg when crashing
The hang function already tells you to reboot, so no point in showing it
twice.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Sun, 1 Jun 2008 05:23:48 +0000 (01:23 -0400)]
Blackfin: enable support for nested interrupts
During cpu init, make sure we initialize the CEC properly so that
interrupts can fire and be handled while U-Boot is running.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Mon, 6 Oct 2008 07:55:25 +0000 (03:55 -0400)]
Blackfin: init NAND before relocating env
If booting out of NAND, we need to make sure we initialize it properly
before attempting to relocate the environment.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Thu, 7 Aug 2008 22:40:13 +0000 (18:40 -0400)]
Blackfin: check cache bits, not cplb bits
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Thu, 7 Aug 2008 21:52:59 +0000 (17:52 -0400)]
Blackfin: drop unused cache flush code
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Thu, 7 Aug 2008 19:21:47 +0000 (15:21 -0400)]
Blackfin: unify cache handling code
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Mon, 6 Oct 2008 07:39:07 +0000 (03:39 -0400)]
Blackfin: only initialize the RTC when actually used
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Mon, 6 Oct 2008 07:44:33 +0000 (03:44 -0400)]
Blackfin: fix SWRST register definition
The SWRST register is a 16bit, not 32bit, register.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Thu, 7 Aug 2008 22:54:57 +0000 (18:54 -0400)]
Blackfin: build with -fomit-frame-pointer
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Thu, 7 Aug 2008 21:50:26 +0000 (17:50 -0400)]
Blackfin: document some of the blackfin directories
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Thu, 7 Aug 2008 19:16:56 +0000 (15:16 -0400)]
Blackfin: only enable hardware error irq by default
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Thu, 7 Aug 2008 17:36:43 +0000 (13:36 -0400)]
Blackfin: punt old unused mem_init.h header
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Thu, 7 Aug 2008 17:18:55 +0000 (13:18 -0400)]
Blackfin: delete unused page_descriptor_table_size define
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Thu, 7 Aug 2008 17:17:03 +0000 (13:17 -0400)]
Blackfin: fix typo in boot mode comment and add NAND define
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Ben Maan [Thu, 7 Aug 2008 17:14:21 +0000 (13:14 -0400)]
Blackfin: fix port mux defines for BF54x
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Thu, 7 Aug 2008 17:09:50 +0000 (13:09 -0400)]
Blackfin: update anomaly lists
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Thu, 7 Aug 2008 17:08:54 +0000 (13:08 -0400)]
Blackfin: unify DSPID/DBGSTAT MMR definitions
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Wolfgang Denk [Tue, 21 Oct 2008 13:53:51 +0000 (15:53 +0200)]
Fix strmhz(): avoid printing negative fractions
Signed-off-by: Wolfgang Denk <wd@denx.de>
Richard Retanubun [Fri, 17 Oct 2008 12:55:51 +0000 (08:55 -0400)]
mpc83xx: Removed #ifdef CONFIG_MPC834X dependency on upmconfig function
This is done to allow other 83XX based platforms which also have UPM
(e.g. 8360) to configure and use their UPM in u-boot.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Anton Vorontsov [Tue, 14 Oct 2008 18:58:53 +0000 (22:58 +0400)]
mpc83xx: add support for switching between USB Host/Function for MPC837XEMDS
With this patch u-boot can fixup the dr_mode and phy_type properties
for the Dual-Role USB controller.
While at it, also remove #ifdefs around includes, they are not needed.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Anton Vorontsov [Wed, 8 Oct 2008 16:52:54 +0000 (20:52 +0400)]
mpc83xx: add ELBC NAND support for the MPC837XEMDS boards
Though NAND chip is replaceable on the MPC837XE-MDS boards, the
current settings don't work with the default chip on the board.
Nevertheless Freescale's U-Boot sets the option register correctly,
so I just dumped the register from the working u-boot. My guess is
that the old settings were applicable for some pilot boards, not
found in the production.
This patch also enables FSL ELBC driver so that we could access
the NAND storage in the u-boot.
The NAND support costs about 45KB, so the u-boot no longer fits
into two 128KB NOR flash sectors, thus we also have to adjust
environment location: add another 128KB to the monitor length.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
It is due to hardware design and logic defect, that is the
I/O[0:7] of NAND chip is connected to LAD[7:0], so when
the NAND chip connected to nLCS3, you have to set up the
OR3[BCTLD] = '1' for normal operation, otherwise it will have
bus contention due to the pin 48/25 of U60 is enabled.
Setup the OR3[BCTLD] = '1' , that meaning the LBCTL is not
asserted upon access to the NAND chip, keep the default state.
Acked-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Anton Vorontsov [Thu, 2 Oct 2008 15:17:33 +0000 (19:17 +0400)]
mpc83xx: fix PCI scan hang on the standalone MPC837xE-MDS boards
The MPC837xE-MDS board's CPLD can auto-detect if the board is on the PIB,
standalone or acting as a PCI agent. User's Guide says:
- When the CPLD recognizes its location on the PIB it automatically
configures RCW to the PCI Host.
- If the CPLD fails to recognize its location then it is automatically
configured as an Agent and the PCI is configured to an external arbiter.
This sounds good. Though in the standalone setup the CPLD sets PCI_HOST
flag (it's ok, we can't act as PCI agents since we receive CLKIN, not
PCICLK), but the CPLD doesn't set the ARBITER_ENABLE flag, and without
any arbiter bad things will happen (here the board hangs during any config
space reads).
In this situation we must disable the PCI. And in case of anybody really
want to use an external arbiter, we provide "pci_external_aribter"
environment variable.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Anton Vorontsov [Thu, 2 Oct 2008 14:32:25 +0000 (18:32 +0400)]
mpc83xx: add SGMII riser module support for the MPC8378E-MDS boards
This involves configuring the SerDes and fixing up the flags and
PHY addresses for the TSECs.
For Linux we also fix up the device tree.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Anton Vorontsov [Thu, 2 Oct 2008 14:31:59 +0000 (18:31 +0400)]
mpc83xx: add TSECs' HRCWH masks for MPC837x processors
We'll use these masks to parse TSEC modes out of HRCWH.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Anton Vorontsov [Thu, 2 Oct 2008 14:31:56 +0000 (18:31 +0400)]
mpc83xx: serdes: add forgotten shifts for rfcks
The rfcks should be shifted by 28 bits left. We didn't notice the bug
because we were using only 100MHz clocks (for which rfcks == 0).
Though, for SGMII we'll need 125MHz clocks.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Anton Vorontsov [Thu, 2 Oct 2008 14:31:53 +0000 (18:31 +0400)]
mpc83xx: fix serdes setup for the MPC8378E boards
MPC837xE specs says that SerDes1 has:
— Two lanes running x1 SGMII at 1.25 Gbps;
— Two lanes running x1 SATA at 1.5 or 3.0 Gbps.
And for SerDes2:
— Two lanes running x1 PCI Express at 2.5 Gbps;
— One lane running x2 PCI Express at 2.5 Gbps;
— Two lanes running x1 SATA at 1.5 or 3.0 Gbps.
The spec also explicitly states that PEX options are not valid for
the SD1.
Nevertheless MPC8378 RDB and MDS boards configure the SD1 for PEX,
which is wrong to do.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Anton Vorontsov [Wed, 10 Sep 2008 14:12:37 +0000 (18:12 +0400)]
mpc83xx: mpc8360emds: rework LBC SDRAM setup
Currently 64M of LBC SDRAM are mapped at 0xF0000000 which makes
it difficult to use (b/c then the memory is discontinuous and
there is quite big memory hole between the DDR/SDRAM regions).
This patch reworks LBC SDRAM setup so that now we dynamically
place the LBC SDRAM near the DDR (or at 0x0 if there isn't any
DDR memory).
With this patch we're able to:
- Boot without external DDR memory;
- Use most "DDR + SDRAM" setups without need to support for
sparse/discontinuous memory model in the software.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Wolfgang Denk [Tue, 21 Oct 2008 09:23:56 +0000 (11:23 +0200)]
FDT: don't use private kernel header files
On some systems (for example Fedora Core 4) U-Boot builds with the
following wanrings only:
...
In file included from /home/wd/git/u-boot/include/libfdt_env.h:33,
from fdt.c:51:
/usr/include/asm/byteorder.h:6:2: warning: #warning using private kernel header; include <endian.h> instead!
This patch fixes this problem.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Wolfgang Denk [Tue, 21 Oct 2008 19:19:35 +0000 (21:19 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx
Stefan Roese [Mon, 13 Oct 2008 13:15:31 +0000 (15:15 +0200)]
ppc4xx: Add 1.0 & 1.066 GHz to canyonlands bootstrap command for PLL setup
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 13 Oct 2008 08:45:14 +0000 (10:45 +0200)]
ppc4xx: Correctly setup ranges property in ebc node
Previously only the NOR flash mapping was written into the ranges
property of the ebc node. This patch now writes all enabled chip
select areas into the ranges property.
Signed-off-by: Stefan Roese <sr@denx.de>
Dirk Eibach [Wed, 8 Oct 2008 13:37:50 +0000 (15:37 +0200)]
ppc4xx: Add GDSys neo 405EP board support
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Niklaus Giger [Wed, 1 Oct 2008 12:46:13 +0000 (14:46 +0200)]
ppc4xx: Update configs for Netstal boards
I reorganized my config files, putting the common stuff into netstal-common.h
(got the idea by looking a amcc-common.h from Stefan).
Added stuff to boot the new powerpc linux via NFS (only tested with HCU4).
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Adam Graham [Wed, 8 Oct 2008 17:13:19 +0000 (10:13 -0700)]
ppc4xx: Add routine to retrieve CPU number
Provide a weak defined routine to retrieve the CPU number for
reference boards that have multiple CPU's. Default behavior
is the existing single CPU print output. Reference boards with
multiple CPU's need to provide a board specific routine.
See board/amcc/arches/arches.c for an example.
Signed-off-by: Adam Graham <agraham@amcc.com>
Signed-off-by: Victor Gallardo <vgallardo@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Adam Graham [Wed, 8 Oct 2008 17:13:14 +0000 (10:13 -0700)]
ppc4xx: Add static support for 44x IBM SDRAM Controller
This patch add the capability to configure a PPC440 based IBM SDRAM
Controller with static, compiled-in, values. PPC440 memory subsystem
includes a Memory Queue core.
Signed-off-by: Adam Graham <agraham@amcc.com>
Signed-off-by: Victor Gallardo <vgallardo@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Adam Graham [Wed, 8 Oct 2008 17:12:53 +0000 (10:12 -0700)]
ppc4xx: Add AMCC Arches board support (dual 460GT)
The Arches Evaluation board is based on the AMCC 460GT SoC chip.
This board is a dual processor board with each processor providing
independent resources for Rapid IO, Gigabit Ethernet, and serial
communications. Each 460GT has it's own 512MB DDR2 memory, 32MB NOR
FLASH, UART, EEPROM and temperature sensor, along with a shared debug
port. The two 460GT's will communicate with each other via shared
memory, Gigabit Ethernet and x1 PCI-Express.
Signed-off-by: Adam Graham <agraham@amcc.com>
Signed-off-by: Victor Gallardo <vgallardo@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Tue, 21 Oct 2008 09:43:08 +0000 (11:43 +0200)]
Merge branch 'master' of /home/stefan/git/u-boot/u-boot
Wolfgang Denk [Sun, 19 Oct 2008 19:54:30 +0000 (21:54 +0200)]
TQM8260: environment in flash instead EEPROM, baudrate 115k
Several customers have reported problems with the environment in
EEPROM, including corrupted content after board reset. Probably the
code to prevent I2C Enge Conditions is not working sufficiently.
We move the environment to flash now, which allows to have a backup
copy plus gives much faster boot times.
Also, change the default console initialization to 115200 bps as used
on most other boards.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Kumar Gala [Sun, 19 Oct 2008 17:49:19 +0000 (12:49 -0500)]
85xx: Fix compile warning in mpc8536ds.c
mpc8536ds.c: In function 'is_sata_supported':
mpc8536ds.c:615: warning: unused variable 'devdisr'
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Wolfgang Denk [Sun, 19 Oct 2008 00:35:50 +0000 (02:35 +0200)]
Cleanup: fix "MHz" spelling
Signed-off-by: Wolfgang Denk <wd@denx.de>
Wolfgang Denk [Sun, 19 Oct 2008 00:35:49 +0000 (02:35 +0200)]
Use strmhz() to format clock frequencies
Signed-off-by: Wolfgang Denk <wd@denx.de>
Wolfgang Denk [Sun, 19 Oct 2008 00:35:48 +0000 (02:35 +0200)]
strmhz(): Round numbers when printing clock frequencies
Round clock frequencies for printing.
Many boards printed off clock frequencies like 399 MHz instead of the
exact 400 MHz because numberes were not rounded. This is fixed now.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Timur Tabi [Mon, 20 Oct 2008 20:16:47 +0000 (15:16 -0500)]
85xx: properly document MPC85xx_PORDEVSR2_SEC_CFG
Commit
f7d190b1 corrected the value of MPC85xx_PORDEVSR2_SEC_CFG, but forgot
to add a comment that the correct value disagrees with the 8544 reference
manual. The changelog for that commit is also wrong, as it says "bit 28"
when it should be "bit 24".
Signed-off-by: Timur Tabi <timur@freescale.com>
Markus Klotzbuecher [Tue, 21 Oct 2008 07:18:01 +0000 (09:18 +0200)]
Merge git://git.denx.de/u-boot into x1
Conflicts:
drivers/usb/usb_ohci.c