Kazu Hirata [Sun, 15 Jan 2023 04:22:48 +0000 (20:22 -0800)]
[libc] Use std::optional instead of llvm::Optional (NFC)
This is part of an effort to migrate from llvm::Optional to
std::optional:
https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716
Roman Lebedev [Sun, 15 Jan 2023 01:34:01 +0000 (04:34 +0300)]
[NFC][X86][Codegen] Extend tests for splat-storing the same scalar to memory
Looking at the changes, we might or might not care about the vector width
https://godbolt.org/z/7zfzThnYG
Roman Lebedev [Sun, 15 Jan 2023 00:49:16 +0000 (03:49 +0300)]
[NFC][X86][Codegen] Add tests for splat-storing the same scalar to memory
Kazu Hirata [Sun, 15 Jan 2023 00:37:11 +0000 (16:37 -0800)]
[flang] Do not include llvm/ADT/Optional.h (NFC)
Kazu Hirata [Sat, 14 Jan 2023 23:26:28 +0000 (15:26 -0800)]
[gtest] Use std::optional instead of llvm::Optional (NFC)
This is part of an effort to migrate from llvm::Optional to
std::optional:
https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716
Keith Smiley [Fri, 13 Jan 2023 22:17:07 +0000 (14:17 -0800)]
[lld-macho] Improve invalid fat binary warning
This nearly mirrors ld64's error for this case:
ld: warning: ignoring file path/to/file, file is universal (armv7,arm64) but does not contain the x86_64 architecture: path/to/file
Differential Revision: https://reviews.llvm.org/D141729
Fangrui Song [Sat, 14 Jan 2023 23:20:53 +0000 (15:20 -0800)]
Remove deleted file from module map
Kazu Hirata [Sat, 14 Jan 2023 23:09:00 +0000 (15:09 -0800)]
[llvm] Include <optional> instead of "llvm/ADT/Optional.h" (NFC)
This is part of an effort to migrate from llvm::Optional to
std::optional:
https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716
Kazu Hirata [Sat, 14 Jan 2023 22:06:18 +0000 (14:06 -0800)]
Remove redundant initialization of std::optional (NFC)
Kazu Hirata [Sat, 14 Jan 2023 21:53:40 +0000 (13:53 -0800)]
Use std::nullopt instead of None in comments (NFC)
Kazu Hirata [Sat, 14 Jan 2023 21:37:25 +0000 (13:37 -0800)]
[clang] Remove remaining uses of llvm::Optional (NFC)
This patch removes several "using" declarations and #include
"llvm/ADT/Optional.h".
This is part of an effort to migrate from llvm::Optional to
std::optional:
https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716
Simon Pilgrim [Sat, 14 Jan 2023 20:09:28 +0000 (20:09 +0000)]
[X86] Add absolute-difference vector tests
X86 doesn't have absdiff instructions, but we should be able to canonicalize to avoid unnecessary scalarization/extensions/selects
Simon Pilgrim [Sat, 14 Jan 2023 19:36:33 +0000 (19:36 +0000)]
[X86] Add absolute-difference scalar tests
X86 doesn't have absdiff instructions, but we should be able to canonicalize to avoid unnecessary extensions/selects
Tom Praschan [Fri, 30 Dec 2022 11:28:29 +0000 (12:28 +0100)]
[clangd] Hover: show CalleeArgInfo for literals and expressions
This is very useful when inlay hints are disabled.
Also, improve presentation of Hover when variable is passed by value to
a function with an unnamed parameter
Differential Revision: https://reviews.llvm.org/D140775
Andrew Savonichev [Wed, 11 Jan 2023 17:48:06 +0000 (20:48 +0300)]
[NVPTX] Drop memory references of LDG/LDU
This patch fixes machine verifier errors:
*** Bad machine code: Missing mayLoad flag ***
- function: foo1
- basic block: %bb.0 (0x5560fc64ef08)
- instruction: %4:float32regs =
INT_PTX_LDG_GLOBAL_f32areg64 killed %3:int64regs
:: (load (s32) from %ir.from1, addrspace 1)
mayLoad flag is missing because LDG and LDU instructions operate on
read-only memory, so we want to treat them as regular instructions and
exclude them from memory analysis.
Machine verifier checks for memoperands to determine whether an
instruction is a load, so dropping them during lowering fixes the
problem.
Differential Revision: https://reviews.llvm.org/D112466
Kazu Hirata [Sat, 14 Jan 2023 20:31:01 +0000 (12:31 -0800)]
[clang] Use std::optional instead of llvm::Optional (NFC)
This patch replaces (llvm::|)Optional< with std::optional<. I'll post
a separate patch to remove #include "llvm/ADT/Optional.h".
This is part of an effort to migrate from llvm::Optional to
std::optional:
https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716
Craig Topper [Sat, 14 Jan 2023 19:18:47 +0000 (11:18 -0800)]
[InstCombine] Optimize (icmp slt (1 << Y), 1) -> (icmp eq Y, BitWidth-1).
The code tried to do this for (icmp sle (1 << Y), 0), but that is
canonicalized to sgt before we get there.
Simplify the code by removing the unreachable SGE and SLE handling.
Also remove the (1 << Y) >=u
2147483648 and (1 << Y) <u
2147483648
handling since those are canonicalized to (1 << Y) <s 0 and
(1 << Y) >=s 0 before we get there.
Reviewed By: spatel
Differential Revision: https://reviews.llvm.org/D141753
Kazu Hirata [Sat, 14 Jan 2023 19:07:21 +0000 (11:07 -0800)]
[clang] Add #include <optional> (NFC)
This patch adds #include <optional> to those files containing
llvm::Optional<...> or Optional<...>.
I'll post a separate patch to actually replace llvm::Optional with
std::optional.
This is part of an effort to migrate from llvm::Optional to
std::optional:
https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716
Carlos Galvez [Sat, 14 Jan 2023 17:40:54 +0000 (17:40 +0000)]
[clang-tidy][NFC] Use C++17 nested namespaces in the clang-tidy folder
Fix applied by running:
run-clang-tidy.py -checks=-*,modernize-concat-nested-namespaces
Differential Revision: https://reviews.llvm.org/D141770
Simon Pilgrim [Sun, 1 Jan 2023 13:11:51 +0000 (13:11 +0000)]
[X86] Fix SLM uops/resources counts for XADD/XCHG reg-reg instructions
The RMW instructions still need addressing, probably with a new 'WriteXCHGRMW' scheduler class.
Based off llvm-exegesis captures, confirmed with Agner + uops.info
Kirill Stoimenov [Sat, 14 Jan 2023 18:23:39 +0000 (18:23 +0000)]
[HWASAN][Fuchsia] Fixed Fuchsia build.
Reviewed By: kstoimenov
Differential Revision: https://reviews.llvm.org/D141771
Roman Lebedev [Sat, 14 Jan 2023 16:35:42 +0000 (19:35 +0300)]
[NFC][Codegen][X86] Improve test coverage for wide shift legalization
James Le Cuirot [Sat, 7 Jan 2023 13:52:39 +0000 (13:52 +0000)]
[llvm] Don't require third-party components when cross-compiling
It is possible to build LLVM with just the "llvm" and "cmake" components
checked out. This requires disabling the `LLVM_INCLUDE_BENCHMARKS` and
`LLVM_INCLUDE_TESTS` options. These options are not passed through to
the native build when cross-compiling though, so the build will break if
the "third-party" component is missing. We don't need the benchmarks or
tests for the native build, so disable these unconditionally. This fixes
cross-compiling on Gentoo, where only the required components are
checked out.
Differential Revision: https://reviews.llvm.org/D141196
Markus Böck [Sat, 14 Jan 2023 16:41:15 +0000 (17:41 +0100)]
[mlir][tblgen] Fix undefined behaviour found by MSVC debug iterators
Incrementing past the end iterator of any container in C++ is immediate undefined behaviour.
This is guaranteed to occur in the loop condition due to the expression cur = earlyIncIt++, which when earlyIncIt is the end iterator (aka we just did the last iteration of the loop), will do an increment on the end iterator.
To fix this, the patch refactors the loop to a more conventional loop using iterators, with the only difference being that the increment happens through the erase operation, which conveniently returns an iterator to the element after the erased element. Thanks to that guarantee there is also no need to use std::list over std::vector.
I also opted to reduce the inner loop find_if, because I felt splitting the "search" and the effects of if it was successful made the code (subjectively) nicer, and also avoided having to add an extra "bool erased" to the outer loop body.
Differential Revision: https://reviews.llvm.org/D141758
Haojian Wu [Sat, 14 Jan 2023 16:46:39 +0000 (17:46 +0100)]
Fix a -Wgnu-designator warning, NFC.
Roman Lebedev [Sat, 14 Jan 2023 15:55:24 +0000 (18:55 +0300)]
[Codegen][LegalizeIntegerTypes] New legalization strategy for scalar shifts: shift through stack
https://reviews.llvm.org/D140493 is going to teach SROA how to promote allocas
that have variably-indexed loads. That does bring up questions of cost model,
since that requires creating wide shifts.
Indeed, our legalization for them is not optimal.
We either split it into parts, or lower it into a libcall.
But if the shift amount is by a multiple of CHAR_BIT,
we can also legalize it throught stack.
The basic idea is very simple:
1. Get a stack slot 2x the width of the shift type
2. store the value we are shifting into one half of the slot
3. pad the other half of the slot. for logical shifts, with zero, for arithmetic shift with signbit
4. index into the slot (starting from the base half into which we spilled, either upwards or downwards)
5. load
6. split loaded integer
This works for both little-endian and big-endian machines:
https://alive2.llvm.org/ce/z/YNVwd5
And better yet, if the original shift amount was not a multiple of CHAR_BIT,
we can just shift by that remainder afterwards: https://alive2.llvm.org/ce/z/pz5G-K
I think, if we are going perform shift->shift-by-parts expansion more than once,
we should instead go through stack, which is what this patch does.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D140638
Simon Pilgrim [Sat, 14 Jan 2023 15:24:35 +0000 (15:24 +0000)]
[X86] vector-reduce-and-bool.ll - add 'is allones' test coverage
Tomas Matheson [Fri, 9 Dec 2022 11:36:06 +0000 (11:36 +0000)]
[AArch64] Reland "Improve TargetParser API"
Reworked after several other major changes to the TargetParser since
this was reverted. Combined with several other changes.
Inline calls for the following macros and delete AArch64TargetParser.def:
AARCH64_ARCH, AARCH64_CPU_NAME, AARCH64_CPU_ALIAS, AARCH64_ARCH_EXT_NAME
Squashed changes from D139278 and D139102.
Differential Revision: https://reviews.llvm.org/D138792
Simon Pilgrim [Sat, 14 Jan 2023 14:02:17 +0000 (14:02 +0000)]
[X86] Add SSE/AVX1/AVX2 + f16/f32 test coverage to splat(fpext) tests
As discussed on D141657
Mehdi Amini [Sat, 14 Jan 2023 04:52:46 +0000 (04:52 +0000)]
Apply clang-tidy fixes for performance-unnecessary-value-param in IntRangeOptimizations.cpp (NFC)
Kazu Hirata [Sat, 14 Jan 2023 09:34:49 +0000 (01:34 -0800)]
[mlir] Remove remaining uses of llvm::Optional (NFC)
This patch removes one "using" declaration and #include
"llvm/ADT/Optional.h". It keeps several "using" declarations in
headers for downstream users.
This is part of an effort to migrate from llvm::Optional to
std::optional:
https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716
Kazu Hirata [Sat, 14 Jan 2023 09:25:58 +0000 (01:25 -0800)]
[mlir] Use std::optional instead of llvm::Optional (NFC)
This patch replaces (llvm::|)Optional< with std::optional<. I'll post
a separate patch to remove #include "llvm/ADT/Optional.h".
This is part of an effort to migrate from llvm::Optional to
std::optional:
https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716
Craig Topper [Sat, 14 Jan 2023 08:37:18 +0000 (00:37 -0800)]
[InstCombine] Add test coverage for (icmp sgt/sle (1 << Y), 0). NFC"
We already optimize the sgt case to (icmp ne Y, BitWidth-1), but
we miss optimizing sle because it canonicalizes to (icmp slt (1 << X), 1)
first.
Craig Topper [Sat, 14 Jan 2023 08:37:01 +0000 (00:37 -0800)]
Revert "[InstCombine] Add test coverage for (icmp slt/sge (1 << Y), 0). NFC"
This reverts commit
e25f2287dd7d6854b0bbfb9878fecdbbad21038d.
I messed up the predicates in the description.
Craig Topper [Sat, 14 Jan 2023 08:31:14 +0000 (00:31 -0800)]
[InstCombine] Add test coverage for (icmp slt/sge (1 << Y), 0). NFC
We already optimize the slt case to (icmp eq Y, BitWidth-1), but
we miss optimizing sge because it canonicalizes to (icmp sgt (1 << X), 1)
first.
Craig Topper [Sat, 14 Jan 2023 06:57:36 +0000 (22:57 -0800)]
[CodeGen][Target] Remove uses of Register::isPhysicalRegister/isVirtualRegister. NFC
Use isPhysical/isVirtual methods.
Phoebe Wang [Sat, 14 Jan 2023 03:18:56 +0000 (11:18 +0800)]
[X86] Do not lower INSERT_VECTOR_ELT to vselect for vXf16 without BWI
We cannot handle i8/i16/f16 vselect without BWI.
Fixes #59980
Reviewed By: RKSimon, skan
Differential Revision: https://reviews.llvm.org/D141668
NAKAMURA Takumi [Sat, 14 Jan 2023 06:12:20 +0000 (15:12 +0900)]
JITLink/ELF_i386.cpp: Fix a warning in D141746. [-Wswitch]
Kirill Stoimenov [Sat, 14 Jan 2023 04:19:46 +0000 (20:19 -0800)]
[LSAN][Fuchsia] Added ForEachExtraThreadStackRange to support Fuchsia code.
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D141724
Kazu Hirata [Sat, 14 Jan 2023 05:05:06 +0000 (21:05 -0800)]
[mlir] Add #include <optional> (NFC)
This patch adds #include <optional> to those files containing
llvm::Optional<...> or Optional<...>.
I'll post a separate patch to actually replace llvm::Optional with
std::optional.
This is part of an effort to migrate from llvm::Optional to
std::optional:
https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716
Kshitij Jain [Sat, 14 Jan 2023 01:31:43 +0000 (01:31 +0000)]
Fixes handling logic for i386/ELF GOTPC relocation
The i386/ELF JITLink backend was not correctly handling the GOTPC relocation
by skipping the in-built addend, which was manifesting itself in the form of
a segmentation fault in the `LF_external_to_absolute_conversion.s` test. This
CR has fixed that issue.
Reviewed By: lhames
Differential Revision: https://reviews.llvm.org/D141746
Jan Svoboda [Sat, 14 Jan 2023 02:38:09 +0000 (18:38 -0800)]
[clang] Report the on-disk paths for inputs to module compiles
Since D135636, PCM files contain the "as requested" path of input files. The machinery for generating dependency files reports those paths as they appeared in the PCM file, which may confuse consumers that are not aware of VFS overlays that might've been in place at compile-time.
This patch makes sure the "use-external-name" setting is being respected when generating dependency files in modular builds by piping the paths serialized in PCMs through `FileEntryRef::getName()` before putting them into dependency files.
rdar://
103459532
Reviewed By: benlangmuir
Differential Revision: https://reviews.llvm.org/D141644
Nikolas Klauser [Mon, 9 Jan 2023 21:27:06 +0000 (22:27 +0100)]
[libc++] Add [[clang::lifetimebound]] attribute to std::forward and friends
This allows clang to catch lifetime bugs through these functions.
As a drive-by, replace `_LIBCPP_INLINE_VISIBILITY` with `_LIBCPP_HIDE_FROM_ABI`.
Fixes #59900
Reviewed By: ldionne, #libc
Spies: rsmith, rnk, aaron.ballman, libcxx-commits
Differential Revision: https://reviews.llvm.org/D141321
Khem Raj [Sat, 14 Jan 2023 01:44:38 +0000 (17:44 -0800)]
[hwasan] Replace j __interceptor_sigsetjmp instead with tail for RISC-V
R_RISCV_JAL referencing a preemptible symbol is disallowed with ld.lld and binutils 2.40 (https://sourceware.org/PR28509)
riscv64-yoe-linux-ld: relocation R_RISCV_JAL against `__interceptor_sigsetjmp' which may bind externally can not be used when making a shared object; recompile with -fPIC
Reviewed By: kito-cheng, MaskRay
Differential Revision: https://reviews.llvm.org/D141656
Matt Arsenault [Sat, 7 Jan 2023 22:38:17 +0000 (17:38 -0500)]
DAG/GlobalISel: Fix broken/redundant setting of MODereferenceable
This was incorrectly setting dereferenceable on unaligned
operands. getLoadMemOperandFlags does the alignment dereferenceabilty
check without alignment, and then both paths went on to check
isDereferenceableAndAlignedPointer. Make getLoadMemOperandFlags check
isDereferenceableAndAlignedPointer, and remove the second call.
Matt Arsenault [Fri, 13 Jan 2023 19:50:07 +0000 (14:50 -0500)]
AArch64/GlobalISel: Regenerate test checks
Mehdi Amini [Sat, 14 Jan 2023 01:22:05 +0000 (01:22 +0000)]
Fix scf.while verifier crash (NFC)
Harden the verifier against invalid IR.
Mehdi Amini [Thu, 12 Jan 2023 22:09:42 +0000 (22:09 +0000)]
Refactor OperationName to use virtual tables for dispatch (NFC)
This streamlines the implementation and makes it so that the virtual tables are in the binary instead of dynamically assembled during initialization.
The dynamic allocation size of op registration is also smaller with this
change.
Differential Revision: https://reviews.llvm.org/D141492
NAKAMURA Takumi [Sun, 8 Jan 2023 11:39:09 +0000 (20:39 +0900)]
[Bazel] Use `LLVM_VERSION` from `llvm/CMakeLists.txt`
* Generate `//:vars.bzl` from `llvm/CMakeLists.txt`
`_extract_cmake_settings()` generates `//:vars.bzl` in `llvm_configure()`.
It would be easier to use external commands like sed(1) and python.
For portability, I think the parser should run on Starlark.
`@llvm-project//:vars.bzl` may be loaded from both WORKSPACE and BUILD.
At the moment, `vars.bzl` provides some values as string.
- CMAKE_CXX_STANDARD = "17"
- LLVM_VERSION_MAJOR = "16"
- LLVM_VERSION_MINOR = "0"
- LLVM_VERSION_PATCH = "0"
- LLVM_VERSION = "16.0.0"
- llvm_vars = (dict of these values)
`CMAKE_CXX_STANDARD` may be used to configure toolchain.
* Use `//vars.bzl` for each BUILD files
It would be smarter if the BUILD phase could generate `llvm-config.h`.
Since I am afraid of the discussion in D126581, I just remove
LLVM_VERSION stuff out of the static `llvm-config.h`.
* Eliminate Bazel stuff in 'bump-version.py'
Current version of `bump-version.py` tries to substitute CLANG_VERSION.
It is the reason why I modify bump-version in this change rather than
incoming patch.
Differential Revision: https://reviews.llvm.org/D136392
Youling Tang [Sat, 14 Jan 2023 01:23:15 +0000 (09:23 +0800)]
[lsan] Add lsan support for loongarch64
This patch enabled lsan for loongarch64 with 47-bit VMA layout.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D139686
Hui Li [Fri, 13 Jan 2023 02:26:05 +0000 (10:26 +0800)]
[LLDB][LoongArch] Add FP branch instructions for EmulateInstructionLoongArch
Add floating-point branch Instructions for EmulateInstructionLoongArch and
add relevant unit tests.
Without this patch:
```
$ ninja check-lldb-unit
[0/1] Running lldb unit test suite
Testing Time: 10.45s
Passed: 1044
```
With this patch:
```
$ ninja check-lldb-unit
[0/1] Running lldb unit test suite
Testing Time: 10.20s
Passed: 1048
```
Reviewed By: SixWeining, MaskRay, DavidSpickett
Differential Revision: https://reviews.llvm.org/D140759
Hui Li [Fri, 13 Jan 2023 02:26:05 +0000 (10:26 +0800)]
[LLDB][LoongArch] Delete the s9 register alias definition
In RegisterInfos_loongarch64.h, r22 is defined twice. Having an extra array
member causes problems reading and writing registers defined after r22. So,
for r22, keep the alias fp, delete the s9 alias.
The PC register is incorrectly accessed when the step command is executed.
The step command behavior is incorrect.
This test reflects this problem:
```
loongson@linux:~$ cat test.c
#include <stdio.h>
int func(int a) {
return a + 1;
}
int main(int argc, char const *argv[]) {
func(10);
return 0;
}
loongson@linux:~$ clang -g test.c -o test
```
Without this patch:
```
loongson@linux:~$ llvm-project/llvm/build/bin/lldb test
(lldb) target create "test"
Current executable set to '/home/loongson/test' (loongarch64).
(lldb) b main
Breakpoint 1: where = test`main + 40 at test.c:8:3, address = 0x0000000120000668
(lldb) r
Process 278049 launched: '/home/loongson/test' (loongarch64)
Process 278049 stopped
* thread #1, name = 'test', stop reason = breakpoint 1.1
frame #0: 0x0000000120000668 test`main(argc=1, argv=0x00007fffffff72a8) at test.c:8:3
5 }
6
7 int main(int argc, char const *argv[]) {
-> 8 func(10);
9 return 0;
10 }
11
(lldb) s
Process 278049 stopped
* thread #1, name = 'test', stop reason = step in
frame #0: 0x0000000120000670 test`main(argc=1, argv=0x00007fffffff72a8) at test.c:9:3
6
7 int main(int argc, char const *argv[]) {
8 func(10);
-> 9 return 0;
10 }
```
With this patch:
```
loongson@linux:~$ llvm-project/llvm/build/bin/lldb test
(lldb) target create "test"
Current executable set to '/home/loongson/test' (loongarch64).
(lldb) b main
Breakpoint 1: where = test`main + 40 at test.c:8:3, address = 0x0000000120000668
(lldb) r
Process 278632 launched: '/home/loongson/test' (loongarch64)
Process 278632 stopped
* thread #1, name = 'test', stop reason = breakpoint 1.1
frame #0: 0x0000000120000668 test`main(argc=1, argv=0x00007fffffff72a8) at test.c:8:3
5 }
6
7 int main(int argc, char const *argv[]) {
-> 8 func(10);
9 return 0;
10 }
11
(lldb) s
Process 278632 stopped
* thread #1, name = 'test', stop reason = step in
frame #0: 0x0000000120000624 test`func(a=10) at test.c:4:10
1 #include <stdio.h>
2
3 int func(int a) {
-> 4 return a + 1;
5 }
```
Reviewed By: SixWeining, DavidSpickett
Differential Revision: https://reviews.llvm.org/D140615
NAKAMURA Takumi [Sat, 14 Jan 2023 00:58:16 +0000 (09:58 +0900)]
MachineScheduler.cpp: Fixup D141707, suppress `MISchedDumpReservedCycles` conditionally.
It is used in `LLVM_ENABLE_DUMP` regardless of `NDEBUG`.
LLVM GN Syncbot [Sat, 14 Jan 2023 00:57:59 +0000 (00:57 +0000)]
[gn build] Port
5629d492df38
varconst [Sat, 14 Jan 2023 00:56:58 +0000 (16:56 -0800)]
Reapply "[libc++][ranges]Refactor `copy{,_backward}` and `move{,_backward}`"
This reverts commit
a6e1080b87db8fbe0e1afadd96af5a3c0bd5e279.
Fix the conditions when the `memmove` optimization can be applied and refactor them out into a reusable type trait, fix and significantly expand the tests.
Differential Revision: https://reviews.llvm.org/D139235
Fangrui Song [Sat, 14 Jan 2023 00:36:25 +0000 (16:36 -0800)]
[test] Deprecated llvm::TypeSize::getFixedSize => getFixedValue
Fangrui Song [Sat, 14 Jan 2023 00:28:44 +0000 (16:28 -0800)]
Fix some -Wconstant-conversion warnings for future Clang (D139114)
Lang Hames [Fri, 13 Jan 2023 07:17:46 +0000 (23:17 -0800)]
[ORC] Introduce deferred allocation-actions scheme for MachOPlatform bootstrap.
This patch modifies the MachOPlatform bootstrap process to record allocation
actions for ORC runtime platform support code in a "deferred actions" vector
rather than attaching it to the corresponding LinkGraphs up-front. The deferred
allocation-actions are run after all the platform support code has been loaded
by attaching them to a separate "bootstrap-complete" graph.
This change should allow the mach-o platform support code in the ORC runtime to
use advanced mach-o platform features (e.g. static inits, TLVs), provided that
the support code does not use these features at runtime before the bootstrap
process completes, or after the shutdown process starts. This is a nice
improvement in and of itself but is motivated by specific future plans: we
want to start recording unwind info in the mach-o platform state object*, and
the recording functions will have their own frame info that needs registering.
The deferred allocation-actions scheme allows for this.
* The plan is to add a new unwind-info-lookup path to libunwind to allow it to
call back to the ORC runtime to find unwind sections. This will simplify the
implementation of support for JIT'd compact-unwind info.
yijiagu [Fri, 13 Jan 2023 23:56:17 +0000 (15:56 -0800)]
[mlir][async] Allow to call async.execute inside async.func
This change added support of calling async execute inside async.func.
Ex.
```
async.func @async_func_call_func() -> !async.token {
%token = async.execute {
%c0 = arith.constant 0 : index
memref.store %arg0, %arg1[%c0] : memref<1xf32>
async.yield
}
async.await %token : !async.token
return
}
```
Reviewed By: ezhulenev
Differential Revision: https://reviews.llvm.org/D141730
Valery N Dmitriev [Fri, 13 Jan 2023 21:15:44 +0000 (13:15 -0800)]
[SLP] Remove unused check label from test - NFC
NAKAMURA Takumi [Fri, 13 Jan 2023 23:47:24 +0000 (08:47 +0900)]
Revert "[Clang][Sema] Enabled implicit conversion warning for CompoundAssignment operator."
This reverts commit
4c37671a7c946ac246b52fa44a6a649b89d6310b,
aka llvmorg-16-init-17246-g4c37671a7c94
This caused many warnings in the current llvm codebase.
Owen Pan [Fri, 13 Jan 2023 05:14:03 +0000 (21:14 -0800)]
[clang-format] Replace DeriveLineEnding and UseCRLF with LineEnding
Below is the mapping:
LineEnding DeriveLineEnding UseCRLF
LF false false
CRLF false true
DeriveLF true false
DeriveCRLF true true
Differential Revision: https://reviews.llvm.org/D141654
LLVM GN Syncbot [Fri, 13 Jan 2023 23:10:51 +0000 (23:10 +0000)]
[gn build] Port
fdc0bf6adcee
Paul Kirth [Fri, 13 Jan 2023 23:07:23 +0000 (23:07 +0000)]
Revert "[LoongArch][M68k] Add 'Stack Frame Layout Analysis' to pipeline tests. NFC"
I missed that a forward fix was out when reverting
0a652c540556a118bbd9386ed3ab7fd9e60a9754.
This reverts commit
488bea797e167e6bf5ddab5f7eea78031b575ba0.
Paul Kirth [Fri, 13 Jan 2023 22:59:36 +0000 (22:59 +0000)]
Revert "[codegen] Add StackFrameLayoutAnalysisPass"
This breaks on some AArch64 bots
This reverts commit
0a652c540556a118bbd9386ed3ab7fd9e60a9754.
Joseph Huber [Fri, 13 Jan 2023 22:53:11 +0000 (16:53 -0600)]
[OpenMP][Docs] Remove documentation on removed option
Summary:
Removes this `CLANG_OPENMP_NVPTX_DEFAULT_ARCH` documentation as it's now
been removed.
Joseph Huber [Fri, 13 Jan 2023 20:57:34 +0000 (14:57 -0600)]
[Clang] Remove `CLANG_OPENMP_NVPTX_DEFAULT_ARCH` CMake option.
The `CLANG_OPENMP_NVPTX_DEFAULT_ARCH` is a static build configuration to
set the default OpenMP value. This was replaced in D141708 with the use
of the `nvptx-arch` tool which lets us query this at runtime instead.
This makes the behaviour between AMD and NVIDIA be more consisten and
allows users to have a default architecture that does not rely on
whoever configured the LLVM build.
Depends on D141708
Reviewed By: tra, MaskRay
Differential Revision: https://reviews.llvm.org/D141723
Joseph Huber [Fri, 13 Jan 2023 18:36:09 +0000 (12:36 -0600)]
[OpenMP] Make `-fopenmp-target=` use the `nvptx-arch` tool
Previously, if the user did not provide an architecture when using
`-fopenmp-targets=nvptx64` we used the value from
`CLANG_OPENMP_DEFAULT_NVPTX_ARCH` which is defined at compile time. This
isn't ideal because it means that the default is set when the LLVM
compiler it built. Instead this patch uses the `nvptx-arch` tool to
query it at runtime. This matches the existing behaviour of the AMDGPU
toolchain with its `amdgpu-arch` tool.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D141708
Craig Topper [Fri, 13 Jan 2023 22:50:11 +0000 (14:50 -0800)]
[LoongArch][M68k] Add 'Stack Frame Layout Analysis' to pipeline tests. NFC
These targets were missed in D135488.
Craig Topper [Fri, 13 Jan 2023 22:38:08 +0000 (14:38 -0800)]
[CodeGen] Remove uses of Register::isPhysicalRegister/isVirtualRegister. NFC
Use isPhysical/isVirtual methods.
Reviewed By: foad
Differential Revision: https://reviews.llvm.org/D141715
Vitaly Buka [Fri, 13 Jan 2023 22:29:51 +0000 (14:29 -0800)]
[NFC] Suppress warning after D139114
Sanjay Patel [Fri, 13 Jan 2023 20:55:40 +0000 (15:55 -0500)]
[InstCombine] fold pow(X,Y) / X -> pow(X, Y-1)
This is one of the patterns suggested in issue #34943.
Sanjay Patel [Fri, 13 Jan 2023 20:31:14 +0000 (15:31 -0500)]
[InstCombine] fold pow(X,Y) * X -> pow(X, Y+1) (with fast-math)
This is one of the patterns suggested in issue #34943.
Sanjay Patel [Fri, 13 Jan 2023 20:10:09 +0000 (15:10 -0500)]
[InstCombine] add more tests for pow reassociation; NFC
Michal Paszkowski [Fri, 13 Jan 2023 21:56:06 +0000 (22:56 +0100)]
[SPIR-V] Fix switch lowering with common compare register
Differential Revision: https://reviews.llvm.org/D141203
Christopher Bate [Fri, 13 Jan 2023 21:37:22 +0000 (14:37 -0700)]
[mlir][gpu] Fix another windows build issue
Fixes another Windows build failure (C4715) caused by
6ca1a09f03e8e940f306bea73efa935e4ee38173.
LLVM GN Syncbot [Fri, 13 Jan 2023 21:10:02 +0000 (21:10 +0000)]
[gn build] Port
0a652c540556
Carlo Bertolli [Fri, 13 Jan 2023 21:04:14 +0000 (15:04 -0600)]
[OpenMP][libomptarget][AMDGPU] Add missing declarations to fix non amdgpu builds
Fix after commit of https://reviews.llvm.org/D139208
Owen Pan [Thu, 12 Jan 2023 04:07:21 +0000 (20:07 -0800)]
[clang-format] Fix a bug in DerivePointerAlignment fallback
Fixes #59953.
Differential Revision: https://reviews.llvm.org/D141563
Paul Kirth [Tue, 20 Dec 2022 00:25:21 +0000 (00:25 +0000)]
[codegen] Add StackFrameLayoutAnalysisPass
Issue #58168 describes the difficulty diagnosing stack size issues
identified by -Wframe-larger-than. For simple code, its easy to
understand the stack layout and where space is being allocated, but in
more complex programs, where code may be heavily inlined, unrolled, and
have duplicated code paths, it is no longer easy to manually inspect the
source program and understand where stack space can be attributed.
This patch implements a machine function pass that emits remarks with a
textual representation of stack slots, and also outputs any available
debug information to map source variables to those slots.
The new behavior can be used by adding `-Rpass-analysis=stack-frame-layout`
to the compiler invocation. Like other remarks the diagnostic
information can be saved to a file in a machine readable format by
adding -fsave-optimzation-record.
Fixes: #58168
Reviewed By: nickdesaulniers, thegameg
Differential Revision: https://reviews.llvm.org/D135488
Jakub Kuderski [Fri, 13 Jan 2023 20:44:57 +0000 (15:44 -0500)]
[mlir][vector] Disallow vector.fma over vectors of integers
This is to make `vector.fma` more consistent with the standard
definition of `fma` that is defined only for flaoting point types.
Reviewed By: dcaballe
Differential Revision: https://reviews.llvm.org/D141711
Diego Caballero [Fri, 13 Jan 2023 20:36:40 +0000 (20:36 +0000)]
[mlir][vector] Masking support for reductions in Linalg vectorizer
This patch enables vectorization of reductions in Linalg vectorizer
using the vector.mask operation. It also introduces the logic to slice
and propagate the vector mask of a masked multi-reduction to their
respective lowering operations.
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D141571
Christopher Bate [Fri, 13 Jan 2023 20:23:56 +0000 (13:23 -0700)]
[mlir][gpu] Fix build failure / silence windows build warnings
Fixes Windows build failure (C4715) caused by
6ca1a09f03e8e940f306bea73efa935e4ee38173.
Dominik Adamski [Fri, 13 Jan 2023 20:38:17 +0000 (14:38 -0600)]
Revert "[OpenMP][OMPIRBuilder] Move SIMD alignment calculation to LLVM Frontend"
This reverts commit
ed01de67433174d3157e9d239d59dd465d52c6a5.
Dominik Adamski [Tue, 22 Nov 2022 10:55:39 +0000 (04:55 -0600)]
[OpenMP][OMPIRBuilder] Move SIMD alignment calculation to LLVM Frontend
Currently default simd alignment is specified by Clang specific TargetInfo
class. This class cannot be reused for LLVM Flang. If we move the default
alignment field into TargetMachine class then we can create TargetMachine
objects and query them to find SIMD alignment.
Scope of changes:
1) Added information about maximal allowed SIMD alignment to TargetMachine
classes.
2) Removed getSimdDefaultAlign function from Clang TargetInfo class.
3) Refactored createTargetMachine function.
Reviewed By: jsjodin
Differential Revision: https://reviews.llvm.org/D138496
Jonathon Penix [Wed, 11 Jan 2023 17:08:13 +0000 (09:08 -0800)]
[flang] Fix cmake errors when building the Decimal and runtime libraries standalone
Currently, cmake gives errors that check_cxx_compiler_flag and append are
unknown when building the Decimal and runtime libraries standalone. Add
the appropriate include to resolve this.
Differential Revision: https://reviews.llvm.org/D141525
Nhat Nguyen [Fri, 13 Jan 2023 19:26:02 +0000 (20:26 +0100)]
[cmake] Fix path to LLVMConfig.cmake for multi-config builds
D139623 replaces CMAKE_CFG_INTDIR
with '.' for multi-config builds. However, this change has
not been reflected in mlir, flang, polly, lld, and clang.
The patch updates the path to LLVMConfig.cmake for those
projects.
Reviewed By: sebastian-ne
Differential Revision: https://reviews.llvm.org/D141538
Paul Robinson [Fri, 13 Jan 2023 19:27:33 +0000 (11:27 -0800)]
[Polly] Fix REQUIRES for nvptx-dependent tests
These have been effectively disabled ever since 'nvptx' was added to
the REQUIRES clauses, because REQUIRES does not support triple checks.
The new 'target=<triple>' is supported, so switch to that scheme.
Fix up XFAIL annotations, now that these tests are actually run.
Part of the project to eliminate special handling for triples in lit
expressions.
Differential Revision: https://reviews.llvm.org/D139728
Utkarsh Saxena [Fri, 13 Jan 2023 18:41:57 +0000 (19:41 +0100)]
Remove brittle test introduced in D140547.
Matt Arsenault [Fri, 6 Jan 2023 19:55:47 +0000 (14:55 -0500)]
AMDGPU: Use getConstantStringInfo for printf format strings
Tolerated printf format strings that are indexed globals and fixes
asserting on non-null terminated strings.
HanSheng Zhang [Fri, 13 Jan 2023 18:45:37 +0000 (21:45 +0300)]
[DAGCombiner] `visitFREEZE()`: gracefully handle node invalidation
When we freeze operands of an operation that we are trying to freeze,
doing so may invalidate the original SDValue. We should just re-fetch
it from the ISD::FREEZE node, because if we bail, we'd hopefully just
revisit the node and do that again.
Fixes https://github.com/llvm/llvm-project/issues/59891
Differential Revision: https://reviews.llvm.org/D141256
Roman Lebedev [Fri, 13 Jan 2023 18:21:06 +0000 (21:21 +0300)]
[NFC][DAGCombiner] Fix typo in `visitFREEZE()`
Francesco Petrogalli [Fri, 13 Jan 2023 18:25:32 +0000 (19:25 +0100)]
[CodeGen] Fix build failure due to missing declaration.
The failure was reported in https://github.com/llvm/llvm-project/issues/60011
FAILED: lib/CodeGen/CMakeFiles/LLVMCodeGen.dir/MachineScheduler.cpp.o
"/build/llvm-toolchain-snapshot-16~++
20230113111109+
aba8983c9d86/build-llvm/./bin/clang++" -D_GNU_SOURCE -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS -I"/build/llvm-toolchain-snapshot-16~++
20230113111109+
aba8983c9d86/build-llvm/tools/clang/stage2-bins/lib/CodeGen" -I"/build/llvm-toolchain-snapshot-16~++
20230113111109+
aba8983c9d86/llvm/lib/CodeGen" -I"/build/llvm-toolchain-snapshot-16~++
20230113111109+
aba8983c9d86/build-llvm/tools/clang/stage2-bins/include" -I"/build/llvm-toolchain-snapshot-16~++
20230113111109+
aba8983c9d86/llvm/include" -fstack-protector-strong -Wformat -Werror=format-security -Wno-unused-command-line-argument -Wdate-time -D_FORTIFY_SOURCE=2 -fPIC -fno-semantic-interposition -fvisibility-inlines-hidden -Werror=date-time -Werror=unguarded-availability-new -Wall -Wextra -Wno-unused-parameter -Wwrite-strings -Wcast-qual -Wmissing-field-initializers -pedantic -Wno-long-long -Wc++98-compat-extra-semi -Wimplicit-fallthrough -Wcovered-switch-default -Wno-noexcept-type -Wnon-virtual-dtor -Wdelete-non-virtual-dtor -Wsuggest-override -Wstring-conversion -Wmisleading-indentation -Wctad-maybe-unsupported -fdiagnostics-color -ffunction-sections -fdata-sections -ffile-prefix-map=/build/llvm-toolchain-snapshot-16~++
20230113111109+
aba8983c9d86/build-llvm/tools/clang/stage2-bins=build-llvm/tools/clang/stage2-bins -ffile-prefix-map=/build/llvm-toolchain-snapshot-16~++
20230113111109+
aba8983c9d86/= -no-canonical-prefixes -O2 -DNDEBUG -g1 -fno-exceptions -std=c++17 -MD -MT lib/CodeGen/CMakeFiles/LLVMCodeGen.dir/MachineScheduler.cpp.o -MF lib/CodeGen/CMakeFiles/LLVMCodeGen.dir/MachineScheduler.cpp.o.d -o lib/CodeGen/CMakeFiles/LLVMCodeGen.dir/MachineScheduler.cpp.o -c '/build/llvm-toolchain-snapshot-16~++
20230113111109+
aba8983c9d86/llvm/lib/CodeGen/MachineScheduler.cpp'
/build/llvm-toolchain-snapshot-16~++
20230113111109+
aba8983c9d86/llvm/lib/CodeGen/MachineScheduler.cpp:2639:7: error: use of undeclared identifier 'MISchedDumpReservedCycles'
if (MISchedDumpReservedCycles)
^
1 error generated.
Fixes #60011
Differential Revision: https://reviews.llvm.org/D141707
Craig Topper [Fri, 13 Jan 2023 18:08:01 +0000 (10:08 -0800)]
[Analysis] Use isa instead of dyn_cast to suppress an unused variable warning. NFC
Craig Topper [Fri, 13 Jan 2023 18:04:00 +0000 (10:04 -0800)]
[DAGCombiner][RISCV] Pre-promote (zext (abs X)) to (abs (sext X)) when X has an illegal type.
Type legalization will insert a sign extend anyway. By doing it
early we can remove the zext. ComputeNumSignBits can't spot it
after type legalization because type legalization may expand
the abs to sra+xor+sub.
If the zext result type is larger than the type to be promoted to,
we'll promote to a legal type and then zext the rest of the way.
If the legal type is larger than the destination type we can promote
and then truncate.
Reviewed By: asb
Differential Revision: https://reviews.llvm.org/D140509
Florian Hahn [Fri, 13 Jan 2023 18:31:01 +0000 (18:31 +0000)]
[X86] Update check lines that are not properly auto-generated.
It looks like some CHECK lines did not use patterns for virtual
registers and the register numbering is slightly different with
EXPENSIVE_CHECKS. Use patterns manually.
Lei Huang [Fri, 13 Jan 2023 18:24:58 +0000 (12:24 -0600)]
[PowerPC][NFC] Add missing P10 code enablement asm/disasm tests
Fix/add missing p10 enablement asm/dis-asm tests and remove
obsolete test files now that all p10 instruction enablement patches
have been committed.
Sanjay Patel [Fri, 13 Jan 2023 18:08:17 +0000 (13:08 -0500)]
[InstCombine] fold pow(X,Y) * pow(Z,Y) -> pow(X*Z, Y) (with fast-math)
This is one of the patterns suggested in issue #34943.
Sanjay Patel [Fri, 13 Jan 2023 17:30:15 +0000 (12:30 -0500)]
[InstCombine] add tests for pow reassociation; NFC
Florian Mayer [Fri, 13 Jan 2023 18:24:45 +0000 (10:24 -0800)]
[NFC] [scudo] actually fix DCHECK now