Stefan Gränitz [Thu, 18 Mar 2021 16:50:48 +0000 (17:50 +0100)]
[lli] Add Orc greedy mode as -jit-kind=orc
In the existing OrcLazy mode, modules go through partitioning and outgoing calls are replaced by reexport stubs that resolve on call-through. In greedy mode that this patch unlocks for lli, modules materialize as a whole and trigger materialization for all required symbols recursively. This is useful for testing (e.g. D98785) and it's more similar to the way MCJIT works.
thomasraoux [Thu, 18 Mar 2021 21:57:19 +0000 (14:57 -0700)]
[mlir] Fix build failure due to 1a572f4
Stanislav Mekhanoshin [Mon, 15 Mar 2021 22:08:53 +0000 (15:08 -0700)]
[AMDGPU] Remove cpol, tfe, and swz from MUBUF patterns
These are always selected as 0 anyway.
Differential Revision: https://reviews.llvm.org/D98663
Lei Zhang [Thu, 18 Mar 2021 21:21:16 +0000 (17:21 -0400)]
Revert "Revert "[mlir] Add linalg.fill bufferization conversion""
This reverts commit
c69550c132e5f6eea025ba1f52bd2eb632599d46 with
proper fix applied.
Mehdi Amini [Thu, 18 Mar 2021 21:18:07 +0000 (21:18 +0000)]
Revert "[mlir] Add linalg.fill bufferization conversion"
This reverts commit
32a744ab20f37681f71ca9098625994515f0f4ab.
CI is broken:
test/Dialect/Linalg/bufferize.mlir:274:12: error: CHECK: expected string not found in input
// CHECK: %[[MEMREF:.*]] = tensor_to_memref %[[IN]] : memref<?xf32>
^
Daniel Kiss [Mon, 15 Mar 2021 09:24:44 +0000 (10:24 +0100)]
[AArch64][compiler-rt] Strip PAC from the link register.
-mbranch-protection protects the LR on the stack with PAC.
When the frames are walked the LR need to be cleared.
This inline assembly later will be replaced with a new builtin.
Test: build with -DCMAKE_C_FLAGS="-mbranch-protection=standard".
Reviewed By: kubamracek
Differential Revision: https://reviews.llvm.org/D98008
Daniel Kiss [Thu, 18 Mar 2021 20:55:39 +0000 (21:55 +0100)]
Revert "[AArch64][compiler-rt] Strip PAC from the link register."
This reverts commit
ad40453fc425ee8e1fe43c7bb6e3c1c3afa9cc3b.
Jonas Devlieghere [Thu, 18 Mar 2021 20:54:56 +0000 (13:54 -0700)]
[lldb] Move Apple simulators test targets under API
Move the Apple simulators test targets as they only matter for the API
tests.
Differential revision: https://reviews.llvm.org/D98880
Eugene Zhulenev [Mon, 15 Mar 2021 23:52:31 +0000 (16:52 -0700)]
[mlir] Add linalg.fill bufferization conversion
`BufferizeAnyLinalgOp` fails because `FillOp` is not a `LinalgGenericOp` and it fails while reading operand sizes attribute.
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D98671
Zequan Wu [Thu, 18 Mar 2021 19:27:42 +0000 (12:27 -0700)]
[clang-cl] make -ffile-compilation-dir a CoreOption.
Let clang-cl accepts `-ffile-compilation-dir` flag.
Differential Revision: https://reviews.llvm.org/D98887
thomasraoux [Thu, 18 Mar 2021 19:59:49 +0000 (12:59 -0700)]
[mlir] Add vector op support to cuda-runner including vector.print
Differential Revision: https://reviews.llvm.org/D97346
Pavel Labath [Thu, 18 Mar 2021 18:40:48 +0000 (19:40 +0100)]
[lldb] Fix flakyness in TestGdbRemote_vContThreads
The cause is the non-async-signal-safety printf function (et al.). If
the test managed to interrupt the process and inject a signal before the
printf("@started") call returned (but after it has actually written the
output), that string could end up being printed twice (presumably,
because the function did not manage the clear the userspace buffer, and
so the print call in the signal handler would print it once again).
This patch fixes the issue by replacing the printf call in the signal
handler with a sprintf+write combo, which should not suffer from that
problem (though I wouldn't go as far as to call it async signal safe).
Sanjay Patel [Thu, 18 Mar 2021 19:19:00 +0000 (15:19 -0400)]
[SimplifyCFG] add tests for branch cond merging with prof metadata; NFC
See PR49336.
thomasraoux [Tue, 16 Mar 2021 21:14:51 +0000 (14:14 -0700)]
[mlir][linalg] Extend linalg vectorization to support non-identity input maps
This propagates the affine map to transfer_read op in case it is not a
minor identity map.
Differential Revision: https://reviews.llvm.org/D98523
Mehdi Amini [Thu, 18 Mar 2021 19:20:39 +0000 (19:20 +0000)]
Revert "[VPlan] Add plain text (not DOT's digraph) dumps"
This reverts commit
6b053c9867a3ede32e51cef3ed972d5ce5b38bc0.
The build is broken:
ld.lld: error: undefined symbol: llvm::VPlan::printDOT(llvm::raw_ostream&) const
>>> referenced by LoopVectorize.cpp
>>> LoopVectorize.cpp.o:(llvm::LoopVectorizationPlanner::printPlans(llvm::raw_ostream&)) in archive lib/libLLVMVectorize.a
Muiez Ahmed [Thu, 18 Mar 2021 18:23:55 +0000 (14:23 -0400)]
[SystemZ][z/OS] vasprintf fix libc++
The aim is to use the correct vasprintf implementation for z/OS libc++, where a copy of va_list ap is needed. In particular, it avoids the potential that the initial internal call to vsnprintf will modify ap and the subsequent call to vsnprintf will use that modified ap.
Differential Revision: https://reviews.llvm.org/D97473
Andrei Elovikov [Thu, 18 Mar 2021 18:32:34 +0000 (11:32 -0700)]
[VPlan] Add plain text (not DOT's digraph) dumps
I foresee two uses for this:
1) It's easier to use those in debugger.
2) Once we start implementing more VPlan-to-VPlan transformations (especially
inner loop massaging stuff), using the vectorized LLVM IR as CHECK targets in
LIT test would become too obscure. I can imagine that we'd want to CHECK
against VPlan dumps after multiple transformations instead. That would be
easier with plain text dumps than with DOT format.
Reviewed By: fhahn
Differential Revision: https://reviews.llvm.org/D96628
Thomas Lively [Thu, 18 Mar 2021 18:21:24 +0000 (11:21 -0700)]
[WebAssembly] Finalize SIMD names and opcodes
Updates the names (e.g. widen => extend, saturate => sat) and opcodes of all
SIMD instructions to match the finalized SIMD spec. Deliberately does not change
the public interface in wasm_simd128.h yet; that will require more care.
Depends on D98466.
Differential Revision: https://reviews.llvm.org/D98676
Thomas Lively [Thu, 18 Mar 2021 18:21:24 +0000 (11:21 -0700)]
[WebAssembly] Remove experimental SIMD instructions
Removes the instruction definitions, intrinsics, and builtins for qfma/qfms,
signselect, and prefetch instructions, which were not included in the final
WebAssembly SIMD spec.
Depends on D98457.
Differential Revision: https://reviews.llvm.org/D98466
peter klausler [Thu, 18 Mar 2021 17:26:23 +0000 (10:26 -0700)]
[flang] Refine symbol sorting
Replace semantics::SymbolSet with alternatives that clarify
whether the set should order its contents by source position
or not. This matters because positionally-ordered sets must
not be used for Symbols that might be subjected to name
replacement during name resolution, and address-ordered
sets must not be used (without sorting) in circumstances
where the order of their contents affects the output of the
compiler.
All set<> and map<> instances in the compiler that are keyed
by Symbols now have explicit Compare types in their template
instantiations. Symbol::operator< is no more.
Differential Revision: https://reviews.llvm.org/D98878
lorenzo chelini [Thu, 18 Mar 2021 18:15:33 +0000 (19:15 +0100)]
[mlir] Fix typo in SCF.cpp (NFC)
Jorg Brown [Thu, 18 Mar 2021 18:00:07 +0000 (11:00 -0700)]
Fix typo: `char` should be `TS`
Markus Böck [Thu, 18 Mar 2021 17:51:10 +0000 (18:51 +0100)]
[CMake][runtimes] Add file level dependency to merge_archives commands
Both libc++ and libc++abi have options of merging with another archive. In the case of libc++abi, libunwind can be merged into it and in the case of libc++, libc++abi can be merged into it.
This is realized using add_custom_command with POST_BUILD and the usage of the CMake generator expression TARGET_LINKER_FILE in the arguments. For such generator expressions CMake doc states: "This target-level dependency does NOT add a file-level dependency that would cause the custom command to re-run whenever the executable is recompiled" [1]
This patch adds a DEPENDS argument to both add_custom_command invocations so that the archives also have a file-level dependency on the target they are merging with. That way, changes in say, libunwind source code, will be updated in the libc++abi and/or libc++ static libraries as well.
[1] https://cmake.org/cmake/help/v3.20/command/add_custom_command.html
Differential Revision: https://reviews.llvm.org/D98129
Arthur O'Dwyer [Thu, 18 Mar 2021 14:28:56 +0000 (10:28 -0400)]
[libc++] Future-proof generate_feature_test_macro_components.py against long names.
`__cpp_lib_default_template_type_for_algorithm_values` is 52 characters long,
which is enough to reduce the multiplier to less-than-zero, producing an empty
string between the name of the macro and its numeric value. Ensure there's
always a space between the name of the macro and its value.
Differential Revision: https://reviews.llvm.org/D98869
Kristof Beyls [Wed, 17 Mar 2021 16:55:56 +0000 (17:55 +0100)]
[docs] Document regular LLVM sync-ups
This documents current regular LLVM sync-ups that are happening in the
Getting Involved section.
I hope this gives a bit more visibility to regular sync-ups that are
happening in the LLVM community, documenting another way communication
in the community happens.
Of course the downside is that this is another location that sync-up
metadata needs to be maintained. That being said, the structure as
proposed means that no changes are needed once a new sync-up is added,
apart from maybe removing the entry once it becomes clear that that
particular sync-up series is completely cancelled.
Documenting a few pointers on how current sync-ups happen may also
encourage others to organize useful sync-ups on specific topics.
I've started with adding the sync-ups I'm aware of. There's a good
chance I've missed some.
If most sync-ups end up having a public google calendar, we could also
create and maintain a public google calendar that shows all events
happening in the LLVM community, including dev meetings, sync-ups,
socials, etc - assuming that would be valuable.
Differential Revision: https://reviews.llvm.org/D98797
Louis Dionne [Tue, 2 Mar 2021 17:44:43 +0000 (12:44 -0500)]
[libc++] Remove the Docker files for BuildBot
We don't use them anymore since we're using the BuildKite setup.
Differential Revision: https://reviews.llvm.org/D97779
Thomas Lively [Thu, 18 Mar 2021 17:23:12 +0000 (10:23 -0700)]
[WebAssembly] Remove unimplemented-simd target feature
Now that the WebAssembly SIMD specification is finalized and engines are
generally up-to-date, there is no need for a separate target feature for gating
SIMD instructions that engines have not implemented. With this change,
v128.const is now enabled by default with the simd128 target feature.
Differential Revision: https://reviews.llvm.org/D98457
Peter Waller [Thu, 11 Mar 2021 17:29:32 +0000 (17:29 +0000)]
[llvm][AArch64][SVE] Lower fixed length vector fabs
Seemingly striaghtforward.
Differential Revision: https://reviews.llvm.org/D98434
Fangrui Song [Thu, 18 Mar 2021 17:18:19 +0000 (10:18 -0700)]
[ELF] Change --shuffle-sections=<seed> to --shuffle-sections=<section-glob>=<seed>
`--shuffle-sections=<seed>` applies to all sections. The new
`--shuffle-sections=<section-glob>=<seed>` makes shuffling selective. To the
best of my knowledge, the option is only used as debugging, so just drop the
original form.
`--shuffle-sections '.init_array*=-1'` `--shuffle-sections '.fini_array*=-1'`.
reverses static constructors/destructors of the same priority.
Useful to detect some static initialization order fiasco.
`--shuffle-sections '.data*=-1'`
reverses `.data*` sections. Useful to detect unfunded pointer comparison results
of two unrelated objects.
If certain sections have an intrinsic order, the old form cannot be used.
Differential Revision: https://reviews.llvm.org/D98679
Christopher Di Bella [Wed, 17 Mar 2021 18:11:31 +0000 (18:11 +0000)]
[libcxx] updates the feature-test macro generator
D97015 didn't correctly update `generate_feature_test_macro_components.py`.
Reviewed By: ldionne, Quuxplusone, #libc, Mordante
Differential Revision: https://reviews.llvm.org/D97904
Jon Chesterfield [Thu, 18 Mar 2021 17:00:41 +0000 (17:00 +0000)]
[libomptarget] Add register usage info to kernel metadata
Add register usage information to the runtime metadata so that it can be used during kernel launch (that change will be in a different commit). Add this information to the kernel trace.
Reviewed By: JonChesterfield
Differential Revision: https://reviews.llvm.org/D98829
Stanislav Mekhanoshin [Tue, 16 Mar 2021 18:57:45 +0000 (11:57 -0700)]
[AMDGPU] Support SCC on buffer atomics
Differential Revision: https://reviews.llvm.org/D98731
Wei Mi [Thu, 18 Mar 2021 00:51:27 +0000 (17:51 -0700)]
[SampleFDO] Don't mix up the existing indirect call value profile with the new
value profile annotated after inlining.
In https://reviews.llvm.org/D96806 and https://reviews.llvm.org/D97350, we
use the magic number -1 in the value profile to avoid repeated indirect call
promotion to the same target for an indirect call. Function updateIDTMetaData
is used to mark an target as being promoted in the value profile with the
magic number. updateIDTMetaData is also used to update the value profile
when an indirect call is inlined and new inline instance profile should be
applied. For the second case, currently updateIDTMetaData mixes up the
existing value profile of the indirect call with the new profile, leading
to the problematic senario that a target count is larger than the total count
in the value profile.
The patch fixes the problem. When updateIDTMetaData is used to update the
value profile after inlining, all the values in the existing value profile
will be dropped except the values with the magic number counts.
Differential Revision: https://reviews.llvm.org/D98835
Mircea Trofin [Fri, 12 Mar 2021 16:21:14 +0000 (08:21 -0800)]
Reapply "[NPM][CGSCC] FunctionAnalysisManagerCGSCCProxy: do not clear immutable function passes"
This reverts commit
11b70b9e3a7458b5b78c30020b56e8ca563a4801.
The bot failure was due to ArgumentPromotion deleting functions
without deleting their analyses. This was separately fixed in 4b1c807.
Ricky Taylor [Thu, 18 Mar 2021 16:29:08 +0000 (16:29 +0000)]
Test commit
This is a test commit to verify my access.
Mircea Trofin [Thu, 18 Mar 2021 16:11:28 +0000 (09:11 -0700)]
[NFC][ArgumentPromotion] Clear FAM cached results of erased function.
Not doing it here can lead to subtle bugs - the analysis results are
associated by the Function object's address. Nothing stops the memory
allocator from allocating new functions at the same address.
Mike Rice [Wed, 17 Mar 2021 23:43:47 +0000 (16:43 -0700)]
[OPENMP51]Support for the 'destroy' clause with interop variable.
Added basic parsing/sema/serialization support to extend the
existing 'destroy' clause for use with the 'interop' directive.
Differential Revision: https://reviews.llvm.org/D98834
Chris Lattner [Thu, 18 Mar 2021 00:37:59 +0000 (17:37 -0700)]
[libsupport] Silence a bogus valgrind warning.
Valgrind is reporting this bogus warning because it doesn't model
pthread_sigmask fully accurately. This is a valgrind bug, but
silencing it has effectively no cost, so just do it.
==73662== Syscall param __pthread_sigmask(set) points to uninitialised byte(s)
==73662== at 0x101E9D4C2: __pthread_sigmask (in /usr/lib/system/libsystem_kernel.dylib)
==73662== by 0x101EFB5EA: pthread_sigmask (in /usr/lib/system/libsystem_pthread.dylib)
==73662== by 0x1000D9F6D: llvm::sys::Process::SafelyCloseFileDescriptor(int) (in /Users/chrisl/Projects/circt/build/bin/firtool)
==73662== by 0x100072795: llvm::ErrorOr<std::__1::unique_ptr<llvm::MemoryBuffer, std::__1::default_delete<llvm::MemoryBuffer> > > getFileAux<llvm::MemoryBuffer>(llvm::Twine const&, long long, unsigned long long, unsigned long long, bool, bool) (in /Users/chrisl/Projects/circt/build/bin/firtool)
==73662== by 0x100072573: llvm::MemoryBuffer::getFileOrSTDIN(llvm::Twine const&, long long, bool) (in /Users/chrisl/Projects/circt/build/bin/firtool)
==73662== by 0x100282C25: mlir::openInputFile(llvm::StringRef, std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char> >*) (in /Users/chrisl/Projects/circt/build/bin
Differential Revision: https://reviews.llvm.org/D98830
Stanislav Mekhanoshin [Wed, 17 Mar 2021 19:00:49 +0000 (12:00 -0700)]
[AMDGPU] Remove unused template parameters of MUBUF_Real_AllAddr_vi
Differential Revision: https://reviews.llvm.org/D98804
Jon Chesterfield [Thu, 18 Mar 2021 15:56:39 +0000 (15:56 +0000)]
[amdgpu] Update med3 combine to skip i64
[amdgpu] Update med3 combine to skip i64
Fixes an assumption that a type which is not i32 will be i16. This asserts
when trying to sign/zero extend an i64 to i32.
Test case was cut down from an openmp application. Variations on it are hit by
other combines before reaching the problematic one, e.g. replacing the
immediate values with other function arguments changes the codegen path and
misses this combine.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D98872
Asher Mancinelli [Thu, 18 Mar 2021 15:50:43 +0000 (15:50 +0000)]
[flang] Unittests for runtime terminator
Create test fixture for runtime tests which enables verification
of failure cases. Test some runtime IO APIs for failure cases.
Support testing efforts in D98303. Expand on effort discussed
in D98601.
Reviewed By: awarzynski
Differential Revision: https://reviews.llvm.org/D98652
Nigel Perks [Wed, 10 Mar 2021 15:29:40 +0000 (15:29 +0000)]
[XCore] Remove XFAIL: xcore from passing test.
The pass can be seen on staging buildbot clang-xcore-ubuntu-20-x64.
Differential Revision: https://reviews.llvm.org/D98352
Simon Pilgrim [Thu, 18 Mar 2021 15:34:39 +0000 (15:34 +0000)]
[DAG] Improve folding (sext_in_reg (*_extend_vector_inreg x)) -> (sext_vector_inreg x)
Extend this to support ComputeNumSignBits of the (used) source vector elements so that we can handle more than just the case where we're sext_in_reg from the source element signbit.
Noticed while investigating the poor codegen in D98587.
Alexander Belyaev [Thu, 18 Mar 2021 15:04:02 +0000 (16:04 +0100)]
[mlir][linalg] Add support for memref inputs/outputs for `linalg.tiled_loop`.
Also use `ArrayAttr` to pass iterator pass to the TiledLoopOp builder.
Differential Revision: https://reviews.llvm.org/D98871
Sid Manning [Thu, 11 Mar 2021 17:44:57 +0000 (11:44 -0600)]
[Hexagon] Add support for named registers cs0 and cs1
Allow inline assembly code to referece cs0 and cs1.
LLVM GN Syncbot [Thu, 18 Mar 2021 14:39:37 +0000 (14:39 +0000)]
[gn build] Port
ed8bff13dcaa
caoming.roy [Thu, 18 Mar 2021 14:38:30 +0000 (10:38 -0400)]
[lld-macho] implement options -map
Implement command-line options -map
Reviewed By: int3, #lld-macho
Differential Revision: https://reviews.llvm.org/D98323
Pavel Labath [Thu, 14 Jan 2021 14:06:24 +0000 (15:06 +0100)]
[lldb] Fix TestAutoInstallMainExecutable.py
Fix the test to account for recent test infrastructure changes, and make
it run locally to increase the chances of it continuing to work in the
future.
Andrzej Warzynski [Mon, 8 Mar 2021 16:54:11 +0000 (16:54 +0000)]
[flang][driver] Add support for `-fget-symbols-sources`
Adds support for `-fget-symbols-sources` in the new Flang driver. All
relevant tests are updated to use the new driver when
`FLANG_BUILD_NEW_DRIVER` is set.
`RUN` lines in tests are updated so `-fsyntax-only`
comes before `-fget-symbols-sources`. That's because:
* both `-fsyntax-only` and `-fget-symbols-sources` are
action flags, and
* the new driver, flang-new, will only consider the right-most
action flag.
In other words, this change is needed so that the tests work with both
`f18` (requires both flags) and `flang-new` (only considers the last
action flag).
Differential Revision: https://reviews.llvm.org/D98191
Andrew Savonichev [Fri, 12 Mar 2021 13:50:38 +0000 (16:50 +0300)]
[MCA] Ensure that writes occur in-order
Delay the issue of a new instruction if that leads to out-of-order
commits of writes.
This patch fixes the problem described in:
https://bugs.llvm.org/show_bug.cgi?id=41796#c3
Differential Revision: https://reviews.llvm.org/D98604
Jay Foad [Thu, 18 Mar 2021 14:00:07 +0000 (14:00 +0000)]
[AMDGPU] Add some gfx1010 test coverage. NFC.
David Truby [Wed, 17 Mar 2021 08:55:42 +0000 (08:55 +0000)]
[MLIR][OpenMP] Pretty printer and parser for omp.wsloop
Co-authored-by: Kiran Chandramohan <kiran.chandramohan@arm.com>
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D92327
Simon Pilgrim [Thu, 18 Mar 2021 13:31:20 +0000 (13:31 +0000)]
[X86][SSE] Regenerate PR18054 test case
Matt Arsenault [Sun, 14 Mar 2021 14:26:31 +0000 (10:26 -0400)]
GlobalISel: Preserve source value information for outgoing byval args
Pass through the original argument IR value in order to preserve the
aliasing information in the memcpy memory operands.
Matt Arsenault [Fri, 12 Mar 2021 16:06:18 +0000 (11:06 -0500)]
GlobalISel: Insert memcpy for outgoing byval arguments
byval requires an implicit copy between the caller and callee such
that the callee may write into the stack area without it modifying the
value in the parent. Previously, this was passing through the raw
pointer value which would break if the callee wrote into it.
Most of the time, this copy can be optimized out (however we don't
have the optimization SelectionDAG does yet).
This will trigger more fallbacks for AMDGPU now, since we don't have
legalization for memcpy yet (although we should stop using byval
anyway).
Alexey Bataev [Fri, 12 Mar 2021 15:39:53 +0000 (07:39 -0800)]
[SLP]Fix crash on extending scheduling region.
If SLP vectorizer tries to extend the scheduling region and runs out of
the budget too early, but still extends the region to the new ending
instructions (i.e., it was able to extend the region for the first
instruction in the bundle, but not for the second), the compiler need to
recalculate dependecies in full, just like if the extending was
successfull. Without it, the schedule data chunks may end up with the
wrong number of (unscheduled) dependecies and it may end up with the
incorrect function, where the vectorized instruction does not dominate
on the extractelement instruction.
Differential Revision: https://reviews.llvm.org/D98531
Alexey Lapshin [Sun, 27 Dec 2020 13:07:20 +0000 (16:07 +0300)]
[llvm-objcopy][NFC][Wasm] Do not use internal buffer while writing into the output.
This patch is follow-up for D91028. It implements direct writing into the
output stream for wasm.
Depends on D91028
Differential Revision: https://reviews.llvm.org/D95478
Martin Storsjö [Thu, 11 Mar 2021 21:44:16 +0000 (23:44 +0200)]
[compiler-rt] Produce the right arch suffix for arm libraries
If producing libraries with an arch suffix (i.e. if
LLVM_ENABLE_PER_TARGET_RUNTIME_DIR isn't set), we append the
architecture name. However, for arm, clang doesn't look for libraries
with the full architecture name, but only looks for "arm" and "armhf".
Try to deduce what the full target triple might have been, and use
that for deciding between "arm" and "armhf".
This tries to reapply this bit from D98173, that had to be reverted
in
7b153b43d3a14d76975039408c4b922beb576735 due to affecting how
the builtins themselves are compiled, not only affecting the output
file name.
Differential Revision: https://reviews.llvm.org/D98452
Max Kazantsev [Thu, 18 Mar 2021 11:50:55 +0000 (18:50 +0700)]
[NFC] One more use case for evaluatePredicate
Max Kazantsev [Thu, 18 Mar 2021 11:48:10 +0000 (18:48 +0700)]
[NFC] Use evaluatePredicate in eliminateComparison
Just makes code simpler.
Max Kazantsev [Thu, 18 Mar 2021 11:28:14 +0000 (18:28 +0700)]
[SCEV][NFC] API for predicate evaluation
Provides API that allows to check predicate for being true or
false with one call. Current implementation is naive and just
calls isKnownPredicate twice, but further we can rework this
logic trying to use one check to prove both facts.
Thomas Preud'homme [Thu, 18 Mar 2021 10:45:55 +0000 (10:45 +0000)]
[test] Fix incorrect use of string variable use
LLVM test CodeGen/AArch64/machine-outliner-retaddr-sign-thunk.ll uses
a string substitution block that contains a regex matching block. This
seems like as a copy/paste from other similar test where the match also
defines a variable, hence the [[]] syntax. In this case however this is
a CHECK-NOT variable so nothing should match. No variable definition is
thus expected and the square brackets can be dropped.
Reviewed By: chill
Differential Revision: https://reviews.llvm.org/D98853
Sven van Haastregt [Thu, 18 Mar 2021 12:17:12 +0000 (12:17 +0000)]
[OpenCL] Remove spurious atomic_fetch tablegen builtins
The `int` and `long` versions of these builtins already provide the
necessary overloads for `intptr_t` and `uintptr_t` arguments, as
`ASTContext` defines `atomic_(u)intptr_t` in terms of the `int` or
`long` types.
Prior to this patch, calls to those builtins with particular argument
types resulted in call-is-ambiguous errors.
Differential Revision: https://reviews.llvm.org/D98520
Thomas Preud'homme [Thu, 18 Mar 2021 10:36:15 +0000 (10:36 +0000)]
[test] Fix variable definition in acle_sve_ld1.sh
Clang test acle_sve_ld1.sh is missing the colon in one of the string
variable definition separating the variable name from the regex. This
leads the substitution block to be parsed as a numeric variable use.
Reviewed By: sdesmalen
Differential Revision: https://reviews.llvm.org/D98852
Sanjay Patel [Thu, 18 Mar 2021 12:09:28 +0000 (08:09 -0400)]
[LoopVectorize] relax FMF constraint for FP induction
This makes the induction part of the loop vectorizer match the reduction part.
We do not need all of the fast-math-flags. For example, there are some that
clearly are not in play like arcp or afn.
If we want to make FMF constraints consistent across the IR optimizer, we
might want to add nsz too, but that's up for debate (users can't expect
associative FP math and preservation of sign-of-zero at the same time?).
The calling code was fixed to avoid miscompiles with:
1bee549737ac
Differential Revision: https://reviews.llvm.org/D98708
Balazs Benics [Thu, 18 Mar 2021 12:06:38 +0000 (13:06 +0100)]
[clang][ASTImporter] Fix import of VarDecl regarding thread local storage spec
After the import, we did not copy the `TSCSpec`.
This commit resolves that.
Reviewed By: balazske
Differential Revision: https://reviews.llvm.org/D98707
Valeriy Savchenko [Thu, 18 Mar 2021 11:22:45 +0000 (14:22 +0300)]
[-Wcalled-once-parameter][NFC] Fix GCC compilation error
Elizabeth Andrews [Thu, 18 Mar 2021 09:58:35 +0000 (02:58 -0700)]
[Reland] "Do not apply calling conventions to MSVC entry points"
This patch is a second attempt at fixing a link error for MSVC
entry points when calling conventions are specified using a flag.
Calling conventions specified using flags should not be applied to MSVC
entry points. The default calling convention is set in this case. The
default calling convention for MSVC entry points main and wmain is cdecl.
For WinMain, wWinMain and DllMain, the default calling convention is
stdcall on 32 bit Windows.
Explicitly specified calling conventions are applied to MSVC entry points.
For MinGW, the default calling convention for all MSVC entry points is
cdecl.
First attempt:
4cff1b40dacf6
Revert of first attempt:
bebfc3b92d5e8
Differential Revision: https://reviews.llvm.org/D97941
Simon Pilgrim [Thu, 18 Mar 2021 11:15:44 +0000 (11:15 +0000)]
[AMDGPU] Regenerate atomic_optimizations_global_pointer.ll tests
Simon Pilgrim [Thu, 18 Mar 2021 11:07:16 +0000 (11:07 +0000)]
[ARM] Regenerate select-imm.ll tests
Alexey Lapshin [Thu, 11 Mar 2021 22:31:06 +0000 (01:31 +0300)]
[llvm-objcopy] remove split dwo file creation from executeObjcopyOnBinary.
This patch removes creation of the resulting file from the
executeObjcopyOnBinary() function. For the most use cases, the
executeObjcopyOnBinary receives output file as a parameter
- raw_ostream &Out. The splitting .dwo file is implemented differently:
file containg .dwo tables is created inside executeObjcopyOnBinary().
When objcopy functionality would be moved into separate library,
current implementation will become inconvenient. The goal of that
refactoring is to separate concerns: It might be convenient to
to do dwo tables splitting but to create resulting file differently.
Differential Revision: https://reviews.llvm.org/D98582
Simon Pilgrim [Thu, 18 Mar 2021 10:26:46 +0000 (10:26 +0000)]
[DAG] SelectionDAG::isSplatValue - add ISD::ABS handling
Add ISD::ABS to the existing unary instructions handling for splat detection
This is similar to D83605, but doesn't appear to need to touch any of the wasm refactoring.
Differential Revision: https://reviews.llvm.org/D98778
Fraser Cormack [Mon, 8 Feb 2021 15:33:23 +0000 (15:33 +0000)]
[RISCV] Support scalable-vector masked scatter operations
This patch adds support for masked scatter intrinsics on scalable vector
types. It is mostly an extension of the earlier masked gather support
introduced in D96263, since the addressing mode legalization is the
same.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D96486
Nigel Perks [Mon, 14 Sep 2020 17:17:11 +0000 (18:17 +0100)]
[Test][DebugInfo] Check for backend object emission support.
The XCore backend does not support object emission. Several tests fail for this
reason when XCore is the default target. See staging buildbot builder:
clang-xcore-ubuntu-20-x64.
So check for backend object emission before running the tests requiring it.
Incorporate isConfigurationSupported functionality in isObjectEmissionSupported,
to avoid calling them both in the same tests.
Differential Revision: https://reviews.llvm.org/D98400
Fraser Cormack [Thu, 4 Feb 2021 09:56:01 +0000 (09:56 +0000)]
[RISCV] Support scalable-vector masked gather operations
This patch supports the masked gather intrinsics in RVV.
The RVV indexed load/store instructions only support the "unsigned unscaled"
addressing mode; indices are implicitly zero-extended or truncated to XLEN and
are treated as byte offsets. This ISA supports the intrinsics directly, but not
the majority of various forms of the MGATHER SDNode that LLVM combines to. Any
signed or scaled indexing is extended to the XLEN value type and scaled
accordingly. This is done during DAG combining as widening the index types to
XLEN may produce illegal vectors that require splitting, e.g.
nxv16i8->nxv16i64.
Support for scalable-vector CONCAT_VECTORS was added to avoid spilling via the
stack when lowering split legalized index operands.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D96263
Valeriy Savchenko [Thu, 11 Mar 2021 11:22:47 +0000 (14:22 +0300)]
[-Wcalled-once-parameter] Fix false positives for cleanup attr
Cleanup attribute allows users to attach a destructor-like functions
to variable declarations to be called whenever they leave the scope.
The logic of such functions is not supported by the Clang's CFG and
is too hard to be reasoned about. In order to avoid false positives
in this situation, we assume that we didn't see ALL of the executtion
paths of the function and, thus, can warn only about multiple call
violation.
rdar://
74441906
Differential Revision: https://reviews.llvm.org/D98694
Vladislav Vinogradov [Wed, 3 Mar 2021 09:04:08 +0000 (12:04 +0300)]
[mlir][ODS] Get rid of limitations in rewriters generator
Do not limit the number of arguments in rewriter pattern.
Introduce separate `FmtStrVecObject` class to handle
format of variadic `std::string` array.
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D97839
Wang, Pengfei [Thu, 18 Mar 2021 09:01:06 +0000 (17:01 +0800)]
[X86][NFC] Pre-commit test case for the fix of ldtilecfg insertion.
Bing1 Yu [Thu, 18 Mar 2021 09:07:49 +0000 (17:07 +0800)]
[X86][AMX][NFC] Give correct Passname for Tile Register Pre-configure
Valeriy Savchenko [Mon, 15 Mar 2021 19:00:07 +0000 (22:00 +0300)]
[-Wcalled-once-parameter] Harden analysis in terms of block use
This patch introduces a very simple inter-procedural analysis
between blocks and enclosing functions.
We always analyze blocks first (analysis is done as part of semantic
analysis that goes side-by-side with the parsing process), and at the
moment of reporting we don't know how that block will be actually
used.
This patch introduces new logic delaying reports of the "never called"
warnings on blocks. If we are not sure that the block will be called
exactly once, we shouldn't warn our users about that. Double calls,
however, don't require such delays. While analyzing the enclosing
function, we can actually decide what we should do with those
warnings.
Additionally, as a side effect, we can be more confident about blocks
in such context and can treat them not as escapes, but as direct
calls.
rdar://
74090107
Differential Revision: https://reviews.llvm.org/D98688
Fraser Cormack [Wed, 17 Mar 2021 12:33:59 +0000 (12:33 +0000)]
[RISCV] Support bitcasts of fixed-length mask vectors
Without this patch, bitcasts of fixed-length mask vectors would go
through the stack.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D98779
Luo, Yuanke [Wed, 17 Mar 2021 11:17:18 +0000 (19:17 +0800)]
[X86] Fix compile time regression of D93594.
D93594 depend on the dominate tree and loop information. It increased
the compile time when build with -O0. However this is just to amend the
dominate tree and loop information, so that it is unnecessary to
re-analyze them again. Given the dominate tree of loop information are
absent in this pass, we can avoid amending them.
Differential Revision: https://reviews.llvm.org/D98773
Sjoerd Meijer [Tue, 16 Mar 2021 11:53:43 +0000 (11:53 +0000)]
[AArch64] Rewrite (add, csel) to cinc
Don't rewrite an add instruction with 2 SET_CC operands into a csel
instruction. The total instruction sequence uses an extra instruction and
register. Preventing this allows us to match a `(add, csel)` pattern and
rewrite this into a `cinc`.
Differential Revision: https://reviews.llvm.org/D98704
Markus Böck [Thu, 18 Mar 2021 08:24:49 +0000 (09:24 +0100)]
[CMake] Use compiler-rt location instead of resource directory to find clang-cls runtime directory
The current cmake script attempts to add the path containing clangs various runtime systems by getting the resource directory and then appending the hardcoded value /lib/windows to it. This works for a normal clang-cl build but fails for a build of clang using LLVM_ENABLE_PER_TARGET_RUNTIME_DIR, such as the builds from llvm/runtimes.
This patch instead uses -print-libgcc-file-name in conjunction with --rtlib=compiler-rt, and instead adds the containing directory as library path.
For non per-target runtime directory builds, such as the release builds, there is no change. Even if the builtins library were to be deleted or moved it would output the same path as before.
For per-target runtime builds that also have the builtins library, this now finds the correct directory containing all of clang runtime libraries.
Only case still not handled by this change, is if a per-target runtime directory build is used, but the builtins library was not built.
I believe that is the best we can do for now however, without modifying clang.
Differential Revision: https://reviews.llvm.org/D98786
Maxim Kuvyrkov [Thu, 18 Mar 2021 08:05:14 +0000 (08:05 +0000)]
Revert "[NFC] Minor cleanup to use default setting of getLastArg()"
The patch was wrong. We use "const Arg *A" at the end of
GetLinkerPath, so can't remove it.
This reverts commit
6802fdf8871f69d52b06d0a2b7f62f3af8292690.
Frederik Gossen [Thu, 18 Mar 2021 07:58:59 +0000 (08:58 +0100)]
[MLIR] Canonicalize broadcast operations on single shapes
This covers cases that are not folded away because the extent tensor type
becomes more concrete in the process.
Differential Revision: https://reviews.llvm.org/D98782
Maxim Kuvyrkov [Thu, 18 Mar 2021 07:47:16 +0000 (07:47 +0000)]
[NFC] Minor cleanup to use default setting of getLastArg()
Noticed this while I was looking at linker defaults.
Reviewed By: asl
Differential Revision: https://reviews.llvm.org/D98494
Maxim Kuvyrkov [Thu, 18 Mar 2021 07:42:41 +0000 (07:42 +0000)]
[WoA][MSVC] Use default linker setting in MSVC-compatible driver
At the moment "link.exe" is hard-coded as default linker in MSVC.cpp,
so there's no way to use LLD as default linker for MSVC driver.
This patch adds checking of CLANG_DEFAULT_LINKER to MSVC.cpp.
Reviewed By: asl
Differential Revision: https://reviews.llvm.org/D98493
Lang Hames [Thu, 18 Mar 2021 04:43:53 +0000 (21:43 -0700)]
[JITLink] Reformat an enum.
Lang Hames [Thu, 18 Mar 2021 04:19:13 +0000 (21:19 -0700)]
[JITLink] Improve out-of-range error messages.
Switches all backends to use the makeTargetOutOfRangeError function from
JITLink.h.
Artem Dergachev [Thu, 18 Mar 2021 03:34:34 +0000 (20:34 -0700)]
[analyzer] Introduce common bug category "Unused code".
This category is generic enough to hold a variety of checkers.
Currently it contains the Dead Stores checker and an alpha unreachable
code checker.
Differential Revision: https://reviews.llvm.org/D98741
Zakk Chen [Wed, 17 Mar 2021 14:56:55 +0000 (07:56 -0700)]
[RISCV][Clang] Add RVV vle/vse intrinsic functions.
Add new field PermuteOperands to mapping different operand order between
C/C++ API and clang builtin.
Reviewed By: craig.topper, rogfer01
Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com>
Co-Authored-by: Hsiangkai Wang <kai.wang@sifive.com>
Co-Authored-by: Zakk Chen <zakk.chen@sifive.com>
Differential Revision: https://reviews.llvm.org/D98388
Zakk Chen [Thu, 25 Feb 2021 08:15:14 +0000 (00:15 -0800)]
[Clang][RISCV] Add rvv vsetvl and vsetvlmax intrinsic functions.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D96843
ShihPo Hung [Thu, 18 Mar 2021 02:08:46 +0000 (19:08 -0700)]
[RISCV] Fix isel pattern of masked vmslt[u]
This patch changes the operand order of masked vmslt[u]
from (mask, rs1, scalar, maskedoff, vl)
to (maskedoff, rs1, scalar, mask, vl).
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D98839
Vitaly Buka [Thu, 18 Mar 2021 03:14:04 +0000 (20:14 -0700)]
[sanitizer] Grow buffer in SharedPrintfCodeNoBuffer
Krzysztof Parzyszek [Thu, 18 Mar 2021 02:37:40 +0000 (21:37 -0500)]
[ObjectYAML] Handle Hexagon V68
Vitaly Buka [Thu, 18 Mar 2021 02:40:45 +0000 (19:40 -0700)]
[NFC][sanitizer] Remove unneeded "explicit"
Krzysztof Parzyszek [Thu, 18 Mar 2021 02:14:35 +0000 (21:14 -0500)]
[Hexagon] Improve stack address base reuse for HVX spills
The offset in HVX loads/stores is only 4 bits long, so often an
extra register is needed to hold the address. Minimize the number
of such registers by "standardizing" the base addresses and reusing
preexisting base registers when replacing frame indices.
Krzysztof Parzyszek [Thu, 18 Mar 2021 01:57:37 +0000 (20:57 -0500)]
[Hexagon] Add more patterns for HVX loads and stores
In particular, add patterns for loads/stores to the stack
(with a frame index as address).
Chen Zheng [Thu, 18 Mar 2021 01:58:09 +0000 (21:58 -0400)]
[NFC] make XCOFF dwarf dump test run only on PowerPC target.