Marek Polacek [Tue, 10 Mar 2020 22:55:42 +0000 (18:55 -0400)]
c++: Fix wrong conversion error with non-viable overload [PR94124]
This is a bad interaction between sharing a constructor for an array
and stripping its trailing zero-initializers. Here we reuse a ctor
and then strip its 0s. This breaks overload resolution in this test:
D can be initialized from {} but not from {0}, so if we truncate the
constructor not to include the zero, the F(D) overload becomes valid
and then we get the ambiguous conversion error.
PR c++/94124 - wrong conversion error with non-viable overload.
* decl.c (reshape_init_array_1): Unshare a constructor if we
stripped trailing zero-initializers.
* g++.dg/cpp0x/initlist-overload1.C: New test.
Jason Merrill [Tue, 10 Mar 2020 21:31:33 +0000 (17:31 -0400)]
c++: Fix deferred noexcept on constructor [PR93901].
My change in r10-4394 to only update clones when we actually instantiate a
deferred noexcept-spec broke this because deferred parsing updates the
primary function but not the clones. For GCC 10, let's just revert it.
gcc/cp/ChangeLog
2020-03-10 Jason Merrill <jason@redhat.com>
PR c++/93901
* pt.c (maybe_instantiate_noexcept): Always update clones.
Jason Merrill [Tue, 10 Mar 2020 21:51:46 +0000 (17:51 -0400)]
c++: Fix ICE with omitted template args [PR93956].
reshape_init only wants to work on BRACE_ENCLOSED_INITIALIZER_P, i.e. raw
initializer lists, and here was getting a CONSTRUCTOR that had already been
processed for type A<int>. maybe_aggr_guide should also use that test.
gcc/cp/ChangeLog
2020-03-10 Jason Merrill <jason@redhat.com>
PR c++/93956
* pt.c (maybe_aggr_guide): Check BRACE_ENCLOSED_INITIALIZER_P.
Jiufu Guo [Tue, 10 Mar 2020 05:51:57 +0000 (13:51 +0800)]
rs6000: Check -+0 and NaN for smax/smin generation
PR93709 mentioned regressions on maxlocval_4.f90 and minlocval_f.f90 which
relates to max of '-inf' and 'nan'. This regression occur on P9 because
P9 new instruction 'xsmaxcdp' is generated.
And for C code `a < b ? b : a` is also generated as `xsmaxcdp` under -O2
for P9. While this instruction behavior more like C/C++ semantic (a>b?a:b).
This generates prevents 'xsmaxcdp' to be generated for those cases.
'xsmincdp' also is handled in patch.
gcc/
2020-03-10 Jiufu Guo <guojiufu@linux.ibm.com>
PR target/93709
* gcc/config/rs6000/rs6000.c (rs6000_emit_p9_fp_minmax): Check
NAN and SIGNED_ZEROR for smax/smin.
gcc/testsuite
2020-03-10 Jiufu Guo <guojiufu@linux.ibm.com>
PR target/93709
* gcc.target/powerpc/p9-minmax-3.c: New test.
GCC Administrator [Wed, 11 Mar 2020 00:16:14 +0000 (00:16 +0000)]
Daily bump.
Jonathan Wakely [Tue, 10 Mar 2020 22:15:58 +0000 (22:15 +0000)]
libstdc++: Fix uses of _M_current in split_view's outer iterator
These direct uses of _M_current should all be __current() so they are
valid when the base type doesn't satisfy the forward_range concept.
* include/std/ranges (split_view::_OuterIter::__at_end): Use __current
instead of _M_current.
(split_view::_OuterIter::operator++): Likewise.
Jason Merrill [Tue, 10 Mar 2020 20:43:58 +0000 (16:43 -0400)]
c++: Add tests for PR93922 and PR94041.
Jason Merrill [Tue, 10 Mar 2020 20:05:18 +0000 (16:05 -0400)]
c++: Partially revert patch for PR66139.
The patch for 66139 exposed a long-standing bug with
split_nonconstant_init (since 4.7, apparently): initializion of individual
elements of an aggregate are not a full-expressions, but
split_nonconstant_init was making full-expressions out of them. My fix for
66139 extended the use of split_nonconstant_init, and thus the bug, to
aggregate initialization of temporaries within an expression, in which
context (PR94041) the bug is more noticeable. PR93922 is a problem with my
implementation strategy of splitting out at gimplification time, introducing
function calls that weren't in the GENERIC. So I'm going to revert the
patch now and try again for GCC 11.
gcc/cp/ChangeLog
2020-03-10 Jason Merrill <jason@redhat.com>
PR c++/93922
PR c++/94041
PR c++/52320
PR c++/66139
* cp-gimplify.c (cp_gimplify_init_expr): Partially revert patch for
66139: Don't split_nonconstant_init. Remove pre_p parameter.
Will Schmidt [Tue, 10 Mar 2020 19:38:13 +0000 (14:38 -0500)]
PR90763: PowerPC vec_xl_len should take const argument.
PR target/90763
* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Add
clause to handle P9V_BUILTIN_VEC_LXVL with const arguments.
* gcc.target/powerpc/pr90763.c: New.
Jonathan Wakely [Tue, 10 Mar 2020 17:45:45 +0000 (17:45 +0000)]
libstdc++: Fix noexcept guarantees for ranges::split_view
Also introduce the _M_i_current() accessors to solve the problem of
access to the private member of _OuterIter from the iter_move and
iter_swap overloads (which are only friends of _InnerIter not
_OuterIter).
* include/std/ranges (transform_view::_Iterator::__iter_move): Remove.
(transform_view::_Iterator::operator*): Add noexcept-specifier.
(transform_view::_Iterator::iter_move): Inline __iter_move body here.
(split_view::_OuterIter::__current): Add noexcept.
(split_view::_InnerIter::__iter_swap): Remove.
(split_view::_InnerIter::__iter_move): Remove.
(split_view::_InnerIter::_M_i_current): New accessors.
(split_view::_InnerIter::__at_end): Use _M_i_current().
(split_view::_InnerIter::operator*): Likewise.
(split_view::_InnerIter::operator++): Likewise.
(iter_move(const _InnerIter&)): Likewise.
(iter_swap(const _InnerIter&, const _InnerIter&)): Likewise.
* testsuite/std/ranges/adaptors/split.cc: Check noexcept-specifier
for iter_move and iter_swap on split_view's inner iterator.
Roman Zhuykov [Tue, 10 Mar 2020 16:54:50 +0000 (19:54 +0300)]
loop-iv: make find_simple_exit static
Function 'find_simple_exit' is used only from loop-iv.c
In 2004-2006 it was also used in predict.c, but since r118694
(
992c31e62304ed5d34247dbdef2db276d08fac05) it does not.
gcc/ChangeLog:
* loop-iv.c (find_simple_exit): Make it static.
* cfgloop.h: Remove the corresponding prototype.
Roman Zhuykov [Tue, 10 Mar 2020 16:47:53 +0000 (19:47 +0300)]
minor: fix intendation in ddg.c
gcc/ChangeLog:
* ddg.c (create_ddg): Fix intendation.
(set_recurrence_length): Likewise.
(create_ddg_all_sccs): Likewise.
Uros Bizjak [Tue, 10 Mar 2020 16:39:21 +0000 (17:39 +0100)]
testsuite: Scan for SSE reg-reg moves only in pr80481.C
The function needs more than 8 SSE registers, avoid
false positives triggered by SSE spills for 32bit targets.
* g++.dg/pr80481.C (dg-final): Scan for SSE reg-reg moves only.
Jeff Law [Tue, 10 Mar 2020 14:38:14 +0000 (08:38 -0600)]
Revert "Fix regression reported by tester due to recent IRA changes"
This reverts commit
d48e1175279a551bf90aa5b165fc46a1d5a2c07e.
2020-03-10 Jeff Law <law@redhat.com>
Revert:
2020-02-29 Jeff Law <law@redhat.com>
* gcc.target/xstormy16/sfr/06_sfrw_to_var.c: Update expected output.
Jonathan Wakely [Tue, 10 Mar 2020 10:50:40 +0000 (10:50 +0000)]
libstdc++: Fix invalid noexcept-specifier (PR 94117)
G++ fails to diagnose this non-dependent expression, but Clang doesn't
like it.
PR c++/94117
* include/std/ranges (ranges::transform_view::_Iterator::iter_move):
Change expression in noexcept-specifier to match function body.
Jonathan Wakely [Tue, 10 Mar 2020 09:47:15 +0000 (09:47 +0000)]
libstdc++: Change compile-only test to run
The 24_iterators/ostream_iterator/1.cc test uses VERIFY and so is
obviously meant to have been run, not just compiled.
* testsuite/23_containers/unordered_set/allocator/ext_ptr.cc: Add
comment explaining multiple dg-do directives.
* testsuite/24_iterators/ostream_iterator/1.cc: Fix do-do directive
so test is run as well as compiled.
Jakub Jelinek [Tue, 10 Mar 2020 08:26:44 +0000 (09:26 +0100)]
i386: Fix up *testqi_ext_3 insn&split for the *testdi_1 changes [PR94088]
In r10-1938-g460bf043c8266dd080308f4783137aee0d0f862c *testdi_1 has been
changed, so that if the mask has upper 32-bits 0 and then at least one bit
set, it requires CCZmode rather than CCNOmode, because in that case it uses
testl instruction rather than testq and so the SF flag wouldn't respect the
state of the 64-bit result.
The *testqi_ext_3 define_insn_and_split needs to match that though,
otherwise it can create an RTL pattern that used to match *testdi_1 but
doesn't anymore and we'd ICE due to an unrecognizable insn.
2020-03-10 Jakub Jelinek <jakub@redhat.com>
PR target/94088
* config/i386/i386.md (*testqi_ext_3): Call ix86_match_ccmode with
CCZmode instead of CCNOmode if operands[2] has DImode and pos + len
is 32.
* gcc.target/i386/pr94088.c: New test.
Joseph Myers [Tue, 10 Mar 2020 00:53:37 +0000 (00:53 +0000)]
Update gcc sv.po.
* sv.po: Update.
Jason Merrill [Mon, 9 Mar 2020 20:42:41 +0000 (16:42 -0400)]
gdbinit.in: Fix typo.
gcc/ChangeLog
2020-03-09 Jason Merrill <jason@redhat.com>
* gdbinit.in (pgs): Fix typo in documentation.
GCC Administrator [Tue, 10 Mar 2020 00:16:15 +0000 (00:16 +0000)]
Daily bump.
Joseph Myers [Tue, 10 Mar 2020 00:13:42 +0000 (00:13 +0000)]
Update cpplib da.po.
* da.po: Update.
Marek Polacek [Fri, 28 Feb 2020 21:57:04 +0000 (16:57 -0500)]
c++: Fix convert_like in template [PR91465, PR93870, PR92031, PR94068]
The point of this patch is to fix the recurring problem of trees
generated by convert_like while processing a template that break when
substituting. For instance, when convert_like creates a CALL_EXPR
while in a template, substituting such a call breaks in finish_call_expr
because we have two 'this' arguments. Another problem is that we
can create &TARGET_EXPR<> and then fail when substituting because we're
taking the address of an rvalue. I've analyzed some of the already fixed
PRs and also some of the currently open ones:
In c++/93870 we create EnumWrapper<E>::operator E(&operator~(E)).
In c++/87145 we create S::operator int (&{N}).
In c++/92031 we create &TARGET_EXPR <0>.
The gist of the problem is when convert_like_real creates a call for
a ck_user or wraps a TARGET_EXPR in & in a template. So in these cases
use IMPLICIT_CONV_EXPR. In a template we shouldn't need to perform the
actual conversion, we only need it's result type.
perform_direct_initialization_if_possible and
perform_implicit_conversion_flags can also create an IMPLICIT_CONV_EXPR.
Given the change above, build_converted_constant_expr can return an
IMPLICIT_CONV_EXPR so call fold_non_dependent_expr rather than
maybe_constant_value to deal with that.
To avoid the problem of instantiating something twice in a row I'm
removing a call to instantiate_non_dependent_expr_sfinae in
compute_array_index_type_loc. And the build_converted_constant_expr
pattern can now be simplified.
2020-03-09 Marek Polacek <polacek@redhat.com>
PR c++/92031 - bogus taking address of rvalue error.
PR c++/91465 - ICE with template codes in check_narrowing.
PR c++/93870 - wrong error when converting template non-type arg.
PR c++/94068 - ICE with template codes in check_narrowing.
* call.c (convert_like_real): Return IMPLICIT_CONV_EXPR
in a template when not ck_identity and we're dealing with a class.
(convert_like_real) <case ck_ref_bind>: Return IMPLICIT_CONV_EXPR
in a template if we need a temporary.
* decl.c (compute_array_index_type_loc): Remove
instantiate_non_dependent_expr_sfinae call. Call
fold_non_dependent_expr instead of maybe_constant_value.
(build_explicit_specifier): Don't instantiate or create a sentinel
before converting the expression.
* except.c (build_noexcept_spec): Likewise.
* pt.c (convert_nontype_argument): Don't build IMPLICIT_CONV_EXPR.
Set IMPLICIT_CONV_EXPR_NONTYPE_ARG if that's what
build_converted_constant_expr returned.
* typeck2.c (check_narrowing): Call fold_non_dependent_expr instead
of maybe_constant_value.
* g++.dg/cpp0x/conv-tmpl2.C: New test.
* g++.dg/cpp0x/conv-tmpl3.C: New test.
* g++.dg/cpp0x/conv-tmpl4.C: New test.
* g++.dg/cpp0x/conv-tmpl5.C: New test.
* g++.dg/cpp0x/conv-tmpl6.C: New test.
* g++.dg/cpp1z/conv-tmpl1.C: New test.
Jonathan Wakely [Mon, 9 Mar 2020 23:22:57 +0000 (23:22 +0000)]
libstdc++: Handle type-changing path concatenations (PR 94063)
The filesystem::path::operator+= and filesystem::path::concat functions
operate directly on the native format of the path and so can cause a
path to mutate to a completely different type.
For Windows combining a filename "x" with a filename ":" produces a
root-name "x:". Similarly, a Cygwin root-directory "/" combined with a
root-directory and filename "/x" produces a root-name "//x".
Before this patch the implemenation didn't support those kind of
mutations, assuming that concatenating two filenames would always
produce a filename and concatenating with a root-dir would still have a
root-dir.
This patch fixes it simply by checking for the problem cases and
creating a new path by re-parsing the result of the string
concatenation. This is slightly suboptimal because the argument has
already been parsed if it's a path, but more importantly it doesn't
reuse any excess capacity that the path object being modified might
already have allocated. That can be fixed later though.
PR libstdc++/94063
* src/c++17/fs_path.cc (path::operator+=(const path&)): Add kluge to
handle concatenations that change the type of the first component.
(path::operator+=(basic_string_view<value_type>)): Likewise.
* testsuite/27_io/filesystem/path/concat/94063.cc: New test.
Jakub Jelinek [Mon, 9 Mar 2020 20:52:18 +0000 (21:52 +0100)]
c++: Readd [LR]ROTATE_EXPR support to constexpr.c [PR94067]
Since r10-6527-gaaa26bf496a646778ac861aed124d960b5bf549f fold_for_warn
will perform maybe_constant_value even on some cp_fold produced trees and
so can include rotate exprs which were removed last fall from constexpr.c
2020-03-09 Jakub Jelinek <jakub@redhat.com>
PR c++/94067
Revert
2019-10-11 Paolo Carlini <paolo.carlini@oracle.com>
* constexpr.c (cxx_eval_constant_expression): Do not handle
RROTATE_EXPR and LROTATE_EXPR.
* g++.dg/warn/Wconversion-pr94067.C: New test.
Vladimir N. Makarov [Mon, 9 Mar 2020 18:05:09 +0000 (14:05 -0400)]
Revert: One more patch for PR93564: Prefer smaller hard regno when we do not honor reg alloc order.
2020-03-09 Vladimir Makarov <vmakarov@redhat.com>
Revert:
2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
PR rtl-optimization/93564
* ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
do not honor reg alloc order.
Andrew Pinski [Mon, 9 Mar 2020 16:45:23 +0000 (09:45 -0700)]
Fix 'A' operand modifier: PR inline-asm/94095
The problem here is there was a typo in the documentation
for the 'A' modifier in the table, it was recorded as 'a'
in the table on the modifier column.
Committed as obvious.
2020-03-09 Andrew Pinski <apinski@marvell.com>
PR inline-asm/94095
* doc/extend.texi (x86 Operand Modifiers): Fix column
for 'A' modifier.
Carl Love [Thu, 5 Mar 2020 18:52:35 +0000 (12:52 -0600)]
rs6000: Fix -mlong-double documentation
gcc/ChangeLog
2020-03-09 Carl Love <cel@us.ibm.com>
* config/rs6000/rs6000.opt: Update the description of the
command line option.
Tobias Burnus [Mon, 9 Mar 2020 16:00:39 +0000 (17:00 +0100)]
configure - build libgomp by default for amdgcn
* configure.ac: Build libgomp by default for amdgcn.
* configure: Regenerate.
Marek Polacek [Thu, 5 Mar 2020 19:07:25 +0000 (14:07 -0500)]
c++: Fix ABI issue with alignas on armv7hl [PR94050]
The static_assert in the following test was failing on armv7hl because
we were disregarding the alignas specifier on Cell. BaseShape's data
takes up 20B on 32-bit architectures, but we failed to round up its
TYPE_SIZE. This happens since the
<https://gcc.gnu.org/ml/gcc-patches/2019-06/msg01189.html>
patch: here, in layout_class_type for TenuredCell, we see that the size
of TenuredCell and its CLASSTYPE_AS_BASE match, so we set
CLASSTYPE_AS_BASE (t) = t;
While TYPE_USER_ALIGN of TenuredCell was 0, because finalize_type_size
called from finish_record_layout reset it, TYPE_USER_ALIGN of its
CLASSTYPE_AS_BASE still remained 1. After we replace it, it's no longer
1. Then we perform layout_empty_base_or_field for TenuredCell and since
TYPE_USER_ALIGN of its CLASSTYPE_AS_BASE is now 0, we don't do this
adjustment:
if (CLASSTYPE_USER_ALIGN (type))
{
rli->record_align = MAX (rli->record_align, CLASSTYPE_ALIGN (type));
if (warn_packed)
rli->unpacked_align = MAX (rli->unpacked_align, CLASSTYPE_ALIGN (type));
TYPE_USER_ALIGN (rli->t) = 1;
}
where rli->t is BaseShape. Then finalize_record_size won't use the
correct rli->record_align and therefore
/* Round the size up to be a multiple of the required alignment. */
TYPE_SIZE (rli->t) = round_up (unpadded_size, TYPE_ALIGN (rli->t));
after this we end up with the wrong size.
Since the original fix was to avoid creating extra copies for LTO
purposes, I think the following fix should be acceptable.
PR c++/94050 - ABI issue with alignas on armv7hl.
* class.c (layout_class_type): Don't replace a class's
CLASSTYPE_AS_BASE if their TYPE_USER_ALIGN don't match.
* g++.dg/abi/align3.C: New test.
Christophe Lyon [Mon, 9 Mar 2020 13:15:10 +0000 (13:15 +0000)]
[testsuite][arm] Fix typo in fuse-caller-save.c
2020-03-09 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/arm/fuse-caller-save.c: Fix DejaGnu typo.
Martin Liska [Mon, 9 Mar 2020 13:13:04 +0000 (14:13 +0100)]
Restore alignment in rs6000 target.
PR target/93800
* config/rs6000/rs6000.c (rs6000_option_override_internal):
Remove set of str_align_loops and str_align_jumps as these
should be set in previous 2 conditions in the function.
PR target/93800
* gcc.target/powerpc/pr93800.c: New test.
Jakub Jelinek [Mon, 9 Mar 2020 12:38:23 +0000 (13:38 +0100)]
alias: Punt after walking too many VALUEs during a toplevel find_base_term call [PR94045]
As mentioned in the PR, on a largish C++ testcase the compile time
on i686-linux is about 16 minutes on a fast box, mostly spent in
find_base_term recursive calls dealing with very deep chains of preserved
VALUEs during var-tracking.
The following patch punts after we process many VALUEs (we already have code
to punt if we run into a VALUE cycle).
I've gathered statistics on when we punt this way (with BITS_PER_WORD, TU,
function columns piped through sort | uniq -c | sort -n):
36 32 ../../gcc/asan.c _Z29initialize_sanitizer_builtinsv.part.0
108 32 _first_test.go reflect_test.reflect_test..import
1005 32 /home/jakub/src/gcc/gcc/testsuite/gcc.dg/pr85180.c foo
1005 32 /home/jakub/src/gcc/gcc/testsuite/gcc.dg/pr87985.c foo
1005 64 /home/jakub/src/gcc/gcc/testsuite/gcc.dg/pr85180.c foo
1005 64 /home/jakub/src/gcc/gcc/testsuite/gcc.dg/pr87985.c foo
2534 32 /home/jakub/src/gcc/gcc/testsuite/gcc.dg/stack-check-9.c f3
6346 32 ../../gcc/brig/brig-lang.c brig_define_builtins
6398 32 ../../gcc/d/d-builtins.cc d_define_builtins
8816 32 ../../gcc/c-family/c-common.c c_common_nodes_and_builtins
8824 32 ../../gcc/lto/lto-lang.c lto_define_builtins
41413 32 /home/jakub/src/gcc/gcc/testsuite/gcc.dg/pr43058.c test
Additionally, for most of these (for the builtins definitions tested just
one) I've verified with a different alias.c change which didn't punt but
in the toplevel find_base_term recorded if visited_vals reached the limit
whether the return value was NULL_RTX or something different, and in all
these cases the end result was NULL_RTX, so at least in these cases it
should just shorten the time until it returns NULL.
2020-03-09 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/94045
* params.opt (-param=max-find-base-term-values=): New option.
* alias.c (find_base_term): Add cut-off for number of visited VALUEs
in a single toplevel find_base_term call.
Bin Cheng [Mon, 9 Mar 2020 10:54:57 +0000 (18:54 +0800)]
Insert default return_void at the end of coroutine body
Exception in coroutine is not correctly handled because the default
return_void call is now inserted before the finish suspend point,
rather than at the end of the original coroutine body. This patch
fixes the issue by expanding code as following:
co_await promise.initial_suspend();
try {
// The original coroutine body
promise.return_void(); // The default return_void call.
} catch (...) {
promise.unhandled_exception();
}
final_suspend:
// ...
gcc/cp/
* coroutines.cc (build_actor_fn): Factor out code inserting the
default return_void call to...
(morph_fn_to_coro): ...here, also hoist local var declarations.
gcc/testsuite/
* g++.dg/coroutines/torture/co-ret-15-default-return_void.C: New.
Kewen Lin [Mon, 9 Mar 2020 02:55:11 +0000 (21:55 -0500)]
[testsuite] Fix PR94019 to check vector char when vect_hw_misalign
As PR94019 shows, without misaligned vector access support but with
realign load, the vectorized loop will end up with realign scheme.
It generates mask (control vector) with return type vector signed
char which breaks the not check.
gcc/testsuite/ChangeLog
2020-03-09 Kewen Lin <linkw@gcc.gnu.org>
PR testsuite/94019
* gcc.dg/vect/vect-over-widen-17.c: Don't expect vector char if
it's without misaligned vector access support.
Kewen Lin [Mon, 9 Mar 2020 02:34:13 +0000 (21:34 -0500)]
[testsuite] Fix PR94023 to guard case under vect_hw_misalign
As PR94023 shows, the expected SLP requires misaligned vector access
support. This patch is to guard the check under the target condition
vect_hw_misalign to ensure that.
gcc/testsuite/ChangeLog
2020-03-09 Kewen Lin <linkw@gcc.gnu.org>
PR testsuite/94023
* gcc.dg/vect/slp-perm-12.c: Expect loop vectorized messages only on
vect_hw_misalign targets.
GCC Administrator [Mon, 9 Mar 2020 00:16:14 +0000 (00:16 +0000)]
Daily bump.
Paul Thomas [Sun, 8 Mar 2020 18:52:35 +0000 (18:52 +0000)]
Patch and ChangeLogs for PR93581
Patrick Palka [Tue, 3 Mar 2020 17:27:33 +0000 (12:27 -0500)]
c++: Fix missing SFINAE when binding a bit-field to a reference (PR 93729)
We are unconditionally emitting an error here, without first checking complain.
gcc/cp/ChangeLog:
PR c++/93729
* call.c (convert_like_real): Check complain before emitting an error
about binding a bit-field to a reference.
gcc/testsuite/ChangeLog:
PR c++/93729
* g++.dg/concepts/pr93729.C: New test.
Patrick Palka [Fri, 6 Mar 2020 18:19:13 +0000 (13:19 -0500)]
c++: Fix pretty printing of TYPENAME_TYPEs
I noticed that in some concepts diagnostic messages, we were printing typename
types incorrectly, e.g. printing remove_reference_t<T> as
typename remove_reference<T>::remove_reference_t
instead of
typename remove_reference<T>::type.
Fix this by printing the TYPENAME_TYPE_FULLNAME instead of the TYPE_NAME in
cxx_pretty_printer::simple_type_specifier, which is consistent with how
dump_typename in error.c does it.
gcc/cp/ChangeLog:
* cxx-pretty-print.c (cxx_pretty_printer::simple_type_specifier)
[TYPENAME_TYPE]: Print the TYPENAME_TYPE_FULLNAME instead of the
TYPE_NAME.
gcc/testsuite/ChangeLog:
* g++.dg/concepts/diagnostic4.C: New test.
H.J. Lu [Sun, 8 Mar 2020 12:01:03 +0000 (05:01 -0700)]
gcc.target/i386/pr89229-3c.c: Include "pr89229-3a.c"
PR target/89229
PR target/89346
* gcc.target/i386/pr89229-3c.c: Include "pr89229-3a.c", instead
of "pr89229-5a.c".
GCC Administrator [Sat, 7 Mar 2020 00:16:29 +0000 (00:16 +0000)]
Daily bump.
David Malcolm [Fri, 6 Mar 2020 15:13:59 +0000 (10:13 -0500)]
analyzer: improvements to region_model::get_representative_tree
This patch extends region_model::get_representative_tree so that dumps
are able to refer to string literals, which I've found useful in
investigating a state-bloat issue.
Doing so uncovered a bug in the handling of views I introduced in
r10-7024-ge516294a1acb28aaaad44cfd583cc6a80354044e where the code was
erroneously using TREE_TYPE on the view region's type, rather than just
using its type, which the patch also fixes.
gcc/analyzer/ChangeLog:
* analyzer.h (class array_region): New forward decl.
* program-state.cc (selftest::test_program_state_dumping_2): New.
(selftest::analyzer_program_state_cc_tests): Call it.
* region-model.cc (array_region::constant_from_key): New.
(region_model::get_representative_tree): Handle region_svalue by
generating an ADDR_EXPR.
(region_model::get_representative_path_var): In view handling,
remove erroneous TREE_TYPE when determining the type of the tree.
Handle array regions and STRING_CST.
(selftest::assert_dump_tree_eq): New.
(ASSERT_DUMP_TREE_EQ): New macro.
(selftest::test_get_representative_tree): New selftest.
(selftest::analyzer_region_model_cc_tests): Call it.
* region-model.h (region::dyn_cast_array_region): New vfunc.
(array_region::dyn_cast_array_region): New vfunc implementation.
(array_region::constant_from_key): New decl.
gcc/testsuite/ChangeLog:
* gcc.dg/analyzer/malloc-4.c: Update expected output of leak to
reflect fix to region_model::get_representative_path_var, adding
the missing "*" from the cast.
David Malcolm [Thu, 5 Mar 2020 17:06:58 +0000 (12:06 -0500)]
analyzer: improvements to state dumping
This patch fixes a bug in which summarized state dumps involving a
non-NULL pointer to a region for which get_representative_path_var
returned NULL were erroneously dumped as "NULL".
It also extends sm-state dumps so that they show representative tree
values, where available.
Finally, it adds some selftest coverage for such dumps. Doing so
requires replacing some %qE with a dump_quoted_tree, to avoid
C vs C++ differences between "make selftest-c" and "make selftest-c++".
gcc/analyzer/ChangeLog:
* analyzer.h (dump_quoted_tree): New decl.
* engine.cc (exploded_node::dump_dot): Pass region model to
sm_state_map::print.
* program-state.cc: Include diagnostic-core.h.
(sm_state_map::print): Add "model" param and use it to print
representative trees. Only print origin information if non-null.
(sm_state_map::dump): Pass NULL for model to print call.
(program_state::print): Pass region model to sm_state_map::print.
(program_state::dump_to_pp): Use spaces rather than newlines when
summarizing. Pass region_model to sm_state_map::print.
(ana::selftest::assert_dump_eq): New function.
(ASSERT_DUMP_EQ): New macro.
(ana::selftest::test_program_state_dumping): New function.
(ana::selftest::analyzer_program_state_cc_tests): Call it.
* program-state.h (program_state::print): Add model param.
* region-model.cc (dump_quoted_tree): New function.
(map_region::print_fields): Use dump_quoted_tree rather than
%qE to avoid lang-dependent output.
(map_region::dump_child_label): Likewise.
(region_model::dump_summary_of_map): For SK_REGION, when
get_representative_path_var fails, print the region id rather than
erroneously printing NULL.
* sm.cc (state_machine::get_state_by_name): New function.
* sm.h (state_machine::get_state_by_name): New decl.
Nathan Sidwell [Fri, 6 Mar 2020 18:51:26 +0000 (10:51 -0800)]
Fix mangling ICE [PR94027]
PR c++/94027
* mangle.c (find_substitution): Don't call same_type_p on template
args that cannot match.
Now same_type_p rejects argument packs, we need to be more careful
calling it with template argument vector contents.
The mangler needs to do some comparisons to find the special
substitutions. While that code looks a little ugly, this seems the
smallest fix.
Wilco Dijkstra [Fri, 6 Mar 2020 18:29:02 +0000 (18:29 +0000)]
[AArch64] Use intrinsics for widening multiplies (PR91598)
Inline assembler instructions don't have latency info and the scheduler does
not attempt to schedule them at all - it does not even honor latencies of
asm source operands. As a result, SIMD intrinsics which are implemented using
inline assembler perform very poorly, particularly on in-order cores.
Add new patterns and intrinsics for widening multiplies, which results in a
63% speedup for the example in the PR, thus fixing the reported regression.
gcc/
PR target/91598
* config/aarch64/aarch64-builtins.c (TYPES_TERNOPU_LANE): Add define.
* config/aarch64/aarch64-simd.md
(aarch64_vec_<su>mult_lane<Qlane>): Add new insn for widening lane mul.
(aarch64_vec_<su>mlal_lane<Qlane>): Likewise.
* config/aarch64/aarch64-simd-builtins.def: Add intrinsics.
* config/aarch64/arm_neon.h:
(vmlal_lane_s16): Expand using intrinsics rather than inline asm.
(vmlal_lane_u16): Likewise.
(vmlal_lane_s32): Likewise.
(vmlal_lane_u32): Likewise.
(vmlal_laneq_s16): Likewise.
(vmlal_laneq_u16): Likewise.
(vmlal_laneq_s32): Likewise.
(vmlal_laneq_u32): Likewise.
(vmull_lane_s16): Likewise.
(vmull_lane_u16): Likewise.
(vmull_lane_s32): Likewise.
(vmull_lane_u32): Likewise.
(vmull_laneq_s16): Likewise.
(vmull_laneq_u16): Likewise.
(vmull_laneq_s32): Likewise.
(vmull_laneq_u32): Likewise.
* config/aarch64/iterators.md (Vcondtype): New iterator for lane mul.
(Qlane): Likewise.
Wilco Dijkstra [Fri, 6 Mar 2020 18:19:46 +0000 (18:19 +0000)]
[AArch64] Fix lane specifier syntax
The syntax for lane specifiers uses a vector element rather than a vector:
fmls v0.2s, v1.2s, v1.s[1] // rather than v1.2s[1]
Fix all the lane specifiers to use Vetype which uses the correct element type.
gcc/
* aarch64/aarch64-simd.md (aarch64_mla_elt<mode>): Correct lane syntax.
(aarch64_mla_elt_<vswap_width_name><mode>): Likewise.
(aarch64_mls_elt<mode>): Likewise.
(aarch64_mls_elt_<vswap_width_name><mode>): Likewise.
(aarch64_fma4_elt<mode>): Likewise.
(aarch64_fma4_elt_<vswap_width_name><mode>): Likewise.
(aarch64_fma4_elt_to_64v2df): Likewise.
(aarch64_fnma4_elt<mode>): Likewise.
(aarch64_fnma4_elt_<vswap_width_name><mode>): Likewise.
(aarch64_fnma4_elt_to_64v2df): Likewise.
testsuite/
* gcc.target/aarch64/fmla_intrinsic_1.c: Check for correct lane syntax.
* gcc.target/aarch64/fmls_intrinsic_1.c: Likewise.
* gcc.target/aarch64/mla_intrinsic_1.c: Likewise.
* gcc.target/aarch64/mls_intrinsic_1.c: Likewise.
Kyrylo Tkachov [Fri, 6 Mar 2020 16:21:33 +0000 (16:21 +0000)]
[AArch64][SVE] Add missing movprfx attribute to some ternary arithmetic patterns
The two affected SVE2 patterns in this patch output a movprfx'ed instruction in their second alternative
but don't set the "movprfx" attribute, which will result in the wrong instruction length being assumed by the midend.
This patch fixes that in the same way as the other SVE patterns in the backend.
Bootstrapped and tested on aarch64-none-linux-gnu.
2020-03-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64-sve2.md (@aarch64_sve_<sve_int_op><mode>:
Specify movprfx attribute.
(@aarch64_sve_<sve_int_op>_lane_<mode>): Likewise.
David Edelsohn [Fri, 6 Mar 2020 01:41:08 +0000 (20:41 -0500)]
rs6000: Correct logic to disable NO_SUM_IN_TOC and NO_FP_IN_TOC [PR94065]
aix61.h, aix71.h and aix72.h intends to prevent SUM_IN_TOC and FP_IN_TOC
when cmodel=large. This patch defines the variables associated with the
target options to 1 to _enable_ NO_SUM_IN_TOC and enable NO_FP_IN_TOC.
Bootstrapped on powerpc-ibm-aix7.2.0.0
2020-03-06 David Edelsohn <dje.gcc@gmail.com>
PR target/94065
* config/rs6000/aix61.h (TARGET_NO_SUM_IN_TOC): Set to 1 for
cmodel=large.
(TARGET_NO_FP_IN_TOC): Same.
* config/rs6000/aix71.h: Same.
* config/rs6000/aix72.h: Same.
Andrew Pinski [Fri, 6 Mar 2020 15:34:01 +0000 (08:34 -0700)]
Avoid putting a REG_NOTE on anything other than an INSN in haifa-sched.c
PR rtl-optimization/93996
* haifa-sched.c (remove_notes): Be more careful when adding
REG_SAVE_NOTE.
Claudiu Zissulescu [Fri, 6 Mar 2020 14:36:23 +0000 (16:36 +0200)]
arc: Update tumaddsidi4 test.
The test is using -O1 and, the macu instruction is generated by the
combiner and not in the expand step. My previous "arc: Improve code
gen for 64bit add/sub operations." is actually splitting the 64-bit
add in the expand, leading to the impossibility to match the multiply
and accumulate on 64 bit datum by the combiner, hence, the error. This
patch is stepping up the optimization level which will generate the
macu instruction at the expand time.
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
* gcc.target/arc/tumaddsidi4.c: Step-up optimization level.
Signed-off-by: Claudiu Zissulescu <claziss@gmail.com>
Patrick Palka [Thu, 5 Mar 2020 16:19:17 +0000 (11:19 -0500)]
libstdc++: Add missing friend declaration to join_view::_Sentinel
The converting constructor of join_view::_Sentinel<true> needs to be able to
access the private members of join_view::_Sentinel<false>.
libstdc++-v3/ChangeLog:
* include/std/ranges (join_view::_Sentinel<_Const>): Befriend
join_view::_Sentinel<!_Const>.
* testsuite/std/ranges/adaptors/join.cc: Augment test.
Patrick Palka [Thu, 5 Mar 2020 15:04:06 +0000 (10:04 -0500)]
libstdc++: Give ranges::empty() a concrete return type (PR 93978)
This works around PR 93978 by avoiding having to instantiate the body of
ranges::empty() when checking the constraints of view_interface::operator
bool(). When ranges::empty() has an auto return type, then we must instantiate
its body in order to determine whether the requires expression {
ranges::empty(_M_derived()); } is well-formed. But this means instantiating
view_interface::empty() and hence view_interface::_M_derived(), all before we've
yet deduced the return type of join_view::end(). (The reason
view_interface::operator bool() is needed in join_view::end() in the first place
is because in this function we perform direct initialization of
join_view::_Sentinel from a join_view, and so we try to find a conversion
sequence from the latter to the former that goes through this conversion
operator.)
Giving ranges::empty() a concrete return type of bool should be safe according
to [range.prim.empty]/4 which says "whenever ranges::empty(E) is a valid
expression, it has type bool."
This fixes the test case in PR 93978 when compiling without -Wall, but with -Wall
the test case still fails due to the issue described in PR c++/94038, I think.
I still don't quite understand why the test case doesn't fail without -O.
libstdc++-v3/ChangeLog:
PR libstdc++/93978
* include/bits/range_access.h (__cust_access::_Empty::operator()):
Declare return type to be bool instead of auto.
* testsuite/std/ranges/adaptors/93978.cc: New test.
Jonathan Wakely [Fri, 6 Mar 2020 12:24:37 +0000 (12:24 +0000)]
libstdc++: Fix PR number in ChangeLog (PR 94069)
Jonathan Wakely [Fri, 6 Mar 2020 12:03:17 +0000 (12:03 +0000)]
libstdc++: Fix call to __glibcxx_rwlock_init (PR 93244)
When the target doesn't define PTHREAD_RWLOCK_INITIALIZER we use a
wrapper around pthread_wrlock_init, but the wrapper only takes one
argument and we try to call it with two.
This went unnnoticed on most targets because they do define the
PTHREAD_RWLOCK_INITIALIZER macro, but it causes a bootstrap failure on
darwin8.
PR libstdc++/93244
* include/std/shared_mutex [!PTHREAD_RWLOCK_INITIALIZER]
(__shared_mutex_pthread::__shared_mutex_pthread()): Remove incorrect
second argument to __glibcxx_rwlock_init.
* testsuite/30_threads/shared_timed_mutex/94069.cc: New test.
Andreas Krebbel [Fri, 6 Mar 2020 11:44:27 +0000 (12:44 +0100)]
Add missing ChangeLog entries
Jonathan Wakely [Fri, 6 Mar 2020 11:27:34 +0000 (11:27 +0000)]
libstdc++: Fix failing filesystem::path tests (PR 93244)
The checks for PR 93244 don't actually pass on Windows (which is the
target where the bug is present) because of a different bug, PR 94063.
This adjusts the tests to not be affected by 94063 so that they verify
that 93244 was fixed.
PR libstdc++/93244
* testsuite/27_io/filesystem/path/generic/generic_string.cc: Adjust
test to not fail due to PR 94063.
* testsuite/27_io/filesystem/path/generic/utf.cc: Likewise.
* testsuite/27_io/filesystem/path/generic/wchar_t.cc: Likewise.
Andreas Krebbel [Fri, 6 Mar 2020 08:37:55 +0000 (09:37 +0100)]
libstdc++: Deal with ENOSYS == ENOTSUP
zTPF uses the same numeric value for ENOSYS and ENOTSUP.
libstdc++-v3/ChangeLog:
2020-03-06 Andreas Krebbel <krebbel@linux.ibm.com>
* src/c++11/system_error.cc: Omit the ENOTSUP case statement if it
would match ENOSYS.
Delia Burduv [Fri, 6 Mar 2020 10:38:20 +0000 (10:38 +0000)]
ACLE intrinsics: BFloat16 load intrinsics for AArch32
2020-03-06 Delia Burduv <delia.burduv@arm.com>
* config/arm/arm_neon.h (vld2_bf16): New.
(vld2q_bf16): New.
(vld3_bf16): New.
(vld3q_bf16): New.
(vld4_bf16): New.
(vld4q_bf16): New.
(vld2_dup_bf16): New.
(vld2q_dup_bf16): New.
(vld3_dup_bf16): New.
(vld3q_dup_bf16): New.
(vld4_dup_bf16): New.
(vld4q_dup_bf16): New.
* config/arm/arm_neon_builtins.def
(vld2): Changed to VAR13 and added v4bf, v8bf
(vld2_dup): Changed to VAR8 and added v4bf, v8bf
(vld3): Changed to VAR13 and added v4bf, v8bf
(vld3_dup): Changed to VAR8 and added v4bf, v8bf
(vld4): Changed to VAR13 and added v4bf, v8bf
(vld4_dup): Changed to VAR8 and added v4bf, v8bf
* config/arm/iterators.md (VDXBF2): New iterator.
*config/arm/neon.md (neon_vld2): Use new iterators.
(neon_vld2_dup<mode): Use new iterators.
(neon_vld3<mode>): Likewise.
(neon_vld3qa<mode>): Likewise.
(neon_vld3qb<mode>): Likewise.
(neon_vld3_dup<mode>): Likewise.
(neon_vld4<mode>): Likewise.
(neon_vld4qa<mode>): Likewise.
(neon_vld4qb<mode>): Likewise.
(neon_vld4_dup<mode>): Likewise.
(neon_vld2_dupv8bf): New.
(neon_vld3_dupv8bf): Likewise.
(neon_vld4_dupv8bf): Likewise.
* gcc.target/arm/simd/bf16_vldn_1.c: New test.
Delia Burduv [Fri, 6 Mar 2020 10:32:20 +0000 (10:32 +0000)]
ACLE intrinsics: BFloat16 store (vst<n>{q}_bf16) intrinsics for AArch32
2020-03-06 Delia Burduv <delia.burduv@arm.com>
* config/arm/arm_neon.h (bfloat16x4x2_t): New typedef.
(bfloat16x8x2_t): New typedef.
(bfloat16x4x3_t): New typedef.
(bfloat16x8x3_t): New typedef.
(bfloat16x4x4_t): New typedef.
(bfloat16x8x4_t): New typedef.
(vst2_bf16): New.
(vst2q_bf16): New.
(vst3_bf16): New.
(vst3q_bf16): New.
(vst4_bf16): New.
(vst4q_bf16): New.
* config/arm/arm-builtins.c (v2bf_UP): Define.
(VAR13): New.
(arm_init_simd_builtin_types): Init Bfloat16x2_t eltype.
* config/arm/arm-modes.def (V2BF): New mode.
* config/arm/arm-simd-builtin-types.def
(Bfloat16x2_t): New entry.
* config/arm/arm_neon_builtins.def
(vst2): Changed to VAR13 and added v4bf, v8bf
(vst3): Changed to VAR13 and added v4bf, v8bf
(vst4): Changed to VAR13 and added v4bf, v8bf
* config/arm/iterators.md (VDXBF): New iterator.
(VQ2BF): New iterator.
*config/arm/neon.md (neon_vst2<mode>): Used new iterators.
(neon_vst2<mode>): Used new iterators.
(neon_vst3<mode>): Used new iterators.
(neon_vst3<mode>): Used new iterators.
(neon_vst3qa<mode>): Used new iterators.
(neon_vst3qb<mode>): Used new iterators.
(neon_vst4<mode>): Used new iterators.
(neon_vst4<mode>): Used new iterators.
(neon_vst4qa<mode>): Used new iterators.
(neon_vst4qb<mode>): Used new iterators.
* gcc.target/arm/simd/bf16_vstn_1.c: New test.
Kito Cheng [Fri, 6 Mar 2020 08:30:48 +0000 (16:30 +0800)]
RISC-V: Fix testsuite regression due to recent IRA changes.
Delia Burduv [Wed, 4 Mar 2020 19:25:09 +0000 (19:25 +0000)]
aarch64: ACLE intrinsics for BFCVTN, BFCVTN2 and BFCVT
This patch adds the Armv8.6-a ACLE intrinsics for bfcvtn, bfcvtn2 and
bfcvt as part of the BFloat16 extension.
(https://developer.arm.com/architectures/instruction-sets/simd-isas/neon/intrinsics)
The intrinsics are declared in arm_bf16.h and arm_neon.h and the RTL
patterns are defined in aarch64-simd.md.
2020-03-06 Delia Burduv <delia.burduv@arm.com>
gcc/
* config/aarch64/aarch64-simd-builtins.def
(bfcvtn): New built-in function.
(bfcvtn_q): New built-in function.
(bfcvtn2): New built-in function.
(bfcvt): New built-in function.
* config/aarch64/aarch64-simd.md
(aarch64_bfcvtn<q><mode>): New pattern.
(aarch64_bfcvtn2v8bf): New pattern.
(aarch64_bfcvtbf): New pattern.
* config/aarch64/arm_bf16.h (float32_t): New typedef.
(vcvth_bf16_f32): New intrinsic.
* config/aarch64/arm_bf16.h (vcvt_bf16_f32): New intrinsic.
(vcvtq_low_bf16_f32): New intrinsic.
(vcvtq_high_bf16_f32): New intrinsic.
* config/aarch64/iterators.md (V4SF_TO_BF): New mode iterator.
(UNSPEC_BFCVTN): New UNSPEC.
(UNSPEC_BFCVTN2): New UNSPEC.
(UNSPEC_BFCVT): New UNSPEC.
* config/arm/types.md (bf_cvt): New type.
gcc/testsuite/
* gcc.target/aarch64/advsimd-intrinsics/bfcvt-compile.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/bfcvt-nobf16.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/bfcvt-nosimd.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/bfcvtnq2-untied.c: New test.
Andreas Krebbel [Fri, 6 Mar 2020 08:51:34 +0000 (09:51 +0100)]
Fix error format string.
gcc/ChangeLog:
2020-03-06 Andreas Krebbel <krebbel@linux.ibm.com>
* config/s390/s390.md ("tabort"): Get rid of two consecutive
blanks in format string.
Kito Cheng [Tue, 3 Mar 2020 06:16:42 +0000 (14:16 +0800)]
re PR tree-optimization/90883 (Generated code is worse if returned struct is unnamed)
After add --param max-inline-insns-size=1 all target will remove the
redundant store at dse1, except some targets like AArch64 and MIPS will
expand the struct initialization into loop due to CLEAR_RATIO.
Tested on cross compiler of riscv32, riscv64, x86, x86_64, mips, mips64,
aarch64, nds32 and arm.
gcc/testsuite/ChangeLog
PR tree-optimization/90883
* g++.dg/tree-ssa/pr90883.c: Add --param max-inline-insns-size=1.
Add aarch64-*-* mips*-*-* to XFAIL.
H.J. Lu [Fri, 6 Mar 2020 00:45:05 +0000 (16:45 -0800)]
i386: Properly encode vector registers in vector move
On x86, when AVX and AVX512 are enabled, vector move instructions can
be encoded with either 2-byte/3-byte VEX (AVX) or 4-byte EVEX (AVX512):
0: c5 f9 6f d1 vmovdqa %xmm1,%xmm2
4: 62 f1 fd 08 6f d1 vmovdqa64 %xmm1,%xmm2
We prefer VEX encoding over EVEX since VEX is shorter. Also AVX512F
only supports 512-bit vector moves. AVX512F + AVX512VL supports 128-bit
and 256-bit vector moves. xmm16-xmm31 and ymm16-ymm31 are disallowed in
128-bit and 256-bit modes when AVX512VL is disabled. Mode attributes on
x86 vector move patterns indicate target preferences of vector move
encoding. For scalar register to register move, we can use 512-bit
vector move instructions to move 32-bit/64-bit scalar if AVX512VL isn't
available. With AVX512F and AVX512VL, we should use VEX encoding for
128-bit/256-bit vector moves if upper 16 vector registers aren't used.
This patch adds a function, ix86_output_ssemov, to generate vector moves:
1. If zmm registers are used, use EVEX encoding.
2. If xmm16-xmm31/ymm16-ymm31 registers aren't used, SSE or VEX encoding
will be generated.
3. If xmm16-xmm31/ymm16-ymm31 registers are used:
a. With AVX512VL, AVX512VL vector moves will be generated.
b. Without AVX512VL, xmm16-xmm31/ymm16-ymm31 register to register
move will be done with zmm register move.
There is no need to set mode attribute to XImode explicitly since
ix86_output_ssemov can properly encode xmm16-xmm31/ymm16-ymm31 registers
with and without AVX512VL.
Tested on AVX2 and AVX512 with and without --with-arch=native.
gcc/
PR target/89229
PR target/89346
* config/i386/i386-protos.h (ix86_output_ssemov): New prototype.
* config/i386/i386.c (ix86_get_ssemov): New function.
(ix86_output_ssemov): Likewise.
* config/i386/sse.md (VMOVE:mov<mode>_internal): Call
ix86_output_ssemov for TYPE_SSEMOV. Remove TARGET_AVX512VL
check.
(*movxi_internal_avx512f): Call ix86_output_ssemov for TYPE_SSEMOV.
(*movoi_internal_avx): Call ix86_output_ssemov for TYPE_SSEMOV.
Remove ext_sse_reg_operand and TARGET_AVX512VL check.
(*movti_internal): Likewise.
(*movtf_internal): Call ix86_output_ssemov for TYPE_SSEMOV.
gcc/testsuite/
PR target/89229
PR target/89346
* gcc.target/i386/avx512vl-vmovdqa64-1.c: Updated.
* gcc.target/i386/pr89229-2a.c: New test.
* gcc.target/i386/pr89229-2b.c: Likewise.
* gcc.target/i386/pr89229-2c.c: Likewise.
* gcc.target/i386/pr89229-3a.c: Likewise.
* gcc.target/i386/pr89229-3b.c: Likewise.
* gcc.target/i386/pr89229-3c.c: Likewise.
* gcc.target/i386/pr89346.c: Likewise.
GCC Administrator [Fri, 6 Mar 2020 00:16:34 +0000 (00:16 +0000)]
Daily bump.
Andre Vieira [Thu, 5 Mar 2020 23:59:53 +0000 (16:59 -0700)]
[PATCH][testuite] Fix pr80481.C after epilogue vectorization
* g++.dg/pr80481.C: Disable epilogue vectorization.
Joseph Myers [Thu, 5 Mar 2020 23:48:06 +0000 (23:48 +0000)]
c: ignore initializers for elements of variable-size types [PR93577]
Bug 93577, apparently a regression (although it isn't very clear to me
exactly when it was introduced; tests I made with various past
compilers produced inconclusive results, including e.g. ICEs appearing
with 64-bit-host compilers for some versions but not 32-bit-host
compilers for the same versions) is an C front-end tree-checking ICE
processing initializers for structs using the VLA-in-struct extension.
There is an error for such initializers, but other processing that
still takes place for them results in the ICE.
This patch ensures that processing of initializers for variable-size
types stops earlier to avoid the code that results in the ICE (and
ensures it stops earlier for error_mark_node to avoid ICEs in the
check for variable-size types), adjusts the conditions for the "empty
scalar initializer" diagnostic to avoid consequent excess errors in
the case of a bad type name, and adds tests for a few variations on
what such initializers might look like, as well as tests for cases
identified from ICEs seen with an earlier version of this patch.
Bootstrapped with no regressions for x86_64-pc-linux-gnu.
PR c/93577
gcc/c:
* c-typeck.c (pop_init_level): Do not diagnose initializers as
empty when initialized type is error_mark_node.
(set_designator, process_init_element): Ignore initializers for
elements of a variable-size type or of error_mark_node.
gcc/testsuite:
* gcc.dg/pr93577-1.c, gcc.dg/pr93577-2.c, gcc.dg/pr93577-3.c,
gcc.dg/pr93577-4.c, gcc.dg/pr93577-5.c, gcc.dg/pr93577-6.c: New
tests.
* gcc.dg/vla-init-1.c: Expect fewer errors about VLA initializer.
Jeff Law [Thu, 5 Mar 2020 21:16:02 +0000 (14:16 -0700)]
Commit correct version of gimple.c file
Jeff Law [Thu, 5 Mar 2020 21:01:30 +0000 (14:01 -0700)]
Fix location maybe_diag_overlap passes to diagnostics so that diagnostic pragmas work better.
PR tree-optimization/91890
* gimple-ssa-warn-restrict.c (maybe_diag_overlap): Remove LOC argument.
Use gimple_or_expr_nonartificial_location.
(check_bounds_overlap): Drop LOC argument to maybe_diag_access_bounds.
Use gimple_or_expr_nonartificial_location.
* gimple.c (gimple_or_expr_nonartificial_location): New function.
* gimple.h (gimple_or_expr_nonartificial_location): Declare it.
* tree-ssa-strlen.c (maybe_warn_overflow): Use
gimple_or_expr_nonartificial_location.
(maybe_diag_stxncpy_trunc, handle_builtin_stxncpy_strncat): Likewise.
(maybe_warn_pointless_strcmp): Likewise.
* gcc.dg/pragma-diag-8.c: New test.
Jakub Jelinek [Thu, 5 Mar 2020 18:44:42 +0000 (19:44 +0100)]
i386: Fix some -O0 avx2intrin.h and xopintrin.h intrinsic macros [PR94046]
As the testcases show, the macros we have for -O0 for intrinsics that require
constant argument(s) should first cast the argument to the type the -O1+
inline uses and afterwards to whatever type e.g. a builtin needs.
The PR reported one which violated this, and I've grepped for all double-casts
and grepped out from that meaningful casts where the __m{128,256,512}{,d,i}
first cast is cast to same sized __v* type and has the same kind of element
type (float, double, integral). These 7 macros were using different casts,
and I've double checked them against the inline function types.
2020-03-05 Jakub Jelinek <jakub@redhat.com>
PR target/94046
* config/i386/avx2intrin.h (_mm_mask_i32gather_ps): Fix first cast of
SRC and MASK arguments to __m128 from __m128d.
(_mm256_mask_i32gather_ps): Fix first cast of MASK argument to __m256
from __m256d.
(_mm_mask_i64gather_ps): Fix first cast of MASK argument to __m128
from __m128d.
* config/i386/xopintrin.h (_mm_permute2_pd): Fix first cast of C
argument to __m128i from __m128d.
(_mm256_permute2_pd): Fix first cast of C argument to __m256i from
__m256d.
(_mm_permute2_ps): Fix first cast of C argument to __m128i from __m128.
(_mm256_permute2_ps): Fix first cast of C argument to __m256i from
__m256.
* g++.target/i386/pr94046-1.C: New test.
* g++.target/i386/pr94046-2.C: New test.
Kyrylo Tkachov [Thu, 5 Mar 2020 17:45:58 +0000 (17:45 +0000)]
[AArch32] ACLE intrinsics bfloat16 vmmla and vfma<b/t> for AArch32 AdvSIMD
Commit rest of the
43031fbdda7d4edbd607365a4f3bbec069fe3983 content.
I screwed up on the "git add" commands there.
Jonathan Wakely [Thu, 5 Mar 2020 17:21:24 +0000 (17:21 +0000)]
libstdc++: Fix some warnings in filesystem tests
There's a -Wunused-but-set-variable warning in operations/all.cc which
can be fixed with [[maybe_unused]].
The statements in operations/copy.cc give -Wunused-value warnings. I
think I meant to use |= rather than !=.
And operations/file_size.cc gets -Wsign-compare warnings.
* testsuite/27_io/filesystem/operations/all.cc: Mark unused variable.
* testsuite/27_io/filesystem/operations/copy.cc: Fix typo.
* testsuite/experimental/filesystem/operations/copy.cc: Likewise.
* testsuite/27_io/filesystem/operations/file_size.cc: Use correct type
for return value, and in comparison.
* testsuite/experimental/filesystem/operations/file_size.cc: Likewise.
Uros Bizjak [Thu, 5 Mar 2020 16:51:11 +0000 (17:51 +0100)]
testsuite: Compile asan_test.C with -Wno-alloc-size-larger-than
asan_test.cc tries to allocate 0xf0000000 bytes for 32bit targets in
a disabled DISABLED_DemoOOM test. Since the testcase is compiled with
-Werror, the compilation fails with:
error: argument 1 value '
4026531840' exceeds maximum object size
2147483647
Compile with -Wno-alloc-size-larger-than to avoid compilation failure.
* g++.dg/asan/asan_test.C (dg-options): Add
-Wno-alloc-size-larger-than.
Jonathan Wakely [Thu, 5 Mar 2020 16:46:28 +0000 (16:46 +0000)]
libstdc++: allow string_view insertion to work with <iosfwd> (PR 94051)
I don't think this is actually required to compile, because using
operator<< without a definition of the ostream doesn't seem valid to me.
But it's easy to make it work.
PR libstdc++/94051
* include/std/string_view: Include <bits/ostream_insert.h>.
* testsuite/21_strings/basic_string_view/inserters/94051.cc: New test.
Jakub Jelinek [Thu, 5 Mar 2020 15:59:58 +0000 (16:59 +0100)]
testsuite: Add testcase for already fixed PR [PR90311]
2020-03-05 Jakub Jelinek <jakub@redhat.com>
PR target/90311
* gcc.c-torture/execute/pr90311.c: New test.
Jeff Law [Thu, 5 Mar 2020 15:46:20 +0000 (08:46 -0700)]
Future proofing this test.
* gcc.target/arm/fuse-caller-save.c: Generalize expected output.
Jason Merrill [Thu, 5 Mar 2020 15:11:36 +0000 (10:11 -0500)]
c++: Add test for PR91607.
PR c++/91607
* g++.dg/cpp0x/constexpr-const3.C: New.
Steven G. Kargl [Thu, 5 Mar 2020 11:41:14 +0000 (11:41 +0000)]
Fortran: ICE in gfc_code2string PR93792
A BOZ constant can not appear as a component inialiser for a derived
type.
gcc/fortran/ChangeLog:
PR93792
* decl.c (variable_decl): If param and initializer check
for BOZ, if found, output an error, set m to MATCH_ERROR
and goto cleanup.
gcc/testsuite/ChangeLog:
PR93792
* gfortran.dg/pr93792.f90: New test.
Delia Burduv [Thu, 5 Mar 2020 11:18:04 +0000 (11:18 +0000)]
[AArch32] ACLE intrinsics bfloat16 vmmla and vfma<b/t> for AArch32 AdvSIMD
This patch adds the ARMv8.6 ACLE intrinsics for vmmla, vfmab and vfmat
as part of the BFloat16 extension.
(https://developer.arm.com/docs/101028/latest.)
The intrinsics are declared in arm_neon.h and the RTL patterns are
defined in neon.md.
Two new tests are added to check assembler output and lane indices.
2020-03-05 Delia Burduv <delia.burduv@arm.com>
* config/arm/arm_neon.h (vbfmmlaq_f32): New.
(vbfmlalbq_f32): New.
(vbfmlaltq_f32): New.
(vbfmlalbq_lane_f32): New.
(vbfmlaltq_lane_f32): New.
(vbfmlalbq_laneq_f32): New.
(vbfmlaltq_laneq_f32): New.
* config/arm/arm_neon_builtins.def (vmmla): New.
(vfmab): New.
(vfmat): New.
(vfmab_lane): New.
(vfmat_lane): New.
(vfmab_laneq): New.
(vfmat_laneq): New.
* config/arm/iterators.md (BF_MA): New int iterator.
(bt): New int attribute.
(VQXBF): Copy of VQX with V8BF.
* config/arm/neon.md (neon_vmmlav8bf): New insn.
(neon_vfma<bt>v8bf): New insn.
(neon_vfma<bt>_lanev8bf): New insn.
(neon_vfma<bt>_laneqv8bf): New expand.
(neon_vget_high<mode>): Changed iterator to VQXBF.
* config/arm/unspecs.md (UNSPEC_BFMMLA): New UNSPEC.
(UNSPEC_BFMAB): New UNSPEC.
(UNSPEC_BFMAT): New UNSPEC.
2020-03-05 Delia Burduv <delia.burduv@arm.com>
* gcc.target/arm/simd/bf16_ma_1.c: New test.
* gcc.target/arm/simd/bf16_ma_2.c: New test.
* gcc.target/arm/simd/bf16_mmla_1.c: New test.
Srinath Parvathaneni [Thu, 5 Mar 2020 11:07:11 +0000 (11:07 +0000)]
[PATCH][GCC]: Add myself to MAINTAINERS
Jakub Jelinek [Thu, 5 Mar 2020 08:12:44 +0000 (09:12 +0100)]
print-rtl: Fix printing of CONST_STRING in DEBUG_INSNs [PR93399]
The following testcase fails to assemble, as CONST_STRING in the DEBUG_INSNs
is printed as is, so if it contains \n and/or \r, we are in trouble:
.loc 1 14 3
# DEBUG haystack => [si]
# DEBUG needle => "
"
In the gimple dumps we print those (STRING_CSTs) as
# DEBUG haystack => D#1
# DEBUG needle => "\n"
so this patch uses what we use in tree printing for the CONST_STRINGs too.
2020-03-05 Jakub Jelinek <jakub@redhat.com>
PR middle-end/93399
* tree-pretty-print.h (pretty_print_string): Declare.
* tree-pretty-print.c (pretty_print_string): Remove forward
declaration, no longer static. Change nbytes parameter type
from unsigned to size_t.
* print-rtl.c (print_value) <case CONST_STRING>: Use
pretty_print_string and for shrink way too long strings.
* gcc.dg/pr93399.c: New test.
Richard Biener [Thu, 5 Mar 2020 07:44:11 +0000 (08:44 +0100)]
Keep .GCC.command.line sections of LTO objetcs
This patch is for .GCC.command.line sections in LTO objects to be copied
into the final objects as in the following example:
[egeyar@localhost lto]$ gcc -flto -O3 demo.c -c -g --record-gcc-command-line
[egeyar@localhost lto]$ gcc -flto -O2 demo2.c -c -g --record-gcc-command-line -DFORTIFY=2
[egeyar@localhost lto]$ gcc demo.o demo2.o -o a.out
[egeyar@localhost lto]$ readelf -p .GCC.command.line a.out
String dump of section '.GCC.command.line':
[ 0] 10.0.1
20200227 (experimental) : gcc -flto -O3 demo.c -c -g --record-gcc-command-line
[ 56] 10.0.1
20200227 (experimental) : gcc -flto -O2 demo2.c -c -g --record-gcc-command-line -DFORTIFY=2
2020-03-05 Egeyar Bagcioglu <egeyar.bagcioglu@oracle.com>
* simple-object.c (handle_lto_debug_sections): Name
".GCC.command.line" among debug sections to be copied over
from lto objects.
Jakub Jelinek [Thu, 5 Mar 2020 07:00:04 +0000 (08:00 +0100)]
sccvn: Fix handling of POINTER_PLUS_EXPR in memset offset [PR93582]
> > where POINTER_PLUS_EXPR last operand has sizetype type, thus unsigned,
> > and in the testcase gimple_assign_rhs2 (def) is thus 0xf000000000000001ULL
> > which multiplied by 8 doesn't fit into signed HWI. If it would be treated
> > as signed offset instead, it would fit (-0xfffffffffffffffLL, multiplied
> > by 8 is -0x7ffffffffffffff8LL). Unfortunately with the poly_int obfuscation
> > I'm not sure how to convert it from unsigned to signed poly_int.
>
> mem_ref_offset provides a boiler-plate for this:
>
> poly_offset_int::from (wi::to_poly_wide (TREE_OPERAND (t, 1)), SIGNED);
Thanks, that seems to work.
The test now works on both big-endian and little-endian.
2020-03-05 Richard Biener <rguenther@suse.de>
Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/93582
* tree-ssa-sccvn.c (vn_reference_lookup_3): Treat POINTER_PLUS_EXPR
last operand as signed when looking for memset offset. Formatting
fix.
* gcc.dg/tree-ssa/pr93582-11.c: New test.
Co-authored-by: Richard Biener <rguenther@suse.de>
Martin Sebor [Thu, 5 Mar 2020 01:19:31 +0000 (18:19 -0700)]
PR c++/90938 - Initializing array with {1} works but not {0}
gcc/cp/ChangeLog:
PR c++/90938
* tree.c (type_initializer_zero_p): Fail for structs initialized
with non-structs.
gcc/testsuite/ChangeLog:
PR c++/90938
* g++.dg/init/array55.C: New test.
* g++.dg/init/array56.C: New test.
* g++.dg/cpp2a/nontype-class33.C: New test.
GCC Administrator [Thu, 5 Mar 2020 00:16:34 +0000 (00:16 +0000)]
Daily bump.
Jeff Law [Wed, 4 Mar 2020 23:25:11 +0000 (16:25 -0700)]
Fix format warning which showed up on FreeBSD 11.3.
PR bootstrap/93962
* value-prof.c (dump_histogram_value): Use std::abs.
Jason Merrill [Wed, 4 Mar 2020 17:08:42 +0000 (12:08 -0500)]
c++: Fix [[no_unique_address]] and default mem-init [PR90432]
output_constructor doesn't like two consecutive entries with fields at the
same position; let's avoid adding the one for the empty field.
gcc/cp/ChangeLog
2020-03-04 Jason Merrill <jason@redhat.com>
PR c++/90432
* init.c (perform_member_init): Don't do aggregate initialization of
empty field.
* constexpr.c (cx_check_missing_mem_inits): Don't enforce
initialization of empty field.
Martin Sebor [Wed, 4 Mar 2020 22:14:49 +0000 (15:14 -0700)]
PR tree-optimization/93986 - ICE on mixed-precision wide_int arguments
gcc/testsuite/ChangeLog:
PR tree-optimization/93986
* gcc.dg/pr93986.c: New test.
gcc/ChangeLog:
PR tree-optimization/93986
* tree-ssa-strlen.c (maybe_warn_overflow): Convert all wide_int
operands to the same precision widest_int to avoid ICEs.
David Malcolm [Thu, 20 Feb 2020 13:44:23 +0000 (08:44 -0500)]
analyzer: validate region subclasses
This patch converts region::validate to a vfunc, implementing
additional checking per subclass: verifying that various
region_id fields within map_region, array_region, stack_region and
root_region are valid, rather than just those within the base class.
Doing so caught bugs earlier in follow-up work I have on
canonicalization and purging of region_model.
gcc/analyzer/ChangeLog:
* region-model.cc (region::validate): Convert model param from ptr
to reference. Update comment to reflect that it's now a vfunc.
(map_region::validate): New vfunc implementation.
(array_region::validate): New vfunc implementation.
(stack_region::validate): New vfunc implementation.
(root_region::validate): New vfunc implementation.
(region_model::validate): Pass a reference rather than a pointer
to the region::validate vfunc.
* region-model.h (region::validate): Make virtual. Convert model
param from ptr to reference.
(map_region::validate): New vfunc decl.
(array_region::validate): New vfunc decl.
(stack_region::validate): New vfunc decl.
(root_region::validate): New vfunc decl.
David Malcolm [Wed, 4 Mar 2020 17:10:34 +0000 (12:10 -0500)]
analyzer: add regression test for fixed ICE [PR94028]
The C++ reproducer for PR analyzer/94028 generates a similar ICE
to that of the Fortran reproducer for PR analyzer/93993 and, like
it, was fixed by r10-7023-g3d66e153b40ed000af30a9e569a05f34d5d576aa.
This patch adds the C++ reproducer as a regression test.
gcc/testsuite/ChangeLog:
PR analyzer/94028
* g++.dg/analyzer/pr94028.C: New test.
Martin Sebor [Wed, 4 Mar 2020 17:23:49 +0000 (10:23 -0700)]
PR middle-end/81401 - false positive -Wformat-overflow in a loop
gcc/testsuite/ChangeLog:
* gcc.dg/tree-ssa/builtin-sprintf-warn-24.c: New test.
Will Schmidt [Wed, 4 Mar 2020 16:11:45 +0000 (10:11 -0600)]
Remove unnecessary XFAILs from existing testcase
20050603-3.c.
The XFAILs in this testcase (
20050603-3.c) are no longer necessary
since the fix to PR68803 was committed with svn revision r242681.
2020-03-04 Will Schmidt <will_schmidt@vnet.ibm.com>
testsuite
* gcc.target/powerpc/
20050603-3.c: Remove XFAILS.
Will Schmidt [Wed, 4 Mar 2020 16:05:17 +0000 (10:05 -0600)]
Add dg-require to existing powerpc/pr93122.c test
2020-03-04 Will Schmidt <will_schmidt@vnet.ibm.com>
* gcc.target/powerpc/pr93122.c: Add dg-require.
David Malcolm [Tue, 3 Mar 2020 21:36:13 +0000 (16:36 -0500)]
analyzer: handle __builtin_expect [PR93993]
The false warning:
pr93993.f90:19:0:
19 | allocate (tm) ! { dg-warning "dereference of possibly-NULL" }
|
Warning: dereference of possibly-NULL ‘_6’ [CWE-690] [-Wanalyzer-possible-null-dereference]
in the reproducer for PR analyzer/93993 is due to a BUILTIN_EXPECT in
the chain of SSA expressions between the malloc and the condition
guarding the edge: the analyzer didn't "know" about the relationship
between initial argument to BUILTIN_EXPECT and the return value.
This patch implements support for BUILTIN_EXPECT so that the return
value is known to be equal to the initial argument. This adds
constraints when exploring the CFG edges, eliminating the above
false positive.
Doing so also eliminated the leak warning from the reproducer. The
issue was that leaked_pvs was empty within
impl_region_model_context::on_state_leak, due to the leaking region
being a view, of type struct Pdtet_8 *, of a region of type
struct pdtet_8 *, which led region_model::get_representative_path_var to
return a NULL_TREE value.
Hence the patch also implements view support for
region_model::get_representative_path_var, restoring the leak
diagnostic, albeit changing the wording to:
Warning: leak of ‘(struct Pdtet_8) qb’ [CWE-401] [-Wanalyzer-malloc-leak]
It's not clear to me if we should emit leaks at a fortran "end program"
(currently we suppress them for leaks at the end of main).
gcc/analyzer/ChangeLog:
PR analyzer/93993
* region-model.cc (region_model::on_call_pre): Handle
BUILT_IN_EXPECT and its variants.
(region_model::add_any_constraints_from_ssa_def_stmt): Split out
gassign handling into add_any_constraints_from_gassign; add gcall
handling.
(region_model::add_any_constraints_from_gassign): New function,
based on the above. Add handling for NOP_EXPR.
(region_model::add_any_constraints_from_gcall): New function.
(region_model::get_representative_path_var): Handle views.
* region-model.h
(region_model::add_any_constraints_from_ssa_def_stmt): New decl.
(region_model::add_any_constraints_from_gassign): New decl.
gcc/testsuite/ChangeLog:
PR analyzer/93993
* gcc.dg/analyzer/expect-1.c: New test.
* gcc.dg/analyzer/malloc-4.c: New test.
* gfortran.dg/analyzer/pr93993.f90: Remove xfail from dg-bogus.
Move location of leak warning and update message.
David Malcolm [Tue, 3 Mar 2020 15:53:04 +0000 (10:53 -0500)]
analyzer: fix ICE on non-lvalue in prune_for_sm_diagnostic [PR93993]
PR analyzer/93993 reports another ICE within
diagnostic_manager::prune_for_sm_diagnostic in which the expression
of interest becomes a non-lvalue (similar to PR 93544, PR 93647, and
PR 93950), due to attempting to get an lvalue for a non-lvalue with a
NULL context, leading to an ICE when the failure is reported to
make_region_for_unexpected_tree_code. The tree in question is
an ADDR_EXPR of a VAR_DECL, due to:
event 11: switching var of interest from ‘tm’ in callee to ‘&qb’ in caller
This patch adds more bulletproofing to the routine by introducing
a tentative_region_model_context class that can be passed in such
circumstances which records that an error occurred, and then
checking to see if an error was recorded, thus avoiding the ICE.
This is papering over the problem, but a better solution seems more
like stage 1 material.
The patch also refactors the error-checking for CONSTANT_CLASS_P.
The testcase pr93993.f90 has a false positive:
pr93993.f90:19:0:
19 | allocate (tm) ! { dg-warning "dereference of possibly-NULL" }
|
Warning: dereference of possibly-NULL ‘_6’ [CWE-690] [-Wanalyzer-possible-null-dereference]
which appears to be a pre-existing bug affecting any allocate call in
Fortran, which I will fix in a followup.
gcc/analyzer/ChangeLog:
PR analyzer/93993
* checker-path.h (state_change_event::get_lvalue): Add ctxt param
and pass it to region_model::get_value call.
* diagnostic-manager.cc (get_any_origin): Pass a
tentative_region_model_context to the calls to get_lvalue and reject
the comparison if errors occur.
(can_be_expr_of_interest_p): New function.
(diagnostic_manager::prune_for_sm_diagnostic): Replace checks for
CONSTANT_CLASS_P with calls to update_for_unsuitable_sm_exprs.
Pass a tentative_region_model_context to the calls to
state_change_event::get_lvalue and reject the comparison if errors
occur.
(diagnostic_manager::update_for_unsuitable_sm_exprs): New.
* diagnostic-manager.h
(diagnostic_manager::update_for_unsuitable_sm_exprs): New decl.
* region-model.h (class tentative_region_model_context): New class.
gcc/testsuite/ChangeLog:
PR analyzer/93993
* gfortran.dg/analyzer/pr93993.f90: New test.
David Malcolm [Tue, 3 Mar 2020 21:45:56 +0000 (16:45 -0500)]
analyzer: remove unused private fields
gcc/analyzer/ChangeLog:
* engine.cc (worklist::worklist): Remove unused field m_eg.
(class viz_callgraph_edge): Remove unused field m_call_sedge.
(class viz_callgraph): Remove unused field m_sg.
* exploded-graph.h (worklist::::m_eg): Remove unused field.
Jonathan Wakely [Wed, 4 Mar 2020 15:34:05 +0000 (15:34 +0000)]
libstdc++: Fix comment on __memcpyable
The discussion of iterator_traits<volatile T*>::value_type and the
example with three tempalte arguments related to an earlier version of
the patch, not the one committed.
Also improve the comment on __memcmpable.
* include/bits/cpp_type_traits.h (__memcpyable): Fix comment.
Bill Schmidt [Wed, 4 Mar 2020 13:30:29 +0000 (07:30 -0600)]
rs6000: Fix -mpower9-vector -mno-altivec ICE (PR87560)
PR87560 reports an ICE when a test case is compiled with -mpower9-vector
and -mno-altivec. This patch terminates compilation with an error when
this combination (and other unreasonable ones) are requested.
Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no
regressions. Reported error is now:
f951: Error: '-mno-altivec' turns off '-mpower9-vector'
2020-03-02 Bill Schmidt <wschmidt@linux.ibm.com>
PR target/87560
* rs6000-cpus.def (OTHER_ALTIVEC_MASKS): New #define.
* rs6000.c (rs6000_disable_incompatible_switches): Add table entry
for OPTION_MASK_ALTIVEC.
Andreas Krebbel [Wed, 4 Mar 2020 12:29:39 +0000 (13:29 +0100)]
IBM Z: zTPF: Include glibc-stdint.h to get __UINTPTR_TYPE__ defined
Building a zTPF cross currently fails when building libstdc++
complaining about the __UINTPTR_TYPE__ to be missing.
Fixed by including the glibc-stdint.h header.
2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
* config.gcc: Include the glibc-stdint.h header for zTPF.
Andreas Krebbel [Wed, 4 Mar 2020 12:29:39 +0000 (13:29 +0100)]
IBM Z: zTPF: Prevent FPR usage
For the zTPF we must not use floating point registers.
gcc/ChangeLog:
2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
* config/s390/s390.c (s390_secondary_memory_needed): Disallow
direct FPR-GPR copies.
(s390_register_info_gprtofpr): Disallow GPR content to be saved in
FPRs.