platform/upstream/linaro-gcc.git
8 years ago gcc/
Yvan Roux [Sun, 4 Sep 2016 11:19:10 +0000 (13:19 +0200)]
gcc/
Backport from trunk r238712.
2016-07-25  Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64.c (aarch64_add_constant): New parameter "mode".
Use aarch64_internal_mov_immediate instead of aarch64_build_constant.
(aarch64_output_mi_thunk): Pass Pmode when calling aarch64_add_constant.
(aarch64_build_constant): Delete.

gcc/
Backport from trunk r238713.
2016-07-25  Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64.c (aarch64_add_constant): Optimize instruction
sequences.

gcc/
Backport from trunk r238714.
2016-07-25  Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64.c (aarch64_add_constant): New parameter
"frame_related_p".  Generate CFA annotation when it's necessary.
(aarch64_expand_prologue): Use aarch64_add_constant.
(aarch64_expand_epilogue): Likewise.
(aarch64_output_mi_thunk): Pass "false" when calling
aarch64_add_constant.

Change-Id: Ia3b32d4fb5fa8f322bf579f1ee753c78ece429d8

8 years ago libgcc/
Yvan Roux [Sun, 4 Sep 2016 11:17:35 +0000 (13:17 +0200)]
libgcc/
Backport from trunk r238584.
2016-07-21  Aurelien Jarno <aurelien@aurel32.net>

PR target/59833
* config/arm/ieee754-df.S (extendsfdf2): Convert sNaN to qNaN.

Change-Id: Ic9f475b0bc3bf1c5eb473b0cb9c05df69930ec72

8 years ago gcc/
Yvan Roux [Sun, 4 Sep 2016 11:16:30 +0000 (13:16 +0200)]
gcc/
Backport from trunk r238010.
2016-07-05  Jiong Wang  <jiong.wang@arm.com>

* lra-constraints.c (process_alt_operands): Don't add spilling cost for
"offmemok".

Change-Id: I0cdc8ccb1642c7d23373ab14a6ff41d9bf4da844

8 years ago gcc/
Yvan Roux [Sun, 4 Sep 2016 11:15:56 +0000 (13:15 +0200)]
gcc/
Backport from trunk r237882.
2016-06-30  James Greenhalgh  <james.greenhalgh@arm.com>
    Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/aarch64/aarch64-simd.md (*aarch64_simd_vec_copy_lane<mode>):
New define_insn.
(*aarch64_simd_vec_copy_lane_<vswap_width_name><mode>): Likewise.

gcc/testsuite/
Backport from trunk r237882.
2016-06-30  James Greenhalgh  <james.greenhalgh@arm.com>
    Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* gcc.target/aarch64/vget_set_lane_1.c: New test.

gcc/
Backport from trunk r237883.
2016-06-30  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
    James Greenhalgh  <james.greenhalgh@arm.com>

* config/aarch64/arm_neon.h (vcopyq_lane_f32, vcopyq_lane_f64,
vcopyq_lane_p8, vcopyq_lane_p16, vcopyq_lane_s8, vcopyq_lane_s16,
vcopyq_lane_s32, vcopyq_lane_s64, vcopyq_lane_u8, vcopyq_lane_u16,
vcopyq_lane_u32, vcopyq_lane_u64): Reimplement in C.
(vcopy_lane_f32, vcopy_lane_f64, vcopy_lane_p8, vcopy_lane_p16,
vcopy_lane_s8, vcopy_lane_s16, vcopy_lane_s32, vcopy_lane_s64,
vcopy_lane_u8, vcopy_lane_u16, vcopy_lane_u32, vcopy_lane_u64,
vcopy_laneq_f32, vcopy_laneq_f64, vcopy_laneq_p8, vcopy_laneq_p16,
vcopy_laneq_s8, vcopy_laneq_s16, vcopy_laneq_s32, vcopy_laneq_s64,
vcopy_laneq_u8, vcopy_laneq_u16, vcopy_laneq_u32, vcopy_laneq_u64,
vcopyq_laneq_f32, vcopyq_laneq_f64, vcopyq_laneq_p8, vcopyq_laneq_p16,
vcopyq_laneq_s8, vcopyq_laneq_s16, vcopyq_laneq_s32, vcopyq_laneq_s64,
vcopyq_laneq_u8, vcopyq_laneq_u16, vcopyq_laneq_u32, vcopyq_laneq_u64):
New intrinsics.

gcc/testsuite/
Backport from trunk r237883.
2016-06-30  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
    James Greenhalgh  <james.greenhalgh@arm.com>

* gcc.target/aarch64/vect_copy_lane_1.c: New test.

Change-Id: Iea96b070d229db7d5525615dc976a1b05320485c

8 years ago gcc/
Christophe Lyon [Thu, 25 Aug 2016 13:38:54 +0000 (15:38 +0200)]
gcc/
Backport from trunk r237956.
2016-07-04  Matthew Wahab  <matthew.wahab@arm.com>
    Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64-arches.def: Add "armv8.2-a".
* config/aarch64/aarch64.h (AARCH64_FL_V8_2): New.
(AARCH64_FL_F16): New.
(AARCH64_FL_FOR_ARCH8_2): New.
(AARCH64_ISA_8_2): New.
(AARCH64_ISA_F16): New.
(TARGET_FP_F16INST): New.
(TARGET_SIMD_F16INST): New.
* config/aarch64/aarch64-option-extensions.def ("fp16"): New entry.
("fp"): Disabling "fp" also disables "fp16".
* config/aarch64/aarch64-c.c (arch64_update_cpp_builtins): Conditionally define
__ARM_FEATURE_FP16_SCALAR_ARITHMETIC and __ARM_FEATURE_FP16_VECTOR_ARITHMETIC.
* doc/invoke.texi (AArch64 Options): Document "armv8.2-a" and "fp16".

gcc/
Backport from trunk r238715.
2016-07-25  Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64-simd.md
(aarch64_<PERMUTE:perm_insn><PERMUTE:perm_hilo><mode>): Use VALL_F16.
(aarch64_ext<mode>): Likewise.
(aarch64_rev<REVERSE:rev_op><mode>): Likewise.
* config/aarch64/aarch64.c (aarch64_evpc_trn, aarch64_evpc_uzp,
aarch64_evpc_zip, aarch64_evpc_ext, aarch64_evpc_rev): Support V4HFmode
and V8HFmode.
* config/aarch64/arm_neon.h (__INTERLEAVE_LIST): Support float16x4_t,
float16x8_t.
(__aarch64_vdup_lane_f16, __aarch64_vdup_laneq_f16,
__aarch64_vdupq_lane_f16, __aarch64_vdupq_laneq_f16, vbsl_f16,
vbslq_f16, vdup_n_f16, vdupq_n_f16, vdup_lane_f16, vdup_laneq_f16,
vdupq_lane_f16, vdupq_laneq_f16, vduph_lane_f16, vduph_laneq_f16,
vext_f16, vextq_f16, vmov_n_f16, vmovq_n_f16, vrev64_f16, vrev64q_f16,
vtrn1_f16, vtrn1q_f16, vtrn2_f16, vtrn2q_f16, vtrn_f16, vtrnq_f16,
vuzp1_f16, vuzp1q_f16, vuzp2_f16, vuzp2q_f16, vzip1_f16, vzip2q_f16):
New.
(vmov_n_f16): Reimplement using vdup_n_f16.
(vmovq_n_f16): Reimplement using vdupq_n_f16.

gcc/
Backport from trunk r238716.
2016-07-25  Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64-builtins.c (TYPES_BINOP_USS): New.
* config/aarch64/aarch64-simd-builtins.def: Register new builtins.
* config/aarch64/aarch64-simd.md (aarch64_rsqrte<mode>): Extend to HF modes.
(neg<mode>2): Likewise.
(abs<mode>2): Likewise.
(<frint_pattern><mode>2): Likewise.
(l<fcvt_pattern><su_optab><VDQF:mode><fcvt_target>2): Likewise.
(<optab><VDQF:mode><fcvt_target>2): Likewise.
(<fix_trunc_optab><VDQF:mode><fcvt_target>2): Likewise.
(ftrunc<VDQF:mode>2): Likewise.
(<optab><fcvt_target><VDQF:mode>2): Likewise.
(sqrt<mode>2): Likewise.
(*sqrt<mode>2): Likewise.
(aarch64_frecpe<mode>): Likewise.
(aarch64_cm<optab><mode>): Likewise.
* config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Return false for
HF, V4HF and V8HF.
* config/aarch64/iterators.md (VHSDF, VHSDF_DF, VHSDF_SDF): New.
(VDQF_COND, fcvt_target, FCVT_TARGET, hcon): Extend mode attribute to HF modes.
(stype): New.
* config/aarch64/arm_neon.h (vdup_n_f16): New.
(vdupq_n_f16): Likewise.
(vld1_dup_f16): Use vdup_n_f16.
(vld1q_dup_f16): Use vdupq_n_f16.
(vabs_f16, vabsq_f16, vceqz_f16, vceqzq_f16, vcgez_f16, vcgezq_f16,
vcgtz_f16, vcgtzq_f16, vclez_f16, vclezq_f16, vcltz_f16, vcltzq_f16,
vcvt_f16_s16, vcvtq_f16_s16, vcvt_f16_u16, vcvtq_f16_u16, vcvt_s16_f16,
vcvtq_s16_f16, vcvt_u16_f16, vcvtq_u16_f16, vcvta_s16_f16,
vcvtaq_s16_f16, vcvta_u16_f16, vcvtaq_u16_f16, vcvtm_s16_f16,
vcvtmq_s16_f16, vcvtm_u16_f16, vcvtmq_u16_f16, vcvtn_s16_f16,
vcvtnq_s16_f16, vcvtn_u16_f16, vcvtnq_u16_f16, vcvtp_s16_f16,
vcvtpq_s16_f16, vcvtp_u16_f16, vcvtpq_u16_f16, vneg_f16, vnegq_f16,
vrecpe_f16, vrecpeq_f16, vrnd_f16, vrndq_f16, vrnda_f16, vrndaq_f16,
vrndi_f16, vrndiq_f16, vrndm_f16, vrndmq_f16, vrndn_f16, vrndnq_f16,
vrndp_f16, vrndpq_f16, vrndx_f16, vrndxq_f16, vrsqrte_f16, vrsqrteq_f16,
vsqrt_f16, vsqrtq_f16): New.

gcc/
Backport from trunk r238717.
2016-07-25  Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64-simd-builtins.def: Register new builtins.
* config/aarch64/aarch64-simd.md
(aarch64_rsqrts<mode>): Extend to HF modes.
(fabd<mode>3): Likewise.
(<FCVT_F2FIXED:fcvt_fixed_insn><VHSDF_SDF:mode>3): Likewise.
(<FCVT_FIXED2F:fcvt_fixed_insn><VHSDI_SDI:mode>3): Likewise.
(aarch64_<maxmin_uns>p<mode>): Likewise.
(<su><maxmin><mode>3): Likewise.
(<maxmin_uns><mode>3): Likewise.
(<fmaxmin><mode>3): Likewise.
(aarch64_faddp<mode>): Likewise.
(aarch64_fmulx<mode>): Likewise.
(aarch64_frecps<mode>): Likewise.
(*aarch64_fac<optab><mode>): Rename to aarch64_fac<optab><mode>.
(add<mode>3): Extend to HF modes.
(sub<mode>3): Likewise.
(mul<mode>3): Likewise.
(div<mode>3): Likewise.
(*div<mode>3): Likewise.
* config/aarch64/aarch64.c (aarch64_emit_approx_div): Return false for
HF, V4HF and V8HF.
* config/aarch64/iterators.md (VDQ_HSDI, VSDQ_HSDI): New mode iterator.
* config/aarch64/arm_neon.h (vadd_f16, vaddq_f16, vabd_f16, vabdq_f16,
vcage_f16, vcageq_f16, vcagt_f16, vcagtq_f16, vcale_f16, vcaleq_f16,
vcalt_f16, vcaltq_f16, vceq_f16, vceqq_f16, vcge_f16, vcgeq_f16,
vcgt_f16, vcgtq_f16, vcle_f16, vcleq_f16, vclt_f16, vcltq_f16,
vcvt_n_f16_s16, vcvtq_n_f16_s16, vcvt_n_f16_u16, vcvtq_n_f16_u16,
vcvt_n_s16_f16, vcvtq_n_s16_f16, vcvt_n_u16_f16, vcvtq_n_u16_f16,
vdiv_f16, vdivq_f16, vdup_lane_f16, vdup_laneq_f16, vdupq_lane_f16,
vdupq_laneq_f16, vdups_lane_f16, vdups_laneq_f16, vmax_f16, vmaxq_f16,
vmaxnm_f16, vmaxnmq_f16, vmin_f16, vminq_f16, vminnm_f16, vminnmq_f16,
vmul_f16, vmulq_f16, vmulx_f16, vmulxq_f16, vpadd_f16, vpaddq_f16,
vpmax_f16, vpmaxq_f16, vpmaxnm_f16, vpmaxnmq_f16, vpmin_f16, vpminq_f16,
vpminnm_f16, vpminnmq_f16, vrecps_f16, vrecpsq_f16, vrsqrts_f16,
vrsqrtsq_f16, vsub_f16, vsubq_f16): New.

gcc/
Backport from trunk r238718.
2016-07-25  Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64-simd-builtins.def: Register new builtins.
* config/aarch64/aarch64-simd.md (fma<mode>4, fnma<mode>4): Extend to HF
modes.
* config/aarch64/arm_neon.h (vfma_f16, vfmaq_f16, vfms_f16,
vfmsq_f16): New.

gcc/
Backport from trunk r238719.
2016-07-25  Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64-simd.md (*aarch64_mulx_elt_to_64v2df): Rename to
"*aarch64_mulx_elt_from_dup<mode>".
(*aarch64_mul3_elt<mode>): Update schedule type.
(*aarch64_mul3_elt_from_dup<mode>): Likewise.
(*aarch64_fma4_elt_from_dup<mode>): Likewise.
(*aarch64_fnma4_elt_from_dup<mode>): Likewise.
* config/aarch64/iterators.md (VMUL): Supprt half precision float modes.
(f, fp): Support HF modes.
* config/aarch64/arm_neon.h (vfma_lane_f16, vfmaq_lane_f16,
vfma_laneq_f16, vfmaq_laneq_f16, vfma_n_f16, vfmaq_n_f16, vfms_lane_f16,
vfmsq_lane_f16, vfms_laneq_f16, vfmsq_laneq_f16, vfms_n_f16,
vfmsq_n_f16, vmul_lane_f16, vmulq_lane_f16, vmul_laneq_f16,
vmulq_laneq_f16, vmul_n_f16, vmulq_n_f16, vmulx_lane_f16,
vmulxq_lane_f16, vmulx_laneq_f16, vmulxq_laneq_f16): New.

gcc/
Backport from trunk r238721.
2016-07-25  Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64-simd-builtins.def (reduc_smax_scal_,
reduc_smin_scal_): Use VDQIF_F16.
(reduc_smax_nan_scal_, reduc_smin_nan_scal_): Use VHSDF.
* config/aarch64/aarch64-simd.md (reduc_<maxmin_uns>_scal_<mode>):
Use VHSDF.
(aarch64_reduc_<maxmin_uns>_internal<mode>): Likewise.
* config/aarch64/iterators.md (VDQIF_F16): New.
(vp): Support HF modes.
* config/aarch64/arm_neon.h (vmaxv_f16, vmaxvq_f16, vminv_f16,
vminvq_f16, vmaxnmv_f16, vmaxnmvq_f16, vminnmv_f16, vminnmvq_f16): New.

gcc/
Backport from trunk r238722.
2016-07-25  Jiong Wang  <jiong.wang@arm.com>

* config.gcc (aarch64*-*-*): Install arm_fp16.h.
* config/aarch64/aarch64-builtins.c (hi_UP): New.
* config/aarch64/aarch64-simd-builtins.def: Register new builtins.
* config/aarch64/aarch64-simd.md (aarch64_frsqrte<mode>): Extend to HF
mode.
(aarch64_frecp<FRECP:frecp_suffix><mode>): Likewise.
(aarch64_cm<optab><mode>): Likewise.
* config/aarch64/aarch64.md (<frint_pattern><mode>2): Likewise.
(l<fcvt_pattern><su_optab><GPF:mode><GPI:mode>2): Likewise.
(fix_trunc<GPF:mode><GPI:mode>2): Likewise.
(sqrt<mode>2): Likewise.
(*sqrt<mode>2): Likewise.
(abs<mode>2): Likewise.
(<optab><mode>hf2): New pattern for HF mode.
(<optab>hihf2): Likewise.
* config/aarch64/arm_neon.h: Include arm_fp16.h.
* config/aarch64/iterators.md (GPF_F16, GPI_F16, VHSDF_HSDF): New.
(w1, w2, v, s, q, Vmtype, V_cmp_result, fcvt_iesize, FCVT_IESIZE):
Support HF mode.
* config/aarch64/arm_fp16.h: New file.
(vabsh_f16, vceqzh_f16, vcgezh_f16, vcgtzh_f16, vclezh_f16, vcltzh_f16,
vcvth_f16_s16, vcvth_f16_s32, vcvth_f16_s64, vcvth_f16_u16,
vcvth_f16_u32, vcvth_f16_u64, vcvth_s16_f16, vcvth_s32_f16,
vcvth_s64_f16, vcvth_u16_f16, vcvth_u32_f16, vcvth_u64_f16,
vcvtah_s16_f16, vcvtah_s32_f16, vcvtah_s64_f16, vcvtah_u16_f16,
vcvtah_u32_f16, vcvtah_u64_f16, vcvtmh_s16_f16, vcvtmh_s32_f16,
vcvtmh_s64_f16, vcvtmh_u16_f16, vcvtmh_u32_f16, vcvtmh_u64_f16,
vcvtnh_s16_f16, vcvtnh_s32_f16, vcvtnh_s64_f16, vcvtnh_u16_f16,
vcvtnh_u32_f16, vcvtnh_u64_f16, vcvtph_s16_f16, vcvtph_s32_f16,
vcvtph_s64_f16, vcvtph_u16_f16, vcvtph_u32_f16, vcvtph_u64_f16,
vnegh_f16, vrecpeh_f16, vrecpxh_f16, vrndh_f16, vrndah_f16, vrndih_f16,
vrndmh_f16, vrndnh_f16, vrndph_f16, vrndxh_f16, vrsqrteh_f16,
vsqrth_f16): New.

gcc/
Backport from trunk r238723.
2016-07-25  Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64-simd-builtins.def: Register new builtins.
* config/aarch64/aarch64.md (<FCVT_F2FIXED:fcvt_fixed_insn>hf<mode>3):
New.
(<FCVT_FIXED2F:fcvt_fixed_insn><mode>hf3): Likewise.
(add<mode>3): Likewise.
(sub<mode>3): Likewise.
(mul<mode>3): Likewise.
(div<mode>3): Likewise.
(*div<mode>3): Likewise.
(<fmaxmin><mode>3): Extend to HF.
* config/aarch64/aarch64-simd.md (aarch64_rsqrts<mode>): Likewise.
(fabd<mode>3): Likewise.
(<FCVT_F2FIXED:fcvt_fixed_insn><VHSDF_HSDF:mode>3): Likewise.
(<FCVT_FIXED2F:fcvt_fixed_insn><VHSDI_HSDI:mode>3): Likewise.
(aarch64_fmulx<mode>): Likewise.
(aarch64_fac<optab><mode>): Likewise.
(aarch64_frecps<mode>): Likewise.
(<FCVT_F2FIXED:fcvt_fixed_insn>hfhi3): New.
(<FCVT_FIXED2F:fcvt_fixed_insn>hihf3): Likewise.
* config/aarch64/iterators.md (VHSDF_SDF): Delete.
(VSDQ_HSDI): Support HI.
(fcvt_target, FCVT_TARGET): Likewise.
* config/aarch64/arm_fp16.h (vaddh_f16, vsubh_f16, vabdh_f16,
vcageh_f16, vcagth_f16, vcaleh_f16, vcalth_f16, vceqh_f16, vcgeh_f16,
vcgth_f16, vcleh_f16, vclth_f16, vcvth_n_f16_s16, vcvth_n_f16_s32,
vcvth_n_f16_s64, vcvth_n_f16_u16, vcvth_n_f16_u32, vcvth_n_f16_u64,
vcvth_n_s16_f16, vcvth_n_s32_f16, vcvth_n_s64_f16, vcvth_n_u16_f16,
vcvth_n_u32_f16, vcvth_n_u64_f16, vdivh_f16, vmaxh_f16, vmaxnmh_f16,
vminh_f16, vminnmh_f16, vmulh_f16, vmulxh_f16, vrecpsh_f16,
vrsqrtsh_f16): New.

gcc/
Backport from trunk r238724.
2016-07-25  Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64-simd-builtins.def: Register new builtins.
* config/aarch64/aarch64.md (fma, fnma): Support HF.
* config/aarch64/arm_fp16.h (vfmah_f16, vfmsh_f16): New.

gcc/
Backport from trunk r238725.
2016-07-25  Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/arm_neon.h (vfmah_lane_f16, vfmah_laneq_f16,
vfmsh_lane_f16, vfmsh_laneq_f16, vmulh_lane_f16, vmulh_laneq_f16,
vmulxh_lane_f16, vmulxh_laneq_f16): New.

Change-Id: I8118d32ccb84626ad42afc4181334258c7fc8e5b

8 years ago gcc/
Yvan Roux [Sat, 3 Sep 2016 17:18:07 +0000 (19:18 +0200)]
gcc/
Backport from trunk r237906.
2016-07-01  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/arm/arm.c (thumb_reload_in_hi): Delete.
* config/arm/arm-protos.h (thumb_reload_in_hi): Delete prototype.

Change-Id: I2801bb88ae9aaa978c6389ee8b7c09b365cd4c40

8 years ago gcc/
Yvan Roux [Sat, 3 Sep 2016 17:15:13 +0000 (19:15 +0200)]
gcc/
Backport from trunk r237851.
2016-06-29  Wilco Dijkstra  <wdijkstr@arm.com>

* config/aarch64/aarch64.c (cortexa53_tunings):
Increase loop alignment to 8.  Set function alignment to 16.
(cortexa35_tunings): Likewise.
(cortexa57_tunings): Increase loop alignment to 8.
(cortexa72_tunings): Likewise.
(cortexa73_tunings): Likewise.

Change-Id: I37b0f888f92e5617e27afc56a2ae0f396f3790a9

8 years ago gcc/
Yvan Roux [Sat, 3 Sep 2016 17:13:45 +0000 (19:13 +0200)]
gcc/
Backport from trunk r237705.
2016-06-22  Andreas Schwab  <schwab@suse.de>

* config/aarch64/aarch64-protos.h (aarch64_elf_asm_named_section):
Remove declaration.

Change-Id: I6251c6b1f7bd8440e91e8fe05be586de5f1d5347

8 years ago gcc/
Yvan Roux [Sat, 3 Sep 2016 17:13:21 +0000 (19:13 +0200)]
gcc/
Backport from trunk r237607.
2016-06-20  Wilco Dijkstra  <wdijkstr@arm.com>

* config/aarch64/aarch64.opt
(mpc-relative-literal-loads): Rename internal option name.
* config/aarch64/aarch64.c
(aarch64_nopcrelative_literal_loads): Rename to
aarch64_pcrelative_literal_loads.
(aarch64_expand_mov_immediate): Likewise.
(aarch64_secondary_reload): Likewise.
(aarch64_can_use_per_function_literal_pools_p): Likewise.
(aarch64_override_options_after_change_1): Rename and simplify logic.
(aarch64_classify_symbol): Merge large model checks into switch,
remove pc-relative load check.

Change-Id: Ie45ef06d2a93809b42915c3109121228867862fc

8 years ago gcc/
Yvan Roux [Sat, 3 Sep 2016 17:11:59 +0000 (19:11 +0200)]
gcc/
Backport from trunk r237277.
2016-06-09  Vladimir Makarov  <vmakarov@redhat.com>
    Jiong Wang  <jiong.wang@arm.com>

PR rtl-optimization/70751
* lra-constraints.c (process_alt_operands): Recognize Non-pseudo spilled
into memory.

Change-Id: Id1d56eb327c732269a959b940639656756d56a96

8 years ago gcc/
Christophe Lyon [Tue, 30 Aug 2016 15:52:01 +0000 (17:52 +0200)]
gcc/
Backport from trunk r239610.
2016-08-19  Matthew Wahab  <matthew.wahab@arm.com>

PR target/77281
* config/arm/arm.c (neon_valid_immediate): Delete declaration.
Use const_vec_duplicate to check for duplicated elements.

Change-Id: I34dade1b83eb550f04384a1b2c5c761f2db85904

8 years ago gcc/
Yvan Roux [Fri, 2 Sep 2016 08:09:58 +0000 (10:09 +0200)]
gcc/
Backport from trunk r237884.
2016-06-30  Wilco Dijkstra  <wdijkstr@arm.com>

* config/aarch64/aarch64.c (cortexa35_tunings):
Enable AES fusion.  Use cortexa57_branch_cost.
(cortexa53_tunings): Use cortexa57_branch_cost.
(cortexa72_tunings): Use cortexa57_branch_cost.
Use AUTOPREFETCHER_WEAK.
(cortexa73_tunings): Use cortexa57_branch_cost.

Change-Id: Ic7f824ffc6b19c2761b0e9085109dc8961a1ef58

8 years ago gcc/
Yvan Roux [Fri, 2 Sep 2016 08:09:01 +0000 (10:09 +0200)]
gcc/
Backport from trunk r237597.
2016-06-20  Wilco Dijkstra  <wdijkstr@arm.com>

* config/aarch64/aarch64.c (aarch64_modes_tieable_p):
Allow scalar/single vector modes to be tieable.

Change-Id: I66a08134bfd3a73d65bd84ad3a72bac1756caee4

8 years ago gcc/testsuite/
Yvan Roux [Fri, 2 Sep 2016 08:08:36 +0000 (10:08 +0200)]
gcc/testsuite/
Backport from trunk r237557.
2016-06-17  Christophe Lyon  <christophe.lyon@linaro.org>

* lib/target-supports.exp
(check_effective_target_arm_neon_fp16_ok_nocache): Call
arm_neon_ok and merge flags.  Fix temporary test name.
(check_effective_target_arm_neonv2_ok_nocache): Call arm_neon_ok
and merge flags.

Change-Id: Id28fff4b90685733d2bf10275fc28022da341adb

8 years ago gcc/
Yvan Roux [Fri, 2 Sep 2016 07:59:58 +0000 (09:59 +0200)]
gcc/
Backport from trunk r237548.
2016-06-17  Szabolcs Nagy  <szabolcs.nagy@arm.com>

* config/aarch64/geniterators.sh: Handle parenthesised conditions.

Change-Id: I3eb6902dd41933cd2f41d1740f84f63a1921e0b2

8 years ago gcc/
Yvan Roux [Fri, 2 Sep 2016 07:59:36 +0000 (09:59 +0200)]
gcc/
Backport from trunk r237506.
2016-06-16  Renlin Li  <renlin.li@arm.com>

* config/aarch64/aarch64.c (aarch64_legitimize_address): Fix a typo.

Change-Id: Ia4613d97eb5da0d1839d9af77de2aa71f5479f17

8 years ago gcc/
Yvan Roux [Fri, 2 Sep 2016 07:59:12 +0000 (09:59 +0200)]
gcc/
Backport from trunk r237485.
2016-06-15  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/aarch64/aarch64-simd.md (aarch64_<sur>shll_n<mode>): Clean
up parentheses.  Use GET_MODE_UNIT_BITSIZE.
(aarch64_<sur>shll2_n<mode>): Likewise.

Change-Id: Ia25c220b930929a3bbaff268733b7718d1104f7c

8 years ago gcc/
Yvan Roux [Fri, 2 Sep 2016 07:58:35 +0000 (09:58 +0200)]
gcc/
Backport from trunk r237440.
2015-06-14  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/aarch64/aarch64.c (aarch64_mask_and_shift_for_ubfiz_p):
New function.
(aarch64_rtx_costs): Use it.  Rewrite CONST_INT_P (op1) case to handle
mask+shift version.
* config/aarch64/aarch64-protos.h (aarch64_mask_and_shift_for_ubfiz_p):
New prototype.
* config/aarch64/aarch64.md (*andim_ashift<mode>_bfiz): Replace
matching condition with aarch64_mask_and_shift_for_ubfiz_p.

Change-Id: Ic17811963cafa2a514ab4db02fdde3937de01e22

8 years ago gcc/
Yvan Roux [Fri, 2 Sep 2016 07:56:59 +0000 (09:56 +0200)]
gcc/
Backport from trunk r237331.
2016-06-11  Jiong Wang  <jiong.wang@arm.com>

PR target/71061
* config/arm/arm-protos.h (arm_attr_length_pop_multi): New declaration.
* config/arm/arm.c (arm_attr_length_pop_multi): New function to return
length for pop patterns.
(arm_attr_length_push_multi): Update comments.
* config/arm/arm.md (*load_multiple_with_writeback): Set "length"
attribute.
(*pop_multiple_with_writeback_and_return): Likewise.
(*pop_multiple_with_return): Likewise.

Change-Id: I19b35183be89cdcab6e40b6c727334342873e9ea

8 years ago gcc/
Yvan Roux [Fri, 2 Sep 2016 07:56:36 +0000 (09:56 +0200)]
gcc/
Backport from trunk r237313.
2016-06-10  Bernd Edlinger  <bernd.edlinger@hotmail.de>

* config/arm/arm.h (pool_vector_label,
return_used_this_function): Remove.

Change-Id: Ibf0111fc72148427a644d476df130d589737929e

8 years ago gcc/
Yvan Roux [Fri, 2 Sep 2016 07:55:22 +0000 (09:55 +0200)]
gcc/
Backport from trunk r237251.
2016-06-09  Stefan Bruens  <stefan.bruens@rwth-aachen.de>

* doc/invoke.texi (ARM Options): Use lexicographical ordering.
Correct usage of @samp vs @option, add @samp where appropriate.
Add -march={armv6k,armv6z,arm6zk}, remove -march=ep9312.
Add armv6s-m and document it, as it is no official ARM name.

Change-Id: I73253c3cc7f71a35fdaf26ddf51b135a59754784

8 years ago gcc/
Christophe Lyon [Tue, 30 Aug 2016 15:53:17 +0000 (17:53 +0200)]
gcc/
Backport from trunk r239733.
2016-08-24  Thomas Preud'homme  <thomas.preudhomme@arm.com>

* config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping for
-mcpu=cortex-a7, -mfpu=neon-fp16, -mfpu=fpv5-d16 and -mfpu=fp-armv8.
Fix typo in -mfpu=vfpv3-d16-fp16 mapping.
(MULTILIB_REUSE): Remove reuse rules for option set including
-mfpu=fp-armv8 and -mfpu=vfpv4

gcc/
Backport from trunk r239734.
2016-08-24  Thomas Preud'homme  <thomas.preudhomme@arm.com>

* doc/fragments.texi (MULTILIB_REUSE): Mention that only options in
MULTILIB_OPTIONS should be used.  Small wording fixes.
* genmultilib: Memorize set of all option combinations in
combination_space.  Detect if RHS of MULTILIB_REUSE uses an option not
found in MULTILIB_OPTIONS by checking if option set is listed in
combination_space.  Output new and existing error message to stderr.

Change-Id: Icde28653fb6dc296e8c2f2f8b1745759b067b621

8 years ago gcc/
Yvan Roux [Thu, 1 Sep 2016 07:46:30 +0000 (09:46 +0200)]
gcc/
Backport from trunk r236914.
2016-05-31  Wladimir J. van der Laan  <laanwj@gmail.com>

* config/aarch64/arm_neon.h (vdupb_laneq_s8): Remove spurious
attribute __unused__.

Change-Id: I53791af863e9417be0f614c28d8152e9abc21c37

8 years ago gcc/
Christophe Lyon [Tue, 30 Aug 2016 15:52:41 +0000 (17:52 +0200)]
gcc/
Backport from trunk r239710.
2016-08-23  Christophe Lyon  <christophe.lyon@linaro.org>

* config/arm/arm.md (arm_movqi_insn): Swap predicable_short_it
attribute for alternatives 3 and 4.

Change-Id: Iea2ecb11b72a9ff244d14046b38e8f289d2a14f1

8 years ago gcc/
Christophe Lyon [Tue, 30 Aug 2016 15:51:21 +0000 (17:51 +0200)]
gcc/
Backport from trunk r239561.
2016-08-18  Tamar Christina  <tamar.christina@arm.com>
    Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

* varasm.c (default_use_anchors_for_symbol_p): Reject too large decls.

Change-Id: I1ed30d6a68c07c214f81cc6c75eef7d03023a1f3

8 years ago gcc/
Christophe Lyon [Tue, 30 Aug 2016 15:02:49 +0000 (17:02 +0200)]
gcc/
Backport from trunk r236269.
2016-05-16  Matthew Wahab  <matthew.wahab@arm.com>
    Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
    Jiong Wang  <jiong.wang@arm.com>

* config/arm/arm-c.c (arm_cpu_builtins): Use def_or_undef_macro
for __ARM_FP16_FORMAT_IEEE and __ARM_FP16_FORMAT_ALTERNATIVE.
Define __ARM_FP16_ARGS when appropriate.
* config/arm/arm.c (arm_invalid_parameter_type): Remove
declaration.
(arm_invalid_return_type): Likewise.
(TARGET_INVALID_PARAMETER_TYPE): Remove.
(TARGET_INVALID_RETURN_TYPE): Remove.
(aapcs_vfp_sub_candidate): Allow HFmode.
(aapcs_vfp_allocate): Add comment.  Support HFmode.
(aapcs_vfp_allocate_return_reg): Likewise.
(struct aapcs_cp_arg_layout): Slightly reword comments for
is_return_candidate and allocate_return_reg.
(output_mov_vfp): Update assert.
(arm_hard_regno_mode_ok): Remove comment, update HF-mode
condition.
(arm_invalid_parameter_type): Remove.
(amr_invalid_return_type): Remove.
* config/arm/arm.h (TARGET_NEON_FP16): Fix definition.
* config/arm/arm.md (*arm32_movhf): Disable for TARGET_VFP.
* config/arm/vfp.md (*movhf_vfp): Enable for TARGET_VFP.

gcc/testsuite/
Backport from trunk r236269.
2016-05-16  Matthew Wahab  <matthew.wahab@arm.com>

* g++.dg/ext/arm-fp16/fp16-param-1.c: Update expected output.  Add
test for __ARM_FP16_ARGS.
* g++.dg/ext/arm-fp16/fp16-return-1.c: Update expected output.
* gcc.target/arm/aapcs/neon-vect10.c: New.
* gcc.target/arm/aapcs/neon-vect9.c: New.
* gcc.target/arm/aapcs/vfp18.c: New.
* gcc.target/arm/aapcs/vfp19.c: New.
* gcc.target/arm/aapcs/vfp20.c: New.
* gcc.target/arm/aapcs/vfp21.c: New.
* gcc.target/arm/fp16-aapcs-1.c: New.
* g++.target/arm/fp16-param-1.c: Update expected output.  Add
test for __ARM_FP16_ARGS.
* g++.target/arm/fp16-return-1.c: Update expected output.

gcc/
Backport from trunk r237847.
2016-06-29  Matthew Wahab  <matthew.wahab@arm.com>

* doc/sourcebuild.texi (Effective-Target keywords): Add entries
for arm_fp16_ok and arm_fp16_hw.
(Add Options): Add entries for arm_fp16, arm_fp16_ieee and
arm_fp16_alternative.

gcc/testsuite/
Backport from trunk r237847.
2016-06-29  Matthew Wahab  <matthew.wahab@arm.com>

* lib/target-supports.exp (add_options_for_arm_fp16): Reword
comment.
(add_options_for_arm_fp16_ieee): New.
(add_options_for_arm_fp16_alternative): New.
(effective_target_arm_fp16_ok_nocache): Add to comment.  Fix a
long-line.
(effective_target_arm_fp16_hw): New.

gcc/testsuite/
Backport from trunk r237849.
2016-06-29  Matthew Wahab  <matthew.wahab@arm.com>

* gcc.target/arm/aapcs/neon-vect10.c: Require
-mfloat-ab=hard.  Replace arm_neon_fp16_ok with arm_neon_fp16_hw.
* gcc.target/arm/aapcs/neon-vect9.c: Likewise.
* gcc.target/arm/aapcs/vfp18.c: Likewise.
* gcc.target/arm/aapcs/vfp19.c: Likewise.
* gcc.target/arm/aapcs/vfp20.c: Likewise.
* gcc.target/arm/aapcs/vfp21.c: Likewise.
* gcc.target/arm/fp16-aapcs-1.c: Require
-mfloat-ab=hard.  Also simplify the test.
* gcc.target/arm/fp16-aapcs-2.c: New.

Change-Id: Ifc4d08806bae60488e8b5a7fb2375b96cab6c4f8

8 years ago gcc/
Christophe Lyon [Tue, 30 Aug 2016 14:59:13 +0000 (16:59 +0200)]
gcc/
Backport from trunk r235512.
2016-04-27  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* rtlanal.c (nonzero_bits1): Convert preprocessor check
for WORD_REGISTER_OPERATIONS to runtime check.

gcc/
Backport from trunk r235563.
2015-04-28  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/aarch64/aarch64.h (WORD_REGISTER_OPERATIONS): Define to 0
and explain why in a comment.

Change-Id: I4044d2555d3f71aed9c5eee924764e523c8f0f25

8 years ago gcc/
Christophe Lyon [Tue, 30 Aug 2016 15:49:51 +0000 (17:49 +0200)]
gcc/
Backport from trunk r239135.
2016-08-04  Andrew Pinski  <apinski@cavium.com>

* config/aarch64/aarch64.c (thunderx_vector_cost): New variable.
(thunderx_tunings): Use thunderx_vector_cost instead of
generic_vector_cost.

Change-Id: Iddf9110c6827460e6fd5a74c91a4ebfc58af4b75

8 years ago gcc/
Christophe Lyon [Tue, 30 Aug 2016 15:48:24 +0000 (17:48 +0200)]
gcc/
Backport from trunk r238955.
2015-08-01  Alan Hayward <alan.hayward@arm.com>

PR tree-optimization/71818
* tree-vect-loop-manip.c (vect_can_advance_ivs_p): Don't advance IVs
with non invariant evolutions

gcc/testsuite/
Backport from trunk r238955.
2015-08-01  Alan Hayward <alan.hayward@arm.com>

PR tree-optimization/71818
* gcc.dg/vect/pr71818.c: New

Change-Id: I9962446c966ffe53e7000434447a002a2e7c9653

8 years ago gcc/
Christophe Lyon [Tue, 30 Aug 2016 15:50:34 +0000 (17:50 +0200)]
gcc/
Backport from trunk r239300.
2016-08-09  Renlin Li  <renlin.li@arm.com>

PR middle-end/64971
* calls.c (prepare_call_address): Convert funexp to Pmode when
necessary.
* config/aarch64/aarch64.md (sibcall): Remove fix for PR 64971.
(sibcall_value): Likewise.

Change-Id: I9d13d755a3271476ca72af913e0c015967bf1ed3

8 years ago gcc/
Christophe Lyon [Tue, 30 Aug 2016 15:47:54 +0000 (17:47 +0200)]
gcc/
Backport from trunk r238938.
2016-08-01  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/aarch64/aarch64.c (aarch64_classify_address): Use DImode when
performing aarch64_offset_7bit_signed_scaled_p check for TImode LDP/STP
addresses.

gcc/testsuite/
Backport from trunk r238938.
2016-08-01  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* gcc.target/aarch64/ldp_stp_unaligned_1.c: New test.

Change-Id: I58af585b93fe94946d3dc2831042de2630c5de82

8 years ago gcc/
Christophe Lyon [Tue, 30 Aug 2016 15:47:05 +0000 (17:47 +0200)]
gcc/
Backport from trunk r238820.
2016-07-28  Kristina Martsenko  <kristina.martsenko@arm.com>

* config/aarch64/aarch64.c (aarch64_rtx_costs): Fix cost of zero extend.

gcc/
Backport from trunk r238821.
2016-07-28  Wilco Dijkstra  <wdijkstr@arm.com>

 * config/aarch64/aarch64.md
(zero_extend<SHORT:mode><GPI:mode>2_aarch64): Change output
statement and type.
(<optab>qihi2_aarch64): Likewise, and split into two.
(extendqihi2_aarch64): New.
(zero_extendqihi2_aarch64): New.
* config/aarch64/iterators.md (ldrxt): Remove.
* config/aarch64/aarch64.c (aarch64_rtx_costs): Change cost of
uxtb/uxth.

2016-07-28  Kristina Martsenko  <kristina.martsenko@arm.com>

Change-Id: Ic56a54153161e1e59191d25d1dc51a979c44df4c

8 years ago gcc/
Christophe Lyon [Tue, 30 Aug 2016 15:44:51 +0000 (17:44 +0200)]
gcc/
Backport from trunk r238056.
2016-07-06  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/arm/driver-arm.c (arm_cpu_table): Add entries for cortex-a32,
cortex-a35, cortex-a53, cortex-a57, cortex-a72, cortex-a73.

Change-Id: I8683faafaa56efc58f36bd77173c8bc01faa2f94

8 years ago gcc/
Christophe Lyon [Tue, 30 Aug 2016 15:41:33 +0000 (17:41 +0200)]
gcc/
Backport from trunk r237957.
2016-07-04  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

PR target/63874
* config/aarch64/aarch64.c (aarch64_classify_symbol): Fix
typo in comment.  Only force to memory if it is a weak
external reference.

gcc/testsuite/
Backport from trunk r237957.
2016-07-04  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

PR target/63874
* gcc.target/aarch64/pr63874.c: New test.

Change-Id: Ide623f8b9b6ff9ca9fc3393de829b085768373f5

8 years ago gcc/testsuite/
Christophe Lyon [Tue, 30 Aug 2016 15:33:18 +0000 (17:33 +0200)]
gcc/testsuite/
Backport from trunk r237653.
2016-06-21  Wilco Dijkstra  <wdijkstr@arm.com>

* gcc.target/aarch64/advsimd-intrinsics/vrnd.c
(dg-require-effective-target): Use arm_v8_neon_hw.
* gcc.target/aarch64/advsimd-intrinsics/vrnda.c
(dg-require-effective-target): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vrndm.c
(dg-require-effective-target): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vrndn.c
(dg-require-effective-target): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vrndp.c
(dg-require-effective-target): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vrndx.c
(dg-require-effective-target): Likewise.
* lib/target-supports.exp (check_runtime arm_v8_neon_hw_available):
Add AArch64 check.

Change-Id: I2657e702ecaa410db570f07bb00b035569001c7b

8 years ago gcc/
Christophe Lyon [Tue, 30 Aug 2016 15:32:25 +0000 (17:32 +0200)]
gcc/
Backport from trunk r237604.
2016-06-20  James Greenhalgh  <james.greenhalgh@arm.com>

* config/arm/aarch-cost-tables.h (cortexa53_extra_costs): Make FP
costs relative to the cost of a register move.

gcc/
Backport from trunk r238048.
2016-07-06  Wilco Dijkstra  <wdijkstr@arm.com>

* config/arm/cortex-a53.md: Use final_presence_set for in-order.
(cortex_a53_shift): Add mov_shift.
(cortex_a53_shift_reg): Add new reservation for register shifts.
(cortex_a53_alu): Remove bfm.
(cortex_a53_alu_shift): Add bfm, remove mov_shift.
(cortex_a53_alu_extr): Add new reservation for EXTR.
(bypasses): Improve bypass modelling.

Change-Id: I84ed9d0406fca824ef7ad3809469429b7e5766ec

8 years ago gcc/
Christophe Lyon [Tue, 30 Aug 2016 15:31:30 +0000 (17:31 +0200)]
gcc/
Backport from trunk r237603.
2016-06-20  James Greenhalgh  <james.greenhalgh@arm.com>

* config/aarch64/arm_neon.h (vcvt_n_f64_s64): New.
(vcvt_n_f64_u64): Likewise.
(vcvt_n_s64_f64): Likewise.
(vcvt_n_u64_f64): Likewise.
(vcvt_f64_s64): Likewise.
(vrecpe_f64): Likewise.
(vcvt_f64_u64): Likewise.
(vrecps_f64): Likewise.

gcc/testsuite/
Backport from trunk r237603.
2016-06-20  James Greenhalgh  <james.greenhalgh@arm.com>

* gcc.target/aarch64/vcvt_f64_1.c: New.
* gcc.target/aarch64/vcvt_n_f64_1.c: New.
* gcc.target/aarch64/vrecp_f64_1.c: New.

Change-Id: I9a259cb05eafd578af2f72a1b2f85187f28548c2

8 years ago gcc/
Christophe Lyon [Tue, 30 Aug 2016 15:29:47 +0000 (17:29 +0200)]
gcc/
Backport from trunk r237249.
2016-06-09  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/arm/cortex-a57.md (cortex_a57_alu):
Handle csel type.

gcc/
Backport from trunk r237595.
2016-06-20  Wilco Dijkstra  <wdijkstr@arm.com>

* config/arm/cortex-a57.md (cortex_a57_fp_cpys): Add fcsel.

gcc/
Backport from trunk r237601.
2016-06-20  James Greenhalgh  <james.greenhalgh@arm.com>

* config/arm/aarch-cost-tables.h (cortexa57_extra_costs): Make FP
costs relative to the cost of a register move.

Change-Id: Ifd290d36261f28502f556623189ad6cf90b5548d

8 years ago gcc/
Christophe Lyon [Tue, 30 Aug 2016 15:27:34 +0000 (17:27 +0200)]
gcc/
Backport from trunk r236817.
2016-05-27  Wilco Dijkstra  <wdijkstr@arm.com>

PR67609
* config/aarch64/aarch64.h (CANNOT_CHANGE_MODE_CLASS): Remove.
* config/aarch64/aarch64.c
(aarch64_cannot_change_mode_class): Remove function.
* config/aarch64/aarch64-protos.h
(aarch64_cannot_change_mode_class): Remove.

Change-Id: Ie0d3d3543a277e43b37bdccc2d9385bc669959aa

8 years ago gcc/
Christophe Lyon [Tue, 30 Aug 2016 15:26:28 +0000 (17:26 +0200)]
gcc/
Backport from trunk r236638.
2016-05-24  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/arm/arm.md (andsi3): Replace cast of 1 to HOST_WIDE_INT
with HOST_WIDE_INT_1.
(insv): Likewise.
* config/arm/arm.c (optimal_immediate_sequence): Replace cast of
1 to unsigned HOST_WIDE_INT with HOST_WIDE_INT_1U.
(arm_canonicalize_comparison): Likewise.
(thumb1_rtx_costs): Replace cast of 1 to HOST_WIDE_INT with
HOST_WIDE_INT_1.
(thumb1_size_rtx_costs): Likewise.
(vfp_const_double_index): Replace cast of 1 to unsigned
HOST_WIDE_INT with HOST_WIDE_INT_1U.
(get_jump_table_size): Replace cast of 1 to HOST_WIDE_INT with
HOST_WIDE_INT_1.
(arm_asan_shadow_offset): Replace cast of 1 to unsigned
HOST_WIDE_INT with HOST_WIDE_INT_1U.
* config/arm/neon.md (vec_set<mode>): Replace cast of 1 to
HOST_WIDE_INT with HOST_WIDE_INT_1.

gcc/
Backport from trunk r236640.
2016-05-24  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/arm/arm.md (ashldi3): Replace comparison of INTVAL of
operands[2] against 1 with comparison against CONST1_RTX.
(ashrdi3): Likewise.
(lshrdi3): Likewise.
(ashlsi3): Replace cast of INTVAL to unsigned HOST_WIDE_INT with
UINTVAL.
(ashrsi3): Likewise.
(lshrsi3): Likewise.
(rotrsi3): Likewise.
(define_split above *compareqi_eq0): Likewise.
(define_split above "prologue"): Likewise.
* config/arm/arm.c (thumb1_size_rtx_costs): Likewise.
* config/arm/predicates.md (shift_operator): Likewise.
(shift_nomul_operator): Likewise.
(sat_shift_operator): Likewise.
(thumb1_cmp_operand): Likewise.
(const_neon_scalar_shift_amount_operand): Replace manual range
check with IN_RANGE.
* config/arm/thumb1.md (define_peephole2 above *thumb_subdi3):
Replace cast of INTVAL to unsigned HOST_WIDE_INT with UINTVAL.

gcc/
Backport from trunk r236641.
2016-05-24  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/arm/neon.md (ashldi3_neon):  Replace comparison of INTVAL of
operands[2] against 1 with comparison against CONST1_RTX.
(<shift>di3_neon): Likewise.
* config/arm/predicates.md (const0_operand): Replace with comparison
against CONST0_RTX.

gcc/
Backport from trunk r237757.
2016-06-24  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/arm/arm.c (int_log2): Delete definition and prototype.
(shift_op): Use exact_log2 instead of int_log2.
(vfp3_const_double_for_fract_bits): Likewise.

Change-Id: I3fa73b60ab1c512a073431d5dc892d7b0abbe9ab

8 years ago gcc/
Christophe Lyon [Tue, 30 Aug 2016 15:21:08 +0000 (17:21 +0200)]
gcc/
Backport from trunk r236631.
2016-05-24  Richard Sandiford  <richard.sandiford@arm.com>

* tree-vect-data-refs.c (vect_analyze_group_access_1): Set
GROUP_GAP for single-element interleaving.
* tree-vect-stmts.c (vectorizable_load): Remove force_peeling
variable.

Change-Id: If89095362918091444205b94205cf99e0bef1dc4

8 years ago gcc/
Christophe Lyon [Tue, 30 Aug 2016 15:20:06 +0000 (17:20 +0200)]
gcc/
Backport from trunk r236593.
2016-05-23  Bin Cheng  <bin.cheng@arm.com>

* tree-ssa-address.c (copy_ref_info): Check NULL TMR_STEP when
TMR_INDEX is non-NULL.

Change-Id: I17ab29e7a3fd99f1431bead30aa2f568d8530df2

8 years ago gcc/
Christophe Lyon [Tue, 30 Aug 2016 15:13:28 +0000 (17:13 +0200)]
gcc/
Backport from trunk r236502.
2016-05-20  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>

* tree-vectorizer.c (get_vec_alignment_for_decl): New static function.
(get_vec_alignment_for_array_decl): Likewise.
(get_vec_alignment_for_record_decl): Likewise.
(increase_alignment::execute): Move code to find alignment to
get_vec_alignment_for_array_decl and call get_vec_alignment_for_decl.
(type_align_map): New hash_map.

gcc/testsuite/
Backport from trunk r236502, r236503.
2016-05-20  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>

* gcc.dg/vect/section-anchors-vect-70.c: New test-case.
* gcc.dg/vect/section-anchors-vect-71.c: Likewise.
* gcc.dg/vect/section-anchors-vect-72.c: Likewise.

gcc/testsuite/
Backport from trunk r237207.
2016-06-08  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>

* gcc.dg/vect/section-anchors-vect-70.c: Rename to aligned-section-anchors-vect-71.c.
* gcc.dg/vect/section-anchors-vect-71.c: Rename to aligned-section-anchors-vect-72.c.
* gcc.dg/vect/section-anchors-vect-72.c: Rename to aligned-section-anchors-vect-72.c.

Change-Id: I71a89ccfbb98e1a7976f74875fa954d1f0f365a9

8 years ago gcc/
Christophe Lyon [Tue, 30 Aug 2016 15:11:54 +0000 (17:11 +0200)]
gcc/
Backport from trunk r236355.
2016-05-17  Kugan Vivekanandarajah  <kuganv@linaro.org>

* config/aarch64/aarch64.c (all_extensions): Removed unused static variable.

Change-Id: I0bd4378ab3491e23f11956216a34af164a8bac25

8 years ago gcc/
Christophe Lyon [Tue, 30 Aug 2016 15:08:47 +0000 (17:08 +0200)]
gcc/
Backport from trunk r236198.
2016-05-13  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

PR target/53440
* config/arm/arm.c (arm32_output_mi_thunk): New.
(arm_output_mi_thunk): Rename to arm_thumb1_mi_thunk. Rework
to split Thumb1 vs TARGET_32BIT functionality.
(arm_thumb1_mi_thunk): New.

gcc/testsuite/
Backport from trunk r236198.
2016-05-13  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

PR target/53440
* g++.dg/inherit/thunk1.C: Support arm / aarch64.

gcc/testsuite/
Backport from trunk r236319.
2016-05-17  Christophe Lyon  <christophe.lyon@linaro.org>

* g++.dg/inherit/think1.C: Fix dg-do and dg-skip order.

Change-Id: I616a700a54b4287da823960d8f139d284dbf7be3

8 years ago gcc/
Christophe Lyon [Tue, 30 Aug 2016 15:04:00 +0000 (17:04 +0200)]
gcc/
Backport from trunk r237679.
2016-06-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/aarch64/aarch64.c (cortexa73_tunings): New struct.
* config/aarch64/aarch64-cores.def (cortex-a73): New entry.
(cortex-a73.cortex-a35): Likewise.
(cortex-a73.cortex-a53): Likewise.
* config/aarch64/aarch64-tune.md: Regenerate.
* doc/invoke.texi (AArch64 Options): Document cortex-a73,
cortex-a73.cortex-a35 and cortex-a73.cortex-a53 arguments to
-mcpu and -mtune.

gcc/
Backport from trunk r237681.
2016-06-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/arm/arm.c (arm_cortex_a73_tune): New struct.
* config/arm/arm-cores.def (cortex-a73): New entry.
(cortex-a73.cortex-a35): Likewise.
(cortex-a73.cortex-a53): Likewise.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm-tune.md: Likewise.
* config/arm/bpabi.h (BE8_LINK_SPEC): Handle mcpu=cortex-a73,
mcpu=cortex-a73.cortex-a35 and mcpu=cortex-a73.cortex-a53.
* config/arm/t-aprofile: Handle mcpu=cortex-a73,
mcpu=cortex-a73.cortex-a35 and mcpu=cortex-a73.cortex-a53.
* doc/invoke.texi (ARM Options): Document cortex-a73,
cortex-a73.cortex-a35 and cortex-a73.cortex-a53.

Change-Id: I1f03c049d5f79c15bfd9a414aa5d92a9309783b0

8 years ago gcc/
Christophe Lyon [Tue, 12 Jul 2016 10:19:30 +0000 (12:19 +0200)]
gcc/
Backport from trunk r237553.
2016-06-17  James Greenhalgh  <james.greenhalgh@arm.com>

* config/arm/arm_neon.h (vadd_f32): replace __FAST_MATH with
__FAST_MATH__.
(vaddq_f32): Likewise.
(vmul_f32): Likewise.
(vmulq_f32): Likewise.
(vsub_f32): Likewise.
(vsubq_f32): Likewise.

Change-Id: Id0da47bbd4df9a156758d7033d804bc88b7bb907

8 years ago gcc/
Christophe Lyon [Tue, 12 Jul 2016 10:16:29 +0000 (12:16 +0200)]
gcc/
Backport from trunk r237138.
2016-06-06  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

PR middle-end/37780
* config/arm/arm.md (ctzsi2): Convert to define_insn_and_split.

gcc/
Backport from trunk r237139.
* config/aarch64/aarch64.md (ctz<mode>2): Convert to
define_insn_and_split.

2016-06-06  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

PR middle-end/37780
gcc/
Backport from trunk r237141.
* ifcvt.c (noce_try_ifelse_collapse): New function.
Declare prototype.
(noce_process_if_block): Call noce_try_ifelse_collapse.
* simplify-rtx.c (simplify_cond_clz_ctz): New function.
(simplify_ternary_operation): Use the above to simplify
conditional CLZ/CTZ expressions.

2016-06-06  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

PR middle-end/37780
gcc/testsuite/
Backport from trunk r237141.
2016-06-06  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

PR middle-end/37780
* gcc.c-torture/execute/pr37780.c: New test.
* gcc.target/aarch64/pr37780_1.c: Likewise.
* gcc.target/arm/pr37780_1.c: Likewise.

gcc/
Backport from trunk r237180.
2016-06-07  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* simplify-rtx.c (simplify_cond_clz_ctz): Delete 'mode' local
variable.

gcc/testsuite/
Backport from trunk r237308.
2016-06-10  Christophe Lyon  <christophe.lyon@linaro.org>

* gcc.target/arm/pr37780_1.c: Use arm_arch_v6t2 effective target
and options.

Change-Id: I221bc478220826da3ffc3337596bcfa2a304e690

8 years ago gcc/
Christophe Lyon [Tue, 12 Jul 2016 10:15:36 +0000 (12:15 +0200)]
gcc/
Backport from trunk r237034.
2016-06-02  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

PR rtl-optimization/71295
* rtlanal.c (subreg_get_info): If taking a subreg at the requested
offset would go over the size of the inner mode reject it.

gcc/testsuite/
Backport from trunk r237034.
2016-06-02  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

PR rtl-optimization/71295
* gcc.c-torture/compile/pr71295.c: New test.

Change-Id: I620aa65019e981cb43ff964781ed2158362c484d

8 years ago gcc/
Christophe Lyon [Tue, 12 Jul 2016 10:14:26 +0000 (12:14 +0200)]
gcc/
Backport from trunk r236818.
2016-05-27  Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64.c (aarch64_build_builtin_va_list): Initialize
va_list_gpr_counter_field and va_list_fpr_counter_field.

gcc/testsuite/
Backport from trunk r236818.
2016-05-27  Jiong Wang  <jiong.wang@arm.com>

* gcc.dg/tree-ssa/stdarg-2.c: Enable all testcases for AArch64.
* gcc.dg/tree-ssa/stdarg-3.c: Likewise.
* gcc.dg/tree-ssa/stdarg-4.c: Likewise.
* gcc.dg/tree-ssa/stdarg-5.c: Likewise.
* gcc.dg/tree-ssa/stdarg-6.c: Likewise.

gcc/
Backport from trunk r236819.
2016-05-27  Jiong Wang  <jiong.wang@arm.com>

PR target/63596
* config/aarch64/aarch64.c (aarch64_expand_builtin_va_start): Honor
tree-stdarg analysis results.
(aarch64_setup_incoming_varargs): Likewise.

gcc/testsuite/
Backport from trunk r236819.
2016-05-27  Jiong Wang  <jiong.wang@arm.com>

PR target/63596
* gcc.target/aarch64/va_arg_1.c: New testcase.
* gcc.target/aarch64/va_arg_2.c: Likewise.
* gcc.target/aarch64/va_arg_3.c: Likewise.

Change-Id: If954f4040fca6c7e61aea4879b3ff9774cbc5db1

8 years ago gcc/
Christophe Lyon [Tue, 12 Jul 2016 10:13:30 +0000 (12:13 +0200)]
gcc/
Backport from trunk r236728.
2016-05-25  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

PR rtl-optimization/66940
* ifcvt.c (noce_get_alt_condition): Check that incrementing or
decrementing desired_val will not overflow before performing these
operations.

gcc/testsuite/
Backport from trunk r236728.
2016-05-25  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

PR rtl-optimization/66940
* gcc.c-torture/execute/pr66940.c: New test.

Change-Id: I9f7b3c0ae088f6fd5ee758255b70053d725c9a79

8 years ago gcc/
Christophe Lyon [Tue, 12 Jul 2016 10:03:28 +0000 (12:03 +0200)]
gcc/
Backport from trunk r235402, r235403.
2016-04-25  Michael Collison  <michael.collison@linaro.org>

* config/arm/neon.md (widen_<us>sum<mode>): New patterns where
mode is VQI to improve mixed mode vectorization.
* config/arm/neon.md (vec_sel_widen_ssum_lo<VQI:mode><VW:mode>3): New
define_insn to match low half of signed vaddw.
* config/arm/neon.md (vec_sel_widen_ssum_hi<VQI:mode><VW:mode>3): New
define_insn to match high half of signed vaddw.
* config/arm/neon.md (vec_sel_widen_usum_lo<VQI:mode><VW:mode>3): New
define_insn to match low half of unsigned vaddw.
* config/arm/neon.md (vec_sel_widen_usum_hi<VQI:mode><VW:mode>3): New
define_insn to match high half of unsigned vaddw.
* config/arm/arm.c (arm_simd_vect_par_cnst_half): New function.
(arm_simd_check_vect_par_cnst_half_p): Likewise.
* config/arm/arm-protos.h (arm_simd_vect_par_cnst_half): Prototype
for new function.
(arm_simd_check_vect_par_cnst_half_p): Likewise.
* config/arm/predicates.md (vect_par_constant_high): Support
big endian and simplify by calling
arm_simd_check_vect_par_cnst_half
(vect_par_constant_low): Likewise.

gcc/testsuite/
Backport from trunk r235402.
2016-04-25  Michael Collison <michael.collison@arm.com>

* testsuite/gcc.target/arm/neon-vaddws16.c: New test.
* testsuite/gcc.target/arm/neon-vaddws32.c: New test.
* testsuite/gcc.target/arm/neon-vaddwu16.c: New test.
* testsuite/gcc.target/arm/neon-vaddwu32.c: New test.
* testsuite/gcc.target/arm/neon-vaddwu8.c: New test.
* testsuite/lib/target-supports.exp
(check_effective_target_vect_widen_sum_hi_to_si_pattern): Indicate
that arm neon support vector widen sum of HImode TO SImode.

Change-Id: I73e392d5089153973547e78cb918f3bf8e5594d0

8 years ago gcc/
Christophe Lyon [Thu, 7 Jul 2016 13:53:54 +0000 (15:53 +0200)]
gcc/
Backport from trunk r237200.
2016-06-08  Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64-builtins.c (TYPES_BINOP_USS): New
(TYPES_BINOP_SUS): Likewise.
(aarch64_simd_builtin_data): Update include file name.
(aarch64_builtins): Likewise.
* config/aarch64/aarch64-simd-builtins.def (scvtf): New entries
for conversion between scalar float-point and fixed-point.
(ucvtf): Likewise.
(fcvtzs): Likewise.
(fcvtzu): Likewise.
* config/aarch64/aarch64.md
(<FCVT_F2FIXED:fcvt_fixed_insn><GPF:mode>3: New
pattern for conversion between scalar float to fixed-pointer.
(<FCVT_FIXED2F:fcvt_fixed_insn><GPI:mode>: Likewise.
(UNSPEC_FCVTZS): New UNSPEC enumeration.
(UNSPEC_FCVTZU): Likewise.
(UNSPEC_SCVTF): Likewise.
(UNSPEC_UCVTF): Likewise.
* config/aarch64/arm_neon.h (vcvtd_n_f64_s64): Remove inline assembly.
Use builtin.
(vcvtd_n_f64_u64): Likewise.
(vcvtd_n_s64_f64): Likewise.
(vcvtd_n_u64_f64): Likewise.
(vcvtd_n_f32_s32): Likewise.
(vcvts_n_f32_u32): Likewise.
(vcvtd_n_s32_f32): Likewise.
(vcvts_n_u32_f32): Likewise.
* config/aarch64/iterators.md (fcvt_target): Support integer to float
mapping.
(FCVT_TARGET): Likewise.
(FCVT_FIXED2F): New iterator.
(FCVT_F2FIXED): Likewise.
(fcvt_fixed_insn): New define_int_attr.

gcc/
Backport from trunk r237201.
* config/aarch64/aarch64-builtins.def (scvtf): Register vector modes.
(ucvtf): Likewise.
(fcvtzs): Likewise.
(fcvtzu): Likewise.
* config/aarch64/aarch64-simd.md
(<FCVT_F2FIXED:fcvt_fixed_insn><VDQF:mode>3): New.
(<FCVT_FIXED2F:fcvt_fixed_insn><VDQ_SDI:mode>3): Likewise.
* config/aarch64/arm_neon.h (vcvt_n_f32_s32): Remove inline assembly.
Use builtin.
(vcvt_n_f32_u32): Likewise.
(vcvt_n_s32_f32): Likewise.
(vcvt_n_u32_f32): Likewise.
(vcvtq_n_f32_s32): Likewise.
(vcvtq_n_f32_u32): Likewise.
(vcvtq_n_f64_s64): Likewise.
(vcvtq_n_f64_u64): Likewise.
(vcvtq_n_s32_f32): Likewise.
(vcvtq_n_s64_f64): Likewise.
(vcvtq_n_u32_f32): Likewise.
(vcvtq_n_u64_f64): Likewise.
* config/aarch64/iterators.md (VDQ_SDI): New mode iterator.
(VSDQ_SDI): Likewise.
(fcvt_target): Support V4DI, V4SI and V2SI.
(FCVT_TARGET): Likewise.

2016-06-08  Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64-builtins.c (TYPES_BINOP_USS): New
(TYPES_BINOP_SUS): Likewise.
(aarch64_simd_builtin_data): Update include file name.
(aarch64_builtins): Likewise.
* config/aarch64/aarch64-simd-builtins.def (scvtf): New entries
for conversion between scalar float-point and fixed-point.
(ucvtf): Likewise.
(fcvtzs): Likewise.
(fcvtzu): Likewise.
* config/aarch64/aarch64.md
(<FCVT_F2FIXED:fcvt_fixed_insn><GPF:mode>3: New
pattern for conversion between scalar float to fixed-pointer.
(<FCVT_FIXED2F:fcvt_fixed_insn><GPI:mode>: Likewise.
(UNSPEC_FCVTZS): New UNSPEC enumeration.
(UNSPEC_FCVTZU): Likewise.
(UNSPEC_SCVTF): Likewise.
(UNSPEC_UCVTF): Likewise.
* config/aarch64/arm_neon.h (vcvtd_n_f64_s64): Remove inline assembly.
(vcvtd_n_f64_u64): Likewise.
(vcvtd_n_s64_f64): Likewise.
(vcvtd_n_u64_f64): Likewise.
(vcvtd_n_f32_s32): Likewise.
(vcvts_n_f32_u32): Likewise.
(vcvtd_n_s32_f32): Likewise.
(vcvts_n_u32_f32): Likewise.
* config/aarch64/iterators.md (fcvt_target): Support integer to float
(FCVT_TARGET): Likewise.
(FCVT_FIXED2F): New iterator.
(FCVT_F2FIXED): Likewise.
(fcvt_fixed_insn): New define_int_attr.
gcc/
Backport from trunk r237202.
2016-06-08  Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64-builtins.def (rsqrte): New builtins for modes
VALLF.
* config/aarch64/aarch64-simd.md (aarch64_rsqrte_<mode>2): Rename to
"aarch64_rsqrte<mode>".
* config/aarch64/aarch64.c (get_rsqrte_type): Update gen* name.
* config/aarch64/arm_neon.h (vrsqrts_f32): Remove inline assembly.  Use
builtin.
(vrsqrted_f64): Likewise.
(vrsqrte_f32): Likewise.
(vrsqrte_f64): Likewise.
(vrsqrteq_f32): Likewise.
(vrsqrteq_f64): Likewise.

gcc/
Backport from trunk r237203.
2016-06-08  Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64-builtins.def (rsqrts): New builtins for modes
VALLF.
* config/aarch64/aarch64-simd.md (aarch64_rsqrts_<mode>3): Rename to
"aarch64_rsqrts<mode>".
* config/aarch64/aarch64.c (get_rsqrts_type): Update gen* name.
* config/aarch64/arm_neon.h (vrsqrtss_f32): Remove inline assembly.  Use
builtin.
(vrsqrtsd_f64): Likewise.
(vrsqrts_f32): Likewise.
(vrsqrts_f64): Likewise.
(vrsqrtsq_f32): Likewise.
(vrsqrtsq_f64): Likewise.

gcc/
Backport from trunk r237204.
2016-06-08  Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64-builtins.def (fabd): New builtins for modes
VALLF.
* config/aarch64/aarch64-simd.md (fabd<mode>_3): Extend modes from VDQF
to VALLF.  Rename to "fabd<mode>3".
"*fabd_scalar<mode>3): Delete.
* config/aarch64/arm_neon.h (vabds_f32): Remove inline assembly.
Use builtin.
(vabdd_f64): Likewise.
(vabd_f32): Likewise.
(vabd_f64): Likewise.
(vabdq_f32): Likewise.
(vabdq_f64): Likewise.

gcc/
Backport from trunk r237205.
2016-06-08  Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64-builtins.def (faddp): New builtins for modes in
VDQF.
* config/aarch64/aarch64-simd.md (aarch64_faddp<mode>): New.
(arch64_addpv4sf): Delete.
(reduc_plus_scal_v4sf): Use "gen_aarch64_faddpv4sf" instead of
"gen_aarch64_addpv4sf".
* config/aarch64/arm_neon.h (vpadd_f32): Remove inline assembly.  Use
builtin.
(vpadds_f32): Likewise.
(vpaddq_f32): Likewise.
(vpaddq_f64): Likewise.

gcc/
Backport from trunk r237602.
2016-06-20  James Greenhalgh  <james.greenhalgh@arm.com>

* config/aarch64/aarch64.md
(<FCVT_F2FIXED:fcvt_fixed_insn><GPF:mode>3): Add attributes to
iterators.
(<FCVT_FIXED2F:fcvt_fixed_insn><GPI:mode>3): Likewise.  Correct
attributes.
* config/aarch64/aarch64-builtins.c
(aarch64_types_binop_uss_qualifiers): Delete.
(TYPES_BINOP_USS): Likewise.
(aarch64_types_binop_sus_qualifiers): Likewise.
(TYPES_BINOP_SUS): Likewise.
(aarch64_types_fcvt_from_unsigned_qualifiers): New.
(TYPES_FCVTIMM_SUS): Likewise.
* config/aarch64/aarch64-simd-builtins.def (scvtf): Use SHIFTIMM
rather than BINOP.
(ucvtf): Use FCVTIMM_SUS rather than BINOP_SUS.
(fcvtzs): Use SHIFTIMM rather than BINOP.
(fcvtzu): Use SHIFTIMM_USS rather than BINOP_USS.

Change-Id: I4cfab022c339c410b8ac01b9b9e65ea290053c7d

8 years ago gcc/
Christophe Lyon [Tue, 12 Jul 2016 10:07:47 +0000 (12:07 +0200)]
gcc/
Backport from trunk r236181.
2016-05-12  Jiong Wang  <jiong.wang@arm.com>

PR rtl-optimization/70904
* lra-constraint.c (process_addr_reg): Relax the restriction on subreg
reload for wide mode.

gcc/
Backport from trunk r236396.
2016-05-18  Jiong Wang  <jiong.wang@arm.com>

PR rtl-optimization/71150
* lra-constraint (process_addr_reg): Guard "in_class_p" with REG_P
check.

Change-Id: I3bd0ce7d91144048cd00d1e7f3ed4f068258e33e

8 years ago gcc/
Christophe Lyon [Tue, 12 Jul 2016 10:05:52 +0000 (12:05 +0200)]
gcc/
Backport from trunk r235998.
2016-05-07  Jim Wilson  <jim.wilson@linaro.org>

* config/arm/arm.md: (arch): Add neon.
(arch_enabled): Return yes for arch neon when TARGET_NEON.
* config/arm/vfp.md (movdf_vfp): Add w/G as alternative 3.  Add
neon_move as type for alt 3.  Add arch attr enabling alt 3 for neon.
Emit vmov.i64 for alt 3.  Renumber alternatives 3 to 8.  Adjust
attributes for alt renumbering.  Mark alt 3 as non-predicable.
(thumb2_movdf_vfp): Likewise.

Change-Id: I727732889abdd70c3992e8637b93b53d14e02b52

8 years ago gcc/
Christophe Lyon [Thu, 7 Jul 2016 13:51:55 +0000 (15:51 +0200)]
gcc/
Backport from trunk r235532.
2016-04-26  Evandro Menezes  <e.menezes@samsung.com>

* config/aarch64/aarch64.md
(*movhf_aarch64): Add "movi %0, #0" to zero up register and
remove the "fp" attributes.
(*movsf_aarch64): Add "movi %0, #0" to zero up register and
add the "simd" attributes.
(*movdf_aarch64): Likewise.
(*movtf_aarch64): Remove the "fp" attributes.
* testsuite/gcc.target/aarch64/fmovf-zero-reg.c: Update accordingly.
* testsuite/gcc.target/aarch64/fmovd-zero-reg.c: Likewise.

Change-Id: I60cf15ed07f50d801ceed5b4247377eeadf3d682

8 years agoMerge branches/gcc-6-branch rev 239654.
Yvan Roux [Mon, 22 Aug 2016 13:07:28 +0000 (15:07 +0200)]
Merge branches/gcc-6-branch rev 239654.

Change-Id: I21e71f9dc10e3bedc0760cd5cc6b8d36234e3d41

8 years ago gcc/
Yvan Roux [Thu, 4 Aug 2016 12:54:59 +0000 (14:54 +0200)]
gcc/
Backport from trunk r237645.
2016-06-21  Virendra Pathak  <virendra.pathak@broadcom.com>

* config/aarch64/aarch64-cores.def (vulcan): New core.
* config/aarch64/aarch64-tune.md: Regenerate.
* doc/invoke.texi: Document vulcan as an available option.

gcc/
Backport from trunk r238372.
2016-07-15  Virendra Pathak  <virendra.pathak@broadcom.com>
    Julian Brown  <julian@codesourcery.com>

* config/aarch64/aarch64-cores.def: Update vulcan COSTS.
* config/aarch64/aarch64-cost-tables.h
(vulcan_extra_costs): New variable.
* config/aarch64/aarch64.c
(vulcan_addrcost_table): Likewise.
(vulcan_regmove_cost): Likewise.
(vulcan_vector_cost): Likewise.
(vulcan_branch_cost): Likewise.
(vulcan_tunings): Likewise.

gcc/
Backport from trunk r238937.
2016-08-01  Virendra Pathak  <virendra.pathak@broadcom.com>

* config/aarch64/aarch64.c (vulcan_tunings): Update
vulcan L1 cache_line_size.

Change-Id: I4f181cebcf8ae5f3064ac1477a61d4d97b7b7677

8 years ago gcc/
Yvan Roux [Mon, 8 Aug 2016 08:44:41 +0000 (10:44 +0200)]
gcc/
Backport from trunk r237395,  r237396,  r237397,  r237452.
2016-06-13  Evandro Menezes  <e.menezes@samsung.com>
    Wilco Dijkstra  <Wilco.Dijkstra@arm.com>

[AArch64] Emit division using the Newton series

* config/aarch64/aarch64-protos.h
(cpu_approx_modes): Add new member "division".
(aarch64_emit_approx_div): Declare new function.
* config/aarch64/aarch64.c
(generic_approx_modes): New member "division".
(exynosm1_approx_modes): Likewise.
(xgene1_approx_modes): Likewise.
(aarch64_emit_approx_div): Define new function.
* config/aarch64/aarch64.md ("div<mode>3"): New expansion.
* config/aarch64/aarch64-simd.md ("div<mode>3"): Likewise.
* config/aarch64/aarch64.opt (-mlow-precision-div): Add new option.
* doc/invoke.texi (-mlow-precision-div): Describe new option.

2016-06-13  Evandro Menezes  <e.menezes@samsung.com>
    Wilco Dijkstra  <wilco.dijkstra@arm.com>

[AArch64] Emit square root using the Newton series

* config/aarch64/aarch64-protos.h
(aarch64_emit_approx_rsqrt): Replace with new function
"aarch64_emit_approx_sqrt".
(cpu_approx_modes): New member "sqrt".
* config/aarch64/aarch64.c
(generic_approx_modes): New member "sqrt".
(exynosm1_approx_modes): Likewise.
(xgene1_approx_modes): Likewise.
(aarch64_emit_approx_rsqrt): Replace with new function
"aarch64_emit_approx_sqrt".
(aarch64_override_options_after_change_1): Handle new option.
* config/aarch64/aarch64-simd.md
(rsqrt<mode>2): Use new function instead.
(sqrt<mode>2): New expansion and insn definitions.
* config/aarch64/aarch64.md: Likewise.
* config/aarch64/aarch64.opt
(mlow-precision-sqrt): Add new option description.
* doc/invoke.texi (mlow-precision-sqrt): Likewise.

2016-06-13  Evandro Menezes  <e.menezes@samsung.com>

[AArch64] Add more choices for the reciprocal square root approximation

Allow a target to prefer such operation depending on the operation mode.

* config/aarch64/aarch64-protos.h
(AARCH64_APPROX_MODE): New macro.
(AARCH64_APPROX_{NONE,ALL}): Likewise.
(cpu_approx_modes): New structure.
(tune_params): New member "approx_modes".
* config/aarch64/aarch64-tuning-flags.def
(AARCH64_EXTRA_TUNE_APPROX_RSQRT): Remove macro.
* config/aarch64/aarch64.c
(generic_approx_modes): New core "cpu_approx_modes" structure.
(exynosm1_approx_modes): Likewise.
(xgene1_approx_modes): Likewise.
(generic_tunings): New member "approx_modes".
(cortexa35_tunings): Likewise.
(cortexa53_tunings): Likewise.
(cortexa57_tunings): Likewise.
(cortexa72_tunings): Likewise.
(exynosm1_tunings): Likewise.
(thunderx_tunings): Likewise.
(xgene1_tunings): Likewise.
(use_rsqrt_p): New argument for the mode and use new member from
"tune_params".
(aarch64_builtin_reciprocal): Devise mode from builtin.
(aarch64_optab_supported_p): New argument for the mode.
* doc/invoke.texi (-mlow-precision-recip-sqrt): Reword description.

Change-Id: I376802fcc2c1c86f16ba479ba60d4b38f38525e7

8 years ago gcc/
Yvan Roux [Thu, 14 Jul 2016 11:26:48 +0000 (13:26 +0200)]
gcc/
* LINARO-VERSION: Bump version number, post snapshot.

Change-Id: I07446ef0e8e2e7c40dc8538ae9a943e9c01b0a13

8 years agoMake Linaro GCC Snapshot 6.1-2016.07. upstream/6.1
Yvan Roux [Thu, 14 Jul 2016 08:59:24 +0000 (10:59 +0200)]
Make Linaro GCC Snapshot 6.1-2016.07.

gcc/
* LINARO-VERSION: Update.

Change-Id: Ib2d9a04cfb480d79fd6156bfca688148e90ad9c4

8 years agoMerge branches/gcc-6-branch rev 238201.
Yvan Roux [Mon, 11 Jul 2016 09:29:39 +0000 (11:29 +0200)]
Merge branches/gcc-6-branch rev 238201.

Change-Id: Ib44920195c04c4e75202c096d6140ff9e9a7c78b

8 years ago gcc/
Yvan Roux [Thu, 16 Jun 2016 14:29:07 +0000 (16:29 +0200)]
gcc/
* LINARO-VERSION: Bump version number, post snapshot.

Change-Id: I1daea24e03b17345eb0c21d1b854363ea709a067

8 years agoMake Linaro GCC Snapshot 6.1-2016.06.
Yvan Roux [Thu, 16 Jun 2016 12:40:06 +0000 (14:40 +0200)]
Make Linaro GCC Snapshot 6.1-2016.06.

gcc/
* LINARO-VERSION: Update.

Change-Id: Iaba80fcbe53832502a9b85116e063cbc9f3cec88

8 years agoMerge branches/gcc-6-branch rev 237469.
Yvan Roux [Wed, 15 Jun 2016 08:42:05 +0000 (10:42 +0200)]
Merge branches/gcc-6-branch rev 237469.

Change-Id: I4891542fc1d8fd3bb75e92a8805a8d069022b522

8 years ago gcc/testsuite/
Christophe Lyon [Wed, 8 Jun 2016 12:23:02 +0000 (14:23 +0200)]
gcc/testsuite/
Backport from trunk r235926.
2016-05-05  Bin Cheng  <bin.cheng@arm.com>

PR tree-optimization/57206
* gcc.dg/vect/pr57206.c: New test.

Change-Id: Iffbbf81752a011e2eae0bc48007e0f1ac8804e21

8 years ago gcc/
Christophe Lyon [Wed, 8 Jun 2016 12:34:32 +0000 (14:34 +0200)]
gcc/
Backport from trunk r236266, r236268.
2016-05-16  Matthew Wahab  <matthew.wahab@arm.com>

* config/aarch64/aarch64.h (LEGITIMIZE_RELOAD_ADDRESS): Remove.
* config/aarch64/arch64-protos.h
(aarch64_legitimize_reload_address): Remove.
* config/aarch64/aarch64.c (aarch64_legitimize_reload_address):
Remove.

Change-Id: I470227905cfec9696393fd26099c9539c5242972

8 years ago gcc/
Christophe Lyon [Wed, 8 Jun 2016 12:33:15 +0000 (14:33 +0200)]
gcc/
Backport from trunk r237058.
2016-06-03  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/arm/thumb1.md (*thumb1_mulsi3): Fix typos in comment.

Change-Id: I56795cdf93f0663ca52c0b73bf0cf6e772573336

8 years ago gcc/
Christophe Lyon [Wed, 8 Jun 2016 12:32:41 +0000 (14:32 +0200)]
gcc/
Backport from trunk r236984.
2016-06-01  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/arm/sync.md (arm_store_exclusive<mode>):
Use 'H' output modifier on operands[2] rather than creating a new
entry in out-of-bounds memory of the operands array.
(arm_store_release_exclusivedi): Likewise.

Change-Id: I37d221771a13a79ff59554c1fbf250dcaf95c14d

8 years ago gcc/
Christophe Lyon [Wed, 8 Jun 2016 12:32:25 +0000 (14:32 +0200)]
gcc/
Backport from trunk r236982.
2016-06-01  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/arm/arm.c (arm_fusion_enabled_p): New function.
* config/arm/arm-protos.h (arm_fusion_enabled_p): Declare prototype.
* config/arm/crypto.md (crypto_<crypto_pattern>, CRYPTO_UNARY):
Add "=w,0" alternative.  Enable it when AES/AESMC fusion is enabled.

Change-Id: I9201fecfe9f8f80ddd13d8f4b490d33b536548bf

8 years ago gcc/
Christophe Lyon [Wed, 8 Jun 2016 12:31:26 +0000 (14:31 +0200)]
gcc/
Backport from trunk r236913.
2016-05-31  Thomas Preud'homme  <thomas.preudhomme@arm.com>

* config/arm/arm-protos.h (arm_arch_thumb1): Declare.
* config/arm/arm.c (arm_arch_thumb1): Define.
(arm_option_override): Initialize arm_arch_thumb1.
* config/arm/arm.h (arm_arch_thumb1): Declare.
(TARGET_ARM_ARCH_ISA_THUMB): Use arm_arch_thumb to determine if target
support Thumb-1 ISA.

gcc/testsuite/
Backport from trunk r236913.
2016-05-31  Thomas Preud'homme  <thomas.preudhomme@arm.com>

* gcc.target/arm/armv5_thumb_isa.c: New test.

Change-Id: I8c3d583f2bdf61b719edc27a97d66be9a804fa79

8 years ago gcc/
Christophe Lyon [Wed, 8 Jun 2016 12:31:56 +0000 (14:31 +0200)]
gcc/
Backport from trunk r236916.
2016-05-31  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/aarch64/aarch64.c (aarch64_simd_attr_length_move): Delete.
* config/aarch64/aarch64-protos.h (aarch64_simd_attr_length_move):
Delete prototype.
* config/aarch64/iterators.md (insn_count): Add descriptive comment.
* config/aarch64/aarch64-simd.md (*aarch64_mov<mode>, VSTRUCT modes):
Remove use of aarch64_simd_attr_length_move, set length attribute
directly.
(*aarch64_be_movoi): Likewise.
(*aarch64_be_movci): Likewise.
(*aarch64_be_movxi): Likewise.

Change-Id: I6d03dec28c9da49e826940ff5c02174ad8ae9813

8 years ago gcc/
Christophe Lyon [Wed, 8 Jun 2016 12:31:08 +0000 (14:31 +0200)]
gcc/
Backport from trunk r236832.
2016-05-27  Thomas Preud'homme  <thomas.preudhomme@arm.com>

* config/arm/arm.h (TARGET_ARM_V6M): Remove.
(TARGET_ARM_V7M): Likewise.

Change-Id: I9da468029fe38dbbaa566f1f10a3527107e5406c

8 years ago gcc/
Christophe Lyon [Wed, 8 Jun 2016 12:30:29 +0000 (14:30 +0200)]
gcc/
Backport from trunk r236812.
2016-05-27  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/aarch64/aarch64.md (ashl<mode>3, SHORT modes):
Use const_int_operand for operand 2 predicate.  Simplify expand code
as a result.

Change-Id: I7803ae4dbd67516c3352451a84c5eb807e4540b1

8 years ago gcc/
Christophe Lyon [Wed, 8 Jun 2016 12:30:52 +0000 (14:30 +0200)]
gcc/
Backport from trunk r236820.
2016-05-27  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/aarch64/aarch64.c (aarch64_fusion_enabled_p): New function.
* config/aarch64/aarch64-protos.h (aarch64_fusion_enabled_p): Declare
prototype.
* config/aarch64/aarch64-simd.md (aarch64_crypto_aes<aesmc_op>v16qi):
Add "=w,0" alternative.  Enable it when AES/AESMC fusion is enabled.

Change-Id: Ie2f2ca1045d6bdeec08e8d0bf714ebc39f9a0a95

8 years ago gcc/
Christophe Lyon [Wed, 8 Jun 2016 12:30:14 +0000 (14:30 +0200)]
gcc/
Backport from trunk r236809.
2016-05-27  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/aarch64/aarch64-modes.def (CC_ZESWP, CC_SESWP): Delete.
* config/aarch64/aarch64.c (aarch64_select_cc_mode): Remove condition
that returns CC_SESWPmode and CC_ZESWPmode.
(aarch64_get_condition_code_1): Remove handling of CC_SESWPmode
and CC_SESWPmode.
(aarch64_rtx_costs): Likewise.

Change-Id: I16c34eba3fc7c0eb4ba137cb2a7a4efdcd22c1d1

8 years ago gcc/
Christophe Lyon [Wed, 8 Jun 2016 12:29:41 +0000 (14:29 +0200)]
gcc/
Backport from trunk r236770.
2016-05-26  Wilco Dijkstra  <wdijkstr@arm.com>

* config/aarch64/aarch64-simd.md (aarch64_combinez):
Add ? to integer variant.
(aarch64_combinez_be): Likewise.

Change-Id: I941be3250c63e39e7244b7a77a98f516a1e59ef9

8 years ago gcc/
Christophe Lyon [Wed, 8 Jun 2016 12:29:58 +0000 (14:29 +0200)]
gcc/
Backport from trunk r236771.
2016-05-26  Wilco Dijkstra  <wdijkstr@arm.com>

* config/aarch64/aarch64.c (aarch64_case_values_threshold):
Return a better case_values_threshold when optimizing.

Change-Id: Id81db573af8ef3e579688965a291f24378eb2349

8 years ago gcc/testsuite/
Christophe Lyon [Wed, 8 Jun 2016 12:29:25 +0000 (14:29 +0200)]
gcc/testsuite/
Backport from trunk r236769.
2016-05-26  Thomas Preud'homme  <thomas.preudhomme@arm.com>

* gcc.dg/plugin/plugin.exp: skip tail call tests for Thumb-1.

Change-Id: I14c235751e0956cb7ffba2a4d91b1887296e9f66

8 years ago gcc/
Christophe Lyon [Wed, 8 Jun 2016 12:28:52 +0000 (14:28 +0200)]
gcc/
Backport from trunk r236635.
2016-05-24  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

PR target/69857
* config/arm/arm.c (gen_operands_ldrd_strd): Remove bogus early
return.  Reindent transformation comment and mention the ARM state
behavior.

Change-Id: Id4324d4225c2438b9f90821bc8f3f9eaef5676a2

8 years ago gcc/
Christophe Lyon [Wed, 8 Jun 2016 12:27:46 +0000 (14:27 +0200)]
gcc/
Backport from trunk r236461.
2016-05-19  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/arm/arm.c (arm_new_rtx_costs, SIGN_EXTEND case):
Don't add cost of inner memory when handling sign-extended
loads.

Change-Id: Ib08fe0760173305400e3018f81034d7fb892d477

8 years ago gcc/
Christophe Lyon [Wed, 8 Jun 2016 12:27:23 +0000 (14:27 +0200)]
gcc/
Backport from trunk r236360.
2016-05-18  James Greenhalgh  <james.greenhalgh@arm.com>

* config/aarch64/aarch64-simd.md
(aarch64_reduc_plus_internal<mode>): Rename to...
(reduc_plus_scal): ...This, and remove previous implementation.

Change-Id: I8a7af5fb252d27b281ae3970b0c36afd85beab0e

8 years ago gcc/
Christophe Lyon [Wed, 8 Jun 2016 12:26:45 +0000 (14:26 +0200)]
gcc/
Backport from trunk r236340.
2016-05-17  Jim Wilson  <jim.wilson@linaro.org>

* doc/cpp.texi (__GNUC__): Major version changes are no longer rare.
* doc/invoke.texi (-mnan=2008): Change signalling to signaling.
* doc/md.texi (fmin@var{m}3): Likewise.

Change-Id: I3227db074a067b379c41d048df573db0981d3af3

8 years ago gcc/
Christophe Lyon [Wed, 8 Jun 2016 12:26:28 +0000 (14:26 +0200)]
gcc/
Backport from trunk r236317.
2016-05-17  James Greenhalgh  <james.greenhalgh@arm.com>

* config/aarch64/aarch64-elf.h (ASM_OUTPUT_DEF): Delete.

Change-Id: I3e1df3bbe7bfc792e56595c28453567f66ab44cd

8 years ago gcc/testsuite/
Christophe Lyon [Wed, 8 Jun 2016 12:26:06 +0000 (14:26 +0200)]
gcc/testsuite/
Backport from trunk r236316.
2016-05-17  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* gcc.target/aarch64/cpu-diagnostics-1.c: Skip if -mcpu is overriden.
* gcc.target/aarch64/cpu-diagnostics-2.c: Likewise.
* gcc.target/aarch64/cpu-diagnostics-3.c: Likewise.
* gcc.target/aarch64/cpu-diagnostics-4.c: Likewise.

Change-Id: If2aaba1c06c6f47895e89606c4c6e1a66a8dd138

8 years ago gcc/
Christophe Lyon [Wed, 8 Jun 2016 12:25:48 +0000 (14:25 +0200)]
gcc/
Backport from trunk r236312.
2016-05-17  James Greenhalgh  <james.greenhalgh@arm.com>

* config/aarch64/aarch64.c (SHIFT_COUNT_TRUNCATED): Wrap definition
in brackets.

Change-Id: Id6fe4602d0579086d321478999183ac018b8a7fc

8 years ago gcc/
Christophe Lyon [Wed, 8 Jun 2016 12:25:30 +0000 (14:25 +0200)]
gcc/
Backport from trunk r236311.
2016-05-17  James Greenhalgh  <james.greenhalgh@arm.com>

* config/aarch64/aarch64.c
(aarch64_output_simd_mov_immediate): Make "buf_size" a variable
rather than a macro.

Change-Id: I962784b3b22b56d1efec3e25e850c5d9b99bac08

8 years ago ./
Christophe Lyon [Wed, 8 Jun 2016 12:25:13 +0000 (14:25 +0200)]
./
Backport from trunk r236290.
2016-05-16  Wilco Dijkstra  <wdijkstr@arm.com>

* doc/invoke.texi (AArch64 Options): Various updates.

Change-Id: I0c5bdd78b6957cbbf27166d0b2058d4562d3e452

8 years ago gcc/
Christophe Lyon [Wed, 8 Jun 2016 12:24:55 +0000 (14:24 +0200)]
gcc/
Backport from trunk r236285.
2016-05-16  Wilco Dijkstra  <wdijkstr@arm.com>

* config/aarch64/aarch64.md
(add<mode>3_compareC_cconly_imm): Remove use of %w.
(add<mode>3_compareC_imm): Likewise.
(<optab>si3_uxtw): Split into register and immediate variants.
(andsi3_compare0_uxtw): Likewise.
(and<mode>3_compare0): Likewise.
(and<mode>3nr_compare0): Likewise.
(stack_protect_test_<mode>): Don't use %x for memory operands.

Change-Id: I8dfd807dda7cc1256e4dd2c080d9902d4e06bc55

8 years ago gcc/
Christophe Lyon [Wed, 8 Jun 2016 12:24:38 +0000 (14:24 +0200)]
gcc/
Backport from trunk r236278.
2016-05-16  Wilco Dijkstra  <wdijkstr@arm.com>

 * gcc/config/aarch64/aarch64.md (aarch64_ashl_sisd_or_int_<mode>3):
Split integer shifts into shift_reg and bfm.
(aarch64_lshr_sisd_or_int_<mode>3): Likewise.
(aarch64_ashr_sisd_or_int_<mode>3): Likewise.
(ror<mode>3_insn): Likewise.
(<optab>si3_insn_uxtw): Likewise.
(<optab><mode>3_insn): Change to rotate_imm.
(extr<mode>5_insn_alt): Likewise.
(extrsi5_insn_uxtw): Likewise.
(extrsi5_insn_uxtw_alt): Likewise.

Change-Id: Iddbe1d52593cfc3c574a454809ec38c622a03fdb

8 years ago gcc/testsuite/
Christophe Lyon [Wed, 8 Jun 2016 12:24:00 +0000 (14:24 +0200)]
gcc/testsuite/
Backport from trunk r236265.
2016-05-16  Jiong Wang  <jiong.wang@arm.com>

PR testsuite/70227
* g++.dg/lto/pr69589_0.C: Skip arm and aarch64 bare-metal targets.

Change-Id: I488fa18e6c4332b3a9d598c9adabde3843a78819

8 years ago gcc/
Christophe Lyon [Wed, 8 Jun 2016 12:23:46 +0000 (14:23 +0200)]
gcc/
Backport from trunk r236197.
2016-05-13  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

* config/aarch64/aarch64.c (TARGET_OMIT_STRUCT_RETURN_REG): Set
to true.

gcc/testsuite/
Backport from trunk r236197.
2016-05-13  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

* gcc.target/aarch64/struct_return.c: New test.

Change-Id: I619c70a6de543ea8c10059592671b09059ab4b52

8 years ago gcc/
Christophe Lyon [Wed, 8 Jun 2016 12:23:31 +0000 (14:23 +0200)]
gcc/
Backport from trunk r236024.
2016-05-09  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/arm/arm.md (probe_stack): Add modes to set source
and destination.

Change-Id: Idea717b580026961e84cedc53c31926706973375

8 years ago gcc/
Christophe Lyon [Wed, 8 Jun 2016 12:22:47 +0000 (14:22 +0200)]
gcc/
Backport from trunk r235877.
2016-05-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>

* config.gcc: Error out when conflicting multilib is detected.  Do not
loop over multilibs since no combination is legal.

Change-Id: I9b922e82a32d0a3ebe3e8d7ba046f593ccfef3b4

8 years ago gcc/
Christophe Lyon [Wed, 8 Jun 2016 12:21:55 +0000 (14:21 +0200)]
gcc/
Backport from trunk r235538.
2016-04-27  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>

* params.def (MIN_PARTITION_SIZE): Set default value to 10000.

Change-Id: I72b2e59ef238f4f963576e9075f25e2fee231a11

8 years ago gcc/
Christophe Lyon [Wed, 8 Jun 2016 12:22:25 +0000 (14:22 +0200)]
gcc/
Backport from trunk r235569.
2016-04-28  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* internal-fn.c (expand_arith_overflow): Convert preprocessor check
for WORD_REGISTER_OPERATIONS to runtime check.

Change-Id: I5990208a49b9edc58e04bf14c3876459a42dbb80

8 years ago gcc/
Christophe Lyon [Wed, 8 Jun 2016 12:21:09 +0000 (14:21 +0200)]
gcc/
Backport from trunk r235478.
2016-04-27  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>

* params.def (MAX_PARTITION_SIZE): New param.
* invoke.texi: Document lto-max-partition.

gcc/lto/
Backport from trunk r235478.
2016-04-27  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>

* lto-partition.h (lto_balanced_map): New parameter.
* lto-partition.c (lto_balanced_map): New parameter
max_partition_size.
Check if partition size is greater than max_partition_size.
* lto.c (do_whole_program_analysis): Adjust calls to
lto_balanced_map() to pass 2nd argument.

Change-Id: I4a8692c9278b4563ac2d6f97a5fbb586b4eb4450

8 years ago gcc/testsuite/
Christophe Lyon [Wed, 8 Jun 2016 12:20:22 +0000 (14:20 +0200)]
gcc/testsuite/
Backport from trunk r235372.
2016-04-22  Christophe Lyon  <christophe.lyon@linaro.org>

* lib/gcc-dg.exp (${tool}_load): Add default return value handler.

Change-Id: I4d658038f70c9101e8e5747b508634772a7ed681

8 years ago libgcc/
Christophe Lyon [Wed, 8 Jun 2016 12:18:51 +0000 (14:18 +0200)]
libgcc/
Backport from trunk r235291.
2016-04-20  Martin Galvan  <martin.galvan@tallertechnologies.com>

* config/arm/ieee754-df.S: Fix typos in comments.

Change-Id: Ic13d425bda6728b0aba59509706a9baea5bbf629

8 years ago gcc/testsuite/
Christophe Lyon [Tue, 7 Jun 2016 12:30:54 +0000 (14:30 +0200)]
gcc/testsuite/
Backport from trunk r236382.
2016-05-18  Christophe Lyon  <christophe.lyon@linaro.org>

* gcc.target/aarch64/advsimd-intrinsics/vreinterpret.c: Fix typo
in comment.

gcc/testsuite/
Backport from trunk r236383.
2016-05-18  Christophe Lyon  <christophe.lyon@linaro.org>

* gcc.target/aarch64/advsimd-intrinsics/vmul.c: Remove useless #ifdef.
* gcc.target/aarch64/advsimd-intrinsics/vshl.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vtst.c: Likewise.

gcc/testsuite/
Backport from trunk r236384.
2016-05-18  Christophe Lyon  <christophe.lyon@linaro.org>

* gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h (CHECK,
CHECK_FP, CHECK_CUMULATIVE_SAT): Print which type was checked.

gcc/testsuite/
Backport from trunk r236385.
2016-05-18  Christophe Lyon  <christophe.lyon@linaro.org>

* gcc.target/aarch64/advsimd-intrinsics/vsli_n.c: Add checks for
vsliq_n_s64 and vsliq_n_u64.

gcc/testsuite/
Backport from trunk r236387.
2016-05-18  Christophe Lyon  <christophe.lyon@linaro.org>

* gcc.target/aarch64/advsimd-intrinsics/vreinterpret.c: Add
missing tests for vreinterpretq_p{8,16}.

gcc/testsuite/
Backport from trunk r236388.
2016-05-18  Christophe Lyon  <christophe.lyon@linaro.org>

* gcc.target/aarch64/advsimd-intrinsics/vget_lane.c: Add fp16 tests.

gcc/
Backport from trunk r236576.
2016-05-23  Christophe Lyon  <christophe.lyon@linaro.org>

* config/arm/arm_neon.h (vtst_p16, vtstq_p16): New.

gcc/testsuite/
Backport from trunk r236576.
2016-05-23  Christophe Lyon  <christophe.lyon@linaro.org>

* gcc.target/aarch64/advsimd-intrinsics/vtst.c: Add tests for
vtst_p8, vtstq_p8, vtst_p16 and vtstq_p16.

gcc/testsuite/
Backport from trunk r236577.
2016-05-23  Christophe Lyon  <christophe.lyon@linaro.org>

* gcc.target/aarch64/advsimd-intrinsics/vstX_lane.c: Add fp16 tests.

gcc/testsuite/
Backport from trunk r236578.
2016-05-23  Christophe Lyon  <christophe.lyon@linaro.org>

* gcc.target/aarch64/advsimd-intrinsics/vrnd.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vrndX.inc: New.
* gcc.target/aarch64/advsimd-intrinsics/vrnda.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vrndm.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vrndn.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vrndp.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vrndx.c: New.

gcc/testsuite/
Backport from trunk r236579.
2016-05-23  Christophe Lyon  <christophe.lyon@linaro.org>

* gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h (result):
Add poly64x1_t and poly64x2_t cases if supported.
* gcc.target/aarch64/advsimd-intrinsics/compute-ref-data.h
(buffer, buffer_pad, buffer_dup, buffer_dup_pad): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/p64_p128.c: New file.
* gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p128.c: New file.
* gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p64.c: New file.

gcc/testsuite/
Backport from trunk r236580.
2016-05-23  Christophe Lyon  <christophe.lyon@linaro.org>

* gcc.target/aarch64/advsimd-intrinsics/vreinterpret.c: Add fp16 tests.
* gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p128.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p64.c: Likewise.

gcc/testsuite/
Backport from trunk r237171.
2016-06-07  Christophe Lyon  <christophe.lyon@linaro.org>

* gcc.target/aarch64/advsimd-intrinsics/p64_p128.c: Remove
spurious debug code.

Change-Id: I40762a95815335d7a50b266b11ebdca41ddef67a