Mike Blumenkrantz [Thu, 7 Apr 2022 16:04:57 +0000 (12:04 -0400)]
zink: set nir_shader_compiler_options::has_txs
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15804>
Jason Ekstrand [Tue, 5 Apr 2022 20:59:38 +0000 (15:59 -0500)]
nir: Dont set coord_components on txs
Fixes:
e1fc23265f9f ("nir: Add a pass for lowering CL-style image ops to texture ops")
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15758>
Mike Blumenkrantz [Thu, 7 Apr 2022 18:28:55 +0000 (14:28 -0400)]
kopper: add a dmabuf-free image interface for use with sw drivers
sw drivers don't support modifiers or dmabufs or any of that, so separate
interfaces are needed to avoid advertising extensions that will only lead
to crashes
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15802>
Erik Faye-Lund [Wed, 6 Apr 2022 12:35:00 +0000 (14:35 +0200)]
dzn: add missing space
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15790>
Erik Faye-Lund [Thu, 7 Apr 2022 11:43:27 +0000 (13:43 +0200)]
dzn: drop unused include
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15790>
Erik Faye-Lund [Thu, 7 Apr 2022 12:02:57 +0000 (14:02 +0200)]
dzn: drop incorrect return statement
We're returning nothing here. Let's not do that.
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15790>
Erik Faye-Lund [Fri, 25 Mar 2022 15:52:42 +0000 (16:52 +0100)]
dzn: drop unused header
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15790>
Erik Faye-Lund [Fri, 25 Mar 2022 14:43:06 +0000 (15:43 +0100)]
dzn: remove unused variable
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15790>
Erik Faye-Lund [Fri, 25 Mar 2022 14:09:00 +0000 (15:09 +0100)]
dzn: fixup indent
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15790>
Erik Faye-Lund [Fri, 25 Mar 2022 13:11:44 +0000 (14:11 +0100)]
dzn: add D3D12_IGNORE_SDK_LAYERS define
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15790>
Erik Faye-Lund [Fri, 25 Mar 2022 13:07:12 +0000 (14:07 +0100)]
dzn: drop needless includes
These include either dzn_nir.h or dzn_internal.h which already includes
this header.
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15790>
Erik Faye-Lund [Tue, 5 Apr 2022 15:31:45 +0000 (17:31 +0200)]
dzn: remove unused struct
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15790>
Erik Faye-Lund [Fri, 25 Mar 2022 12:16:26 +0000 (13:16 +0100)]
dzn: remove needless using
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15790>
Mike Blumenkrantz [Thu, 7 Apr 2022 13:16:55 +0000 (09:16 -0400)]
zink: handle swapchain readbacks when a present is pending
if a present semaphore is pending, don't try to create another one
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15784>
Mike Blumenkrantz [Wed, 6 Apr 2022 20:50:37 +0000 (16:50 -0400)]
zink: only apply swapchain behavior in flush_resource for swapchain images
these could otherwise be pixmaps or dmabufs
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15784>
Mike Blumenkrantz [Wed, 6 Apr 2022 20:49:03 +0000 (16:49 -0400)]
zink: handle deferred swapchain resource flushing
if the swapchain image hasn't been acquired yet, flag it as a deferred
present so it can be picked up on flush
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15784>
Mike Blumenkrantz [Wed, 6 Apr 2022 20:47:52 +0000 (16:47 -0400)]
egl: implement more hooks for swrast
these just need to use swapbuffers instead of flush
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15784>
Benjamin Cheng [Thu, 7 Apr 2022 16:56:49 +0000 (12:56 -0400)]
anv: drop from_wsi bit from anv_image
It was originally introduced in
ca791f5c but it was never actually set
anywhere. It doesn't serve any purpose other than some sanity checking
so let's clean it up for now.
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15799>
Ian Romanick [Mon, 14 Feb 2022 22:07:18 +0000 (14:07 -0800)]
intel/fs: Better handle constant sources of FS_OPCODE_PACK_HALF_2x16_SPLIT
I noticed that a *LOT* of fragment shaders in Shadow of the Tomb Raider,
for instance, end up with a sequence of NIR like:
vec1 32 ssa_2 = load_const (0x00000000 = 0.000000)
...
vec1 32 ssa_191 = pack_half_2x16_split ssa_188, ssa_2
vec1 32 ssa_192 = pack_half_2x16_split ssa_189, ssa_2
vec1 32 ssa_193 = pack_half_2x16_split ssa_190, ssa_2
This results in an assembly sequence like:
mov(8) g28<1>UD 0x00000000UD
mov(8) g21<2>HF g28<8,8,1>F
shl(8) g21<1>UD g21<8,8,1>UD 0x00000010UD
mov(8) g21<2>HF g25<8,8,1>F
mov(8) g19<2>HF g28<8,8,1>F
shl(8) g19<1>UD g19<8,8,1>UD 0x00000010UD
mov(8) g19<2>HF g23<8,8,1>F
mov(8) g20<2>HF g28<8,8,1>F
shl(8) g20<1>UD g20<8,8,1>UD 0x00000010UD
mov(8) g20<2>HF g24<8,8,1>F
After this commit, the generated assembly is:
mov(8) g21<1>UD 0x00000000UD
mov(8) g21<2>HF g23<8,8,1>F
mov(8) g19<1>UD 0x00000000UD
mov(8) g19<2>HF g17<8,8,1>F
mov(8) g20<1>UD 0x00000000UD
mov(8) g20<2>HF g18<8,8,1>F
Tiger Lake, Ice Lake, Skylake, and Haswell had similar results. (Ice Lake shown)
total instructions in shared programs:
20119086 ->
20119034 (<.01%)
instructions in affected programs: 9056 -> 9004 (-0.57%)
helped: 8
HURT: 0
helped stats (abs) min: 2 max: 16 x̄: 6.50 x̃: 4
helped stats (rel) min: 0.29% max: 1.75% x̄: 1.00% x̃: 0.98%
95% mean confidence interval for instructions value: -11.01 -1.99
95% mean confidence interval for instructions %-change: -1.56% -0.44%
Instructions are helped.
total cycles in shared programs:
861019414 ->
861021044 (<.01%)
cycles in affected programs: 279862 -> 281492 (0.58%)
helped: 4
HURT: 2
helped stats (abs) min: 6 max: 936 x̄: 239.00 x̃: 7
helped stats (rel) min: 0.03% max: 8.13% x̄: 2.09% x̃: 0.09%
HURT stats (abs) min: 18 max: 2568 x̄: 1293.00 x̃: 1293
HURT stats (rel) min: 0.36% max: 1.14% x̄: 0.75% x̃: 0.75%
95% mean confidence interval for cycles value: -972.56 1515.89
95% mean confidence interval for cycles %-change: -4.77% 2.49%
Inconclusive result (value mean confidence interval includes 0).
Broadwell
total instructions in shared programs:
17812327 ->
17812263 (<.01%)
instructions in affected programs: 9867 -> 9803 (-0.65%)
helped: 8
HURT: 0
helped stats (abs) min: 2 max: 28 x̄: 8.00 x̃: 4
helped stats (rel) min: 0.32% max: 1.80% x̄: 1.00% x̃: 0.95%
95% mean confidence interval for instructions value: -15.46 -0.54
95% mean confidence interval for instructions %-change: -1.54% -0.47%
Instructions are helped.
total cycles in shared programs:
904768620 ->
904773291 (<.01%)
cycles in affected programs: 454799 -> 459470 (1.03%)
helped: 4
HURT: 4
helped stats (abs) min: 36 max: 586 x̄: 344.50 x̃: 378
helped stats (rel) min: 0.47% max: 4.04% x̄: 2.01% x̃: 1.77%
HURT stats (abs) min: 1 max: 5572 x̄: 1512.25 x̃: 238
HURT stats (rel) min: <.01% max: 2.77% x̄: 1.46% x̃: 1.53%
95% mean confidence interval for cycles value: -1122.40 2290.15
95% mean confidence interval for cycles %-change: -2.26% 1.71%
Inconclusive result (value mean confidence interval includes 0).
total spills in shared programs: 18581 -> 18579 (-0.01%)
spills in affected programs: 323 -> 321 (-0.62%)
helped: 1
HURT: 0
total fills in shared programs: 24985 -> 24981 (-0.02%)
fills in affected programs: 1348 -> 1344 (-0.30%)
helped: 1
HURT: 0
Tiger Lake, Ice Lake, and Skylake had similar results. (Ice Lake shown)
Instructions in all programs:
143585431 ->
143513657 (-0.0%)
Instructions helped: 14403
Cycles in all programs:
8439312778 ->
8439371578 (+0.0%)
Cycles helped: 10570
Cycles hurt: 3290
Gained: 146
Lost: 74
All of the lost and gained fossil-db shaders are SIMD32 fragment
shaders. 14,247 of the affected shaders are from Shadow of the Tomb
Raider. 154 are from Batman Arkham Origins, and the remaining two are
from Octopath Traveler.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15089>
Alyssa Rosenzweig [Sun, 27 Feb 2022 20:46:17 +0000 (15:46 -0500)]
pan/bi: Imply round mode most of the time
Much less noisy, and provides a path to further improvements. There is a slight
behaviour change: int-to-float conversions now use RTE instead of RTZ. For
32-bit opcodes, this affects conversions of integers with magnitude greater than
2^23 by at most 1 ulp. As this behaviour is unspecified in GLSL, this change is
believed to be acceptable.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15187>
Alyssa Rosenzweig [Sun, 27 Feb 2022 20:22:03 +0000 (15:22 -0500)]
pan/bi: Use should_skip in bi_builder generation
To avoid further code duplication.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15187>
Alyssa Rosenzweig [Sun, 27 Feb 2022 20:46:03 +0000 (15:46 -0500)]
pan/bi: Mark some opcodes as default round-to-zero
Conversions to integer have different rounding rules.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15187>
Alyssa Rosenzweig [Sun, 27 Feb 2022 19:46:15 +0000 (14:46 -0500)]
pan/bi: Don't use funny round modes in tests
To prepare for defeaturing round modes, replace uses of round-to-positive with
round-to-even in our unit tests. This doesn't meaningfully impact test coverage;
there is no way to generate that round mode.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15187>
Alyssa Rosenzweig [Thu, 7 Apr 2022 15:28:27 +0000 (11:28 -0400)]
panfrost: Use track_image_access on Bifrost
Equivalent logic, as previously extracted.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15797>
Alyssa Rosenzweig [Thu, 7 Apr 2022 15:26:10 +0000 (11:26 -0400)]
panfrost: Add helpers to emit Valhall data structures
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15797>
Alyssa Rosenzweig [Thu, 7 Apr 2022 15:19:39 +0000 (11:19 -0400)]
panfrost: Adapt viewport/scissor to Valhall
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15797>
Alyssa Rosenzweig [Thu, 7 Apr 2022 15:18:17 +0000 (11:18 -0400)]
panfrost: Hide some Bifrost-specific functions
Pertains to data structures removed in Valhall.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15797>
Alyssa Rosenzweig [Thu, 7 Apr 2022 15:32:54 +0000 (11:32 -0400)]
panfrost: Add valhall_has_blend_shader field
Required in a hot path for silly historical reasons, so add a field to save a
pre-computed value thereof.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15797>
Alyssa Rosenzweig [Thu, 7 Apr 2022 14:39:05 +0000 (10:39 -0400)]
panfrost: Add Valhall fields to panfrost_batch
There are new data structures that we need to (dirty) track. Add the
corresponding fields so we can proceed as with Bifrost dirty tracking.
Trivial increase in memory usage, but that should not matter as batches are
few.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15797>
Alyssa Rosenzweig [Thu, 7 Apr 2022 14:28:44 +0000 (10:28 -0400)]
panfrost: Split out allow_fpk helper
For sharing between Bifrost's renderer state descriptor and Valhall's draw call
descriptor, which require the same logic in different places.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15797>
Alyssa Rosenzweig [Thu, 7 Apr 2022 14:27:14 +0000 (10:27 -0400)]
panfrost: Split out panfrost_get_blend_shaders
The same logic is useful on Valhall.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15797>
Alyssa Rosenzweig [Thu, 7 Apr 2022 14:26:49 +0000 (10:26 -0400)]
panfrost: Specialize vertex state for Valhall
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15797>
Alyssa Rosenzweig [Thu, 7 Apr 2022 14:26:24 +0000 (10:26 -0400)]
panfrost: Add a pool to sampler_view
So we can allocate temporary sampler views for writeable images on Valhall.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15797>
Alyssa Rosenzweig [Tue, 5 Apr 2022 16:38:47 +0000 (12:38 -0400)]
panfrost: Adapt panfrost_rasterizer for v9
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15797>
Alyssa Rosenzweig [Wed, 30 Mar 2022 16:39:49 +0000 (12:39 -0400)]
panfrost: Don't set a default for blend count
Unnecessary.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15797>
Alyssa Rosenzweig [Wed, 30 Mar 2022 16:39:17 +0000 (12:39 -0400)]
panfrost: Don't check alpha test in fs_required on Bifrost+
Alpha testing is only native on Midgard. Saves a few instructions.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15797>
Ian Romanick [Wed, 6 Apr 2022 21:12:09 +0000 (14:12 -0700)]
intel/compiler: Fix sample_d messages on DG2
DG2 can only do sample_d and sample_d_c on 1D and 2D surfaces. The
maximum number of gradient components and coordinate components should
be 2. In spite of this limitation, the Bspec lists a mysterious R
component before the min_lod, so the maximum coordinate components is 3.
Fixes the following Vulkan CTS failures on DG2:
dEQP-VK.glsl.texture_functions.texturegradclamp.isampler1d_fragment
dEQP-VK.glsl.texture_functions.texturegradclamp.isampler2d_fragment
dEQP-VK.glsl.texture_functions.texturegradclamp.sampler1d_fixed_fragment
dEQP-VK.glsl.texture_functions.texturegradclamp.sampler1d_float_fragment
dEQP-VK.glsl.texture_functions.texturegradclamp.sampler2d_fixed_fragment
dEQP-VK.glsl.texture_functions.texturegradclamp.sampler2d_float_fragment
dEQP-VK.glsl.texture_functions.texturegradclamp.usampler1d_fragment
dEQP-VK.glsl.texture_functions.texturegradclamp.usampler2d_fragment
The Fixes: tag below is a bit misleading. This commit fixes some test
cases similar to ones fixed by the Fixes: commit. I just want to make
sure this commit gets applied everywhere that commit was also applied.
Fixes:
635ed58e527 ("intel/compiler: Lower txd for 3D samplers on XeHP.")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15781>
Boris Brezillon [Thu, 7 Apr 2022 09:48:56 +0000 (02:48 -0700)]
dzn: Pass a NULL ralloc context to dxil_create_validator()
instance is not allocated with ralloc, we can't pass it as a ralloc
context to dxil_create_validator().
Fixes:
09c2016d6be ("dzn: use dxil_validator")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15787>
Jason Ekstrand [Mon, 21 Mar 2022 23:17:54 +0000 (18:17 -0500)]
vulkan,docs: Add documentation for Vulkan dispatch
Acked-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15472>
Jason Ekstrand [Tue, 22 Mar 2022 22:20:06 +0000 (17:20 -0500)]
vulkan,docs: Document vk_device
Acked-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15472>
Jason Ekstrand [Mon, 21 Mar 2022 23:18:04 +0000 (18:18 -0500)]
vulkan,docs: Document vk_physical_device
Acked-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15472>
Jason Ekstrand [Sat, 19 Mar 2022 00:25:48 +0000 (19:25 -0500)]
vulkan,docs: Document vk_instance
Acked-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15472>
Jason Ekstrand [Fri, 18 Mar 2022 22:31:35 +0000 (17:31 -0500)]
vulkan,docs: Document vk_object_base
Acked-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15472>
Jason Ekstrand [Fri, 18 Mar 2022 22:27:06 +0000 (17:27 -0500)]
vulkan: vk_object_base_init/finish have no unused parameters
Acked-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15472>
Jason Ekstrand [Fri, 10 Dec 2021 19:24:49 +0000 (13:24 -0600)]
anv/formats: Relax usage checks if EXTENDED_USAGE_BIT is set
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14153>
Roman Stratiienko [Mon, 14 Mar 2022 15:24:30 +0000 (17:24 +0200)]
android: Set max platform-sdk-version to 10000
platform-sdk-version::max require updating every time new Android releases.
It makes sense to set this value to some unreachable maximum value to avoid
such patches. Such approach will allow to use stable mesa3d without any
changes with newest Android as well.
As was suggested by Yiwei Zhang we can use value 10000 that corresponds to
CUR_DEVELOPMENT [1] definition which may be used by AOSP/master in between
of Android major releases.
[1]: https://developer.android.com/reference/android/os/Build.VERSION_CODES#CUR_DEVELOPMENT
Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15747>
Alyssa Rosenzweig [Thu, 7 Apr 2022 14:41:45 +0000 (10:41 -0400)]
panfrost: Split out image access tracking
This logic is not device-specific. It is pulled from our existing Bifrost image
implementation and will be reused for Valhall.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15795>
Alyssa Rosenzweig [Thu, 7 Apr 2022 14:40:44 +0000 (10:40 -0400)]
panfrost: Add helpers to set batch masks
This logic is not device specific and will be used for both Bifrost and Valhall.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15795>
Alyssa Rosenzweig [Thu, 7 Apr 2022 14:32:01 +0000 (10:32 -0400)]
panfrost: Disable PIPE_CAP_PRIMITIVE_RESTART on v9
Valhall removed the ability to set an explicit primitive restart index as
required by desktop OpenGL, in favour of fixed primitive restart indices only as
required by OpenGL ES.
Set the CAPs accordingly so that mesa/st lowers unusual primitive restart
indices at draw call time.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15795>
Alyssa Rosenzweig [Thu, 7 Apr 2022 14:27:34 +0000 (10:27 -0400)]
panfrost: Make alpha=0 NOP / 1 store Bifrost only
These fields were removed in Valhall in favour of a simpler overdraw mechanism.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15795>
Alyssa Rosenzweig [Tue, 5 Apr 2022 16:40:08 +0000 (12:40 -0400)]
panfrost: Move assign_vertex_buffer to pan_helpers
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15795>
Alyssa Rosenzweig [Thu, 3 Feb 2022 18:29:00 +0000 (13:29 -0500)]
panfrost: Hide AFBC on Valhall
The relevant data structures have been shuffled a bit. We need to wire up AFBC
for Valhall; however, that's out of scope for the initial bring up. Just hide it
so we can build.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15795>
Alyssa Rosenzweig [Tue, 5 Apr 2022 16:36:45 +0000 (12:36 -0400)]
panfrost: Adapt pan_shader.h for Valhall
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15795>
Alyssa Rosenzweig [Tue, 5 Apr 2022 16:35:25 +0000 (12:35 -0400)]
panfrost: Add shader_stage helper
For Valhall, which specifies these in the shader program descriptor.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15795>
Alyssa Rosenzweig [Tue, 5 Apr 2022 16:33:33 +0000 (12:33 -0400)]
panfrost: Add panfrost_make_resource_table helper
For Valhall drivers.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15795>
Alyssa Rosenzweig [Tue, 5 Apr 2022 16:33:10 +0000 (12:33 -0400)]
panfrost: Hide parts of pan_encoder.h for Valhall
These pertain to data structures that no longer exist.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15795>
Alyssa Rosenzweig [Thu, 31 Mar 2022 14:39:51 +0000 (10:39 -0400)]
panfrost: Control tiler memory usage
Ensure we don't hit OOM when rendering at 8192x8192 on Valhall by disabling
the smallest bin size of the hierarchy mask.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15795>
Alyssa Rosenzweig [Thu, 31 Mar 2022 14:21:07 +0000 (10:21 -0400)]
panfrost: Handle stencil texturing on Valhall
Use a Bifrost compatible path. It's not clear this is optimal but it passes the
tests and is no worse than what we do on Bifrost.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15795>
Alyssa Rosenzweig [Sun, 23 Jan 2022 20:50:58 +0000 (15:50 -0500)]
panfrost: Handle Valhall texturing
Surface descriptors have been replaced by plane descriptors, which facilitate
the intermediate layout of textures. This allows for more sophisticated handling
of texture compressions, of particular to interest to copy_image. However, it
requires a considerable amount of new logic to handle.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15795>
Krunal Patel [Tue, 5 Apr 2022 11:41:20 +0000 (17:11 +0530)]
frontend/va: Create decoder once the max_references is updated
Issue: When a video is decoded where the max_references is updated the
decoder keeps using same old value. This results into green patches and
decoding is not proper.
Root Cause: The max_references is updated only once when the instance is
created for the first time.
Fix: Added a check along with the context->decoder to check if the
context->templat.max_references has changed. If yes, then we go ahead
and create the decoder again.
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Krunal Patel <krunalkumarmukeshkumar.patel@amd.corp-partner.google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15750>
Mike Blumenkrantz [Thu, 7 Apr 2022 13:54:08 +0000 (09:54 -0400)]
zink: ci updates
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15536>
Mike Blumenkrantz [Mon, 21 Mar 2022 18:51:37 +0000 (14:51 -0400)]
zink: export PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15536>
Mike Blumenkrantz [Mon, 21 Mar 2022 18:51:19 +0000 (14:51 -0400)]
zink: run the cubemap -> array compiler pass if the shader key is set
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15536>
Mike Blumenkrantz [Mon, 21 Mar 2022 18:50:12 +0000 (14:50 -0400)]
zink: handle nonseamless cube sampler binding
now when a cube is sampled with a nonseamless sampler, the relevant shader
stage is flagged for a variant update, the
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15536>
Mike Blumenkrantz [Mon, 21 Mar 2022 18:52:31 +0000 (14:52 -0400)]
zink: create an array view for all cube samplerviews
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15536>
Mike Blumenkrantz [Mon, 21 Mar 2022 18:52:02 +0000 (14:52 -0400)]
zink: set nonseamless hint for sampler states
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15536>
Mike Blumenkrantz [Mon, 21 Mar 2022 18:48:19 +0000 (14:48 -0400)]
zink: handle shader key variants that have nonseamless cubemaps
this is just the program-based handling, which means finding the right
variant and/or creating new ones based on matching a 32bit mask indicating
which textures must be rewritten
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15536>
Mike Blumenkrantz [Mon, 21 Mar 2022 23:45:30 +0000 (19:45 -0400)]
zink: specify struct member name when copying inline uniforms for gfx variants
avoid memory mismatch if inline uniform values aren't first member of struct
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15536>
Mike Blumenkrantz [Mon, 21 Mar 2022 20:22:15 +0000 (16:22 -0400)]
zink: support nir_op_imod
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15536>
Mike Blumenkrantz [Mon, 21 Mar 2022 18:46:26 +0000 (14:46 -0400)]
zink: add a gently mangled version of the d3d12 cubemap -> array compiler pass
this differs in that it doesn't handle images and also doesn't filter
based on sampler type, instead using a 32bit mask for determining which
samplers to rewrite
also zink doesn't use sampler derefs
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15536>
Mike Blumenkrantz [Mon, 21 Mar 2022 16:39:07 +0000 (12:39 -0400)]
zink: rename a variable
no functional changes
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15536>
Alyssa Rosenzweig [Wed, 23 Mar 2022 14:44:05 +0000 (10:44 -0400)]
pan/va: Add LD_TILE.v3.f16 packing test
This tests the staging register behaviour.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
Alyssa Rosenzweig [Thu, 7 Apr 2022 13:47:46 +0000 (09:47 -0400)]
pan/bi: Consider flow control in DCE
We don't want to remove instructions like `NOP.wait` on Valhall; this would be
tantamount to deleting barriers.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
Alyssa Rosenzweig [Thu, 31 Mar 2022 15:08:17 +0000 (11:08 -0400)]
pan/bi: Don't lower vertex_id for malloc IDVS
Based on hardware behaviour, it appears vertex_id is zero-based with the legacy
geometry flow but not with the new malloc IDVS flow. Since the geometry flow is
per-shader (not per-machine), there's not a good way to communicate this to NIR.
Rather than trying to shoehorn this obscure detail into NIR, just do the
lowering ourselves instead of in NIR. It's not much more code anyway.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
Alyssa Rosenzweig [Wed, 30 Mar 2022 20:31:39 +0000 (16:31 -0400)]
pan/bi: Report whether workgroups can be merged
This flag gates a Valhall hardware optimization for compute shaders.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
Alyssa Rosenzweig [Wed, 23 Mar 2022 16:21:12 +0000 (12:21 -0400)]
pan/bi: Avoid masked writes for now
Our swizzle lowering optimizations depend on replication of scalar fp16. This
holds on Bifrost (at least for now), but not on Valhall which has proper support
for write masks. For now, enforce Bifrost-compatible behaviour as we do not make
use of the write masks on Valhall yet.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
Alyssa Rosenzweig [Fri, 21 Jan 2022 19:05:39 +0000 (14:05 -0500)]
pan/bi: Generate LD_BUFFER on Valhall
Replace LOAD.ubo with LD_BUFFER since the .ubo segment doesn't exist on Valhall.
We could do this with a lowering pass instead but this is probably fine.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
Alyssa Rosenzweig [Sun, 13 Mar 2022 15:29:23 +0000 (11:29 -0400)]
pan/bi: Make psiz variants
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
Alyssa Rosenzweig [Fri, 28 Jan 2022 17:07:41 +0000 (12:07 -0500)]
pan/bi: Lower gl_PointSize to FP16 on Valhall
It is unclear if FP32 point sizes are supported on Valhall -- I can't get the
DDK to use them at any rate. Always lower them to FP16 and store them as FP16
for hardware use.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
Alyssa Rosenzweig [Thu, 3 Feb 2022 21:16:36 +0000 (16:16 -0500)]
pan/bi: Force psiz to mediump
To match driver behaviour.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
Alyssa Rosenzweig [Sat, 11 Dec 2021 23:15:03 +0000 (18:15 -0500)]
pan/bi: Set table for Valhall LD_ATTR
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
Alyssa Rosenzweig [Wed, 8 Dec 2021 00:14:58 +0000 (19:14 -0500)]
pan/bi: Emit Valhall-style varying stores
Varying stores was changed in Valhall. Rather than using attribute descriptors
like on Bifrost and Midgard, on Valhall we store to memory directly with
hardware-allocated buffers. This requires a new implementation of store_output,
with special provisions for writing gl_PointSize from a position shader.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
Alyssa Rosenzweig [Tue, 7 Dec 2021 23:56:24 +0000 (18:56 -0500)]
pan/bi: Emit Valhall-style varying loads
Memory-allocated IDVS requires special varying load instructions that take an
offset into the hardware-allocated varying buffer, as opposed to a varying slot.
Emit these instructions.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
Alyssa Rosenzweig [Thu, 24 Mar 2022 20:39:52 +0000 (16:39 -0400)]
pan/bi: Track whether the malloc IDVS flow is used
This affects what instructions the fragment shader uses. Will be used for the
legacy geometry flow in blit shaders. Whether that is a good idea remains to be
seen, admittedly.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
Alyssa Rosenzweig [Tue, 3 Aug 2021 15:11:42 +0000 (11:11 -0400)]
pan/bi: Handle Valhall texturing in helper analysis
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
Alyssa Rosenzweig [Wed, 23 Mar 2022 16:05:43 +0000 (12:05 -0400)]
pan/bi: Emit Valhall texture instructions
Valhall uses an updated version fo the TEXC path. To avoid disrupting the
existing Bifrost code, add a new Valhall-specific texture path that generates
the new-style texture instructions.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
Alyssa Rosenzweig [Thu, 29 Jul 2021 21:39:14 +0000 (17:39 -0400)]
pan/bi: Specialize BLEND emit for Valhall
Fewer arguments compared to Bifrost; the corresponding information is encoded in
a Valhall-specific blend shader prologue instead.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
Alyssa Rosenzweig [Sun, 9 Jan 2022 21:01:34 +0000 (16:01 -0500)]
pan/bi: Waits before tilebuffer access on Valhall
On Bifrost, this is handled in the scheduler. Until we grow a Valhall scheduler,
add a NOP with the appropriate flow control. This is correct but carries a small
performance cost.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
Alyssa Rosenzweig [Tue, 21 Dec 2021 22:06:05 +0000 (17:06 -0500)]
pan/bi: Fix spilling on Valhall
We need a slightly different idiom on Valhall, since the segment modifiers no
longer exist but we now have an immediate offset.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
Alyssa Rosenzweig [Fri, 28 Jan 2022 23:16:09 +0000 (18:16 -0500)]
pan/bi: Mark LD_TILE as w=format
This tracks register usage more precisely for LD_TILE, which is an encoding
difference on Valhall.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
Alyssa Rosenzweig [Wed, 30 Mar 2022 18:11:56 +0000 (14:11 -0400)]
panfrost: Add a table for images
For the default Valhall ABI.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
Mike Blumenkrantz [Wed, 6 Apr 2022 14:49:26 +0000 (10:49 -0400)]
radv: improve failure logging for amdgpu on init
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15771>
Alyssa Rosenzweig [Thu, 31 Mar 2022 14:46:07 +0000 (10:46 -0400)]
pan/va: Allow small constants in register pairs
They are zero extended 32->64-bit. Allow this. Noticed debugging spilling on
Valhall.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15756>
Alyssa Rosenzweig [Wed, 30 Mar 2022 21:46:20 +0000 (17:46 -0400)]
pan/va: Add flow control lowering pass
Something an instruction has two logic flow controls, namely wait + reconverge.
These are orthogonal -- we need to insert a NOP to handle this. Add a lowering
pass that works out flow control to replace the ad hoc previous va_pack_flow.
Fixes dEQP-GLES31.functional.ssbo.layout.single_basic_type.shared.lowp_vec3.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15756>
Alyssa Rosenzweig [Wed, 30 Mar 2022 20:02:03 +0000 (16:02 -0400)]
pan/va: Don't truncate slots
Causes BARRIER not to work.
Fixes:
f45654af595 ("pan/va: Add packing routines")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15756>
Alyssa Rosenzweig [Wed, 30 Mar 2022 19:51:38 +0000 (15:51 -0400)]
pan/va: Model image load instructions
These use the attribute pipe, the new versions of LD_ATTR_TEX, but reading
texture descriptors instead of attribute descriptors unlike their Bifrost
predecessors.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15756>
Alyssa Rosenzweig [Wed, 30 Mar 2022 19:23:04 +0000 (15:23 -0400)]
pan/va: Pack LEA_TEX_IMM
Mostly automatic.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15756>
Alyssa Rosenzweig [Wed, 30 Mar 2022 16:45:07 +0000 (12:45 -0400)]
pan/va: Add indirect LEA_{ATTR, TEX}
For parity with Bifrost. We might need these for images.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15756>
Alyssa Rosenzweig [Wed, 30 Mar 2022 19:52:09 +0000 (15:52 -0400)]
pan/bi: Model Valhall image loads
Like LD_ATTR_TEX.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15756>
Lionel Landwerlin [Wed, 6 Apr 2022 14:20:04 +0000 (17:20 +0300)]
intel/nir: don't report progress on rayqueries if no queries
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes:
c78be5da300a ("intel/fs: lower ray query intrinsics")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15769>