nir/lower_bit_size: lower uadd_carry

8/16-bit uadd_carry can exist in SPIR-V.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7615
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19473>
(cherry picked from commit da30fb5df705d38e6d3aefadf769ec4517b9b20e)

intel/perf: fix B/C counters accumulation in non query mode

When we're not using queries, all the counters from the
MI_REPORT_PERF_COUNT are available. This is the case when using
perfetto with the global pps datasource that capture global counter
values.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 8750f43a9077 ("intel/perf: add performance query layout using MI_SRM")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18893>
(cherry picked from commit 61fef1ed726b69b28ece60fb10bd5a65fcefb296)

intel/perf: allocate cleared counter infos

This array of structure needs to be initialized to 0 as it contains a
bitset we don't explicitly clear.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 3144bc1d3369 ("intel/perf: move query_mask and location out of gen_perf_query_counter")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18893>
(cherry picked from commit e754bf6be49788e5f6604a15cd36a3324fd94a39)

anv: get rid of ilog2_round_up

__builtin_clz(value - 1) is undefined for with value=1 (because
__builtin_clz(0) is undefined).

Because we set rt_pipeline->stack_size = 1 when a ray tracing pipeline
doesn't need any stack allocation to differentiate from a dynamic size
(rt_pipeline->stack_size = 0) we can run into this undefinied behavior
issue.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: f68d64dac015 ("anv: Add support for vkCmdSetRayTracingPipelineStackSizeKHR")
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19781>
(cherry picked from commit 440da44a84022ec63e87e2c5a55ad03a244697a4)

vulkan/wsi/wayland: Set num_modifier_lists = 0 if num_drm_modifiers == 0

This case was missed in
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18826 ,
resulting in native Wayland apps failing with

 ../src/vulkan/wsi/wsi_common_drm.c:452: wsi_configure_native_image: Assertion `!"Failed to find a supported modifier!  This should never " "happen because LINEAR should always be available"' failed.

if the Wayland compositor advertises only the INVALID modifier.

Fixes: c315e20d6198 ("vulkan/wsi/wayland: Configure images via params passed to wsi_swapchain_init()")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19795>
(cherry picked from commit 8d7aa4279aa26e1a24b76b707caf423ecde1d597)

radv/rra: Fix copying accel structs that were not built yet

In the case that radv_GetEventStatus always returns true, the loop will
never exit.

Fixes: 5749806 ("radv: Add Radeon Raytracing Analyzer trace dumping utilities")
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19772>
(cherry picked from commit f24bb8194b82052b207b5c5ca1c99f47ab73dce5)

d3d12: Video Screen - Do not crash if HEVC not supported, return no support instead

Fixes: 8f654b90 ("d3d12: Fix HEVC wrong caps detection due to bad parenthesis in condition")
Signed-off-by: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19813>
(cherry picked from commit 0c4fdbaa920816c663f8ca5b768a5c3d0d66349a)

.pick_status.json: Update to f2e535e4fed5bdc13e11a443316a4b77cd5eb81a

VERSION: bump for 22.3.0-rc3

ci: avoid triggering vc4 & v3d tests on v3dv-only MRs

There are a lot of vulkan-only MRs, so we can save a lot of CI resources
by not running GL tests as well.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19680>
(cherry picked from commit bc286e8586976013936dea71dd66c4e3a3ff4605)

radv: suspend/resume XFB queries with NGG for meta operations

XFB queries enable primitives generated queries with NGG and meta
operations shouldn't be counted.

Reproduced on GFX10.3 by forcing NGG streamout.

Cc: 22.3 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19785>
(cherry picked from commit 62356e71f431684008efc7e471bddb1ada9801a3)

aco: fix FS inputs loads in WQM with 16-bit

p_wqm needs to use the same size.

Fixes: 16d2c7ad557 ("aco/gfx11: perform FS input loads in WQM")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19788>
(cherry picked from commit 50fe37070fb6b35a1468297f48021d58a9c94463)

Revert "egl/glx: add fallback for zink loading"

This reverts commit 2569215f43f6ce71fb8eb2181b36c6cf976bce2a.

Conflicts:
src/egl/main/eglapi.c
src/glx/glxext.c

It broke the fallback to swrast in some cases where zink can't work.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7333
Fixes: 2569215f43f6 ("egl/glx: add fallback for zink loading")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19681>
(cherry picked from commit 71a0a386b5df53431f1fbc9a02a78f7af22611a6)

util: include sys/time.h for timespec functions

When the futex code moved it removed an include which broke the build
on OpenBSD.

Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Fixes: 095dfc6caa2 ("util: Move the implementation of futex_wake and futex_wait from futex.h to futex.c")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19735>
(cherry picked from commit fe851d7759fca4c61245b142bb90dd561ae818f9)

aco: fix dual source blending on GFX11

Assembly looks similar to LLVM.

Cc: 22.3 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19643>
(cherry picked from commit fb781bfb0a5a401b5210d613479bbdfb90e94790)

aco: add p_dual_src_export_gfx11 for dual source blending on GFX11

Dual source blending must be in strict WQM mode.

Cc: 22.3 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19643>
(cherry picked from commit bb90d29660bb44326188809da2deec0675c8264a)

r600/sfn: Fix location for reading cube array image dimensions

Fixes: 79ca456b4837b3bc21cf9ef3c03c505c4b4909f6
        r600/sfn: rewrite NIR backend

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19755>
(cherry picked from commit 35d6e290e4119e020e8072ce4ad97bc4e9cd269b)

r600/sfn: Honor shader key w.r.t. atomic counter layout

Fixes: 79ca456b4837b3bc21cf9ef3c03c505c4b4909f6
        r600/sfn: rewrite NIR backend

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19755>
(cherry picked from commit 0ccf7ed7916bee67c8028bf251ca483b1be07d57)

aco: fix missing SCC for p_interp_gfx11 in emit_interp_mov_instr()

Fixes: 369c9b64252 ("aco: fix p_interp_gfx11 to not overwrite SCC")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19777>
(cherry picked from commit 5a3cc2d453149954923abf3d1455e8fe44e5788a)

panfrost: Use PIPE_CAP_VERTEX_ATTRIB_ELEMENT_ALIGNED_ONLY

..instead of 4BYTE_ALIGNED_ONLY. This is more correct and avoids
needless repacking. Noticed in Firefox, which was hitting the vbuf
translate path.

Fixes: e03622e50fc ("panfrost: Set STRIDE_4BYTE_ALIGNED_ONLY")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19761>
(cherry picked from commit c567e5528fd11db461f076fccd63ec1b01b96b36)

panfrost: Fix reference counting with batch->resources

Refactor accesses to batch->resources to happen through safe helpers
that update the appropriate bookkeeping. This makes it obvious that (in
particular) reference counts are updated when they should be.

The functional change is that we are now correctly unreferencing
resources during shadowing, fixing a leak of shadowed resources.

Closes: #7362
Fixes: 2d8f28df731 ("panfrost: Replace resource shadowing flush")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reported-by: Mastodon, apparently
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19753>
(cherry picked from commit 42212a9bfdab8381beb9206b5d2551344c71d584)

iris: Set priority for replaced engine context

The replace_kernel_ctx() code path was not setting back the context
priority.

Fixes: 5c4c8bdc4c54 ("iris/batch: Add support for engines contexts")
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19687>
(cherry picked from commit cd159c7d6c18d1bbde019fda68cc17922389a767)

ci: Add va frontend to windows-build-rules

Fixes: 2d504bc5 ("CI: Add gallium-va and video-codecs in windows-vs2019 and debian-mingw32-x86_64")

Signed-off-by: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19767>
(cherry picked from commit 912c72eda5a4284bf8ef32f93a708c65083f7722)

util: Test __PPC64__ for getting PIPE_ARCH_PPC_64 respond to __PPC64__ take effect

Fixes: e737a99a6fb ("Fix PPC detection on darwin")

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19674>
(cherry picked from commit 7710cc8506be571ce83751c8f7afbe6fac256b36)

frontend/va: Fix WIN32 VA_DRIVER_INIT_FUNC declaration. Remove declspec as it uses .def file

Fixes: b557ceb7 ("frontends/va: Add windows VA frontend support via vl_winsys_win32 and libva-win32")
Closes: #7702

Signed-off-by: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19754>
(cherry picked from commit d81e40b20c386a79d643fc6c14c3cfb8351daa09)

aco: fix p_interp_gfx11 to not overwrite SCC

s_wqm_b64 clobbers SCC.
Found this while working on dual source blending.

Fixes: 6113ee650a2 ("aco/gfx11: fix FS input loads in quad-divergent control flow")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19747>
(cherry picked from commit 369c9b642524cb543c59d006ad7e3ce089fa6879)

clover: empty soversion when on win32

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7675
Cc: mesa-stable
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Prodea Alexandru-Liviu <liviuprodea@yahoo.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19653>
(cherry picked from commit 14eef1414725692a22fa24e027e8b1fd618d57ed)

docs: remove stale envvar-reference

This reference was left over when the envvar was removed.

Fixes: 231ccb6100e ("docs: Remove no-longer-accurate text about the xlib driver")

Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19593>
(cherry picked from commit 9bfa939a5e6377efe7b610dd9b6846edeb0fdafc)

docs: do not mention EGL_MESA_drm_display

This extension was removed back in 2016, but it seems we left a mention
of it in the docs.

The entire section with this extension seems kinda pointless now, so
let's drop it entirely.

Fixes: f3e23ead536 ("egl: remove remnants of MESA_drm_display")
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19719>
(cherry picked from commit 9f2c9e4c3fa57deba3da30dfa8e022c0a49c80f0)

etnaviv: switch to late Z when linear PE is used

In linear PE mode the early and late depth stage do not only disagree
about the cache layout, but they seem to fundamentally disagree about
the buffer layout. When Z was written via the late stage, early tests
always show spurious zfails, even if they are not in the same draw
call. Cache flushing and pipe stalls don't help in that case.

The only option to get reliable Z tests with linear render targets is
to move all Z handling into the PE stage. Even when early Z writes
are possible, we don't know if any other draw to the same surface
needs late Z handling, so we must never use the early stage.

Fixes: 53445284a427 ("etnaviv: add linear PE support")
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19686>
(cherry picked from commit 7fe91c9f660f3b76e2c08c0824d226417231c822)

etnaviv: fix shader register control with MSAA

Apparently MSAA doesn't only add another input, but it also increases
required temporaries by one. Simple programs where the register demand
is given by the number of inputs did work fine, while more complex ones,
where register demand is given by the number of temporaries exhibit
rendering issues without this fix.

Cc: 22.3 mesa-stable
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19582>
(cherry picked from commit e65d266529f1e95252bacd529a830b9d4d50000f)

ci/update_traces_checksum.py: check if checksum is in the array, not it's value

Fixes: 45eda069531a ("ci: introduce update_traces_checksum.py")

Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19510>
(cherry picked from commit e1d40d11f5a6083c19582c2e138f453cc2c7d4e4)

freedreno/ci: Skip civilization-v/CivilizationV-trim trace

It is been flaking, the following jobs are expecting the same checksum,
but produced different ones.

- https://mesa.pages.freedesktop.org/-/mesa/-/jobs/31762457/artifacts/results/summary/results/trace@freedreno-a630@civilization-v@CivilizationV-trim--s705-761-f762-v20201203-v2.trace.html
- https://mesa.pages.freedesktop.org/-/mesa/-/jobs/31763571/artifacts/results/summary/results/trace@freedreno-a630@civilization-v@CivilizationV-trim--s705-761-f762-v20201203-v2.trace.html

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19734>

ci/freedreno: disable antichambers trace

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7668
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19627

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
(cherry picked from commit f562e37c9325cc107d4f02026946acc14c75b323)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19734>

CI: convert to use the new S3 server instead of the legacy minio

We don't need to login anymore, but we can't use plain minio commands
now. `ci-fairy` got a helper as `s3cp` to keep an almost identical
API.

Solved Conflicts:
.gitlab-ci/common/init-stage2.sh
.gitlab-ci/container/lava_build.sh
.gitlab-ci/prepare-artifacts.sh
src/amd/ci/traces-amd.yml
src/freedreno/ci/traces-freedreno.yml
src/gallium/frontends/lavapipe/ci/traces-lavapipe.yml

Signed-off-by: Benjamin Tissoires <benjamin.tissoires@gmail.com>
(cherry picked from commit 67cee534a88c95a8eb6839f7bcf28a5e6dac8fbf)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19734>

ci: Update ci-fairy in CI, rootfs and containers

ci-fairy is pulverized in possible different versions at Mesa CI. This
commit updates all of them to the version that migrates minio to s3.
Also, trigger the build of base and test containers, as both uses
ci-fairy as well.

Solved Conflicts:
.gitlab-ci/image-tags.yml

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: Benjamin Tissoires <benjamin.tissoires@gmail.com>
(cherry picked from commit a04ed2f971dccbf8b24f084ac9baaf8b299944a0)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19734>

ci: Update piglit-traces tests expectations

Found some:
- crashes in zink, softpipe
- fails in a630-restricted
- unexpectedpass in broadcom
    - fixed by https://gitlab.freedesktop.org/mesa/piglit/-/merge_requests/730

More details in the test expectations files comments.

Solved Conflicts:
src/gallium/drivers/zink/ci/zink-lvp-skips.txt

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
(cherry picked from commit a108e4f70cc61a6b9119cd766d51c9b596e07c7f)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19734>

ci: Update piglit with s3 support

With new S3 support, we can use JWT-only server interaction via the
removal of `role-session` and `minio-host` arguments from PIGLIT_ARGS in
YAML.
This parameter change will come in a later commit.

Solved Conflicts:
.gitlab-ci/container/build-piglit.sh
.gitlab-ci/image-tags.yml

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: Benjamin Tissoires <benjamin.tissoires@gmail.com>
(cherry picked from commit 70ce1dcacc92a816322082c8695569b6a91a1810)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19734>

v3dv/bo: reset bo and then call gem close

After 'v3dv: fix debug dump on BO free' we changed the order, and this
lead to the following test
dEQP-VK.api.object_management.multithreaded_per_thread_resources.device_memory_small

v2: Expanded comment just before the reset, explaining that we need to
do the reset before we free the BO from the kernel (Iago)

Raising this assertion:
deqp-vk: ../src/broadcom/vulkan/v3dv_bo.c:281: v3dv_bo_alloc: Assertion `bo && bo->handle == 0' failed.

Fixes: 2c44597181e2 ('v3dv: fix debug dump on BO free')

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19693>
(cherry picked from commit ec1cdc13d5cf6026692bf3765be3aeceb511e6d6)

v3dv: ignore imported BOs when tracking BO memory usage

Imported BOs are not allocated by the device so we don't
update BO stats when they are imported. Therefore, we should
not be updating them when they are freed either.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19675>
(cherry picked from commit f14e2ca099cbc1c732020b6e1c30aaff4f652d1b)

ac/llvm: fix gfx11 fs input load for 16bit varying

Otherwise we get empty output.

Fixes: b07204d7804 ("radeonsi/gfx11: interp changes for 16bit")
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19637>
(cherry picked from commit 88b1bb326dae2d4cc7e069849f82c08f35c407d5)

ac/nir/ngg: remove nuw for negative value add

Add negative value is possible to wrap around. I haven't seen this
"nuw" causes any problem yet, but let's remove it for safe.

Fixes: 60ac5dda82e ("ac: Add NIR lowering for NGG GS.")
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19718>
(cherry picked from commit c21e184cc5cc818285c5590f36b170362defaf27)

ac/nir/ngg: fix nogs culling with nuw add

We should not use "nuw" here as negative add positive may wrap
around (negative is 0xffffff??).

This problem can be observed with LLVM15 (I can't see when LLVM14):
  %.neg = mul nsw i32 %31, -4
  %163 = add nuw nsw i32 %.neg, 16
  %164 = lshr i32 257, %.neg
  %165 = lshr i32 %164, %163

LLVM just assume %.neg is possitive, so pre-shift 0x01010101 by 16.
This get wrong value because we can't get back the shifted bits with
a negative shift right.

Fixes: 75dbb404393 ("ac/nir: Remove byte permute from prefix sum of the repack sequence.")
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19718>
(cherry picked from commit 982b523769a75c99039deac7f832a1e10260e916)

gallivm: add coro malloc hooks earlier and always.

This fixes GALLIVM_DEBUG=asm for compute shaders, changing
the hooks after dumping causes a segfault because the
memory has already been finalised. Just add the hooks always,
and before dumping anything.

Fixes: f511d2a55337 ("gallivm: rework coroutine malloc/free callouts.")
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19714>
(cherry picked from commit fb7de303ba7cbdb4237d2ae93011bc2845114d35)

intel/compiler: Fix missing tie-breaker in brw_nir_analyze_ubo_ranges() ordering code

Per Ken suggestion, use ascending order for the start offset.

Fixes: 6d28c6e52cf ("i965: Select ranges of UBO data to be uploaded as push constants.")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19731>
(cherry picked from commit 494e2edb90d06f645e09b10d2c3f6b8d274d4dba)

intel/compiler: Fix dynarray usage in intel_clc

The code builds up the dynamic array of objects (spirv_objs) and
collect pointers to each of them into another dynamic
array (spirv_ptr_objs).

If the growth of the first array cause a reallocation, it is
possible that the previous pointers end up invalid.

Fixes: 77e929a5273 ("intel/clc: allow multiple CL files to be compiled together")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19730>
(cherry picked from commit 9fd1d47aa0f19fac30d29e6ae40ed0383c1930ee)

radv: enable lowering of subgroup shuffle in NIR on GFX11+

VGPR allocation changed on GFX11 and this might have changed how
shared VGPRs work, so it's probably more secure to lower in NIR.

Cc: 22.3 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19679>
(cherry picked from commit d255bc8f05dd5f85f7154b0a3d7aaf381b47c199)

vulkan: Unconditionally add barriers for missing external subpass deps

This is a very scorched-earth approach which doesn't take into account
whether or not there are any explicitly provided dependencies.  We could
take a finer-grained approach in theory but it's unlikely to matter in
practice since you usually stall in Begin/EndRenderPass anyway.

Fixes: 1d726940d288 ("vulkan: Add a common CmdBegin/EndRederPass implementation")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6203
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7650
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19599>
(cherry picked from commit 11b2a063bf1f18b3be9542be8c229427a33c92f0)

vulkan: Handle VK_SUBPASS_EXTERNAL at the end of a subpass

Fixes: 1d726940d288 ("vulkan: Add a common CmdBegin/EndRederPass implementation")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19599>
(cherry picked from commit 4ff5051944e7a7a8bf003c331af1a73ac6c7df61)

r600/sfn: Fix f2u32 and remove backend lowring of f2u64 and f2i64

The two conversion ops are now handled in nir_lower_int64,
but the fixup for the input to f2u32 has to be handled there
and not in f2u64.

Fixes: 29da9856826fa6a4b5117c43c78b4301a49bc6dd
   nir/lower_int64: Enable lowering of 64-bit float to 64-bit integer conversions.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19707>
(cherry picked from commit fee004215755ee56a427e2ea96a5ab6dfa1ce823)

r600/sfn: Fix source modifiers for ffract64

Fixes: 79ca456b4837b3bc21cf9ef3c03c505c4b4909f6
    r600/sfn: rewrite NIR backend

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19707>
(cherry picked from commit fd27b18631bff77ce864968238c4e6dbe37606a6)

anv: bump pool bucket max allocation size

Age of Empire IV generates a shader of ~2.3Mb on DG2 which is above
the limit we currently have.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19669>
(cherry picked from commit ae76bba34a878dbd299f911bceaa9acdf01eb38a)

venus: handle VK_QUERY_TYPE_PRIMITIVES_GENERATED_EXT

This change adds some docs for the query size, and has been tested with
dEQP-VK.transform_feedback.primitives_generated_query.* on supported
implementations.

Fixes: 8f7b5bf34b4 ("venus: add VK_EXT_primitives_generated_query support")

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19684>
(cherry picked from commit f7d7e558c958d4057cf88dfa37f80d150d62d87f)

etnaviv: fix late Z with MSAA active

On RA_WRITE_DEPTH GPUs the RA stage needs to be told that MSAA is active
when the PE Z/S stage is needed. Not sure what it does exactly, but this
fixes broken late Z on those GPUs when performing MSAA rendering.

Cc: 22.3 mesa-stable
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19571>
(cherry picked from commit 2f85d9095e3559597bc1cf0051ab6d7bc18faecd)

etnaviv: update headers from rnndb

Update to etna_viv commit 6939cfeba30c.

Cc: 22.3 mesa-stable
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19571>
(cherry picked from commit 804bf2eba2af7f3d6446361127cbc5521ae72b15)

nir: fix typo in lower_double options handling

Seems the intention was to check that both flags were not enabled
instead we were checking that the floor flag was both set and not
set so the result would always be false.

Fixes: 3749a6ecd282 ("nir: honor lower_double options for ffloor and ffract")

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19642>
(cherry picked from commit 34c52d8cb98e74a9debcd2605b377170c025582a)

v3dv: fix debug dump on BO free

We were resetting the BO struct right before dumping its data. Fix
this by moving the reset later.

Fixes: 44fa8304d45 ('v3dv: add a refcount mechanism to BOs')
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19672>
(cherry picked from commit 2c44597181e28b05d4b269ee73d4f3a59bc0a806)

disable zinks shader cache when the needed functions do not exist

 Fixes: 4e14da056d6 ("zink: Enable mesa/st frontend shader caching.")
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19592>
(cherry picked from commit 7666988937ee9057b575e61437480e23a254c62a)

anv: setup stage bitmask for Wa_22011440098

Fixes: 40b66a44998 ("anv, iris: Add Wa_22011440098 for DG2")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19636>
(cherry picked from commit ecd4517560f135f64abf6e40acc48807b400ca41)

iris: setup stage bitmask for Wa_22011440098

Fixes: 40b66a44998 ("anv, iris: Add Wa_22011440098 for DG2")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19636>
(cherry picked from commit 210d95bdb35c2c172f0a3a9527b181f8988a627f)

anv: split internal surface states from descriptors

On Intel HW we use the same mechanism for internal operations surfaces
as well as application surfaces (VkDescriptor).

This change splits the surface pool in 2, one part dedicated to
internal allocations, the other to application VkDescriptors.

To do so, the STATE_BASE_ADDRESS::SurfaceStateBaseAddress points to a
4Gb area, with the following layout :
   - 1Gb of binding table pool
   - 2Gb of internal surface states
   - 1Gb of bindless surface states

That way any entry from the binding table can refer to both internal &
bindless surface states but none of the driver allocations interfere
with the allocation of the application.

Based off a change from Sviatoslav Peleshko.

v2: Allocate image view null surface state from bindless heap (Sviatoslav)
    Removed debug stuff (Sviatoslav)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7110
Cc: mesa-stable
Tested-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19275>
(cherry picked from commit 4ceaed7839afd724b2a2f10f6879f54199c041ad)

nir/algeraic_opt: use double options too for lowering ftrunc@64

ftrunc@64 also might need lowering on fp64 only, especially now
that it might be introduced by nir_lower_int64.

Fixes: 29da9856826fa6a4b5117c43c78b4301a49bc6dd
   nir/lower_int64: Enable lowering of 64-bit float to 64-bit integer conversions.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19657>
(cherry picked from commit 917d992b320740d548ee0eb442e927c7ac5184fa)

meson: only enable intel-clc for x86_64 builds

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19662>
(cherry picked from commit d983827a62c77713452a9e420fd20ed39c68ef2c)

radv: re-emit NGG culling settings when conservative rast mode is dynamic

Found by inspection.

Fixes: fbed3aed4aa ("radv: add support for dynamic conservative rasterization mode")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19651>
(cherry picked from commit 08b346e81ac262578ed0437464148be6500ea4de)

meson: Fixes name_prefix for clover on mingw

Cc: mesa-stable
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19610>
(cherry picked from commit 67627c84a71b4c795efa6ddcffa5633ce0239f65)

clover: Fixes building with mingw-x86

Cc: mesa-stable
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19610>
(cherry picked from commit f25d483e1bd493fdf6f0f8148259ed085d705617)

clover: Rename *OpenCL.def to *OpenCL.def.in

Cc: mesa-stable
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19610>
(cherry picked from commit a3b26e2758d7fce890717e2679bd0e25ca1330d2)

meson: fixes mingw-clang32 building

Cc: mesa-stable
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19610>
(cherry picked from commit ab20ec9da76d77ae3942ecf1031366d29a4dff7b)

meson: Refactoring shared gen_vs_module_defs_normal_command out

Cc: mesa-stable
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19610>
(cherry picked from commit f03421702cc35059e4ead86839906ddfcf05bdc7)

radv: Fixes prototypes

Cc: mesa-stable
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19610>
(cherry picked from commit e5656f07c7a65b1d143684671cd8235af099a84c)

util/glsl2spirv: fix appending extra flags

The variable is called `extra`, but what's written is `extra - flags`,
and `flags` is undefined, so if the variable was ever passed there would
be an uncaught exception.

fixes: 9786d9ef2abb45a4e832cf1347581e3ca3aae9f0

Reviewed-by: Luis Felipe Strano Moraes <luis.strano@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19449>
(cherry picked from commit 4ffa8a9ac010f3db79b1e872f7e664a4470cb981)

util/glsl2spirv: fix type error in argument handling

args.Olib is set to `store_true`, which means it will always be `True`
or `False`, this means that the we always, unconditionally, add
`--keep-uncalled` to the command line.

fixes: 9786d9ef2abb45a4e832cf1347581e3ca3aae9f0

Reviewed-by: Luis Felipe Strano Moraes <luis.strano@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19449>
(cherry picked from commit 76e3b482be125cc0a2edd75bdeb14d4a6e9232fb)

ir3/ra: Make sure we don't pick a preferred reg overflowing the file.

If we're in handle_collect()'s dst allocation and are part of a merge set
near the end of the file, our check for reg_elem_size(reg) would let us
use the preferred reg when that would immediately lead to
allocate_dst_fixed() creating an interval extending thruogh reg_size(reg)
that overflows the file.

Avoids a regression on gfxbench5/gl_5_high_off/17.shader_test in the next
commit.  No change on shader-db.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18946>
(cherry picked from commit a39113b616099a7bcce9e62337731f040c7cad64)

docs: fixup broken link syntax

Seems I got this slightly wrong when I fixed up the previous syntax
issue. Whoops, let's fix that!

Fixes: 6b3b6333915 ("docs/zink: fix and cleanup rst syntax")
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19574>
(cherry picked from commit ef05d28aa276aebbcf48400a5bef11de20e8b1c9)

anv: fixup invalid enum for nir environment

Also switching away from PIPE_

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 8c4c4c3ee1a2 ("anv: Add softtp64 workaround")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19638>
(cherry picked from commit 68fd9d28294ee91033690b2288c55480c4125577)

panfrost: Require 64-byte alignment on imports

While Panfrost allocates linear images with strides that are a multiple of 64
bytes, other dma-buf producers on the system may not satisfy this requirement.
However, at least on v7 and newer, any image with a regular format must have a
stride that is a multiple of 64 bytes.

This fixes a real bug in an application that created a linear R8_UNORM image
with stride 480 bytes, imported it as an EGL_image, and then tried to texture
from it with the GPU. Previously, the driver allowed this situation but it
resulted in an imprecise fault from the GPU. This patch corrects the driver to
reject the import as invalid due to the unaligned stride, ensuring we never
attempt to texture from such a resource.

To implement, we add some new layout queries to centralize knowledge about the
stride alignment requirements, and we sprinkle in asserts to show how the
invariant is upheld throughout the lifecycle of image creation to texturing.

Cc: mesa-stable
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19620>
(cherry picked from commit 811f8a19469722bea32f3c539b8cf0939fe3b057)

glsl: fix buffer texture type

Fixes: 3ace6b968b3 ("compiler/types: Add a texture type")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19381>
(cherry picked from commit 87526f79db68a13ebd448cfd6b1be4b25616c801)

ac/nir: do not convert GS outputs to the expected variable size on GFX11

Outputs are always considered 32-bits.
Found by inspection.

Cc: 22.3 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19612>
(cherry picked from commit d2563e6600fd74dc000fdb031d17d54971ff67cb)

mesa: fix typo from adding glGetObjectLabelEXT

Fixes:  675bcbb7a1c0 ("mesa: add EXT_debug_label support")

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19607>
(cherry picked from commit e295ee778bd6f136bdca67121f8b0fcb50b3e3d4)

.pick_status.json: Update to 9bd11f65238ce101bf846f5528f9088630e983f7

VERSION: bump for 22.3.0-rc2

broadcom/compiler: avoid using ldvary sequence to hide latency of branching

This can cause us to stomp the contents of r5 before we have a chance to read
it, like this:

0x3d103186bb800000 nop                           ; nop                         ; ldvary.r0
0x3d105686bbf40000 nop                           ; mov rf26, r5                ; ldvary.r1
0x020000ef0000d000 bu.allna  232, r:unif (0x0000001c / 0.000000)
0x3d1096c6bbf40000 nop                           ; mov rf27, r5                ; ldvary.r2

Here, the MOV in the last instruction is supposed to read r5 produced from
ldvary.r0, but because we have inserted the bu instruction in between now
that read happens at the same time that ldvary.r1 updates r5, stomping the
value we were supposed to read.

Fix this by disallowing injection of a branch instruction in between an ldvary
instruction and its write to the r5 register 2 instructions later.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7062
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19616>
(cherry picked from commit 1174f376096ed6ceebb0fb2810456f1501a68df7)

intel: Don't cross DWORD boundaries with byte scratch load/store

The back-end swizzles dwords so that our indirect scratch messages match
the memory layout of spill/fill messages for better cache coherency.
The swizzle happens at a DWORD granularity.  If a read or write crosses
a DWORD boundary, the first bit will get correctly swizzled but whatever
piece lands in the next dword will not because the scatter instructions
assume sequential addresses for all bytes.  For DWORD writes, this is
handled naturally as part of scalarizing.  For smaller writes, we need
to be sure that a single write never escapes a dword.

Fixes: fd04f858b0aa ("intel/nir: Don't try to emit vector load_scratch instructions")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7364
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19580>
(cherry picked from commit 25c180b50974b55e007dbbff18be1d831cd06551)

intel/lower_mem_access_bit_sizes: Compute alignments automatically

Because dup_mem_intrinsic() retains the SSA offset from the original
intrinsic and only modifies it by adding a constant, we can compute the
alignment based on the original alignment and the constant offset.  This
is both easier and more accurate.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19580>
(cherry picked from commit 85685cf932c25fc53cae5e36b5d75f9d6a79c765)

vulkan/wsi/display: Reset connector state in vkReleaseDisplay().

If an application was transitioning out of fullscreen exclusive
display mode, the wsi_display_connector->active state was not
reset in vkReleaseDisplay() from fullscreen. When the app then
later tried to go to fullscreen display mode again on the same
display output with the same video mode, this caused
_wsi_display_queue_next() to skip a required drmModeSetCrtc()
during the first vkQueuePresent() after entering direct display
mode.

While this often worked by pure luck on a single-display setup,
it goes sideways on a multi-display setup where the viewport
of the associated crtc does not have a (x,y) offset of (0,0).
E.g., XOrg/X11 RandR output leasing of an output whose viewport
starts at x = 1920:

1. X-Server has RandR outputs viewport at x = 1920, in a shared
   framebuffer, shared across all crtc's on a X-Screen.

2. Application leases that output for direct display mode,
   1st vkQueuePresent() triggers drmModeSetCrtc() of output
   to (x,y) = 0,0, as required for Vulkan/wsi/direct framebuffer
   setup.

3. Application does rendering and presenting.

4. Application vkReleaseDisplay() the output, terminates the
   RandR lease. X-Server takes over again.

5. X-Server modesets to reconfigure output back to viewport
   with (x,y) = 1920, 0.

6. Application leases same output again later on, and tries
   vkQueuePresent() again. Because of the bug fixed in this
   commit, the required drmModeSetCrtc() to (x,y) = 0,0 is
   erroneously skipped due to the stale cached connector state.

7. drmModePageflip() fails due to the wrong crtc viewport
   (x,y) = 1920, 0, mismatched for the need of the Vulkan
   framebuffer of (x,y) = 0,0. Kernel returns -ENOSPACE,
   Swapchain goes into permanent VK_ERROR_SURFACE_LOST state.
   Destroying and recreating the swapchain, as recommended
   by the Vulkan spec for error handling won't help. Game over!

Resetting wsi_display_connector->active = false; fixes the
problem of wrong / stale connector state and Vulkan/wsi/display
clients are happy on multi-display setups again, as tested
in various single- and multi-display configurations.

This bug affects all Mesa releases with Vulkan/WSI/Display
support and should therefore be backported.

Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Fixes: 352d320a0745 ("vulkan: Add EXT_direct_mode_display [v2]")
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19484>
(cherry picked from commit 24094ee03d625fbcd2d154e8c2dd5434ba88f166)

panfrost: Copy resources when necessary

If the map doesn't set MAP_DISCARD_RANGE, we do have to copy the existing
contents over. MAP_WRITE on its only gives permission to replace the contents,
unfortunately it does not require that the application actually do so.

Closes: #7640
Fixes: 0b26a9f7739 ("panfrost: Don't copy resources if replaced")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reported-by: Roman Elshin
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19576>
(cherry picked from commit cf7a3906b0629b2b6aadd3b18a39eae06b10fd6a)

panfrost: Fix build with Perfetto (again)

Sync UAPI for the upstream fix.

Upstream commit: https://cgit.freedesktop.org/drm-misc/commit/?h=drm-misc-fixes&id=c4299907c09a638c0a30f029338d07941c049d73

Closes: #7195
Fixes: 6a4532cbabf ("panfrost: Sync panfrost_drm.h from drm-misc-next")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Tested-by: Chris Healy <healych@amazon.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19581>
(cherry picked from commit d40af879098bea90176619dc11facbd68c555f32)

ci: Fixes macos.yml

Stick to macos-11 to prevent accident broken
always install meson with pip to prevent pull new version of python

Cc: mesa-stable
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19615>
(cherry picked from commit 81b4af28494c065c5646e3f61a72afd829d978c6)

nir: Don't reorder volatile intrinsics

Fixes issue with "is helper invocation" that in recent SPIR-V is mapped to
a volatile Load.  The CSE was catching the loads before they were transformed
in the new is_helper_invocation intrinsic (that is not reorderable).

Fixes: 729df14e452 ("nir: Handle volatile semantics for loading HelperInvocation builtin")
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19432>
(cherry picked from commit 8ab628ab2e4d4f460e2eabdb11876997c0ab13bc)

anv: fix missing VkPhysicalDeviceExtendedDynamicState3PropertiesEXT handling

Fixes: 13c422e1b2ed ("anv: toggle on EXT_extended_dynamic_state3")
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19573>
(cherry picked from commit 97b3dd34c1aa11d98df7e26b4aae50be0bd62cf0)

intel/fs: Fix constant propagation into 32x16 integer multiplication

Don't copy propagate the constant in situations like

    mov(8)          g8<1>D          0x7fffffffD
    mul(8)          g16<1>D         g8<8,8,1>D      g15<16,8,2>W

On platforms that only have a 32x16 multiplier, this will result in
lowering the multiply to

    mul(8)          g15<1>D         g14<8,8,1>D     0xffffUW
    mul(8)          g16<1>D         g14<8,8,1>D     0x7fffUW
    add(8)          g15.1<2>UW      g15.1<16,8,2>UW g16<16,8,2>UW

On Gfx8 and Gfx9, which have the full 32x32 multiplier, it results in

    mul(8)          g16<1>D         g15<16,8,2>W    0x7fffffffD

Volume 2a of the Skylake PRM says:

    When multiplying a DW and any lower precision integer, the
    DW operand must on src0.

See also https://gitlab.freedesktop.org/mesa/crucible/-/merge_requests/104.

Previous to INTEL_shader_integer_functions2 (in Vulkan or OpenGL), I
don't think it would be possible to create a situation where this could
occur.  I discovered this via some optimizations that can determine that
the non-constant source must be able to fit in 16-bits.  The case listed
above came from piglit's "ext_transform_feedback-order arrays points"
with those optimizations in place.

No shader-db or fossil-db changes on any Intel platform.

Fixes: de6c0f84879 ("intel/fs: Implement support for NIR opcodes for INTEL_shader_integer_functions2")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17718>
(cherry picked from commit db204121686726c74dd0aba2d1c1790d40e7baba)

Android.mk: Fix gnu++14 related build failures

This patch filters-out '-std=gnu++14' from the cflags obtained
from AOSP/KATI dummy target output to avoid the following building errors:

FAILED: src/gallium/drivers/r600/45f68e3@@r600@sta/sfn_sfn_assembler.cpp.o
...
clang++ ... -std=c++17 ... -std=gnu++14
...
In file included from ../src/gallium/drivers/r600/sfn/sfn_assembler.cpp:27:
In file included from ../src/gallium/drivers/r600/sfn/sfn_assembler.h:32:
In file included from ../src/gallium/drivers/r600/sfn/sfn_shader.h:31:
../src/gallium/drivers/r600/sfn/sfn_instr.h:369:56: error: no template named 'is_base_of_v' in namespace 'std'; did you mean 'is_base_of'?
template <typename T, typename = std::enable_if_t<std::is_base_of_v<Instr, T>>>
                                                  ~~~~~^~~~~~~~~~~~
                                                       is_base_of
/home/utente/pie-x86_kernel/external/libcxx/include/type_traits:1412:29: note: 'is_base_of' declared here
struct _LIBCPP_TEMPLATE_VIS is_base_of
                            ^
In file included from ../src/gallium/drivers/r600/sfn/sfn_assembler.cpp:27:
In file included from ../src/gallium/drivers/r600/sfn/sfn_assembler.h:32:
In file included from ../src/gallium/drivers/r600/sfn/sfn_shader.h:31:
../src/gallium/drivers/r600/sfn/sfn_instr.h:369:51: error: template argument for non-type template parameter must be an expression
template <typename T, typename = std::enable_if_t<std::is_base_of_v<Instr, T>>>
                                                  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
/home/utente/pie-x86_kernel/external/libcxx/include/type_traits:439:16: note: template parameter is declared here
template <bool _Bp, class _Tp = void> using enable_if_t = typename enable_if<_Bp, _Tp>::type;
               ^
2 errors generated.

Cc: "22.2" "22.3" mesa-stable
Reviewed-by: Roman Stratiienko <r.stratiienko@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19563>
(cherry picked from commit fd8ec189e575d5220d8b4c30647fa6de57928e07)

ac/nir,radv: rework and fix NGG queries enables for VS/TES

XFB queries need to be enabled with NGG streamout and VS/TES.
Previously, the NGG lowering code relied on has_prim_query for XFB.

This fixes failures with RADV_PERFTEST=ngg_streamout on GFX10.3 with
the vkd3d-proton testsuite. Vulkan CTS is missing TES tests with XFB
queries apparently.

Cc: 22.3 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19493>
(cherry picked from commit 505290dc44a5b728dbc6ec9ed038300ab158c323)

radv: re-emit the guardband state when restoring meta operations

Meta operations change dynamic states like viewports and previously,
the guardband state was also always re-emitted because it relied on
dynamic viewport/scissor changes.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7577
Fixes: 40d8df72808 ("radv: emit the guardband state separately from the scissor state")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19521>
(cherry picked from commit 33d60bda9d385cca56e3d515472ca75fde53e126)

etnaviv: Use old set of state registers for PE configuration on GC880

While the GC880 is HALTI0, it still uses the old set of state registers
for PE pipe configuration. This is another specialty of the GC880, readd
the missing handling for this GPU otherwise e.g. Qt5 cube example suffers
from rendering corruption with both eglfs and wayland backends.

Fixes: 7c46a488362 ("etnaviv: use new PE pipe address states on >= HALTI0")
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19562>
(cherry picked from commit 20984aab0f6717f5fbf79fc21c2c5f442472b605)

docs/zink: fix and cleanup rst syntax

This new section didn't use the correct RST syntax, and ended up
with a broken section in the rendered docs.

Fix the syntax, and clean things up a bit to avoid overly long lines.

Fixes: be235edfe2b ("zink: add profile documentation")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19481>
(cherry picked from commit 6b3b6333915e8ca64c531a4decb79c0256e1e4f2)

nir/lower_int64: Fix float16 to int64 conversions.

Currently float16 to int64 conversions don't work correctly, because
the "div" variable has an infinite value, since 2^32 isn't
representable as a 16-bit float, which causes the result of of rem(x,
div) to be NaN for all inputs, leading to an incorrect result.  Since
no values of magnitude greater than 2^32 are representable as a
float16 we don't actually need to do the fdiv/frem operations, the
conversion is equivalent to f2u32 with the result padded to 64 bits.

Rework:
 * Jordan: Handle f16 in if/else rather than conditional

Fixes: 936c58c8fcc ("nir: Extend nir_lower_int64() to support i2f/f2i lowering")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19391>
(cherry picked from commit e14f85366ebbc57f45d2561e0d3f0804f8adb549)

radeonsi/gfx11: fix compute scratch buffer - WAVES is always per SE

Fixes: ba02ed91a60 - ac/gfx11: fix the scratch buffer

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19477>
(cherry picked from commit bdfacd0a24e023515fb7b7fae4a279cff0fbac4e)

radv/rt: Restore prev barycentrics when rejecting hits

Closes: #6348
cc: mesa-stable

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19534>
(cherry picked from commit e5b3efe5825aec5c9163fa0d9b20418d2876fdd2)

nir: Fix qsort comparator function

`pred` is a pointer, for sufficiently large numbers these
being cast to int were both > 0 regardless of the order
of `data1` and `data2`.

Fixes: 523a28d3fe0d ("nir: add an instruction set API")

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19539>
(cherry picked from commit c987a727a76eda1feada07e2eca6a5597dbddd93)