andy.hu [Wed, 15 Jun 2022 10:02:39 +0000 (10:02 +0000)]
Merge branch 'CR_870_Reset_samin.guo' into 'jh7110-5.15.y-devel'
reset:starfive:jh7110: Delete redundant logic
See merge request sdk/linux!106
Clivia.Cai [Tue, 14 Jun 2022 09:11:47 +0000 (17:11 +0800)]
reset:starfive:jh7110: Delete redundant logic
In the hardware design, the IPs RESET signal of jh7110 is divided into two groups,
one group is active high, and the other group is active low.
However, the software does not need to distinguish whether the RESET signal is active high or active low,
Write 1 to be assert, and write 0 to deassert.
Therefore, the software does not need to add additional logic to distinguish these two sets of signals.
Signed-off-by: Clivia.Cai <Clivia.Cai@starfivetech.com>
andy.hu [Mon, 13 Jun 2022 10:03:09 +0000 (10:03 +0000)]
Merge branch 'CR_1172_evb_drm_mipi_dsi_shengyang.chen' into 'jh7110-5.15.y-devel'
riscv:linux:driver:drm:mipi-dsi
See merge request sdk/linux!105
shengyang.chen [Mon, 13 Jun 2022 07:46:58 +0000 (15:46 +0800)]
riscv:linux:driver:drm:mipi-dsi
update mipi-dsi driver support
improvement after reviewing
Signed-off-by:shengyang.chen<shengyang.chen@starfivetech.com>
shengyang.chen [Sun, 12 Jun 2022 15:12:24 +0000 (23:12 +0800)]
riscv:linux:driver:drm:mipi-dsi
update mipi-dsi driver support
Signed-off-by:shengyang.chen<shengyang.chen@starfivetech.com>
andy.hu [Fri, 10 Jun 2022 10:17:57 +0000 (10:17 +0000)]
Merge branch 'CR_1167_drm_david.li' into 'jh7110-5.15.y-devel'
riscv: dts: update hdmi pins
See merge request sdk/linux!104
david.li [Fri, 10 Jun 2022 07:46:44 +0000 (15:46 +0800)]
riscv: dts: update hdmi pins
Signed-off-by: david.li<david.li@starfivetech.com>
andy.hu [Thu, 9 Jun 2022 09:46:56 +0000 (09:46 +0000)]
Merge branch 'CR_1071_GPU_Display_shanlong.li' into 'jh7110-5.15.y-devel'
Cr 1071 gpu display shanlong.li
See merge request sdk/linux!102
shanlong.li [Wed, 8 Jun 2022 10:36:10 +0000 (03:36 -0700)]
driver:GPU: Using the GPU driver release version
Using the GPU driver release version
Signed-off-by: shanlong.li <shanlong.li@starfivetech.com>
shanlong.li [Wed, 8 Jun 2022 10:31:07 +0000 (03:31 -0700)]
driver:GPU: Disable apm to resolve pvrdebug -dd suspension error
Disable apm to resolve pvrdebug -dd suspension error
Signed-off-by: shanlong.li <shanlong.li@starfivetech.com>
andy.hu [Wed, 8 Jun 2022 12:29:30 +0000 (12:29 +0000)]
Merge branch 'CR_1108_UART_yanhong.wang' into 'jh7110-5.15.y-devel'
Cr 1108 uart yanhong.wang
See merge request sdk/linux!101
yanhong.wang [Wed, 8 Jun 2022 03:27:27 +0000 (11:27 +0800)]
dt-bindings:uart:jh7110: Add uart3-uart5 support
Add bindings for uart3-uart5 on the StarFive JH7100 SoC.
Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
yanhong.wang [Wed, 8 Jun 2022 03:08:16 +0000 (11:08 +0800)]
clk:starfive:jh7110: Change uart3-uart5 clk register info
The core_clk division register of uart3-uart5 include fractional and
integral parts,but now only use the integral part,so include shift
operation. The integral part include 8 bit,so the max value can be
configed is 255.In order to support 115200 bandrate,so limit the max
value to 10.
Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
yanhong.wang [Wed, 8 Jun 2022 02:43:57 +0000 (10:43 +0800)]
serial: 8250_dw: Support a list of reset
Change devm_reset_control_get_optional_exclusive API to
devm_reset_control_array_get_exclusive, in order to support a list of
reset.
Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
andy.hu [Wed, 8 Jun 2022 10:34:47 +0000 (10:34 +0000)]
Merge branch 'CR_1138_SEC_william.qiu' into 'jh7110-5.15.y-devel'
Cr 1138 sec william.qiu
See merge request sdk/linux!100
andy.hu [Wed, 8 Jun 2022 10:33:31 +0000 (10:33 +0000)]
Merge branch 'CR_1134_PMIC_mason.huo' into 'jh7110-5.15.y-devel'
Cr 1134 pmic mason.huo
See merge request sdk/linux!98
andy.hu [Wed, 8 Jun 2022 02:42:19 +0000 (02:42 +0000)]
Merge branch 'CR_1133_V4L2_changhuang.liang' into 'jh7110-5.15.y-devel'
v4l2: sc2235 use 30 fps output
See merge request sdk/linux!99
william.qiu [Wed, 8 Jun 2022 01:59:32 +0000 (09:59 +0800)]
dts:crypto:jh7110: enable crypto for jh7110 soc.
enable crypto for jh7110 soc.
Signed-off-by: samin.guo <samin.guo@starfivetech.com>
william.qiu [Wed, 8 Jun 2022 01:55:21 +0000 (09:55 +0800)]
reset:starfive:trng/crypto:shares a reset signal
Use devm_reset_control_get_shared to share a reset signal otherwise TRNG
and crypto will not work at the same time.
Signed-off-by: samin.guo <samin.guo@starfivetech.com>
changhuang.liang [Wed, 8 Jun 2022 01:47:07 +0000 (09:47 +0800)]
v4l2: sc2235 use 30 fps output
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
mason.huo [Tue, 7 Jun 2022 07:30:18 +0000 (15:30 +0800)]
regulator: stf7110: Add regulator APIs for hdmi & csi driver
The hdmi & csi driver use the legacy pmic driver APIs to
power on/off related LDOs.
After employed regulator framework for pmic,
add the regulator APIs to control the LDOs.
Signed-off-by: mason.huo <mason.huo@starfivetech.com>
mason.huo [Fri, 25 Mar 2022 06:12:28 +0000 (14:12 +0800)]
regulator: stf7110: Add regulator support for JH7110 evb
Add 7 regulators base on regulator framework for
JH7110 evb HW design.
Signed-off-by: mason.huo <mason.huo@starfivetech.com>
mason.huo [Tue, 7 Jun 2022 03:51:34 +0000 (11:51 +0800)]
soc: starfive: Remove pmic driver
The pmic driver should employ regulator framework,
rather than a driver in soc.
Signed-off-by: mason.huo <mason.huo@starfivetech.com>
andy.hu [Tue, 7 Jun 2022 10:14:13 +0000 (10:14 +0000)]
Merge branch 'CR_1131_PCIE_kevin.xie' into 'jh7110-5.15.y-devel'
Cr 1131 pcie kevin.xie
See merge request sdk/linux!97
Kevin.xie [Tue, 7 Jun 2022 08:04:57 +0000 (16:04 +0800)]
riscv: defconfig: Enable PCIe ASPM module in power save policy
Signed-off-by: Kevin.xie <kevin.xie@starfivetech.com>
Kevin.xie [Tue, 7 Jun 2022 07:51:01 +0000 (15:51 +0800)]
driver: pci: Fix kernel stuck caused by ASPM LTR
Disable the LTR message forwarding of PCIe Message Reception,
which has been enabled & set a illegal destination address by
PLDA PCIe IP core as default.
Signed-off-by: Kevin.xie <kevin.xie@starfivetech.com>
andy.hu [Tue, 7 Jun 2022 08:53:47 +0000 (08:53 +0000)]
Merge branch 'CR_1071_GPU_Display_shanlong.li' into 'jh7110-5.15.y-devel'
driver:GPU: adjust ClockSpeed to 409.6MHz
See merge request sdk/linux!95
shanlong.li [Mon, 6 Jun 2022 06:16:48 +0000 (23:16 -0700)]
driver:GPU: adjust ClockSpeed to 409.6MHz
adjust ClockSpeed to 409.6MHz
Signed-off-by: shanlong.li <shanlong.li@starfivetech.com>
andy.hu [Mon, 6 Jun 2022 14:36:45 +0000 (14:36 +0000)]
Merge branch 'CR_1103_evb_drm_driver_keith.zhao' into 'jh7110-5.15.y-devel'
Cr 1103 evb drm driver keith.zhao
See merge request sdk/linux!94
keith.zhao [Sun, 5 Jun 2022 04:43:48 +0000 (21:43 -0700)]
riscv:linux:driver:drm
driver name "vs-drm" change to "starfive", gpu need name with no "-"
Signed-off-by: keith.zhao<keith.zhao@statfivetech.com>
keith.zhao [Sun, 5 Jun 2022 04:33:09 +0000 (21:33 -0700)]
riscv:linux:driver:inno hdmi
replace drm clock&pin api , add edid and HPD function
Signed-off-by: keith.zhao<keith.zhao@statfivetech.com>
andy.hu [Thu, 2 Jun 2022 12:16:38 +0000 (12:16 +0000)]
Merge branch 'CR_1051_CLOCK_TREE_Xingyu.Wu' into 'jh7110-5.15.y-devel'
clk:starfive:Adjust clocks' flag
See merge request sdk/linux!89
andy.hu [Thu, 2 Jun 2022 10:27:44 +0000 (10:27 +0000)]
Merge branch 'CR_1058_SDBOOT_clivia.cai' into 'jh7110-5.15.y-devel'
Cr 1058 sdboot clivia.cai
See merge request sdk/linux!93
Clivia.Cai [Wed, 1 Jun 2022 01:58:05 +0000 (09:58 +0800)]
riscv:dts:jh7110: update sdio0 config
Modify the name of some attributes of the sdio0 node
Signed-off-by: Clivia.Cai <Clivia.Cai@starfivetech.com>
Clivia.Cai [Fri, 27 May 2022 06:55:43 +0000 (14:55 +0800)]
riscv:dts:sd: update sd dt-bingings
modify sd card bus freq to 102.4M
Signed-off-by: Clivia.Cai <Clivia.Cai@starfivetech.com>
andy.hu [Wed, 1 Jun 2022 06:24:19 +0000 (06:24 +0000)]
Merge branch 'CR_1088_PDM_walker.chen' into 'jh7110-5.15.y-devel'
Implement PDM driver for JH7110 SoC
Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
See merge request sdk/linux!92
walker.chen [Wed, 1 Jun 2022 06:24:19 +0000 (02:24 -0400)]
Add PDM driver for JH7110 SoC
Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
andy.hu [Wed, 1 Jun 2022 03:06:38 +0000 (03:06 +0000)]
Merge branch 'CR_1086_PCIE_kevin.xie' into 'jh7110-5.15.y-devel'
Cr 1086 pcie kevin.xie
See merge request sdk/linux!91
andy.hu [Tue, 31 May 2022 16:07:38 +0000 (16:07 +0000)]
Merge branch 'CR_1062_V4L2_changhuang.liang' into 'jh7110-5.15.y-devel'
v4l2: fixed sc2235->dvp->isp->ddr error
See merge request sdk/linux!90
Kevin.xie [Tue, 31 May 2022 08:46:58 +0000 (16:46 +0800)]
riscv: defconfig: Support WLAN card AX210 for StarFive JH7110.
The firmware of AX210 are set in linux/firmware as extra firmware,
whilch will be build into kernel.
That is one of the standard extra firmware solutioin, or we can
pack them into filesystem(lib/firmware).
Signed-off-by: Kevin.xie <kevin.xie@starfivetech.com>
Kevin.xie [Tue, 31 May 2022 08:45:49 +0000 (16:45 +0800)]
riscv: defconfig: Support pcie to sata driver for StarFive JH7110
Signed-off-by: Kevin.xie <kevin.xie@starfivetech.com>
Kevin.xie [Tue, 31 May 2022 08:45:02 +0000 (16:45 +0800)]
riscv: defconfig: Support pcie nvme driver for StarFive JH7110
Signed-off-by: Kevin.xie <kevin.xie@starfivetech.com>
Kevin.xie [Tue, 31 May 2022 08:43:47 +0000 (16:43 +0800)]
riscv: defconfig: Disable PCIE ASPM module
FIXME: If we enable ASPM module, JH7110 evb will get stuck after
added some pcie devices that has relevant capability.
Signed-off-by: Kevin.xie <kevin.xie@starfivetech.com>
xingyu.wu [Mon, 30 May 2022 08:49:46 +0000 (16:49 +0800)]
clk:starfive:Adjust clocks' flag
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
andy.hu [Mon, 30 May 2022 08:46:26 +0000 (08:46 +0000)]
Merge branch 'CR_1049_watchdog_Xingyu.Wu' into 'jh7110-5.15.y-devel'
watchdog:starfive:Modify real timeout sec setting and read
See merge request sdk/linux!88
xingyu.wu [Mon, 30 May 2022 03:42:04 +0000 (11:42 +0800)]
watchdog:starfive:Modify real timeout sec setting and read
According to watchdog reset after twice timeout in hardware,
adjust real timeout sec setting and read by divider.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
changhuang.liang [Mon, 30 May 2022 05:54:43 +0000 (13:54 +0800)]
v4l2: fixed sc2235->dvp->isp->ddr error
andy.hu [Sun, 29 May 2022 11:18:26 +0000 (11:18 +0000)]
Merge branch 'CR_1070_evb_hdmi_inno_keith.zhao' into 'jh7110-5.15.y-devel'
Cr 1070 evb hdmi inno keith.zhao
See merge request sdk/linux!87
keith.zhao [Sun, 29 May 2022 01:44:58 +0000 (18:44 -0700)]
riscv:linux:driver:inno hdmi
delete some clock ,DC8200 unuse but other module used (gpu.vpu..)
Signed-off-by: keith.zhao<keith.zhao@statfivetech.com>
keith.zhao [Sat, 28 May 2022 15:06:29 +0000 (08:06 -0700)]
driver:drm:hdmi
add inno hdmi driver,only support 1080P mode
Signed-off-by: keith.zhao <keith.zhao@starfivetech.com>
andy.hu [Thu, 26 May 2022 12:27:27 +0000 (12:27 +0000)]
Merge branch 'CR_868_USB-HOST_yanhong.wang' into 'jh7110-5.15.y-devel'
Cr 868 usb host yanhong.wang
See merge request sdk/linux!84
andy.hu [Thu, 26 May 2022 10:11:01 +0000 (10:11 +0000)]
Merge branch 'CR_998_V4L2_evb_changhuang.liang' into 'jh7110-5.15.y-devel'
Cr 998 v4 l2 evb changhuang.liang
See merge request sdk/linux!85
yanhong.wang [Thu, 26 May 2022 06:02:07 +0000 (14:02 +0800)]
defconfig:starfive: add USB_CDNS3_STARFIVE to defconfig
Add CONFIG_USB_CDNS3_STARFIVE to defconfig for StarFive JH7110 SoC.
Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
yanhong.wang [Thu, 26 May 2022 05:53:50 +0000 (13:53 +0800)]
USB:cdns3:starfive-jh7110: Update cdns3-starfive driver
Update cdns3-starfive usb control driver, default support usb2.0 and
usb3.0.
Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
yanhong.wang [Thu, 26 May 2022 05:48:19 +0000 (13:48 +0800)]
dt-bindings:usb:jh7110: Add usb support
Add bindings for usb control on the StarFive JH7100 SoC.
Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
changhuang.liang [Thu, 26 May 2022 05:47:37 +0000 (13:47 +0800)]
v4l2: modify coding style
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
changhuang.liang [Thu, 26 May 2022 03:16:43 +0000 (11:16 +0800)]
v4l2: open ov4689
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
changhuang.liang [Wed, 25 May 2022 12:43:25 +0000 (20:43 +0800)]
v4l2: vin add top clk and reset control support
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
changhuang.liang [Mon, 23 May 2022 08:11:10 +0000 (16:11 +0800)]
v4l2: add ov5640 configure
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
changhuang.liang [Sun, 22 May 2022 04:34:23 +0000 (12:34 +0800)]
pmic: pmic use fs_initcall init
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
changhuang.liang [Fri, 20 May 2022 16:54:15 +0000 (00:54 +0800)]
v4l2: fixed mipi -> vin pipeline image abnormal
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
changhuang.liang [Fri, 20 May 2022 15:58:44 +0000 (23:58 +0800)]
v4l2: add mipi pipeline support
changhuang.liang [Fri, 20 May 2022 10:53:37 +0000 (18:53 +0800)]
v4l2: add macor and ov4689 4dlane configure
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
changhuang.liang [Fri, 20 May 2022 07:52:30 +0000 (15:52 +0800)]
pmic: modify pmic function
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
changhuang.liang [Fri, 20 May 2022 07:28:50 +0000 (15:28 +0800)]
soc/pmic: add pmic support
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
changhuang.liang [Fri, 20 May 2022 02:45:18 +0000 (10:45 +0800)]
v4l2: ov4689 update kernel 5.15
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
changhuang.liang [Wed, 18 May 2022 08:41:27 +0000 (16:41 +0800)]
V4L2: modify v4l2 base 7110 EVB
dts/starfive: add ov4689 configure and delete sc2235 pinctrl
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
andy.hu [Wed, 25 May 2022 11:15:30 +0000 (11:15 +0000)]
Merge branch 'CR_1051_CLOCK_TREE_Xingyu.Wu' into 'jh7110-5.15.y-devel'
Cr 1051 clock tree xingyu.wu
See merge request sdk/linux!83
xingyu.wu [Tue, 24 May 2022 07:07:03 +0000 (15:07 +0800)]
clk:starfive:Modify the definitions instead of numbers in vout clock tree
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
xingyu.wu [Tue, 24 May 2022 06:59:12 +0000 (14:59 +0800)]
clk:starfive:Modify the critical clocks' flags
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
andy.hu [Mon, 23 May 2022 12:52:27 +0000 (12:52 +0000)]
Merge branch 'CR_1004_gpio_add_reset_jianlong' into 'jh7110-5.15.y-devel'
pinctrl: starfive: Add jh7110 aon controller gpio register
See merge request sdk/linux!80
andy.hu [Mon, 23 May 2022 12:27:15 +0000 (12:27 +0000)]
Merge branch 'CR_1035_CLOCK_TREE_VOUT_Xingyu.Wu' into 'jh7110-5.15.y-devel'
clk:starfive:Add top clocks and reset in vout clock tree
See merge request sdk/linux!78
andy.hu [Mon, 23 May 2022 12:26:15 +0000 (12:26 +0000)]
Merge branch 'CR_968_bring_up_samin.guo' into 'jh7110-5.15.y-devel'
Cr 968 bring up samin.guo
See merge request sdk/linux!81
Jianlong Huang [Mon, 23 May 2022 11:40:21 +0000 (19:40 +0800)]
pinctrl: starfive: Add jh7110 aon controller gpio register
1. Add jh7110 aon controller gpio and irq register
2. Modify jh7110 sys controller irq register
3. Add clock and reset about jh7110 iomux
Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
samin [Mon, 23 May 2022 10:47:18 +0000 (18:47 +0800)]
net:phy:motorcomm: change tx delay chain.
Improve compatibility of YT8521SC and YT8521SH in rgmii mode.
Signed-off-by: samin <samin.guo@starfivetech.com>
samin [Mon, 23 May 2022 10:24:31 +0000 (18:24 +0800)]
Makefile: remove HWBOARD_FLAG.
Modifying the main Makefile is not standardized and must be restored.
And it will cause an error when compiling the module driver.
So remove them.
Signed-off-by: samin <samin.guo@starfivetech.com>
samin [Wed, 18 May 2022 02:58:55 +0000 (10:58 +0800)]
clk:starfive:jh7110: pll0 switches to 1250M.
pll0 switches to 1250M by spl.
Signed-off-by: samin <samin.guo@starfivetech.com>
andy.hu [Mon, 23 May 2022 09:55:39 +0000 (09:55 +0000)]
Merge branch 'CR_1028_SDIO_clivia.cai' into 'jh7110-5.15.y-devel'
dt-bindings:sd: update jh7110 sd dt-bingings
See merge request sdk/linux!79
Clivia.Cai [Fri, 20 May 2022 09:52:53 +0000 (17:52 +0800)]
dt-bindings:sd: update jh7110 sd dt-bingings
Update the evb board sd card dt-bingings
Signed-off-by: Clivia.Cai <Clivia.Cai@starfivetech.com>
andy.hu [Fri, 20 May 2022 04:44:28 +0000 (04:44 +0000)]
Merge branch 'CR_1033_PCIE_mason.huo' into 'jh7110-5.15.y-devel'
PCIe: plda: Add support for evb
See merge request sdk/linux!77
xingyu.wu [Fri, 20 May 2022 03:49:14 +0000 (11:49 +0800)]
clk:starfive:Add top clocks and reset in vout clock tree
Signed-off-by: xingyu.wu <xingyu.wu@starfivetech.com>
mason.huo [Mon, 16 May 2022 01:07:25 +0000 (09:07 +0800)]
PCIe: plda: Add support for evb
1.Add pinctrl for power-enable & perst#.
2.Config refclk & clkreq.
3.Add ATR for host bridge config space.
Signed-off-by: mason.huo <mason.huo@starfivetech.com>
andy.hu [Thu, 19 May 2022 13:38:58 +0000 (13:38 +0000)]
Merge branch 'CR_1005_SPI_1-6_Xingyu.Wu' into 'jh7110-5.15.y-devel'
Cr 1005 spi 1 6 xingyu.wu
See merge request sdk/linux!76
xingyu.wu [Thu, 19 May 2022 13:28:21 +0000 (21:28 +0800)]
pinctrl:starfive:Modify the mask of gpio_din_reg to make spi4 work
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
xingyu.wu [Tue, 17 May 2022 10:04:51 +0000 (18:04 +0800)]
dts:starfive:Add nodes for SPI 1 to 6
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
andy.hu [Thu, 19 May 2022 11:31:34 +0000 (11:31 +0000)]
Merge branch 'CR_1010_JPU_samin.guo' into 'jh7110-5.15.y-devel'
Cr 1010 jpu samin.guo
See merge request sdk/linux!75
andy.hu [Thu, 19 May 2022 09:01:46 +0000 (09:01 +0000)]
Merge branch 'CR_1026_SEC_william.qiu' into 'jh7110-5.15.y-devel'
crypto:starfive:fix clock diable error
See merge request sdk/linux!72
andy.hu [Thu, 19 May 2022 09:01:03 +0000 (09:01 +0000)]
Merge branch 'CR_971_temp_sensor_samin.guo' into 'jh7110-5.15.y-devel'
Cr 971 temp sensor samin.guo
See merge request sdk/linux!73
andy.hu [Thu, 19 May 2022 08:59:59 +0000 (08:59 +0000)]
Merge branch 'CR_1009_pmu_samin.guo' into 'jh7110-5.15.y-devel'
Cr 1009 pmu samin.guo
See merge request sdk/linux!74
samin [Tue, 17 May 2022 07:54:38 +0000 (15:54 +0800)]
dt-bindings:jh7110: Adjust clock-names/reset-names newlines
Adjust clock-names/reset-names newlines to unify the code style.
Signed-off-by: samin <samin.guo@starfivetech.com>
samin [Tue, 17 May 2022 07:32:51 +0000 (15:32 +0800)]
dt-bindings:jh7110:jpu: add NOC_BUS_CLK_VDEC for jpu.
JPU is in Power domain Vdec, so need NOC_BUS_CLK_VDEC.
Signed-off-by: samin <samin.guo@starfivetech.com>
samin [Thu, 19 May 2022 03:14:20 +0000 (11:14 +0800)]
pmu:starfive: Mask PMU_INT_PCH_FAIL interrupt
p-ch fail interrupt can be ignored.
Signed-off-by: samin <samin.guo@starfivetech.com>
yanhong.wang [Tue, 17 May 2022 09:38:00 +0000 (17:38 +0800)]
dt-bingings:gmac:jh7110: add gmac1 support.
remove pinctrl define, Modify the default configuration parameters.
Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
Signed-off-by: samin <samin.guo@starfivetech.com>
samin [Wed, 18 May 2022 01:19:00 +0000 (09:19 +0800)]
riscv:defconfig: add SFCTEMP support.
SFCTEMP is a tempsensor for Starfive JH7100/7110 SOC.
Signed-off-by: samin <samin.guo@starfivetech.com>
samin [Thu, 12 May 2022 02:10:03 +0000 (10:10 +0800)]
dt-bindings: hwmon: add starfive,jh7110-temp bindings
Add bindings for the temperature sensor on the StarFive JH7110 SoC.
Signed-off-by: samin <samin.guo@starfivetech.com>
samin [Thu, 12 May 2022 02:04:39 +0000 (10:04 +0800)]
hwmon:sfctemp: add starfive,jh7110-temp bindings.
jh7110 and jh7100 use the same configuration.
Signed-off-by: samin <samin.guo@starfivetech.com>
Emil Renner Berthing [Sun, 6 Jun 2021 20:31:18 +0000 (22:31 +0200)]
hwmon: (sfctemp) Add StarFive JH7100 temperature sensor
Register definitions and conversion constants based on sfctemp driver by
Samin in the StarFive 5.10 kernel.
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
Signed-off-by: samin <samin.guo@starfivetech.com>
Emil Renner Berthing [Sun, 6 Jun 2021 20:15:22 +0000 (22:15 +0200)]
dt-bindings: hwmon: add starfive,jh7100-temp bindings
Add bindings for the temperature sensor on the StarFive JH7100 SoC.
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: samin <samin.guo@starfivetech.com>
william.qiu [Thu, 19 May 2022 03:00:53 +0000 (11:00 +0800)]
crypto:starfive:fix clock diable error
Cancel the state that the encrypted clock is disabled by default
Signed-off-by: william.qiu <william.qiu@starfivetech.com>
andy.hu [Wed, 18 May 2022 15:15:20 +0000 (15:15 +0000)]
Merge branch 'CR_1024_PWMDAC_curry.zhang' into 'jh7110-5.15.y-devel'
[Audio: PWMDAC] enable pwmdac driver on 7110 evb board
See merge request sdk/linux!71
projects / platform / kernel / linux-starfive.git / log