platform/upstream/mesa.git
10 years agoi965/cfg: Add a foreach_block_and_inst macro.
Matt Turner [Sat, 12 Jul 2014 04:17:01 +0000 (21:17 -0700)]
i965/cfg: Add a foreach_block_and_inst macro.

Will let us abstract how the instructions are stored.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
10 years agoi965: Add cfg to backend_visitor.
Matt Turner [Sat, 12 Jul 2014 03:54:52 +0000 (20:54 -0700)]
i965: Add cfg to backend_visitor.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
10 years agoradeonsi/compute: Add support scratch buffer support v2
Tom Stellard [Fri, 18 Jul 2014 18:45:18 +0000 (14:45 -0400)]
radeonsi/compute: Add support scratch buffer support v2

The scratch buffer will be used for private memory and also register
spilling.

v2:
  - Code cleanups

10 years agoradeonsi/compute: Bump number of user sgprs for LLVM 3.5
Tom Stellard [Fri, 18 Jul 2014 18:40:50 +0000 (14:40 -0400)]
radeonsi/compute: Bump number of user sgprs for LLVM 3.5

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
10 years agowinsys/radeon: Query the kernel for the number of SEs and SHs per SE
Tom Stellard [Fri, 18 Jul 2014 17:19:43 +0000 (13:19 -0400)]
winsys/radeon:  Query the kernel for the number of SEs and SHs per SE

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
10 years agoradeonsi/compute: Share COMPUTE_DBG macro with r600g
Tom Stellard [Fri, 18 Jul 2014 16:25:29 +0000 (12:25 -0400)]
radeonsi/compute: Share COMPUTE_DBG macro with r600g

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
10 years agoradeonsi: Read rodata from ELF and append it to the end of shaders
Tom Stellard [Mon, 14 Jul 2014 20:49:08 +0000 (16:49 -0400)]
radeonsi: Read rodata from ELF and append it to the end of shaders

The is used for programs that have arrays of constants that
are accessed using dynamic indices.  The shader will compute
the base address of the constants and then access them using
SMRD instructions.

10 years agoglsl: Fix bad indentation
Ian Romanick [Thu, 26 Jun 2014 00:24:13 +0000 (17:24 -0700)]
glsl: Fix bad indentation

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
10 years agoi965: Silence unused parameter warning
Ian Romanick [Wed, 2 Jul 2014 18:05:05 +0000 (11:05 -0700)]
i965: Silence unused parameter warning

brw_fs_visitor.cpp:2400:1: warning: unused parameter 'ir' [-Wunused-parameter]

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
10 years agoi965: Silence 'comparison is always true' warning
Ian Romanick [Wed, 2 Jul 2014 17:47:54 +0000 (10:47 -0700)]
i965: Silence 'comparison is always true' warning

The parameter is an int16_t, and we're check that it's value will fit in
16-bits.  Yes, the value that is stored in 16-bits will surely fit in
16-bits.

brw_inst.h: In function 'brw_inst_set_gen6_jump_count':
brw_inst.h:321:66: warning: comparison is always true due to limited range of data type [-Wtype-limits]
brw_inst.h:321:66: warning: comparison is always true due to limited range of data type [-Wtype-limits]

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
10 years agoi965: Silence many unused parameter warnings
Ian Romanick [Wed, 2 Jul 2014 17:30:19 +0000 (10:30 -0700)]
i965: Silence many unused parameter warnings

brw_inst.h: In function 'brw_inst_set_src1_vstride':
brw_inst.h:118:76: warning: unused parameter 'brw' [-Wunused-parameter]

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
10 years agoconfigure.ac: Add LLVM patch version to error message.
Vinson Lee [Fri, 18 Jul 2014 19:12:37 +0000 (12:12 -0700)]
configure.ac: Add LLVM patch version to error message.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
10 years agomain/format_pack: Fix a wrong datatype in pack_ubyte_R8G8_UNORM
Jason Ekstrand [Thu, 17 Jul 2014 05:19:49 +0000 (22:19 -0700)]
main/format_pack: Fix a wrong datatype in pack_ubyte_R8G8_UNORM

Before it was only storing one of the color components due to truncation.
With this patch it now properly stores all of them.

Reviewed-by: Brian Paul <brianp@vmware.com>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>
10 years agodocs: Import 10.2.4 release notes
Carl Worth [Fri, 18 Jul 2014 23:50:05 +0000 (16:50 -0700)]
docs: Import 10.2.4 release notes

And add a news item.

10 years agoAdd support for RGBA8 and RGBX8 textures in intel_texsubimage_tiled_memcpy
Jason Ekstrand [Thu, 17 Jul 2014 21:40:23 +0000 (14:40 -0700)]
Add support for RGBA8 and RGBX8 textures in intel_texsubimage_tiled_memcpy

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
10 years agoi965: Improve debug output in intelTexImage and intelTexSubimage
Jason Ekstrand [Thu, 17 Jul 2014 21:38:57 +0000 (14:38 -0700)]
i965: Improve debug output in intelTexImage and intelTexSubimage

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
10 years agoradeonsi: only update vertex buffers when they need updating
Marek Olšák [Fri, 11 Jul 2014 21:17:07 +0000 (23:17 +0200)]
radeonsi: only update vertex buffers when they need updating

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
10 years agoradeonsi: remove nr_vertex_buffers
Marek Olšák [Wed, 9 Jul 2014 12:57:18 +0000 (14:57 +0200)]
radeonsi: remove nr_vertex_buffers

Unused.

Also inline util_set_vertex_buffers_count and simplify it.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
10 years agoradeonsi: move vertex buffer descriptors from IB to memory
Marek Olšák [Wed, 9 Jul 2014 02:00:53 +0000 (04:00 +0200)]
radeonsi: move vertex buffer descriptors from IB to memory

This removes the intermediate storage (pm4 state) and generates descriptors
directly in a staging buffer.

It also reduces the number of flushes, because the descriptors no longer
take CS space.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
10 years agoradeonsi: add support for fine-grained sampler view updates
Marek Olšák [Wed, 18 Jun 2014 01:23:46 +0000 (03:23 +0200)]
radeonsi: add support for fine-grained sampler view updates

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
10 years agoradeonsi: move si_set_sampler_views to si_descriptors.c
Marek Olšák [Wed, 18 Jun 2014 01:08:01 +0000 (03:08 +0200)]
radeonsi: move si_set_sampler_views to si_descriptors.c

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
10 years agoradeonsi: move sampler descriptors from IB to memory
Marek Olšák [Wed, 18 Jun 2014 00:46:49 +0000 (02:46 +0200)]
radeonsi: move sampler descriptors from IB to memory

Sampler descriptors are now represented by si_descriptors.
This also adds support for fine-grained sampler state updates and
the border color update is now isolated in a separate function.

Border colors have been broken if texturing from multiple shader stages is
used. This patch doesn't change that.

BTW, blitting already makes use of fine-grained state updates.
u_blitter uses 2 textures at most, so we only have to save 2.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
10 years agoradeonsi: implement ARB_draw_indirect
Marek Olšák [Thu, 24 Apr 2014 01:03:43 +0000 (03:03 +0200)]
radeonsi: implement ARB_draw_indirect

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
10 years agoradeonsi: don't add info->start to the index buffer offset
Marek Olšák [Thu, 24 Apr 2014 14:13:54 +0000 (16:13 +0200)]
radeonsi: don't add info->start to the index buffer offset

info->start will be invalid once info->indirect isn't NULL, so it shouldn't
be added to ib.offset.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
10 years agoradeonsi: use an SGPR instead of VGT_INDX_OFFSET
Marek Olšák [Wed, 23 Apr 2014 14:15:36 +0000 (16:15 +0200)]
radeonsi: use an SGPR instead of VGT_INDX_OFFSET

The draw indirect packets cannot set VGT_INDX_OFFSET, they can only set user
data SGPRs. This is the only way to support start/index_bias with indirect
drawing.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
10 years agoradeonsi: assume LLVM 3.4.2 is always present
Marek Olšák [Tue, 8 Jul 2014 00:50:57 +0000 (02:50 +0200)]
radeonsi: assume LLVM 3.4.2 is always present

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
10 years agoconfigure.ac: require LLVM 3.4.2 for radeon
Marek Olšák [Tue, 8 Jul 2014 00:41:13 +0000 (02:41 +0200)]
configure.ac: require LLVM 3.4.2 for radeon

Needed by ARB_draw_indirect.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
10 years agost/mesa,gallium: add a workaround for Unigine Heaven 4.0 and Valley 1.0
Marek Olšák [Tue, 8 Jul 2014 18:24:55 +0000 (20:24 +0200)]
st/mesa,gallium: add a workaround for Unigine Heaven 4.0 and Valley 1.0

Most (all?) Unigine shaders fail to compile without this if sample shading
is advertised. This is, of course, Unigine developers' fault.

Reviewed-by: Brian Paul <brianp@vmware.com>
10 years agoglsl: add a mechanism to allow #extension directives in the middle of shaders
Marek Olšák [Tue, 8 Jul 2014 18:20:22 +0000 (20:20 +0200)]
glsl: add a mechanism to allow #extension directives in the middle of shaders

This is needed to make Unigine Heaven 4.0 and Unigine Valley 1.0 work
with sample shading.

Also, if this is disabled, the error message at least makes sense now.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
10 years agor600g: Implement GL_ARB_texture_gather
Glenn Kennard [Wed, 16 Jul 2014 14:31:26 +0000 (16:31 +0200)]
r600g: Implement GL_ARB_texture_gather

Only supported on evergreen and later. Currently limited
to single component textures as the hardware GATHER4
instruction ignores texture swizzles.

Piglit quick run passes on radeon 6670 with all
applicable textureGather tests, no regressions.

Signed-off-by: Glenn Kennard <glenn.kennard@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
10 years agoi965: Fix z_offset computation in intel_miptree_unmap_depthstencil()
Anuj Phogat [Mon, 14 Jul 2014 23:16:47 +0000 (16:16 -0700)]
i965: Fix z_offset computation in intel_miptree_unmap_depthstencil()

The bug is triggered by using glTexSubImage2d() with GL_DEPTH_STENCIL
as base internal format and non-zero x, y offsets. Currently x, y
offsets are ignored while updating the texture image.

Fixes Khronos GLES3 CTS tests:
npot_tex_sub_image_2d
npot_tex_sub_image_3d
npot_pbo_tex_sub_image_2d
npot_pbo_tex_sub_image_2d

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
10 years agoRevert "i965: Extend compute-to-mrf pass to understand blocks of MOVs"
Anuj Phogat [Tue, 15 Jul 2014 19:56:37 +0000 (12:56 -0700)]
Revert "i965: Extend compute-to-mrf pass to understand blocks of MOVs"

This reverts commit bbefb15e01e1c16af69646898918982ae00f8c92.
Fixes the 11 regressions caused in framebuffer_blit tests in
Khronos GLES3 CTS tests:

Original patch reduced the instruction count but had no performance
benefits. So, it's safe to revert it without causing any performance
regressions.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Acked-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
10 years agoi915: Fix up intelInitScreen2 for DRI3
Adel Gadllah [Thu, 3 Jul 2014 20:13:53 +0000 (22:13 +0200)]
i915: Fix up intelInitScreen2 for DRI3

Commit 442442026eb updated both i915 and i965 for DRI3 support,
but one check in intelInitScreen2 was missed for i915 causing crashes
when trying to use i915 with DRI3.

So fix that up.

Reported-by: Igor Gnatenko <i.gnatenko.brain@gmail.com>
References: https://bugzilla.redhat.com/show_bug.cgi?id=1115323
References: https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=754297
Tested-by: František Zatloukal <Zatloukal.Frantisek@gmail.com>
Tested-by: Dirk Griesbach <spamthis@freenet.de>
Signed-off-by: Adel Gadllah <adel.gadllah@gmail.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>
10 years agomesa: Fix regression introduced by commit "mesa: fix packing of float texels to GL_SH...
Pavel Popov [Mon, 30 Jun 2014 15:21:56 +0000 (22:21 +0700)]
mesa: Fix regression introduced by commit "mesa: fix packing of float texels to GL_SHORT/GL_BYTE".

This commit "mesa: fix packing of float texels to GL_SHORT/GL_BYTE" replaced *_TO_BYTE to *_TO_BYTE_TEX because *_TO_FLOAT_TEX are used to unpack the texels to floats.
In this case *_TO_FLOATZ in function extract_float_rgba also should be replaced to *_TO_FLOAT_TEX. Underline that these macros automatically preserve zero when converting.

The regression was observed on 3 oglconform tests:
    snorm-textures basic.getTexImage
    snorm-textures advanced.mipmap.manual.getTex
    snorm-textures advanced.mipmap.upload.getTex

Signed-off-by: Pavel Popov <pavel.e.popov@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
10 years agonv50: fix build failure on m68k due to invalid struct alignment assumptions
Thorsten Glaser [Wed, 30 Oct 2013 17:04:07 +0000 (18:04 +0100)]
nv50: fix build failure on m68k due to invalid struct alignment assumptions

Make alignment assumptions explicit by inserting correct padding with
unknown struct members.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: <mesa-stable@lists.freedesktop.org>
10 years agoclover: Call end_query before getting timestamp result v2
Tom Stellard [Wed, 16 Jul 2014 20:14:07 +0000 (16:14 -0400)]
clover: Call end_query before getting timestamp result v2

v2:
  - Move the end_query() call into the timestamp constructor.
  - Still pass false as the wait parameter to get_query_result().

Reviewed-by: Niels Ole Salscheider <niels_ole@salscheider-online.de>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
CC: "10.2" <mesa-stable@lists.freedesktop.org>
10 years agoglsl: handle a switch where default is in the middle of cases
Tapani Pälli [Mon, 14 Jul 2014 06:45:46 +0000 (09:45 +0300)]
glsl: handle a switch where default is in the middle of cases

This fixes following tests in es3conform:

   shaders.switch.default_not_last_dynamic_vertex
   shaders.switch.default_not_last_dynamic_fragment

and makes following tests in Piglit pass:

   glsl-1.30/execution/switch/fs-default-notlast-fallthrough
   glsl-1.30/execution/switch/fs-default_notlast

No Piglit regressions.

v2: take away unnecessary ir_if, just use conditional assignment
v3: use foreach_in_list instead of foreach_list

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com> (v2)
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> (v3)
10 years agoglsl: Make the tree rebalancer use vector_elements, not components().
Kenneth Graunke [Tue, 15 Jul 2014 23:36:32 +0000 (16:36 -0700)]
glsl: Make the tree rebalancer use vector_elements, not components().

components() includes matrix columns, so if this code encountered a
matrix, it would ask for something like a vec9 or vec16.  This is
clearly not what you want.

Earlier code now prevents this from seeing matrices, but we should still
use vector_elements, for clarity.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
10 years agoglsl: Guard against error_type in the tree rebalancer.
Kenneth Graunke [Tue, 15 Jul 2014 23:35:55 +0000 (16:35 -0700)]
glsl: Guard against error_type in the tree rebalancer.

This helped me track down the bug fixed in the previous commit.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
10 years agoglsl: Make the tree rebalancer bail on matrix operands.
Kenneth Graunke [Tue, 15 Jul 2014 23:34:56 +0000 (16:34 -0700)]
glsl: Make the tree rebalancer bail on matrix operands.

It doesn't handle things like (vector * matrix) correctly, and
apparently Matt's intention was to bail.

Fixes shader compilation in Natural Selection 2.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
10 years agoRevert "i965: Implement GL_PRIMITIVES_GENERATED with non-zero streams."
Kenneth Graunke [Wed, 16 Jul 2014 18:35:59 +0000 (11:35 -0700)]
Revert "i965: Implement GL_PRIMITIVES_GENERATED with non-zero streams."

This reverts commit 3178d2474ae5bdd1102fb3d76a60d1d63c961ff5.

This caused GPU hangs on Ivybridge for some users and huge (80%)
performance regressions across the board on multiple platforms.

We need to find a better solution.  I've made several attempts, but none
of them have worked yet.  In the meantime, we should revert this.

Reverting it breaks GL_PRIMITIVES_GENERATED for non-zero streams, but
that's okay, since we don't expose GL_ARB_gpu_shader5 yet.

Fixes Piglit's EXT_transform_feedback/generatemipmap prims_generated
test case on Haswell.

10 years agoilo: add some missing formats
Chia-I Wu [Wed, 16 Jul 2014 05:51:49 +0000 (13:51 +0800)]
ilo: add some missing formats

Map more pipe formats to hardware formats.  Enable more VB formats on Haswell.

10 years agoilo: update and tailor the surface format table
Chia-I Wu [Wed, 16 Jul 2014 03:58:10 +0000 (11:58 +0800)]
ilo: update and tailor the surface format table

Recreate the table from scratch with the help of a pdf-table-to-csv converter.
Switch to a form that is more suitable for ilo.

10 years agoi965: Don't copy propagate abs into Broadwell logic instructions.
Kenneth Graunke [Wed, 16 Jul 2014 04:27:08 +0000 (21:27 -0700)]
i965: Don't copy propagate abs into Broadwell logic instructions.

It's not clear what abs on logical instructions means on Broadwell, and
it doesn't appear to do anything sensible.

Fixes 270 Piglit tests (the bitand/bitor/bitxor tests with abs).

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=81157
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>
10 years agoi965/fs: Use WE_all for gl_SampleID header register munging.
Kenneth Graunke [Wed, 16 Jul 2014 03:40:55 +0000 (20:40 -0700)]
i965/fs: Use WE_all for gl_SampleID header register munging.

This code should execute without regard to the currently executing
channels.  Asking for gl_SampleID inside control flow might break in
strange ways.  It appears to break even at the top of the program in
SIMD16 mode occasionally as well.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Cc: mesa-stable@lists.freedesktop.org
10 years agoi965/fs: Set force_uncompressed and force_sechalf on samplepos setup.
Kenneth Graunke [Fri, 11 Jul 2014 00:48:39 +0000 (17:48 -0700)]
i965/fs: Set force_uncompressed and force_sechalf on samplepos setup.

gen8_fs_generator uses these to decide whether to set the execution size
to 8 or 16, so we incorrectly made both of these MOVs the full width in
SIMD16 shaders.  (It happened to work out on Gen4-7.)

Setting them should also help inform optimization passes what's really
going on, which could help avoid bugs.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Cc: mesa-stable@lists.freedesktop.org
10 years agoi965: Set execution size to 8 for instructions with force_sechalf set.
Kenneth Graunke [Fri, 11 Jul 2014 00:49:36 +0000 (17:49 -0700)]
i965: Set execution size to 8 for instructions with force_sechalf set.

Both inst->force_uncompressed and inst->force_sechalf mean that the
generated instruction should be uncompressed and have an execution size
of 8.  We don't require the visitor to set both flags - setting
inst->force_sechalf by itself is supposed to be enough.

On Gen4-7, guess_execution_size() demoted instructions to 8-wide based
on the default compression state.  On Gen8+, we instead set a default
execution size, which worked great...except that we forgot to check
inst->force_sechalf when deciding whether to use 8 or 16.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Cc: mesa-stable@lists.freedesktop.org
10 years agonvc0: fix translate path for PRIM_RESTART_WITH_DRAW_ARRAYS
Christoph Bumiller [Thu, 4 Apr 2013 13:30:48 +0000 (15:30 +0200)]
nvc0: fix translate path for PRIM_RESTART_WITH_DRAW_ARRAYS

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
10 years agonvc0: add support for indirect drawing
Christoph Bumiller [Thu, 4 Apr 2013 13:28:13 +0000 (15:28 +0200)]
nvc0: add support for indirect drawing

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
10 years agonouveau: check if a fence has already been signalled
Ilia Mirkin [Thu, 10 Jul 2014 03:20:43 +0000 (23:20 -0400)]
nouveau: check if a fence has already been signalled

nouveau_fence_update does real work unconditionally. Avoid doing that if
the fence we're checking on has already been signalled.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
10 years agoglsl: Don't declare variables in for-loop declaration.
Matt Turner [Tue, 15 Jul 2014 19:13:22 +0000 (12:13 -0700)]
glsl: Don't declare variables in for-loop declaration.

Reported-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
10 years agoexec_list: Make various places use the new length() method.
Connor Abbott [Tue, 8 Jul 2014 19:21:00 +0000 (12:21 -0700)]
exec_list: Make various places use the new length() method.

Instead of hand-rolling it.

v2 [mattst88]: Rename get_size to length. Expand comment in ir_reader.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> [v1]
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Connor Abbott <connor.abbott@intel.com>
10 years agoexec_list: Add a function to give the length of a list.
Connor Abbott [Tue, 8 Jul 2014 19:20:59 +0000 (12:20 -0700)]
exec_list: Add a function to give the length of a list.

v2 [mattst88]: Remove trailing whitespace. Rename get_size to length.
               Mark as const.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> [v1]
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Connor Abbott <connor.abbott@intel.com>
10 years agoexec_list: Add a prepend function.
Connor Abbott [Tue, 8 Jul 2014 19:20:58 +0000 (12:20 -0700)]
exec_list: Add a prepend function.

This complements the existing append function. It's implemented in a
rather simple way right now; it could be changed if performance is a
concern.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Connor Abbott <connor.abbott@intel.com>
10 years agomesa: Don't allow GL_TEXTURE_{LUMINANCE,INTENSITY}_* queries outside compat profile
Ian Romanick [Tue, 17 Jun 2014 00:57:30 +0000 (17:57 -0700)]
mesa: Don't allow GL_TEXTURE_{LUMINANCE,INTENSITY}_* queries outside compat profile

There are no queries for GL_TEXTURE_LUMINANCE_SIZE,
GL_TEXTURE_INTENSITY_SIZE, GL_TEXTURE_LUMINANCE_TYPE, or
GL_TEXTURE_INTENSITY_TYPE in any version of OpenGL ES or desktop OpenGL
core profile.

NOTE: Without changes to piglit, this regresses
required-sized-texture-formats.

v2: Rebase on different initial change.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Cc: "10.2 <mesa-stable@lists.freedesktop.org>
10 years agomesa: Don't allow GL_TEXTURE_BORDER queries outside compat profile
Ian Romanick [Tue, 17 Jun 2014 00:17:43 +0000 (17:17 -0700)]
mesa: Don't allow GL_TEXTURE_BORDER queries outside compat profile

There are no texture borders in any version of OpenGL ES or desktop
OpenGL core profile.

Fixes piglit's gl-3.2-texture-border-deprecated.

v2: Rebase on different initial change.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Cc: "10.2 <mesa-stable@lists.freedesktop.org>
10 years agomesa: Handle uninitialized textures like other textures in get_tex_level_parameter_image
Ian Romanick [Tue, 17 Jun 2014 21:58:14 +0000 (14:58 -0700)]
mesa: Handle uninitialized textures like other textures in get_tex_level_parameter_image

Instead of catching the special case early, handle it by constructing a
fake gl_texture_image that will cause the values required by the OpenGL
4.0 spec to be returned.

Previously, calling

    glGenTextures(1, &t);
    glBindTexture(GL_TEXTURE_2D, t);
    glGetTexLevelParameteriv(GL_TEXTURE_2D, 0, 0xDEADBEEF, &value);

would not generate an error.

Anuj: Can you verify this does not regress proxy_textures_invalid_size?

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Suggested-by: Brian Paul <brianp@vmware.com>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Cc: Anuj Phogat <anuj.phogat@gmail.com>
10 years agoi965/fs: Relax interference check in register coalescing.
Matt Turner [Tue, 8 Jul 2014 19:13:27 +0000 (12:13 -0700)]
i965/fs: Relax interference check in register coalescing.

A similar attempt was made in commit 5ff1e446 and was reverted in commit
a39428cf after causing a regression in an ES 3 conformance test. The
test still passes after this commit.

total instructions in shared programs: 1994827 -> 1992858 (-0.10%)
instructions in affected programs:     128247 -> 126278 (-1.54%)
GAINED:                                0
LOST:                                  1

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
10 years agoi965/fs: Perform CSE on sends-from-GRF rather than textures.
Matt Turner [Thu, 10 Jul 2014 18:47:44 +0000 (11:47 -0700)]
i965/fs: Perform CSE on sends-from-GRF rather than textures.

Should potentially allow a few more cases, while avoiding doing CSE on
texture operations on Gen <= 6 with the MRF.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80211
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: lu hua <huax.lu@intel.com>
10 years agoglsl: Update expression types after rebalancing the tree.
Matt Turner [Thu, 10 Jul 2014 18:00:25 +0000 (11:00 -0700)]
glsl: Update expression types after rebalancing the tree.

If we saw a tree that looked like

            vec3
           /   \
         vec3 float
        /   \
      vec3 float
     /   \
   vec3 float

We would see that all of the expression types were vec3, and then
rebalance to

           vec3
        /        \
      vec3       vec3 <-- should be float
     /   \      /    \
   vec3 float float float

This patch adds code to visit the rebalanced tree and update the
expression types from the bottom up.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80880
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
10 years agoglsl: Add callback_leave to ir_hierarchical_visitor.
Matt Turner [Thu, 10 Jul 2014 17:39:19 +0000 (10:39 -0700)]
glsl: Add callback_leave to ir_hierarchical_visitor.

10 years agoi965: Initialize new chunks of realloc'd memory.
Matt Turner [Tue, 8 Jul 2014 23:50:28 +0000 (16:50 -0700)]
i965: Initialize new chunks of realloc'd memory.

Otherwise we'd compare uninitialized pointers with NULL and dereference,
leading to crashes.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
10 years agoradeon/llvm: Fix LLVM diagnostic error reporting
Tom Stellard [Thu, 10 Jul 2014 17:06:52 +0000 (13:06 -0400)]
radeon/llvm: Fix LLVM diagnostic error reporting

We were trying to print the error message after disposing the
message object.

Tested-by and Reviewed-by: Aaron Watry <awatry@gmail.com>

10 years agoutil/tgsi: Fix ureg_EMIT/ENDPRIM prototype.
José Fonseca [Tue, 15 Jul 2014 13:47:20 +0000 (14:47 +0100)]
util/tgsi: Fix ureg_EMIT/ENDPRIM prototype.

0cbefc1bea703378381afff946e30c27a21f191d added a source argument to
EMIT/ENDPRIM, but it did not update tgsi_ureg accordingly, causing all
users of ureg_EMIT/ENDPRIM to fail at runtime with an assertion failure.

Trivial.

10 years agoglapi: Use GetProcAddress instead of dlsym on Windows.
Vinson Lee [Tue, 10 Jun 2014 01:07:07 +0000 (18:07 -0700)]
glapi: Use GetProcAddress instead of dlsym on Windows.

This patch fixes this MinGW build error.

glapi_gentable.c: In function '_glapi_create_table_from_handle':
glapi_gentable.c:123:9: error: implicit declaration of function 'dlsym' [-Werror=implicit-function-declaration]
         *procp = dlsym(handle, symboln);
         ^

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Acked-by: Brian Paul <brianp@vmware.com>
10 years agoilo: raise texture size limits
Chia-I Wu [Tue, 15 Jul 2014 01:54:08 +0000 (09:54 +0800)]
ilo: raise texture size limits

Report the hardware limits now that max-texture-size piglit test has been
fixed.

10 years agoilo: move away from drm_intel_bo_alloc_tiled
Chia-I Wu [Mon, 14 Jul 2014 02:10:35 +0000 (10:10 +0800)]
ilo: move away from drm_intel_bo_alloc_tiled

We want to know the exact sizes of the BOs, and the driver has the knowledge
to do so.  Refactoring of the resource allocation code is needed though.

10 years agoradeonsi: partially revert "switch descriptors to i32 vectors"
Marek Olšák [Mon, 14 Jul 2014 17:40:14 +0000 (19:40 +0200)]
radeonsi: partially revert "switch descriptors to i32 vectors"

It indeed breaks LLVM 3.4.2.

10 years agoi965/vec4: Invalidate live intervals in opt_cse, not _local.
Matt Turner [Sat, 12 Jul 2014 03:38:09 +0000 (20:38 -0700)]
i965/vec4: Invalidate live intervals in opt_cse, not _local.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
10 years agoi965/vec4: Move aeb list into opt_cse_local.
Matt Turner [Sat, 12 Jul 2014 03:36:39 +0000 (20:36 -0700)]
i965/vec4: Move aeb list into opt_cse_local.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
10 years agoi965/fs: Invalidate live intervals in opt_cse, not _local.
Matt Turner [Sat, 12 Jul 2014 03:37:04 +0000 (20:37 -0700)]
i965/fs: Invalidate live intervals in opt_cse, not _local.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
10 years agoi965/fs: Move aeb list into opt_cse_local.
Matt Turner [Sat, 12 Jul 2014 03:35:31 +0000 (20:35 -0700)]
i965/fs: Move aeb list into opt_cse_local.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
10 years agoglsl: Fix aggregates with dynamic initializers.
Cody Northrop [Thu, 10 Jul 2014 15:55:31 +0000 (09:55 -0600)]
glsl: Fix aggregates with dynamic initializers.

Vectors are falling in to the ir_dereference_array() path.

Without this change, the following glsl aborts the debug driver,
or gets the wrong answer in release:

mat2x2 a = mat2( vec2( 1.0, vertex.x ), vec2( 0.0, 1.0 ) );

Also submitting piglit tests, will reference in bug.

v2: Rebase on Mesa master.

v3: Remove unneeded check for arrays, which are covered by
    process_array_constructor(), recommended by Timothy Arceri.

Signed-off-by: Cody Northrop <cody@lunarg.com>
Reviewed-by: Courtney Goeltzenleuchter <courtney@lunarg.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79373

10 years agoAvoid mesa_dri_drivers import lib being installed
Jon TURNEY [Sat, 5 Apr 2014 18:20:15 +0000 (19:20 +0100)]
Avoid mesa_dri_drivers import lib being installed

On Cygwin and MinGW, linking a shared library also generates an import library

Use a wildcard which also matches the name of the megadriver import lib,
mesa_dri_drivers.dll.a, so that is also removed after megadriver symlinks are
created

(This then matches src/gallium/targets/dri/Makefile.am, which already does
things this way)

Signed-off-by: Jon TURNEY <jon.turney@dronecode.org.uk>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
10 years agoi965/vec4: Silence warnings about unhandled interpolation ops
Chris Forbes [Sat, 12 Jul 2014 23:13:18 +0000 (11:13 +1200)]
i965/vec4: Silence warnings about unhandled interpolation ops

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
10 years agodocs: Mark off ARB_gpu_shader5 interpolation functions for i965
Chris Forbes [Sat, 12 Jul 2014 22:04:25 +0000 (10:04 +1200)]
docs: Mark off ARB_gpu_shader5 interpolation functions for i965

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
10 years agoi965/fs: add support for ir_*_interpolate_at_* expressions
Chris Forbes [Sun, 17 Nov 2013 07:00:00 +0000 (20:00 +1300)]
i965/fs: add support for ir_*_interpolate_at_* expressions

SIMD8-only for now.

V5: - Fix style complaints
    - Move prototype to be with other oddball emit functions
    - Use unreachable() instead of assert() where possible

V6: - Describe what is happening with the clamping
    - Add reg_width to make some expressions clearer

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
10 years agoi965/fs: Skip channel expressions splitting for interpolation
Chris Forbes [Sun, 17 Nov 2013 07:07:46 +0000 (20:07 +1300)]
i965/fs: Skip channel expressions splitting for interpolation

The backend will have to do a message send, so we want to keep these in
one piece, just like texture ops.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
10 years agoi965/fs: add generator support for pixel interpolator query
Chris Forbes [Mon, 18 Nov 2013 08:13:13 +0000 (21:13 +1300)]
i965/fs: add generator support for pixel interpolator query

V5: - Split into separate opcodes
    - Pass message data in src1 immediate
    - Put noperspective bit in fs_inst rather than adding any junk to
      backend_instruction

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
10 years agoi965: add low-level support for send to pixel interpolator
Chris Forbes [Sun, 17 Nov 2013 08:47:22 +0000 (21:47 +1300)]
i965: add low-level support for send to pixel interpolator

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
10 years agoi965/disasm: add support for pixel interpolator messages
Chris Forbes [Mon, 18 Nov 2013 08:24:24 +0000 (21:24 +1300)]
i965/disasm: add support for pixel interpolator messages

V3: Rework for brw_inst changes

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
10 years agoi965: Add message descriptor bit definitions for pixel interpolator
Chris Forbes [Sat, 12 Jul 2014 01:21:01 +0000 (13:21 +1200)]
i965: Add message descriptor bit definitions for pixel interpolator

These got lost in the big brw_inst shakeup.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
10 years agoi965/disasm: Disassemble indirect sends more properly
Chris Forbes [Sun, 6 Jul 2014 08:11:07 +0000 (20:11 +1200)]
i965/disasm: Disassemble indirect sends more properly

- Don't try to disassemble send's src1 as a descriptor if it's not an
  immediate.

- In the same case, show src1 as an operand (makes it easier to see
  bogus register regions, etc -- the hardware is very fussy)

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Matt Turner <mattst88@gmail.com>
10 years agoi965: Avoid crashing while dumping vec4 insn operands
Chris Forbes [Sun, 6 Jul 2014 08:11:06 +0000 (20:11 +1200)]
i965: Avoid crashing while dumping vec4 insn operands

We'd otherwise go looking into virtual_grf_sizes for things that aren't
in there at all.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Matt Turner <mattst88@gmail.com>
10 years agoi965: Fix two broken asserts in brw_eu_emit
Chris Forbes [Sun, 6 Jul 2014 08:11:05 +0000 (20:11 +1200)]
i965: Fix two broken asserts in brw_eu_emit

These were looking in the wrong field.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Matt Turner <mattst88@gmail.com>
10 years agoglsl: add new interpolateAt* builtin functions
Chris Forbes [Sun, 10 Nov 2013 06:34:53 +0000 (19:34 +1300)]
glsl: add new interpolateAt* builtin functions

V2: - Don't assume everyone wants interpolateAtSample() lowered to
      interpolateAtOffset. It turns out this isn't what we want most
      of the time for i965. Lowering can be added later in an ir pass
      which drivers opt into, rather than bolting it straight into the
      builtin definition.
    - Only expose the interpolateAt* builtins in the fragment language.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
10 years agoglsl: add new expression types for interpolateAt*
Chris Forbes [Sun, 10 Nov 2013 06:13:54 +0000 (19:13 +1300)]
glsl: add new expression types for interpolateAt*

Will be used to implement interpolateAt*() from ARB_gpu_shader5

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
10 years agoallow builtin functions to require parameters to be shader inputs
Chris Forbes [Sun, 10 Nov 2013 08:19:31 +0000 (21:19 +1300)]
allow builtin functions to require parameters to be shader inputs

The new interpolateAt* builtins have strange restrictions on the
<interpolant> parameter.

- It must be a shader input, or an element of a shader input array.
- It must not include a swizzle.

V2: Don't abuse ir_var_mode_shader_in for this; make a new flag.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
10 years agoradeonsi: rename definitions of shader limits
Marek Olšák [Mon, 7 Jul 2014 21:27:19 +0000 (23:27 +0200)]
radeonsi: rename definitions of shader limits

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
10 years agoradeonsi: switch descriptors to i32 vectors
Marek Olšák [Mon, 7 Jul 2014 20:49:15 +0000 (22:49 +0200)]
radeonsi: switch descriptors to i32 vectors

This is a follow-up to the commit which adds texture fetches with offsets.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
10 years agoradeonsi: properly implement texture opcodes that take an offset
Marek Olšák [Wed, 25 Jun 2014 01:12:46 +0000 (03:12 +0200)]
radeonsi: properly implement texture opcodes that take an offset

Instead of using intr_name in lp_build_tgsi_action, this selects the names
with a switch statement in the emit function. This allows emitting
llvm.SI.sample for instructions without offsets and llvm.SI.image.sample.*.o
otherwise.

This depends on my LLVM changes.

When LLVM 3.5 is released, I'll switch all texture instructions to the new
intrinsics.

10 years agoradeonsi: fix texture fetches with derivatives for 1DArray and 3D textures
Marek Olšák [Wed, 2 Jul 2014 01:55:47 +0000 (03:55 +0200)]
radeonsi: fix texture fetches with derivatives for 1DArray and 3D textures

10 years agoradeonsi: fix samplerCubeShadow with bias
Marek Olšák [Fri, 4 Jul 2014 01:19:58 +0000 (03:19 +0200)]
radeonsi: fix samplerCubeShadow with bias

Pack the depth value before overwriting it with cube coordinates.

Cc: mesa-stable@lists.freedesktop.org
10 years agost/mesa: fix samplerCubeShadow with bias
Marek Olšák [Fri, 4 Jul 2014 01:19:58 +0000 (03:19 +0200)]
st/mesa: fix samplerCubeShadow with bias

It has 5 coordinates: (x,y,z,depth,lodbias)

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
10 years agomesa: fix crash in st/mesa after deleting a VAO
Marek Olšák [Thu, 10 Jul 2014 22:05:44 +0000 (00:05 +0200)]
mesa: fix crash in st/mesa after deleting a VAO

This happens when glGetMultisamplefv (or any other non-draw function) is
called, which doesn't invoke the VBO module to update _DrawArrays and
the pointer is invalid at that point.

However st/mesa still dereferences it to setup vertex buffers ==> crash.

Reviewed-by: Brian Paul <brianp@vmware.com>
10 years agoconfigure: Cygwin requires _XOPEN_SOURCE >= 700 to prototype strndup()
Jon TURNEY [Wed, 9 Jul 2014 14:09:32 +0000 (15:09 +0100)]
configure: Cygwin requires _XOPEN_SOURCE >= 700 to prototype strndup()

Adjust definition of _XOPEN_SOURCE appropriately for use of strndup() added with
commit da3a47d6

Signed-off-by: Jon TURNEY <jon.turney@dronecode.org.uk>
10 years agogallium/docs: minor clarification for TXQ instruction
Brian Paul [Thu, 10 Jul 2014 15:42:21 +0000 (09:42 -0600)]
gallium/docs: minor clarification for TXQ instruction

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
10 years agosoftpipe: fix sp_get_dims() for PIPE_BUFFER
Brian Paul [Thu, 10 Jul 2014 15:37:39 +0000 (09:37 -0600)]
softpipe: fix sp_get_dims() for PIPE_BUFFER

Before, we were checking the level against view->u.tex.last_level but
level is not valid for buffers.  Plus, the aliasing of the view->u.tex
view->u.buf members (a union) caused the level checking arithmetic to
be totally wrong.  The net effect is we always returned early for
PIPE_BUFFER size queries.

This fixes the piglit "textureSize 140 fs samplerBuffer" test.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
10 years agoglsl/glcpp: move macro declaration before code to fix MSVC build
Brian Paul [Wed, 9 Jul 2014 23:17:58 +0000 (17:17 -0600)]
glsl/glcpp: move macro declaration before code to fix MSVC build

Reviewed-by: Carl Worth <cworth@cworth.org>
10 years agonvc0/ir: add support for interpolating with non-default settings
Ilia Mirkin [Sun, 6 Jul 2014 03:05:35 +0000 (23:05 -0400)]
nvc0/ir: add support for interpolating with non-default settings

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>