Konstantin Seurer [Tue, 9 Aug 2022 18:10:51 +0000 (20:10 +0200)]
radv: Inline bvh build headers
Thos are only included once, so just move the code into the
corresponding .comp files.
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17963>
SoroushIMG [Mon, 15 Aug 2022 22:17:09 +0000 (23:17 +0100)]
zink: Fix incorrect emission of SPIR-V shift ops
SPIR-V shift ops unlike NIR have undefined behavior if shift count
larger than or equalt to bitwidth.
This means that true translation of NIR ishl/ishr/ushr to SPIR-V requires
masking like that done in gallivm.
This was seen in the case of soft fp64 in cts case
KHR-GL46.gpu_shader_fp64.builtin.ceil_double.
Cc: mesa-stable
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18074>
Gert Wollny [Tue, 16 Aug 2022 08:39:02 +0000 (10:39 +0200)]
r600: Fix SCRATCH OP de-assembly
1d871aa6268159cdc63ef846599456d9ba567206
r600g: Implement spilling of temp arrays (v2)
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18130>
Gert Wollny [Tue, 16 Aug 2022 08:33:36 +0000 (10:33 +0200)]
r600: Don't use SB with R600 style scratch reads
SB fails when handling indirect READ_SCRATCH commands.
Fixes:
1d871aa6268159cdc63ef846599456d9ba567206
r600g: Implement spilling of temp arrays (v2)
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18130>
Gert Wollny [Tue, 16 Aug 2022 07:59:02 +0000 (09:59 +0200)]
r600/sfn: Handle R600 scratch read
Fixes:
33765aa92aa5c150873fc210e9d6c1fe22cf8646
r600/sfn: Enable NIR for pre RG hardware
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18130>
Gert Wollny [Mon, 15 Aug 2022 16:52:09 +0000 (18:52 +0200)]
r600: Force NOPs when loading AR on R600 class hardware
Loading indirectly from a register that was just written to
doesn't work on R600 class hardware, so add a NOP group with
the address register load being emitted in the t-slot. to make
sure that the register write was finished.
Fixes:
33765aa92aa5c150873fc210e9d6c1fe22cf8646
r600/sfn: Enable NIR for pre RG hardware
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18130>
Gert Wollny [Mon, 15 Aug 2022 15:15:43 +0000 (17:15 +0200)]
r600/sfn: Initialize out buffer when printing op
79ca456b4837b3bc21cf9ef3c03c505c4b4909f6
r600/sfn: rewrite NIR backend
Closes: #7021
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18130>
Gert Wollny [Sun, 14 Aug 2022 16:17:08 +0000 (18:17 +0200)]
r600/sfn: Fix color outputs when color0 writes all
Fixes:
33765aa92aa5c150873fc210e9d6c1fe22cf8646
r600/sfn: Enable NIR for pre RG hardware
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18130>
Gert Wollny [Sun, 14 Aug 2022 12:44:29 +0000 (14:44 +0200)]
r600/sfn: Sort FS inputs to make interpolated values come first
On R600 and R700 class hardware the input declaration order maps
directly to the register the hardware writes the inputs to, so
make all interpolated inputs come first, and only then emit the
system values like POS or FACE.
Related: #7035
Fixes:
33765aa92aa5c150873fc210e9d6c1fe22cf8646
r600/sfn: Enable NIR for pre RG hardware
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18130>
Gert Wollny [Fri, 5 Aug 2022 17:55:41 +0000 (19:55 +0200)]
r600/sfn: Add GS thread fix just like the TGSI code path
The old code does the same for R600.
Fixes:
33765aa92aa5c150873fc210e9d6c1fe22cf8646
r600/sfn: Enable NIR for pre RG hardware
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18130>
Gert Wollny [Thu, 4 Aug 2022 08:20:33 +0000 (10:20 +0200)]
r600/sfn: Schedule shift instruction on R600 in t-slot
Fixes:
33765aa92aa5c150873fc210e9d6c1fe22cf8646
r600/sfn: Enable NIR for pre RG hardware
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18130>
Dave Airlie [Thu, 30 Dec 2021 21:07:48 +0000 (07:07 +1000)]
crocus: sync performance monitor code with iris.
This provides the same info as iris does now, and exposes
INTEL_performance_query
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18099>
Timothy Arceri [Wed, 17 Aug 2022 05:32:03 +0000 (15:32 +1000)]
glsl: dont lower precision for textureGatherOffsets
textureGatherOffsets always takes a highp array of constants. As
per the discussion in [1] trying to lower the precision results in segfault
later on in the compiler as textureGatherOffsets will end up being passed
a temp when its expecting a constant as required by the spec.
[1] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16547#note_1393704
Fixes:
b83f4b9fa23d ("glsl: Add an IR lowering pass to convert mediump operations to 16-bit")
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18101>
Roman Stratiienko [Thu, 4 Aug 2022 09:59:01 +0000 (12:59 +0300)]
v3dv: Avoid swapchain_info handling on Android
Allows following tests to pass.
dEQP-VK.wsi.android.swapchain.create#image_swapchain_create_info
dEQP-VK.wsi.android.swapchain.simulate_oom#image_swapchain_create_info
Venus code was used as example.
Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18047>
Roman Stratiienko [Fri, 5 Aug 2022 13:23:10 +0000 (16:23 +0300)]
v3dv: Limit API version to v1.0 for Android
Android CDD has additional requirements that must be met in order to
enable 1.1+:
- samplerYcbcrConversion
- VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_SYNC_FD_BIT
- VK_EXTERNAL_FENCE_HANDLE_TYPE_SYNC_FD_BIT
- VK_ANDROID_external_memory_android_hardware_buffer >= v2
Requirements are checked by:
android.graphics.cts.VulkanFeaturesTest#testVulkan1_1Requirements CTS
Fixes:
2686c5419d67 ("v3dv: add Android support")
Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18047>
Roman Stratiienko [Tue, 9 Aug 2022 10:27:10 +0000 (13:27 +0300)]
v3dv: Enable sync_fd importing/exporting on Android
vk_common_AcquireImageANDROID and vk_common_QueueSignalReleaseImageANDROID
expect sync_fd import/export to be enabled, otherwise they crashes
while trying to ImportSemaphoreFdKHR() / GetSemaphoreFdKHR().
Features was disabled on Linux to skip sync_fd CTS tests, which is using
late vkEvent signalling which causes deadlock / dEQP timeout on v3dv.
One of the options was implementing blocking v3dv-specific
AcquireImageANDROID / QueueSignalReleaseImageANDROID to avoid importing
/ exporting sync_fd, but since these features are also required by CDD
for Vulkan 1.1 and above, it was decided to enable the extensions for
Android in exchange of a few failed dEQP tests (which should not cause
any issues in non-dEQP scenarious).
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6977
Fixes:
316728a55bc8 ("v3dv: Switch to the common submit framework")
Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18047>
Karol Herbst [Wed, 17 Aug 2022 13:02:37 +0000 (15:02 +0200)]
ci: bumping all tags to make sure we don't have hidden fails
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18108>
Karol Herbst [Wed, 17 Aug 2022 16:47:43 +0000 (18:47 +0200)]
ci: update fails list
one might want to investigate this, but for now let's move on and unblock
MRs.
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18108>
Mike Blumenkrantz [Thu, 11 Aug 2022 12:54:52 +0000 (08:54 -0400)]
ci: remove broken device-select-layer from build
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18108>
Marcin Ślusarz [Fri, 12 Aug 2022 15:16:17 +0000 (17:16 +0200)]
intel/compiler: fix mesh urb write regression
Right now even the simplest mesh test (func.mesh.basic.mesh from crucible) fails like this:
ASSERT: Scalar MESH validation failed!
load_payload(16) vgrf11+0.0:F, vgrf8:D
../../src/intel/compiler/brw_fs_validate.cpp:61: inst->dst.offset / REG_SIZE + regs_written(inst) <= alloc.sizes[inst->dst.nr]
Because we try to load 8 regs with LOAD_PAYLOAD in SIMD16 mode.
Fixes:
349a040f684 ("intel/fs: Make logical URB write instructions more like other logical instructions")
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18075>
Ikshwaku Chauhan [Wed, 3 Aug 2022 05:12:09 +0000 (10:42 +0530)]
Revert "radeon: add EFC support to only VCN2.0 devices"
This reverts commit
23e5b910c57158030ba246530c57ab13a51245f3.
Reason for revert:
It's causing the regression for H264 transcoding. We will Enable EFC
once we verify all corner cases and as of now disabling
Signed-off-by: Ikshwaku Chauhan <ikshwaku.chauhan@amd.com>
Reviewed-by: Thong Thai <thong.thai@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17869>
Kenneth Graunke [Wed, 17 Aug 2022 23:24:24 +0000 (16:24 -0700)]
iris: Fix PIPE_CAP_UMA
If we have VRAM we're not exactly a unified memory architecture, are we?
Cc: mesa-stable
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18123>
Kenneth Graunke [Mon, 15 Aug 2022 07:18:59 +0000 (00:18 -0700)]
intel/compiler: Drop variable group size lowering
This backend lowering code has been dead since the removal of i965 -
nothing in the current source tree ever sets the flag.
This is handled by iris_setup_uniforms() and crocus_setup_uniforms().
Variable group size does not appear to be a feature in anv.
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18055>
Dmitry Osipenko [Wed, 10 Aug 2022 22:04:31 +0000 (01:04 +0300)]
llvmpipe: Align persistent mappings to page size
KVM requires memory mapping to be aligned to page size, otherwise it
refuses to do the mapping. In particular this causes KVM mapping errors
when llvmpipe is used by virtio-gpu on host and guest tries to map buffer
that has a persistent mapping, i.e. it tries to map the llvmpipe's host
blob/buffer. Mesa virgl driver uses host blobs only for the buffers with
persistent mapping, hence let's align buffer allocations to the page size
when the persistence flag is set to fix the KVM fault.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18053>
Mike Blumenkrantz [Tue, 16 Aug 2022 16:37:47 +0000 (12:37 -0400)]
zink: try to reuse swapchain modifier for dmabuf export
the non-negotiated path assumes that drivers know what implicit modifiers they're
using, but zink doesn't know what it's doing, so instead try to copy the
swapchain's modifier and reuse that since in theory it should work
Fixes:
247b8f2924b ("zink: add all format modifiers when adding for dmabuf export")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18095>
Mike Blumenkrantz [Tue, 16 Aug 2022 14:37:49 +0000 (10:37 -0400)]
zink: iterate over all modifiers and nuke the ones that aren't supported
the spec mandates that all modifiers passed to the driver be valid, so
iterate through all of them and delete the invalid ones
Fixes:
247b8f2924b ("zink: add all format modifiers when adding for dmabuf export")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18095>
Mike Blumenkrantz [Fri, 5 Aug 2022 16:32:17 +0000 (12:32 -0400)]
zink: bail out of dmabuf resource creation when srgb explosion is expected
if srgb-ness isn't supported by the driver for dmabuf, bail out early with an
error message with the assumption that this would later (maybe) explode when
trying to create a view for srgb framebuffer
ref !17900
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18095>
Jesse Natalie [Thu, 11 Aug 2022 22:55:19 +0000 (15:55 -0700)]
microsoft/compiler: Fix PSV struct when numthreads is 0
Fixes:
d9e575d4 ("microsoft/compiler: DXIL validator 1.6 uses a new PSV struct version")
Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18023>
Jesse Natalie [Fri, 12 Aug 2022 01:47:33 +0000 (18:47 -0700)]
dxil_nir_lower_int_cubemaps: When not lowering samplers, don't touch sampler types
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18025>
Jesse Natalie [Fri, 12 Aug 2022 15:52:45 +0000 (08:52 -0700)]
microsoft/compiler: Discard shouldn't be marked readnone
Cc: mesa-stable
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18034>
Georg Lehmann [Thu, 11 Aug 2022 12:43:23 +0000 (14:43 +0200)]
aco: Force tex operand to have the correct sub dword size before packing.
get_ssa_temp's and NIR's bit size can differ for scalar sources.
This causes broken packing of the MIMG operands with A16/G16.
Fixes:
f5f73db846e ("aco: Support 16bit sources for texture ops.")
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18008>
Victor Hermann Chiletto [Sat, 14 May 2022 20:00:21 +0000 (17:00 -0300)]
radv: refactor descriptor set layout tracking
Separately track descriptor set layouts for pools with
FREE_DESCRIPTOR_SET disabled, instead of reusing
`radv_descriptor_pool::entries`. This saves 8 bytes for each entry and
also avoids some indirection.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16541>
Yonggang Luo [Sat, 13 Aug 2022 04:29:29 +0000 (12:29 +0800)]
c11: #include <threads.h> when the os/platform provide it
Closes #6964
CC: mesa-stable
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18043>
Rob Clark [Wed, 17 Aug 2022 21:19:36 +0000 (14:19 -0700)]
llvmpipe: Add some missing locking
The lp_rasterizer is shared across contexts, and lp_rast_fence called
without holding rast_mutex could race with rast_mutex being replaced and
unref'd on a different thread.
Fixes:
a680fd078c0 ("llvmpipe: make last_fence a screen/rast object not a context one.")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18116>
Mike Blumenkrantz [Tue, 16 Aug 2022 17:07:14 +0000 (13:07 -0400)]
nir: add uses_bindless flag for shader_info
this is cumbersome to detect, so detect it here
the flag denotes the use of either bindless texture operations
or shader variables such that drivers can infer the use of bindless
descriptor management functionality
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18088>
Rob Clark [Sat, 13 Aug 2022 17:38:30 +0000 (10:38 -0700)]
egl/dri2: Error path cleanups
Simplify things for the next patch.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18111>
Rob Clark [Sat, 13 Aug 2022 17:42:18 +0000 (10:42 -0700)]
egl/dri2: Indenting fix
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18111>
Rob Clark [Thu, 11 Aug 2022 17:01:01 +0000 (10:01 -0700)]
egl: Add some locking asserts
Make it obvious if we screw up while reworking locking.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18111>
Rob Clark [Thu, 11 Aug 2022 16:56:37 +0000 (09:56 -0700)]
egl: Convert to simple_mtx_t
Mostly because simple_mtx_assert_locked() will come in handy during
locking re-work.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18111>
Rob Clark [Thu, 11 Aug 2022 17:44:56 +0000 (10:44 -0700)]
egl: Remove redundant fxn param
*Technically* we should be unlocking with the 'disp' and not the 'dpy'
(even though they are the same thing).
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18111>
Rob Clark [Thu, 11 Aug 2022 16:20:53 +0000 (09:20 -0700)]
egl: Drop unused _EGL_FUNC_START() arg
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18111>
Rob Clark [Thu, 11 Aug 2022 16:07:18 +0000 (09:07 -0700)]
egl: Drop _eglSetFuncName() return
It always returned EGL_TRUE
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18111>
Rob Clark [Sat, 13 Aug 2022 16:47:52 +0000 (09:47 -0700)]
util: Fix vs2019 build error
Needed for dependency on MAX_INT.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Acked-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18111>
Rob Clark [Tue, 9 Aug 2022 20:30:45 +0000 (13:30 -0700)]
freedreno/drm/virtio: Add some atrace
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18111>
Rob Clark [Tue, 9 Aug 2022 16:28:57 +0000 (09:28 -0700)]
egl: atrace support
Perfetto is showing mutex contention on disp->Mutex when multiple
threads are making egl calls on their own current context. This
makes it easier to see what is contending with what.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18111>
Rob Clark [Mon, 8 Aug 2022 21:52:07 +0000 (14:52 -0700)]
freedreno/drm: Avoid lock in fd_pipe_del()
If we aren't dropping the last refcnt we don't need the lock. This
avoids contention between retire-queue against others.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18111>
Samuel Pitoiset [Wed, 17 Aug 2022 13:21:09 +0000 (15:21 +0200)]
radv: do not compress DCC in presence of render loops on GFX10+
DCC shouldn't be compressed for Vulkan feedback loops (ie. render pass
with input attachments). It looks like it has always been broken...
Note that GFX9 and earlier chips aren't affected because they don't
compress DCC on GENERAL.
This fixes
dEQP-VK.rasterization.rasterization_order_attachment_access.format*.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18104>
Charmaine Lee [Tue, 16 Aug 2022 01:55:45 +0000 (18:55 -0700)]
svga: support TGSI_SEMANTIC_TEXCOORD in swtnl draw context
Since PIPE_CAP_TGSI_TEXCOORD is now enabled, texcoord is now declared
as TGSI_SEMANTIC_TEXCOORD instead of TGSI_SEMANTIC_GENERIC.
Fixes assert running REDTurbineDEMO with MTL Renderer when the guest needs to
fallback to swtnl for line stipple.
Fixes:
e73443b7a50 ("svga: enable PIPE_CAP_TGSI_TEXCOORD for vgpu10 and up")
Reviewed-by: Martin Krastev <krastevm@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18113>
Alyssa Rosenzweig [Mon, 15 Aug 2022 21:21:13 +0000 (21:21 +0000)]
pan/mdg: Remove disassembler stats
They're now unused and they were never especially useful.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18094>
Alyssa Rosenzweig [Mon, 15 Aug 2022 23:58:43 +0000 (23:58 +0000)]
pan/decode: Clean up _bifrost_ decode routines
It's noisy since Bifrost was introduced, unnecessary since we converted to
per-arch GenXML, and wrong since Valhall was added.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18094>
Alyssa Rosenzweig [Mon, 15 Aug 2022 23:52:52 +0000 (23:52 +0000)]
pan/decode: Centrally declare pandecode entrypoints
Deduplicate in preparation for CSF.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18094>
Alyssa Rosenzweig [Mon, 15 Aug 2022 21:18:22 +0000 (21:18 +0000)]
pan/decode: Defeature disassembler stats
Architecturally, these only work for Midgard, and even on Midgard didn't turn
out to be too useful. While we're removing pandecode cruft, let's remove the
stats that just add noise to Bifrost and Valhall (and largely just noise to
Midgard too).
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18094>
Alyssa Rosenzweig [Mon, 15 Aug 2022 19:10:04 +0000 (19:10 +0000)]
pan/decode: Unify SFBD/MFBD decoding
It's the same core logic. Unify and let GenXML do its thing.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18094>
Alyssa Rosenzweig [Mon, 15 Aug 2022 18:55:17 +0000 (18:55 +0000)]
pan/decode: Reorder MFBD decoding
Eliminate some #ifdef by grouping v5 and v6 state separately.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18094>
Alyssa Rosenzweig [Mon, 15 Aug 2022 18:54:20 +0000 (18:54 +0000)]
pan/decode: Simplify pandecode_fbd
Remove unsued width/height properties, and use cleaner C syntax to build the
return value.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18094>
Alyssa Rosenzweig [Mon, 15 Aug 2022 18:49:04 +0000 (18:49 +0000)]
pan/decode: Stop passing suffixes around
Unused.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18094>
Alyssa Rosenzweig [Mon, 15 Aug 2022 18:45:28 +0000 (18:45 +0000)]
pan/decode: Stop passing job index around
There are a lot of problems with passing job_index around:
* Almost entirely unused
* Not particularly helpful even when used
* Mostly ignored for Valhall already
* Doesn't extend to CSF
It only really exists due to the early days of pandecode generating valid C code
as the trace format. With GenXML instead, that's not applicable.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18094>
Alyssa Rosenzweig [Mon, 15 Aug 2022 18:38:56 +0000 (18:38 +0000)]
pan/decode: Remove pandecode_msg
It hasn't had a consistent semantic meaning since we've switched decoding over
to GenXML.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18094>
Alyssa Rosenzweig [Mon, 15 Aug 2022 18:35:45 +0000 (18:35 +0000)]
pan/decode: Don't pass around memory handles
The hardware doesn't care what BO a given buffer resides in, only what GPU
address it's at. It's simpler to fetch from a GPU address, rather than the pair
of a GPU address and a backing allocation. This cleans up a lot of cruft in
pandecode.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18094>
Mark Collins [Wed, 17 Aug 2022 07:32:38 +0000 (13:02 +0530)]
tu: Implement VK_EXT_non_seamless_cube_map
Passes CTS tests: dEQP-VK.texture.*non_seamless_*
Signed-off-by: Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18079>
Friedrich Vock [Wed, 10 Aug 2022 19:22:43 +0000 (21:22 +0200)]
radv/winsys: Return VK_ERROR_INVALID_EXTERNAL_HANDLE if buffer imports fail
Section 11.2.6 of the Vulkan spec states:
"Importing memory from a particular host pointer may not be possible due to
additional platform-specific restrictions beyond the scope of this
specification in which case the implementation must fail the memory
import operation with the error code VK_ERROR_INVALID_EXTERNAL_HANDLE_KHR."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17995>
Pierre-Eric Pelloux-Prayer [Wed, 10 Aug 2022 10:31:35 +0000 (12:31 +0200)]
radeonsi: prevent u_blitter recursion in si_update_ps_colorbuf0_slot
When u_blitter calls util_blitter_restore_fragment_states we may
end up in si_update_ps_colorbuf0_slot.
This commit makes sure we don't call u_blitter from there.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6921
Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17981>
Samuel Pitoiset [Tue, 29 Mar 2022 12:30:59 +0000 (14:30 +0200)]
radv: add a very initial implementation of VK_EXT_graphics_pipeline_library
This experimental and very suboptimal implementation of graphics
pipeline library shouldn't be used by anyone, except for development
purposes. It's still under active development from my side. This
extension is only exposed via RADV_PERFTEST=gpl anyways.
It's very suboptimal because RADV doesn't yet support PS epilogs and
VS prologs need to be improved/reworked because GPL changed the logic
(eg. can't know the next stage when compiling a prolog). So, currently
the driver ALWAYS retains NIR shaders during libs creation and it links
and compiles in the final pipeline.
I have WIP branches for approximately everything but it looks simpler
to start merging an initial implementation in order to improve steps
by steps from main. This commit might look simple and short but I
already merged TON of preliminary work. RADV was definitely not ready
for GPL and it's still not completely fine. Expect refactoring again.
This implementation currently pass
dEQP-VK.pipeline.pipeline_library.* on NAVI21, except few feedback
creation tests due to CTS bugs.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17542>
Samuel Pitoiset [Fri, 12 Aug 2022 11:48:06 +0000 (13:48 +0200)]
radv: prevent accessing rasterization state when it's NULL
It might be NULL for gfx pipeline libs.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17542>
Samuel Pitoiset [Tue, 16 Aug 2022 08:53:06 +0000 (10:53 +0200)]
radv: store vk_graphics_pipeline_state to radv_graphics_pipeline
For gfx pipeline libraries we would have to keep track of the gfx
state, so change how it's allocated.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17542>
Samuel Pitoiset [Wed, 1 Jun 2022 07:59:14 +0000 (09:59 +0200)]
radv: introduce a new pipeline type for graphics libs
It currently inherits from radv_graphics_pipeline because it's simpler
but I think it could be improved because most of fields won't be useful
for libs.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17542>
Samuel Pitoiset [Wed, 1 Jun 2022 08:05:06 +0000 (10:05 +0200)]
radv: add radv_graphics_pipeline_import_info() helper
It also initializes dynamic states and active stages. It will also be
used when creating a graphics pipeline library.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17542>
Samuel Pitoiset [Thu, 14 Jul 2022 12:26:53 +0000 (14:26 +0200)]
radv: remove unused pCreateInfo from radv_pipeline_init_blend_state()
I missed this one last time.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17542>
Danylo Piliaiev [Tue, 16 Aug 2022 13:45:39 +0000 (16:45 +0300)]
tu: Disable LRZ write when alpha-to-coverage is enabled
Alpha-to-coverage acts like discard and happens after FS ends,
so like with discard LRZ write should be disabled.
With discard we don't know at the moment of binning whether
fragment would be not discarded, so we cannot write its depth to LRZ.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6876
Cc: mesa-stable
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18083>
Matt Turner [Tue, 16 Aug 2022 15:20:21 +0000 (11:20 -0400)]
intel/tools: Also look for 'batch' tag
This changed in the kernel at some point, but I'm not sure when.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18087>
Yusuf Khan [Sat, 6 Aug 2022 18:32:36 +0000 (14:32 -0400)]
tu: remove tu_syncobj_to_fd
It isnt used anymore, last used in tu_wsi_display.c which doesnt
exist anymore.
Signed-off-by: Yusuf Khan <yusisamerican@gmail.com>
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17927>
Kenneth Graunke [Tue, 16 Aug 2022 01:41:25 +0000 (18:41 -0700)]
iris: Clean up iris_sample_with_depth_aux()
The majority of the logic here was for the Gfx8-9 sample-from-hiz
hardware feature, which only applies to AUX_USAGE_HIZ, and neither
of the combined HiZ+CCS modes. So, reorganize the function to put
the logic for each case in the case itself.
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4674>
Kenneth Graunke [Tue, 10 Nov 2020 23:48:10 +0000 (15:48 -0800)]
iris: Always retain ISL_AUX_USAGE_HIZ_CCS_WT in texture aux usage
When using HIZ_CCS_WT, we always want to use that for texturing so that
we're able to sample from the CCS buffer, which will have the latest
data due to the write-through mode.
With the previous commit in place, HiZ now exists for all miplevels
on platforms which support HIZ_CCS_WT, so we no longer need the
per-miplevel checks.
The other restrictions in this function only apply to the Gfx8-9 feature
where the sampler directly supported reading from HiZ itself, which was
removed. Hardware where HiZ and CCS can be used together doesn't have
that feature nor its restrictions.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4952
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4674>
Kenneth Graunke [Tue, 16 Aug 2022 01:13:41 +0000 (18:13 -0700)]
iris: Enable HiZ for non-8x4 aligned miplevels on Icelake and later
8x4 alignment was absolutely required prior to Gfx8, and while some
things were relaxed on Gfx8-9, Nanley's experiments in issue #3788
indicated that there were still issues on those platforms.
It appears that the restrictions were relaxed on Icelake and
non-8x4 aligned HiZ "should" work on Gfx11+.
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4674>
Kenneth Graunke [Tue, 16 Aug 2022 01:12:54 +0000 (18:12 -0700)]
iris: Pass devinfo to iris_resource_level_has_hiz()
This will let us enforce 8x4 alignment rules differently based on the
specific hardware generation in question.
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4674>
Emma Anholt [Tue, 9 Aug 2022 17:58:35 +0000 (10:58 -0700)]
ir3: Suppress disasm of internal shaders unless IR3_SHADER_DEBUG=internal.
When you're debugging some deqp test or app, it's irritating to page
through 8 MRT clear shaders in turnip to get to what you're looking for.
Use the info.internal flag to suppress those shaders. (but if you want to
IR3_SHADER_DEBUG=internal, then yeah, print them all).
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18002>
Dave Airlie [Sat, 13 Aug 2022 01:15:45 +0000 (11:15 +1000)]
nir_to_tgsi_info: drop const_buffers_declared
Drivers don't use this, so avoid the assert it could have.
Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18042>
Friedrich Vock [Fri, 12 Aug 2022 17:19:47 +0000 (19:19 +0200)]
amd/common: Remove redundant code for determining memory ops per clock
Fixes:
82fd379d9ef ("amd/common: move ac_memory_ops_per_clock into ac_gpu_info.h")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18038>
Sonny Jiang [Tue, 9 Aug 2022 16:12:35 +0000 (12:12 -0400)]
radeonsi/vcn: add decode support for gfx1101 and gfx1103
Add decode support for gfx1101 and gfx1103
Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18063>
José Roberto de Souza [Mon, 15 Aug 2022 15:45:26 +0000 (08:45 -0700)]
anv: Free vmas in case device creation fails in pthread_mutex_init(&device->mutex
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17961>
José Roberto de Souza [Wed, 27 Jul 2022 13:52:06 +0000 (06:52 -0700)]
anv: Remove anv_app_info
Dead-code not used anywhere.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17961>
José Roberto de Souza [Mon, 8 Aug 2022 19:17:25 +0000 (12:17 -0700)]
anv: Remove duplicated memset() in physical device creation
device is allocated with vk_zalloc() that zeroes the allocated memory.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17961>
José Roberto de Souza [Mon, 8 Aug 2022 17:48:01 +0000 (10:48 -0700)]
intel: Simply intel_gem_create_context_engines()
We can use I915_DEFINE_CONTEXT_PARAM_ENGINES() to simply the filling
of engines_param.
As some compilers might not support VLA, defining struct with 64
engines, the maximum that i915 API supports.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17961>
Mike Blumenkrantz [Fri, 5 Aug 2022 16:04:29 +0000 (12:04 -0400)]
zink: rework descriptor pool overflow
previously this would just destroy and recreate pools, but it's much
smarter to instead store the pools and just reuse them when needed
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18065>
Mike Blumenkrantz [Thu, 4 Aug 2022 17:27:38 +0000 (13:27 -0400)]
zink: use a single allocation for zink_descriptor_layout_key
this is slightly more smart
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18065>
Mike Blumenkrantz [Thu, 4 Aug 2022 17:16:16 +0000 (13:16 -0400)]
zink: use a dynarray instead of hash table for tracking pools
this may use a little more memory, but having direct access to the pool
without needing a lookup in a (potentially big) hash table is definitely
worth it
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18065>
Mike Blumenkrantz [Thu, 4 Aug 2022 16:43:01 +0000 (12:43 -0400)]
zink: add an id member for zink_descriptor_pool_key
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18065>
Mike Blumenkrantz [Thu, 4 Aug 2022 11:55:01 +0000 (07:55 -0400)]
zink: require VK_KHR_descriptor_update_template
it's been long enough, and there's no technical reason why drivers
shouldn't have this implemented
ZINK_DESCRIPTORS environment variable is preserved for future use
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18065>
Rhys Perry [Mon, 15 Aug 2022 16:21:05 +0000 (17:21 +0100)]
aco: test for one and_savexec opcode in try_optimize_branching_sequence
A situation where it doesn't match is probably not possible, so this
probably doesn't fix anything.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18077>
Rhys Perry [Mon, 15 Aug 2022 16:19:07 +0000 (17:19 +0100)]
aco: improve vcc check for instructions between exec_val and exec_copy
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18077>
Rhys Perry [Mon, 15 Aug 2022 16:10:28 +0000 (17:10 +0100)]
aco: remove val_and_copy_adjacent
If this is true, then the only instruction the loops visit is
p_logical_end and the loops are no-ops.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18077>
Rhys Perry [Mon, 15 Aug 2022 16:14:11 +0000 (17:14 +0100)]
aco: test branch opcode if removing it in try_optimize_branching_sequence
We shouldn't remove a p_cbranch_nz branch in this situation.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Fixes:
b731be2e96c ("aco: Remove branch instruction when exec is constant non-zero.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18077>
Rhys Perry [Mon, 15 Aug 2022 16:06:23 +0000 (17:06 +0100)]
aco: fix re-write of uses of exec_val's lo/hi half
The isConstant() check isn't useful. If it's a constant, then the
physReg() check will fail.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Fixes:
baab6f18c91 ("aco: Optimize branching sequence during SSA elimination.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18077>
Rhys Perry [Mon, 15 Aug 2022 16:01:52 +0000 (17:01 +0100)]
aco: fix assembly of vopc_sdwa writing exec
We would assemble an instruction writing vcc instead.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Fixes:
5ffc73896f3 ("aco/assembler: Fix v_cmpx with SDWA.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18077>
Rhys Perry [Mon, 15 Aug 2022 16:01:06 +0000 (17:01 +0100)]
aco: rename is_cmp to is_fp_cmp
The old name is no longer accurate.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18077>
Rhys Perry [Mon, 15 Aug 2022 16:46:50 +0000 (17:46 +0100)]
aco: fix consecutive exec writes when finding exec_copy instruction
This can happen with transitions to exact:
s2: %0:exec = p_parallelcopy %622:s[0-1]
s2: %625:s[0-1], s1: %624:scc, s2: %0:exec = s_and_saveexec_b64 %141:vcc, %0:exec
s2: %626:s[12-13] = p_cbranch_z %0:exec BB2, BB1
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Fixes:
410eff4d2f3 ("aco: Fix optimizing branching sequence with s_and_saveexec.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18077>
Eric Engestrom [Mon, 15 Aug 2022 09:22:57 +0000 (10:22 +0100)]
ci: rename GitHub CI workflow from `ci` to `macos` to be a bit more explicit about what it covers
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Yurii Kolesnykov <root@yurikoles.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18057>
Rajnesh Kanwal [Fri, 12 Aug 2022 15:46:42 +0000 (16:46 +0100)]
pvr: Implement vkResetDescriptorPool API.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18060>
Rhys Perry [Tue, 16 Aug 2022 10:41:15 +0000 (11:41 +0100)]
docs/radv: advertise VK_KHR_global_priority
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18078>
Joshua Ashton [Sat, 6 Aug 2022 02:15:13 +0000 (02:15 +0000)]
radv: Remove workarounds for D3D9 feedback loops
RADV supports VK_EXT_attachment_feedback_loop_layout now,
and DXVK is using since
63d582a6e7ab63e18503d1238101705a818f5ad0 which
will be in DXVK 2.0, so no need for these anymore.
Older versions of DXVK will still be affected by the issue however.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17920>